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2024-09-18 14:22:27 +01:00
commit 18306c66fc
6128 changed files with 3186840 additions and 0 deletions

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***** file size is 160000
runtime = 0.000212
# p/ll_cache_miss_rd
92265
***** file size is 160000
runtime = 0.000244
# p/L2D_TLB
4918074
***** file size is 160000
runtime = 0.000292
# p/DTLB_WALK
26005
***** file size is 160000
runtime = 0.000234
# p/L1D_TLB_RD
399876441
***** file size is 160000
runtime = 0.000216
# p/L2D_TLB
2946541
***** file size is 4000000
# p/ll_cache_miss_rd
0
0
202420
108748 runtime = 0.000358
7366843
12350564
13586069
6779734
56950
***** file size is 4000000
# p/L2D_TLB
0
0
0
0 runtime = 0.000355
284913797
285856703
296730044
***** file size is 4000000
# p/DTLB_WALK
0
2722
0
0 runtime = 0.000369
84290
185921
251521
356452
***** file size is 4000000
# p/L1D_TLB_RD
0
0
3182857841
2676269451 runtime = 0.000347
3632836262
5086931936
4921595689
2380537223
***** file size is 4000000
# p/L2D_TLB
13933616
0
0
55855105 runtime = 0.000328
177840659
380285140
292719568
163746827
***** file size is 100000000
# p/ll_cache_miss_rd
99132
38980
0
197161
0
67519
0
140400
0
143043
0
0
0
284282
# p/ll_cache_miss_rd
0
140444
0
134435
83831
50211
75049
0
0
0
288554
74050
71429
74809
# p/ll_cache_miss_rd
73262
73649
0
140714
70424
0
147499
68600
81265
0
139783
64799
0
151170
# p/ll_cache_miss_rd
68801
0
145452
0
125288
0
163795
0
141640
73859
74317
64148
0
136959
# p/ll_cache_miss_rd
72307
69894
77496
67138
0
139846
70331
0
132302
70375
0
84102
123513
0
# p/ll_cache_miss_rd
144565
3028
137573
5823
71125
134909
0
138289
0
134450
0
142950
0
86537
# p/ll_cache_miss_rd
111946
0
114053
0
128592
91062
0
0
238779
74466
70433
77585
28764
73445
# p/ll_cache_miss_rd
110675
34944
106227
73441
66853
38920
72495
104062
11226
105905
70625
56476
***** file size is 100000000
# p/L2D_TLB
18130995
0
33028288
29996407
22608092
0
31192747
0
52731944
0
40234984
642921
0
0
# p/L2D_TLB
0
0
0
121159391
36184678
0
42541162
0
21330990
39301881
8359005
31524351
20
39931129
# p/L2D_TLB
19963516
20137778
0
40202382
19
39777568
20081969
19246988
11938034
26768027
0
39183827
19287693
1143221
# p/L2D_TLB
19521220
38207819
4
22124789
33708710
4119701
21037254
0
39095436
20859001
36319344
20140867
19584873
3674466
# p/L2D_TLB
19356737
17244296
22331678
0
39540260
19406894
0
42215441
19379013
32102565
19622172
19852435
19410640
19579397
# p/L2D_TLB
19343633
13605252
14075127
19916730
31448432
8254938
21049230
10444948
0
54307818
0
0
0
78942862
# p/L2D_TLB
0
44824213
19957202
0
39918080
19758522
0
34767931
23495166
19987193
19513513
19526967
19965670
19920766
# p/L2D_TLB
19967121
19405457
19399844
19409943
0
39894378
0
0
0
61536907
36235550
***** file size is 100000000
# p/DTLB_WALK
1072
1566
0
775
564
574
0
0
1842
397
832
0
1143
0
# p/DTLB_WALK
1132
0
0
3478
335
1181
0
1451
0
0
2456
914
566
208
# p/DTLB_WALK
1323
0
1341
0
0
0
2800
869
0
1624
852
0
1444
78
# p/DTLB_WALK
0
1165
242
0
0
1436
0
1656
1295
672
0
2124
689
247
# p/DTLB_WALK
974
196
664
0
0
0
0
4571
411
1108
0
1855
779
0
# p/DTLB_WALK
0
0
3973
0
0
2126
1090
0
0
0
1455
868
834
0
# p/DTLB_WALK
2252
743
0
0
0
2867
576
528
737
1279
753
0
0
1469
# p/DTLB_WALK
709
0
951
1011
560
923
389
681
887
0
1091
***** file size is 100000000
# p/L1D_TLB_RD
0
0
4417755799
0
2587126745
0
1907452696
0
4470211896
1490535856
1488268722
1492406027
0
0
# p/L1D_TLB_RD
3020774732
1502998186
1495229685
1513519294
2943026264
1500269058
52149259
1496657426
2937658244
1494297672
74030192
1501455826
1495883230
2888428091
# p/L1D_TLB_RD
1482110806
150844250
2836859365
0
2995913912
0
2986402746
0
1637257243
2848563352
336366333
0
2955346561
1582901866
# p/L1D_TLB_RD
1494805041
1486848958
1575414883
0
3006540619
1651961484
1495211562
1418961073
2413046393
0
2310831892
1545685148
1494591413
1494394190
# p/L1D_TLB_RD
1495772460
1497140001
1506995279
1502064624
1503212470
1494161247
1496442614
1494353921
1496910315
1490640984
2120990326
1496964537
1503480472
0
# p/L1D_TLB_RD
2487680099
1511772203
1990506585
1085
1495006176
2981033808
1497807398
1499905019
0
2992809338
1499678220
1503422919
1432738350
1572013300
# p/L1D_TLB_RD
1488687745
1491956406
1493056793
1490487590
1494885596
0
2981312602
1495995022
1494473531
91287100
2756251323
230008646
1491190180
1430538651
# p/L1D_TLB_RD
1583249575
1576908184
1332064486
0
3175178358
0
3080574208
2649916724
1275899646
0
2878955633
***** file size is 100000000
# p/L2D_TLB
11074868
17796846
0
42335753
0
42578037
17369088
0
0
0
82499577
0
0
0
# p/L2D_TLB
82928349
19903822
20322217
20196113
20575304
19769508
0
40692176
0
35388820
0
46400139
20884653
0
# p/L2D_TLB
40479127
20938047
20020758
21590212
17955844
1895112
24707564
35247723
19854386
19994871
0
0
39958384
39619071
# p/L2D_TLB
19821971
0
39754647
0
39873651
19521815
20209862
20048932
20231348
20214678
0
41152963
6223168
16818928
# p/L2D_TLB
37877594
12893970
21214360
0
32124557
20718531
0
40755758
35334046
0
41293476
20648826
0
20479335
# p/L2D_TLB
21645864
28444433
0
34204784
36576871
0
0
0
76911224
20723929
14021956
28392009
26330087
0
# p/L2D_TLB
41195363
9598203
28499682
0
34404203
29859217
20539283
20714755
20553408
0
20889230
32963850
7949901
33765967
# p/L2D_TLB
28019151
13062566
26967792
0
0
62723768
15030483
20277594
0
41160435
0
28127160

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@@ -0,0 +1,57 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array(np.array([int(x) for x in """0
0
202420
108748
7366843
12350564
13586069
6779734
56950""".replace(' ',',').replace('\n','').split(",")]))
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array(np.array([int(x) for x in """105883
0
135218
0
8322082
12700590
12017926
6160362
134527""".replace(' ',',').replace('\n','').split(",")]))
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
L1D_CACHE_LMISS_RD
The counter counts each Memory-read operation to the Level 1 data or unified cache counted by L1D_CACHE that incurs additional latency because it returns data from outside of the Level 1 data or unified cache of this PE.
The event indicates to software that the access missed in the Level 1 data or unified cache and might have a significant performance impact due to the additional latency compared to the latency of an access that hits in the Level 1 data or unified cache.
The counter does not count:
• Accesses where the additional latency is unlikely to be significantly performance-impacting. For example, if the access hits in another cache in the same local cluster, and the additional latency is small when compared to a miss in all Level 1 caches that the access looks up in and results in an access being made to a Level 2 cache or elsewhere beyond the Level 1 data or unified cache.
• A miss that does not cause a new cache refill but is satisfied from a previous miss.
An implementation is not required to measure the latency, nor to track the access to determine whether the additional latency caused a performance impact. An implementation can extend the definition of this event with additional scenarios where an access might have a significant performance impact due to additional latency for the access.
It is IMPLEMENTATION DEFINED whether accesses that result from cache maintenance operations are counted.
If the cache is shared and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 0, then the counter counts only events Attributable to the PE counting the event. For a multithreaded processor implementation, if the cache is shared by PEs other than the PEs in the multithreaded processor and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 1, then the counter counts only events Attributable to PEs in the multithreaded processor. In all other cases, it is IMPLEMENTATION DEFINED whether only events Attributable to the PE counting the event or all events are counted, and might depend on the Effective value of PMEVTYPER<n>_EL1.MT.
PMCEID1_EL0[25] reads as 1 if this event is implemented and 0 otherwise. This event must be implemented if FEAT_PMUv3p4 is implemented.
'''
# plt.title("L1D cache miss read \n ARM Performance counter: L1D_CACHE_LMISS_RD \n each Memory-read operation or Memory-write operation that causes a cache \n access to at least the Level 1 data or unified cache. This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Matrix multiply size 1000")
plt.xlabel("time in seconds")
plt.ylabel("L1 cache misses")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('l1_1000_MatrixMultiply.png')

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@@ -0,0 +1,55 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """0
2722
0
0
84290
185921
251521
356452""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """1310
1658
86
0
73097
171472
237158
161478""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
DTLB_WALK
The counter counts each access counted by L1D_TLB that causes a
refill of a data or unified
TLB involving at least one translation table walk access.
This includes each complete or partial translation table walk that causes an
access to memory, including to data or translation table walk caches.
If Armv8.7 is not implemented, it is IMPLEMENTATION DEFINED whether accesses
that cause an update of an existing TLB entry involving at least one translation
table walk access are counted. If Armv8.7 is implemented, these accesses
are counted.
'''
# plt.title("Data TLB access, read \n ARM Performance counter: DTLB_WALK \n Data TLB access with at least one translation table walk \n This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Matrix multiply size 1000")
plt.xlabel("time in seconds")
plt.ylabel("DTLB walks")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('dtlb_walk_1000_MatrixMultiply.png')

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@@ -0,0 +1,50 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """0
0
3182857841
2676269451
3632836262
5086931936
4921595689
2380537223""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """0
1662045387
2568704269
0
5404906944
4946152426
5097512016
1934071481""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
L1D_TLB
The counter counts each Memory-read operation or Memory-write operation that causes a TLB
access to at least the Level 1 data or unified TLB.
Each access to a TLB entry is counted including multiple accesses caused by single instructions
such as LDM or STM.
'''
# plt.title("Level 1 data TLB access, read \n ARM Performance counter: L1D_TLB_RD \n This counter counts each access counted by \n L1D_TLB that is a Memory-read operation. \n Matrix multiply size 1000")
plt.xlabel("time in seconds")
plt.ylabel("L1 DTLB reads")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('l1_data_1000_MatrixMultiply.png')

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@@ -0,0 +1,55 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """13933616
0
0
55855105
177840659
380285140
292719568
163746827""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """0
0
48672313
0
243876172
332240431
283300132
151566198""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
DTLB_WALK
The counter counts each Memory-read operation or Memory-write operation that causes a
TLB access to at least the Level 2 data or unified TLB.
Each access to a TLB entry is counted including refills
of Level 1 TLBs.
The counter does not count the access if the access i
s due to a TLB maintenance instruction.
'''
# plt.title("Level 2 data TLB acces, read \n ARM Performance counter: L2D_TLB \n The counter counts each Memory-read operation or Memory-write operation that causes a TLB access to at least the Level 2 data or unified TLB. \n Matrix multiply size 1000")
plt.xlabel("time in seconds")
plt.ylabel("L2 DTLB reads")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('l2_tlb_1000_MatrixMultiply.png')

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@@ -0,0 +1,41 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([92265,94650])
xpoints = ["Malloc Physically contigous with bounds","System memory allocator"]
# ypoints1 = np.array([19384360])
# xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.bar(xpoints, ypoints)
# plt.bar(xpoints1, ypoints1,label='System memory allocator')
'''
L1D_CACHE_LMISS_RD
The counter counts each Memory-read operation to the Level 1 data or unified cache counted by L1D_CACHE that incurs additional latency because it returns data from outside of the Level 1 data or unified cache of this PE.
The event indicates to software that the access missed in the Level 1 data or unified cache and might have a significant performance impact due to the additional latency compared to the latency of an access that hits in the Level 1 data or unified cache.
The counter does not count:
• Accesses where the additional latency is unlikely to be significantly performance-impacting. For example, if the access hits in another cache in the same local cluster, and the additional latency is small when compared to a miss in all Level 1 caches that the access looks up in and results in an access being made to a Level 2 cache or elsewhere beyond the Level 1 data or unified cache.
• A miss that does not cause a new cache refill but is satisfied from a previous miss.
An implementation is not required to measure the latency, nor to track the access to determine whether the additional latency caused a performance impact. An implementation can extend the definition of this event with additional scenarios where an access might have a significant performance impact due to additional latency for the access.
It is IMPLEMENTATION DEFINED whether accesses that result from cache maintenance operations are counted.
If the cache is shared and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 0, then the counter counts only events Attributable to the PE counting the event. For a multithreaded processor implementation, if the cache is shared by PEs other than the PEs in the multithreaded processor and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 1, then the counter counts only events Attributable to PEs in the multithreaded processor. In all other cases, it is IMPLEMENTATION DEFINED whether only events Attributable to the PE counting the event or all events are counted, and might depend on the Effective value of PMEVTYPER<n>_EL1.MT.
PMCEID1_EL0[25] reads as 1 if this event is implemented and 0 otherwise. This event must be implemented if FEAT_PMUv3p4 is implemented.
'''
# plt.title("L1D cache miss read \n ARM Performance counter: L1D_CACHE_LMISS_RD \n each Memory-read operation or Memory-write operation that causes a cache \n access to at least the Level 1 data or unified cache. This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Histogram medium")
plt.xlabel("time in seconds")
plt.ylabel("L1D cache misses")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('ll_200_MatrixMultiply.png')

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@@ -0,0 +1,37 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([26005,8517])
xpoints = ["Malloc Physically contigous with bounds","System memory allocator"]
plt.bar(xpoints, ypoints)
'''
DTLB_WALK
The counter counts each access counted by L1D_TLB that causes a
refill of a data or unified
TLB involving at least one translation table walk access.
This includes each complete or partial translation table walk that causes an
access to memory, including to data or translation table walk caches.
If Armv8.7 is not implemented, it is IMPLEMENTATION DEFINED whether accesses
that cause an update of an existing TLB entry involving at least one translation
table walk access are counted. If Armv8.7 is implemented, these accesses
are counted.
'''
# plt.title("Data TLB access, read \n ARM Performance counter: DTLB_WALK \n Data TLB access with at least one translation table walk \n This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Matrix multiply size 200")
plt.xlabel("time in seconds")
plt.ylabel("DTLB walks")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('dtlb_walk_200_MatrixMultiply.png')

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@@ -0,0 +1,31 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([399876441,380500198])
xpoints = ["Malloc Physically contigous with bounds","System memory allocator"]
plt.bar(xpoints, ypoints,label='Malloc Physically contigous with bounds')
'''
L1D_TLB
The counter counts each Memory-read operation or Memory-write operation that causes a TLB
access to at least the Level 1 data or unified TLB.
Each access to a TLB entry is counted including multiple accesses caused by single instructions
such as LDM or STM.
'''
# plt.title("Level 1 data TLB access, read \n ARM Performance counter: L1D_TLB_RD \n This counter counts each access counted by \n L1D_TLB that is a Memory-read operation. \n Matrix multiply size 200")
plt.xlabel("time in seconds")
plt.ylabel("L1 DTLB reads")
# plt.plot(xpoints1, ypoints1)
# plt.legend()
# plt.show()
plt.savefig('l1_tlb_200_MatrixMultiply.png')

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import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([3013349,2946541])
xpoints = ["Malloc Physically contigous with bounds","System memory allocator"]
plt.bar(xpoints, ypoints)
'''
The counter counts each Memory-read operation or Memory-write operation that causes a
TLB access to at least the Level 2 data or unified TLB.
Each access to a TLB entry is counted including refills
of Level 1 TLBs.
The counter does not count the access if the access i
s due to a TLB maintenance instruction.
'''
# plt.title("Level 2 data TLB acces, read \n ARM Performance counter: L2D_TLB \n The counter counts each Memory-read operation or Memory-write operation that causes a TLB access to at least the Level 2 data or unified TLB. \n Matrix Multiply size 200")
plt.xlabel("time in seconds")
plt.ylabel("L2 DTLB reads")
# plt.plot(xpoints1, ypoints1)
plt.legend()
# plt.show()
plt.savefig('l2_tlb_200_MatrixMultiply.png')

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import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints1 = np.array(np.array([int(x) for x in """0
0
0
326765
0
143484
0
0
0
0
0
0
464576
99734
70229
78698
50530
93548
64971
10767
137521
7028
132692
73331
73142
0
138998
0
78208
0
198635
0
126237
77513
73931
72472
75476
0
87771
88689
110750
73056
70395
0
137320
0
106593
0
113893
0
0
247353
71688
0
0
0
306619
48398
76920
72885
0
160647
56256
58108
99557
0
122549
79748
77494
0
142310
0
131992
71645
0
152255
73324
70870
67944
72820
72185
71309
70495
74632
0
142266
15879
123504
0
138605
70871
68983
17283
125136
45899
49622
62345
123180
0
127536
83637
19920
116609
23423
70723
52828
88384
75240
74572
15926815
21348754
20703968
22389062
20992753
21657595
21797899
21449332
22178036
21222075
20807027
24825060
24390913
27926846
24373458
23572469
21851595
21905648
21818847
24682778
25138079
24572099
22573802
24027619
25668582
23439214
21842812
21773955
21937392
22182668
21837997
22016854
23966253
25743918
22093267
23362716
21546631
23028139
25033183
24980317
24431848
22165558
22660672
22342552
21674610
21231647
23343685
25355447
21432591
15824624
19407533
24295429
22510455
17120495
19704211
20393780
24520902
25454814
22826189
23197333
23909896
24263964
21327971
17364694
15234428
21608937
22042900
24071774
21218994
24225649
24232228
22718402
22553169
24904231
5354218""".replace(' ',',').replace('\n','').split(",")]))
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
ypoints = np.array(np.array([int(x) for x in """99132
38980
0
197161
0
67519
0
140400
0
143043
0
0
0
284282
0
140444
0
134435
83831
50211
75049
0
0
0
288554
74050
71429
74809
73262
73649
0
140714
70424
0
147499
68600
81265
0
139783
64799
0
151170
68801
0
145452
0
125288
0
163795
0
141640
73859
74317
64148
0
136959
72307
69894
77496
67138
0
139846
70331
0
132302
70375
0
84102
123513
0
144565
3028
137573
5823
71125
134909
0
138289
0
134450
0
142950
0
86537
111946
0
114053
0
128592
91062
0
0
238779
74466
70433
77585
28764
73445
110675
34944
106227
73441
66853
38920
72495
104062
11226
105905
70625
56476""".replace(' ',',').replace('\n','').split(",")]))
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
L1D_CACHE_LMISS_RD
The counter counts each Memory-read operation to the Level 1 data or unified cache counted by L1D_CACHE that incurs additional latency because it returns data from outside of the Level 1 data or unified cache of this PE.
The event indicates to software that the access missed in the Level 1 data or unified cache and might have a significant performance impact due to the additional latency compared to the latency of an access that hits in the Level 1 data or unified cache.
The counter does not count:
• Accesses where the additional latency is unlikely to be significantly performance-impacting. For example, if the access hits in another cache in the same local cluster, and the additional latency is small when compared to a miss in all Level 1 caches that the access looks up in and results in an access being made to a Level 2 cache or elsewhere beyond the Level 1 data or unified cache.
• A miss that does not cause a new cache refill but is satisfied from a previous miss.
An implementation is not required to measure the latency, nor to track the access to determine whether the additional latency caused a performance impact. An implementation can extend the definition of this event with additional scenarios where an access might have a significant performance impact due to additional latency for the access.
It is IMPLEMENTATION DEFINED whether accesses that result from cache maintenance operations are counted.
If the cache is shared and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 0, then the counter counts only events Attributable to the PE counting the event. For a multithreaded processor implementation, if the cache is shared by PEs other than the PEs in the multithreaded processor and the Effective value of PMEVTYPER<n>_EL0.MT for the counter is 1, then the counter counts only events Attributable to PEs in the multithreaded processor. In all other cases, it is IMPLEMENTATION DEFINED whether only events Attributable to the PE counting the event or all events are counted, and might depend on the Effective value of PMEVTYPER<n>_EL1.MT.
PMCEID1_EL0[25] reads as 1 if this event is implemented and 0 otherwise. This event must be implemented if FEAT_PMUv3p4 is implemented.
'''
plt.title("L1D cache miss read \n ARM Performance counter: L1D_CACHE_LMISS_RD \n each Memory-read operation or Memory-write operation that causes a cache \n access to at least the Level 1 data or unified cache. This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Histogram medium")
plt.xlabel("time in seconds")
plt.ylabel("DTLB walks")
# plt.plot(xpoints1, ypoints1)
plt.legend()
plt.show()

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@@ -0,0 +1,329 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """1072
1566
0
775
564
574
0
0
1842
397
832
0
1143
0
1132
0
0
3478
335
1181
0
1451
0
0
2456
914
566
208
1323
0
1341
0
0
0
2800
869
0
1624
852
0
1444
78
0
1165
242
0
0
1436
0
1656
1295
672
0
2124
689
247
974
196
664
0
0
0
0
4571
411
1108
0
1855
779
0
0
0
3973
0
0
2126
1090
0
0
0
1455
868
834
0
2252
743
0
0
0
2867
576
528
737
1279
753
0
0
1469
709
0
951
1011
560
923
389
681
887
0
1091""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """2077
0
2240
974
400
0
1949
0
353
0
2136
1292
1150
1080
1029
188
16
9401
3108
0
12850
2972
0
13417
4015
0
0
12179
708
4434
5515
105
0
0
52251
8327
0
0
0
7628
0
6047
2796
2505
1949
0
0
0
0
14301
0
5171
3362
3772
0
27162
15974
5284
11553
0
24698
0
14835
0
21593
664
5721
12945
0
13774
0
14722
1465
0
27655
2332
4084
33813
0
9790
0
50326
5316
0
0
0
0
9760
4192
1552
7241
3216
4888
8667
28500
8415
4523
1449
4652
0
7625
0
13775
0
1897
4708
0
12225
4482759
191711306
235410343
173845602
242711520
154862574
192747518
220667551
275602208
184073481
198073425
227482742
187971748
183689903
187178845
186674013
207741123
233177167
221368814
183933427
181175654
204068107
228269124
205027178
209400883
187840131
188293011
221927087
232807458
188215220
180783387
216711542
208036998
214266374
186414281
180185139
185237868
191677316
183911791
183803795
224964126
204113022
210381502
225585571
220223453
226214857
204932647
184864540
217262003
202414930
191948700
193400960
181280109
180323521
184002482
207777617
222940234
189422853
186182495
186261124
181304280
192816961
184117119
209667712
240951856
219942014
221564848
192926621
181690338
183097907
186087016
184347616
180377265
199009737
182802614""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
DTLB_WALK
The counter counts each access counted by L1D_TLB that causes a
refill of a data or unified
TLB involving at least one translation table walk access.
This includes each complete or partial translation table walk that causes an
access to memory, including to data or translation table walk caches.
If Armv8.7 is not implemented, it is IMPLEMENTATION DEFINED whether accesses
that cause an update of an existing TLB entry involving at least one translation
table walk access are counted. If Armv8.7 is implemented, these accesses
are counted.
'''
plt.title("Data TLB access, read \n ARM Performance counter: DTLB_WALK \n Data TLB access with at least one translation table walk \n This includes each complete or partial translation table walk that causes an access to memory, including to data or translation table walk caches. \n Histogram medium")
plt.xlabel("time in seconds")
plt.ylabel("DTLB walks")
# plt.plot(xpoints1, ypoints1)
plt.legend()
plt.show()

View File

@@ -0,0 +1,326 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """0
0
4417755799
0
2587126745
0
1907452696
0
4470211896
1490535856
1488268722
1492406027
0
0
3020774732
1502998186
1495229685
1513519294
2943026264
1500269058
52149259
1496657426
2937658244
1494297672
74030192
1501455826
1495883230
2888428091
1482110806
150844250
2836859365
0
2995913912
0
2986402746
0
1637257243
2848563352
336366333
0
2955346561
1582901866
1494805041
1486848958
1575414883
0
3006540619
1651961484
1495211562
1418961073
2413046393
0
2310831892
1545685148
1494591413
1494394190
1495772460
1497140001
1506995279
1502064624
1503212470
1494161247
1496442614
1494353921
1496910315
1490640984
2120990326
1496964537
1503480472
0
2487680099
1511772203
1990506585
1085
1495006176
2981033808
1497807398
1499905019
0
2992809338
1499678220
1503422919
1432738350
1572013300
1488687745
1491956406
1493056793
1490487590
1494885596
0
2981312602
1495995022
1494473531
91287100
2756251323
230008646
1491190180
1430538651
1583249575
1576908184
1332064486
0
3175178358
0
3080574208
2649916724
1275899646
0
2878955633""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """0
2873345808
0
0
4568364039
0
2962578326
1482026881
1482959662
1283314470
1696338408
1493064117
1496278352
1493690192
1490808431
1482241102
1485073059
1493488736
1493734395
1494051944
1491925626
1490400073
1492918850
0
2989795422
0
2981131303
1490971079
1490457922
0
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148614774
0
0
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1257951927
1588161938
1785512571
0
0
0
6770405012
0
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0
0
4570645310
0
2824636217
1762646952
0
2891891542
1579360612
0
0
4915926092
1496744037
1495870886
1497206544
1287107800
0
3203518565
0
2992849786
0
2975114733
1481666721
686803
2988542677
1496054096
1496578264
1491746836
1492851059
1497143785
1495192565
1500194130
0
1637919784
2854243731
0
2366222238
2128844017
0
1818736204
2676149826
1497854865
962431460
0
3539793686
1024018613
1489816277
0
3158434789
1369912046
1491311601
1575013089
0
0
4446661541
1416884482
1710611180
1757241245
1233889541
1437873524
0
3280246404
0
2995489571
1541069762
3930514690
3863607919
3597368896
3734892809
3944232184
3709601722
3642560210
3625597517
3920215743
3927141046
4000023820
3916655686
3951797607
3952120224
3689180680
3587372425
3615616989
3726388814
3929746604
3929801334
3942019114
3648646073
3944755905
3929255746
3668055728
3672894376
3844013718
3910779810
3940544740
4006830187
3928198267
3531412165
3818215173
3738150454
3604332393
3650311511
3807369864
3826302554
3775371186
3710423568
3934761097
3925844952
3602607914
3741857686
3732482931
3729783593
3635250094
3706648118
3853167484
3916845229
3983629794
3943670196
3867725730
3548946522
3696888472
3729664873
3750609657
3702688827
3994465571
3666995886
3881628312
3720334387
3933568515
3693178186
3888954122
3961471376
3937112215
3936691623
3915403037
3693727226
3917170944
3930555435
3933184551
3931662845
3940295083
1033014609""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
L1D_TLB
The counter counts each Memory-read operation or Memory-write operation that causes a TLB
access to at least the Level 1 data or unified TLB.
Each access to a TLB entry is counted including multiple accesses caused by single instructions
such as LDM or STM.
'''
plt.title("Level 1 data TLB access, read \n ARM Performance counter: L1D_TLB_RD \n This counter counts each access counted by \n L1D_TLB that is a Memory-read operation. \n Histogram medium")
plt.xlabel("time in seconds")
plt.ylabel("L1 DTLB reads")
# plt.plot(xpoints1, ypoints1)
plt.legend()
plt.show()

View File

@@ -0,0 +1,331 @@
import matplotlib.pyplot as plt
import numpy as np
# ypoints = np.array([19636392729, 9856229208,9445728437,5148906386])
# xpoints = np.array([5,10,15,20])
# ypoints1 = np.array([10062197042, 9873241615,12034929886,5118684853])
# xpoints1 = np.array([5,10,15,20])
ypoints = np.array([int(x) for x in """11074868
17796846
0
42335753
0
42578037
17369088
0
0
0
82499577
0
0
0
82928349
19903822
20322217
20196113
20575304
19769508
0
40692176
0
35388820
0
46400139
20884653
0
40479127
20938047
20020758
21590212
17955844
1895112
24707564
35247723
19854386
19994871
0
0
39958384
39619071
19821971
0
39754647
0
39873651
19521815
20209862
20048932
20231348
20214678
0
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6223168
16818928
37877594
12893970
21214360
0
32124557
20718531
0
40755758
35334046
0
41293476
20648826
0
20479335
21645864
28444433
0
34204784
36576871
0
0
0
76911224
20723929
14021956
28392009
26330087
0
41195363
9598203
28499682
0
34404203
29859217
20539283
20714755
20553408
0
20889230
32963850
7949901
33765967
28019151
13062566
26967792
0
0
62723768
15030483
20277594
0
41160435
0
28127160""".replace(' ',',').replace('\n','').split(",")])
xpoints = np.array([(i) for i, x in enumerate(ypoints, 1)])
ypoints1 = np.array([int(x) for x in """2780755
0
40650126
19973207
0
45212438
14734736
21512132
20024828
17015744
21012868
24889120
0
40307315
0
40543393
19447333
16752820
19802564
19717349
0
32838418
7313016
36828882
19421922
19221311
0
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19221867
19111822
4391041
32495439
0
23803968
18651515
0
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29985095
4176134
18086488
18628963
0
0
0
77724802
0
37326656
0
37118376
17904262
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19094655
18162476
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18493958
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15237090
18940111
16777309
19653443
17616389
1417668
23258907
0
38260471
22608071
13460148
19002183
16931931
19518969
12655691
18821392
19084457
0
38850414
0
38673127
0
39578640
0
38841607
0
38340444
0
0
59014396
13524903
19465492
25539086
19637297
5254742
27355676
24079140
19975996
19226004
16878651
0
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43897100""".replace(' ',',').replace('\n','').split(",")])
xpoints1 = np.array([(i) for i, x in enumerate(ypoints1, 1)])
plt.plot(xpoints, ypoints,label='Malloc Physically contigous with bounds')
plt.plot(xpoints1, ypoints1,label='System memory allocator')
'''
DTLB_WALK
The counter counts each Memory-read operation or Memory-write operation that causes a
TLB access to at least the Level 2 data or unified TLB.
Each access to a TLB entry is counted including refills
of Level 1 TLBs.
The counter does not count the access if the access i
s due to a TLB maintenance instruction.
'''
plt.title("Level 2 data TLB acces, read \n ARM Performance counter: L2D_TLB \n The counter counts each Memory-read operation or Memory-write operation that causes a TLB access to at least the Level 2 data or unified TLB. \n Histogram medium")
plt.xlabel("time in seconds")
plt.ylabel("L2 DTLB reads")
# plt.plot(xpoints1, ypoints1)
plt.legend()
plt.show()

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