From 5a9bc1199da4b3467836e4f79b5b77bc3c20c54d Mon Sep 17 00:00:00 2001
From: Akilan <me@akilan.io>
Date: Thu, 7 Aug 2025 21:46:48 +0100
Subject: [PATCH] EuroSys paper changes

---
 docs/EuroSys/.DS_Store       | Bin 10244 -> 10244 bytes
 docs/EuroSys/Paper/paper.tex |  14 +++++++-------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/docs/EuroSys/.DS_Store b/docs/EuroSys/.DS_Store
index 5afc5557e170c73cdd3889fd4c415c64fcf7c495..6ced049c18cf20e84417796ee71331386ebbec5d 100644
GIT binary patch
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diff --git a/docs/EuroSys/Paper/paper.tex b/docs/EuroSys/Paper/paper.tex
index ca8291c..af6b528 100644
--- a/docs/EuroSys/Paper/paper.tex
+++ b/docs/EuroSys/Paper/paper.tex
@@ -970,9 +970,9 @@ Benchmarks of the FAT memory allocator and the FAT allocator embedded within Jem
 Jemalloc is the default memory allocator for CHERIBSD~\cite{cheribsd}. The objective was to evaluate
 the reduction of TLB walks and misses and its impact on the wall clock runtime.
 
-To comprehensively analyse the proposed allocator, the benchmarks~\cite{Benchmark} were categorised into
+To comprehensively analyse the implemented allocator, the benchmarks~\cite{Benchmark} were categorised into
 two classes which are micro and macro benchmarks. Micro benchmarks comprise smaller
-C programs designed to target specific allocator patterns which enables us to evaluate
+C programs designed to target specific allocator patterns such as the memory read operations which enables us to evaluate
 detailed aspects of the allocators behavior. Macro benchmarks, on the other hand,
 encompass larger real-world C programs allowing us to assess the allocators
 performance in a more practical and real-world scenarios.
@@ -1004,23 +1004,23 @@ performance in a more practical and real-world scenarios.
 \subsection{Experiment setup}
 \label{sec:Experiment}
 The CHERI Morello~\cite{Morello} board was used to evaluate the proposed memory allocator.
-Morello implements the ARM A76 with enhanced server-class memory, featuring a
+Morello implements the ARMv8 with enhanced server-class memory, featuring a
 quad-core ARM CPU with capability extensions. The L1 and L2 caches were modified
 to proliferate the capability bit which ensures compatibility with CHERI's capability-based
-memory model. When compiling the C programs for benchmarking, the Benchmark ABI was
+memory model. When compiling the C programs for benchmarking, the Benchmark ABI~\cite{BenchmarkABI} was
 used as recommended by the CHERI community. This compilation mode was enabled using
 the Clang compiler.
 
-The Benchmark ABI~\cite{BenchmarkABI} was specifically designed because the Morello branch predictor
+The Benchmark ABI was specifically designed because the Morello branch predictor
 was not expanded to predict bounds. Consequently, a capability-based jump introduces
-stalls in later PCC-dependent instructions until bounds are established. This issue
+stalls in later PCC-dependent(Program Counter Capability) instructions until bounds are established. This issue
 is particularly significant during dynamically linked calls and returns between
 libraries where bounds are changed to cover the called or returned-to library.
 Such stalls can negatively affect performance, making the Benchmark ABI an essential
 consideration for this evaluation.
 
 Each C program was executed using two different memory allocators. The first was
-the modified C allocator which is imported as a header file. This approach was necessary
+the FAT allocator(Section ~\ref{sec:MemoryAllocator}) which is imported as a header file. This approach was necessary
 because the Benchmark ABI shared object file exhibited unexpected behavior by
 failing to overwrite the C program at runtime with the intended \textit{malloc} functions.
 The second allocator was the standard OS memory allocator, which in the case of