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Plan

This document describes about the upcoming PhD plan for the upcoming year with the reflection of the previous year.

Highoverview of the previous plan:

Phase 1: FAT-Pointer (JulSep 2024)

July 115 (2024)
  • Debug L1 TLB misses
  • Run COZ benchmarks
  • Port kernel module to SnMalloc
July 1530 (2024)
  • Benchmark with SPEC & XSBench
  • Compare with SnMalloc variants
August (2024)
  • Draft EuroSys paper
September (2024)
  • Write thesis chapter
  • Finalize EuroSys submission

Phase 2: RISC-V Integration (Oct 2024May 2025)

OctoberDecember (2024)
  • Modify Bluespec to bypass TLB
  • Set up evaluation environment
JanuraryFeburary
  • Evaluate FAT-Pointer on RISC-V
  • Draft and refine ISMM paper
MarchMay
  • Address backlog
  • Extend thesis chapter

Phase 3: Uni-Kernel (May 2025September 2026)

MayDecember 2025
  • Port allocator to CHERI Uni-Kernel
  • Design and evaluate unified allocator
  • Draft OSDI paper
JanurarySeptember 2026
  • Finalize full PhD thesis

Current plan

June to July (2025)

  • Working on modifications to BlueSpec BSV files of the CHERI Toooba architecture.
  • Setting up baremetal C benchmark against the BlueSpec simulator.
  • Supervisory team modifications to the EuroSys paper.
  • Progression month.
  • Send the EuroSys paper to the Glasgow CHERI team for feedback.

July to August (2025)

  • Heavy debugging of the Toooba core for potencial expected errors (Bypass TLB phase of the memory pipeline).
  • Finalising the C benchmark suite for the Toooba architecture.
  • Documenting Toooba work to reused for the 2nd paper.
  • End of July (Work on EuroSys paper).

August to September (2025)

  • Heavy debugging of the Toooba core for potencial expected errors (Similar to July).
  • Finish writing for Toooba work the Abtract, Introduction and methodology of the paper.
  • Expect preliminary results of the Toooba expirment.

September to October (2025)

  • Publish EuroSys paper (FAT Allocator).
  • Start benchmarking Toooba work.
  • Parallel write up of the Evaluation section.

October to November (2025)

  • Start work on the 3rd expirement (Heavier evaluation of expirement 1 and 2).
  • Modification to replace mmap in TcMalloc and Mesh allocator

November to December (2025)

  • Strip away Huge page aware implementation from JeMalloc, TcMalloc and Mesh.
  • Analyse the amount intructions reduced.
  • Start writing paper 3 based on EuroSys paper.

December to Janurary (2025 to 2026)

  • Evaluation of paper 3.
  • Start writing thesis for Expirement 1 and 2.

Janurary to September (2026)

  • Backlog catch up.
  • Paper publishing for Expirement 3.
  • Thesis write up phase.