102 lines
3.7 KiB
Plaintext
102 lines
3.7 KiB
Plaintext
\begin{thebibliography}{10}
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Sparsh Mittal.
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\newblock \_eprint: https://onlinelibrary.wiley.com/doi/pdf/10.1002/cpe.4061.
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\bibitem{panwar_hawkeye_2019}
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Ashish Panwar, Sorav Bansal, and K.~Gopinath.
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\newblock {HawkEye}: Efficient fine-grained {OS} support for huge pages.
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\newblock In {\em Proceedings of the Twenty-Fourth International Conference on
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Architectural Support for Programming Languages and Operating Systems}, pages
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347--360. {ACM}.
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\bibitem{woodruff_cheri_2014}
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Jonathan Woodruff, Robert~N.M. Watson, David Chisnall, Simon~W. Moore, Jonathan
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Anderson, Brooks Davis, Ben Laurie, Peter~G. Neumann, Robert Norton, and
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Michael Roe.
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\newblock The {CHERI} capability model: revisiting {RISC} in an age of risk.
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\newblock 42(3):457--468.
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\bibitem{woodruff_cheri_2019}
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Jonathan Woodruff, Alexandre Joannou, Hongyan Xia, Anthony Fox, Robert~M.
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Norton, David Chisnall, Brooks Davis, Khilan Gudka, Nathaniel~W. Filardo,
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A.~Theodore Markettos, Michael Roe, Peter~G. Neumann, Robert N.~M. Watson,
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and Simon~W. Moore.
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\newblock {CHERI} concentrate: Practical compressed capabilities.
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\newblock 68(10):1455--1469.
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\bibitem{THP}
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Juan Navarro.
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\newblock Practical, transparent operating system support for superpages.
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\bibitem{Shadow_superpages}
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Cheol~Ho Park and Daeyeon Park.
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\newblock Aggressive superpage support with the shadow memory and the
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partial-subblock tlb.
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\newblock {\em Microprocessors and Microsystems}, 25(7):329--342, 2001.
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\bibitem{DirectSegment}
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Arkaprava Basu, Jayneel Gandhi, Jichuan Chang, Mark~D. Hill, and Michael~M.
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Swift.
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\newblock Efficient virtual memory for big memory servers.
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\newblock {\em SIGARCH Comput. Archit. News}, 41(3):237–248, June 2013.
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\bibitem{karakostas_redundant_2015}
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Vasileios Karakostas, Jayneel Gandhi, Furkan Ayar, Adrián Cristal, Mark~D.
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Hill, Kathryn~S. {McKinley}, Mario Nemirovsky, Michael~M. Swift, and Osman
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Ünsal.
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\newblock Redundant memory mappings for fast access to large memories.
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\newblock In {\em Proceedings of the 42nd Annual International Symposium on
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Computer Architecture}, pages 66--78. {ACM}.
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\bibitem{chen_flexpointer_2023}
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Dongwei Chen, Dong Tong, Chun Yang, Jiangfang Yi, and Xu~Cheng.
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\newblock {FlexPointer}: Fast address translation based on range {TLB} and
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tagged pointers.
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\newblock 20(2):1--24.
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\bibitem{jemalloc}
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{JEMALLOC}.
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\bibitem{cheribsd}
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Benchmark {ABI} - {CheriBSD} 23.11 new features tutorial.
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\bibitem{Morello}
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Department of computer science and technology – {CHERI}: The arm morello
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board.
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\bibitem{BenchmarkABI}
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Robert N.~M. Watson, Jessica Clarke, Peter Sewell, Jonathan Woodruff, Simon~W.
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Moore, Graeme Barnes, Richard Grisenthwaite, Kathryn Stacer, Silviu Baranga,
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and Alexander Richardson.
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\newblock {Early performance results from the prototype Morello
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microarchitecture}.
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\newblock Technical Report UCAM-CL-TR-986, University of Cambridge, Computer
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Laboratory, 15 JJ Thomson Avenue, Cambridge CB3 0FD, United Kingdom, phone
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+44 1223 763500, September 2023.
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\bibitem{PerformanceCounter}
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Arm architecture reference manual for a-profile architecture.
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\bibitem{Benchmark}
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{CHERI}-allocator/benchmarks/benchmarks/{StressTestMalloc}/glibc-bench.c at
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main · akilan1999/{CHERI}-allocator.
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\bibitem{singh1993}
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Jaswinder~Pal Singh.
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\newblock {\em Parallel Hierarchical N-body Methods and Their Implications for
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Multiprocessors}.
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\newblock PhD thesis, Stanford University, February 1993.
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\bibitem{holt1995}
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C.~Holt and Jaswinder~Pal Singh.
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\newblock Hierarchical n-body methods on shared address space multiprocessors.
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\newblock In {\em SIAM Conference on Parallel Processing for Scientific
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Computing}, February 1995.
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\newblock To appear.
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\end{thebibliography}
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