Bump BSV-RVFI-DII and refactor to support new parcel-based interface

This means FetchStage should now behave in the same way with RVFI-DII as
with an I-Cache. A Dii_Parcel_Id is fed alongside PC everywhere relevant
and follows very similar logic, but, importantly it's just extra state
on the side, it doesn't affect what we do with the branch predictor and
parcel combining/instruction decoding logic.

src_Core/Core/CoreW_IFC.bsv

@@ -54,7 +54,7 @@ import Debug_Module  :: *;
 `endif
 
 `ifdef RVFI_DII
-import Types :: *;
+import ProcTypes :: *;
 `endif
 
 `ifdef INCLUDE_TANDEM_VERIF