From 06e0a3d8108985f5250df1c7d3929d05bab00b0d Mon Sep 17 00:00:00 2001
From: Franz Fuchs <franz.fuchs@cl.cam.ac.uk>
Date: Tue, 22 Jun 2021 08:40:27 +0100
Subject: [PATCH] corrected SBC jumps counting

---
 src_Core/CPU/Core.bsv                         |  2 +-
 .../procs/RV64G_OOO/AluExePipeline.bsv        | 19 ++++++++++++-------
 src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv    |  2 +-
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/src_Core/CPU/Core.bsv b/src_Core/CPU/Core.bsv
index 9410b8f..2608116 100644
--- a/src_Core/CPU/Core.bsv
+++ b/src_Core/CPU/Core.bsv
@@ -1150,7 +1150,7 @@ module mkCore#(CoreId coreId)(Core);
           wildJumps = wildJumps + alu_events.evt_WILD_JUMP;
      end
 
-     transExe.evt_EXECUTED_INSTS = executedInsts;
+     transExe.evt_WILD_JUMP = wildJumps;
      Vector #(16, Bit #(Report_Width)) trans_exe_evts_vec = to_large_vector (transExe);
 
      let events = append (null_evt, core_evts_vec);
diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv
index efc38a2..62dfea3 100755
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv
@@ -44,6 +44,7 @@ import BuildVector::*;
 import Cntrs::*;
 import Types::*;
 import ProcTypes::*;
+import DReg::*;
 import SynthParam::*;
 import Exec::*;
 import Performance::*;
@@ -295,12 +296,13 @@ module mkAluExePipeline#(AluExeInput inIfc)(AluExePipeline);
 
 `ifdef PERFORMANCE_MONITORING
         if(x.dInst.iType == Br || x.dInst.iType == Jr || x.dInst.iType == CJALR) begin
-            let res = inIfc.checkTarget(ppc);
-            if((ppc != pc + 2) || (ppc != pc + 4)) begin
-                let ppc_addr = getAddr(ppc);
-                let pc_addr = getAddr(pc);
+            $display("BRANCH pc = ", fshow(pc), ", ppc = ", fshow(ppc));
+            //let res = inIfc.checkTarget(ppc);
+            let ppc_addr = getAddr(ppc);
+            let pc_addr = getAddr(pc);
+            if((ppc_addr != pc_addr + 2) && (ppc_addr != pc_addr + 4)) begin
                 let res = inIfc.checkTarget(ppc);
-                $display("doRegReadAlu: pc = ", fshow(pc), ", ppc = ", fshow(ppc));
+                $display("doRegReadAlu: pc = ", fshow(pc_addr), ", ppc = ", fshow(ppc_addr));
                 EventsTransExe events = unpack(0);
                 if((x.dInst.iType == CJALR || x.dInst.iType == Jr) && !res) begin
                     $display("Not a previous target:  ppc = ", fshow(ppc));
@@ -308,9 +310,12 @@ module mkAluExePipeline#(AluExeInput inIfc)(AluExePipeline);
                     events_reg <= events;
                 end
                 else if(x.dInst.iType == Br) begin
-                    Bit#(12) imm = truncate(fromMaybe(12'h000, x.dInst.imm) << 1);
-                    let val = getAddr(pc) + signExtend(imm);
+                    Bit#(32) imm = fromMaybe(32'h00000000, x.dInst.imm);
+                    // TODO: does not seem correct yet
+                    $display("direct-imm: ", fshow(imm));
+                    let val = pc_addr + signExtend(imm);
                     if(val != ppc_addr) begin
+                        $display("Wild direct jump: ppc = ", fshow(ppc));
                         events.evt_WILD_JUMP = 1;
                         events_reg <= events;
                     end
diff --git a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
index 0162789..23bb37d 100755
--- a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
@@ -1123,7 +1123,7 @@ typedef TDiv#(SizeOf#(EventsCoreMem),Report_Width) EventsCoreMemElements;
 
 typedef struct {
    SupCnt evt_RENAMED_INST;
-   SupCnt evt_WILD_JUMP;
+   Bit#(Report_Width) evt_WILD_JUMP;
 } EventsTransExe deriving (Bits, FShow);
 typedef TDiv#(SizeOf#(EventsTransExe),SizeOf#(SupCnt)) EventsTransExeElements;
 `endif