diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/MemExePipeline.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/MemExePipeline.bsv index bc615ed..3cb4959 100644 --- a/src_Core/RISCY_OOO/procs/RV64G_OOO/MemExePipeline.bsv +++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/MemExePipeline.bsv @@ -179,7 +179,9 @@ interface MemExeInput; method CapMem rob_getPC(InstTag t); method Action rob_setExecuted_doFinishMem(InstTag t, Addr vaddr, +`ifdef INCLUDE_TANDEM_VERIF Data store_data, ByteEn store_data_BE, +`endif Bool access_at_commit, Bool non_mmio_st_done `ifdef RVFI , ExtraTraceBundle tb @@ -603,7 +605,10 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline); if (x.capException matches tagged Valid .c) cause = Valid(CapException(c)); Bool access_at_commit = !isValid(cause) && (isMMIO || isLrScAmo); Bool non_mmio_st_done = !isValid(cause) && !isMMIO && x.mem_func == St; - inIfc.rob_setExecuted_doFinishMem(x.tag, getAddr(x.vaddr), store_data, store_data_BE, + inIfc.rob_setExecuted_doFinishMem(x.tag, getAddr(x.vaddr), +`ifdef INCLUDE_TANDEM_VERIF + store_data, store_data_BE, +`endif access_at_commit, non_mmio_st_done `ifdef RVFI , ExtraTraceBundle{ diff --git a/src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv b/src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv index 4fbf617..6f46080 100755 --- a/src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv +++ b/src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv @@ -170,7 +170,9 @@ interface ReorderBufferRowEhr#(numeric type aluExeNum, numeric type fpuMulDivExe // instructions are not Executed, they are set at deqLSQ time) method Action setExecuted_doFinishMem(Addr vaddr, +`ifdef INCLUDE_TANDEM_VERIF Data store_data, ByteEn store_data_BE, +`endif Bool access_at_commit, Bool non_mmio_st_done `ifdef RVFI , ExtraTraceBundle tb @@ -357,7 +359,9 @@ module mkReorderBufferRowEhr(ReorderBufferRowEhr#(aluExeNum, fpuMulDivExeNum)) p interface setExecuted_doFinishFpuMulDiv = fpuMulDivExe; method Action setExecuted_doFinishMem(Addr vaddr, +`ifdef INCLUDE_TANDEM_VERIF Data store_data, ByteEn store_data_BE, +`endif Bool access_at_commit, Bool non_mmio_st_done `ifdef RVFI , ExtraTraceBundle tb @@ -620,7 +624,9 @@ interface SupReorderBuffer#(numeric type aluExeNum, numeric type fpuMulDivExeNum // doFinishMem, after addr translation method Action setExecuted_doFinishMem(InstTag x, Addr vaddr, +`ifdef INCLUDE_TANDEM_VERIF Data store_data, ByteEn store_data_BE, +`endif Bool access_at_commit, Bool non_mmio_st_done `ifdef RVFI , ExtraTraceBundle tb @@ -1242,8 +1248,12 @@ module mkSupReorderBuffer#( interface setExecuted_doFinishFpuMulDiv = fpuMulDivSetExeIfc; method Action setExecuted_doFinishMem( - InstTag x, Addr vaddr, Data store_data, ByteEn store_data_BE, Bool access_at_commit, - Bool non_mmio_st_done + InstTag x, + Addr vaddr, +`ifdef INCLUDE_TANDEM_VERIF + Data store_data, ByteEn store_data_BE, +`endif + Bool access_at_commit, Bool non_mmio_st_done `ifdef RVFI , tb `endif @@ -1251,7 +1261,9 @@ module mkSupReorderBuffer#( all(id, readVReg(setExeMem_SB_enq)) // ordering: < enq ); row[x.way][x.ptr].setExecuted_doFinishMem(vaddr, +`ifdef INCLUDE_TANDEM_VERIF store_data, store_data_BE, +`endif access_at_commit, non_mmio_st_done `ifdef RVFI , tb