diff --git a/builds/RV64ACDFIMSU_Toooba_RVFIDII_verilator/Makefile b/builds/RV64ACDFIMSU_Toooba_RVFIDII_verilator/Makefile
index 1259e95..4cbbadb 100644
--- a/builds/RV64ACDFIMSU_Toooba_RVFIDII_verilator/Makefile
+++ b/builds/RV64ACDFIMSU_Toooba_RVFIDII_verilator/Makefile
@@ -12,7 +12,7 @@ CONNECTAL_DIRS = $(RISCY_HOME)/connectal/bsv:$(RISCY_HOME)/connectal/tests/spi:$
 
 RVFI_DII_DIRS = $(RISCY_HOME)/../../src_Verifier:$(RISCY_HOME)/../../src_Verifier/BSV-RVFI-DII
 
-CHERI_DIRS = $(RISCY_HOME)/../CHERI:$(RISCY_HOME)/../../libs/cheri-cap-lib
+CHERI_DIRS = $(RISCY_HOME)/../../libs/cheri-cap-lib
 
 # ALL_RISCY_DIRS = $(RISCY_DIRS)
 ALL_RISCY_DIRS = $(RISCY_DIRS):$(CONNECTAL_DIRS):$(RVFI_DII_DIRS):$(CHERI_DIRS)
diff --git a/src_Core/CPU/Core.bsv b/src_Core/CPU/Core.bsv
index 27ce885..657da29 100644
--- a/src_Core/CPU/Core.bsv
+++ b/src_Core/CPU/Core.bsv
@@ -88,7 +88,6 @@ import Toooba_RVFI_DII_Bridge::*;
 `endif
 
 import CsrFile :: *;
-import ScrFile :: *;
 
 // ================================================================
 // Toooba
diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
index fd5a022..88d038b 100644
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
@@ -37,7 +37,6 @@ import ReorderBuffer::*;
 import ReorderBufferSynth::*;
 import RenamingTable::*;
 import CsrFile::*;
-import ScrFile::*;
 import StoreBuffer::*;
 import VerificationPacket::*;
 import RenameDebugIF::*;