From 1ae93da4f8b88a8d486274e13d040a065fb5d6c7 Mon Sep 17 00:00:00 2001 From: Peter Rugg Date: Wed, 8 Jan 2025 18:43:21 +0000 Subject: [PATCH] Restore per-instruction commit prints by default --- src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv index 377cd77..45e5d7a 100644 --- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv +++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv @@ -299,7 +299,7 @@ deriving (Eq, FShow, Bits); module mkCommitStage#(CommitInput inIfc)(CommitStage); Bool verbose = False; - Integer verbosity = 0; // Bluespec: for lightweight verbosity trace + Integer verbosity = 1; // Bluespec: for lightweight verbosity trace // Used to inform tandem-verifier about program order. // 0 is used to indicate we've just come out of reset