From 1f8181d5958b07c1f17f326bc14daaac09bc2fe3 Mon Sep 17 00:00:00 2001
From: Jonathan Woodruff <jdw57@cam.ac.uk>
Date: Thu, 13 Jan 2022 11:14:20 +0000
Subject: [PATCH] Move to (recently merged) non-pipelined Divide.

---
 src_Core/RISCY_OOO/procs/lib/Fpu.bsv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src_Core/RISCY_OOO/procs/lib/Fpu.bsv b/src_Core/RISCY_OOO/procs/lib/Fpu.bsv
index b3894c4..d7ff598 100644
--- a/src_Core/RISCY_OOO/procs/lib/Fpu.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/Fpu.bsv
@@ -95,7 +95,7 @@ module mkDoubleDiv(Server#(Tuple3#(Double, Double, FpuRoundMode), Tuple2#(Double
 `ifdef USE_XILINX_FPU
     let fpu <- mkXilinxFpDiv;
 `else
-    let int_div <- mkDivider(1); // [sizhuo] size in RVFpu: 2
+    let int_div <- mkNonPipelinedDivider(3); // [sizhuo] size in RVFpu: 2
     let fpu <- mkFloatingPointDivider(int_div);
 `endif
     return fpu;