diff --git a/.DS_Store b/.DS_Store new file mode 100644 index 0000000..203fc3e Binary files /dev/null and b/.DS_Store differ diff --git a/Tests/isa/Cprograms/benchmark/matrixmul/matrixmul.c b/Tests/isa/Cprograms/benchmark/matrixmul/matrixmul.c index 368db17..335689a 100644 --- a/Tests/isa/Cprograms/benchmark/matrixmul/matrixmul.c +++ b/Tests/isa/Cprograms/benchmark/matrixmul/matrixmul.c @@ -103,7 +103,7 @@ double *dot(const double *a, const unsigned n_rows_a, const unsigned n_cols_a, \ double *bt = malloc(n_rows_b * n_cols_b * sizeof(*b)); - double *c = malloc(n_rows_a * n_cols_b * sizeof(*c)); + double *c = malloc(n_rows_a * n_cols_b * sizeof(*c)); if ((c == NULL) || (bt == NULL)) { // printf("Couldn't allocate memory!\n"); @@ -148,7 +148,7 @@ int main(void) { /* For measuring time */ double t0, t1; - const unsigned scale = 3; + const unsigned scale = 2; const unsigned n_rows_a = 4 * scale; const unsigned n_cols_a = 3 * scale; const unsigned n_rows_b = 3 * scale; @@ -202,4 +202,4 @@ int main(void) { return(0); } -#endif // MATMUL_1D \ No newline at end of file +#endif // MATMUL_1D diff --git a/Tests/isa/Cprograms/benchmark/richards/richards.c b/Tests/isa/Cprograms/benchmark/richards/richards.c index ddfdc2b..df20282 100644 --- a/Tests/isa/Cprograms/benchmark/richards/richards.c +++ b/Tests/isa/Cprograms/benchmark/richards/richards.c @@ -384,17 +384,17 @@ int bench() { wkq = pkt(wkq, I_DEVA, K_DEV); wkq = pkt(wkq, I_DEVA, K_DEV); - createtask(I_HANDLERA, 2000, wkq, S_WAITPKT, handlerfn, 0, 0); + // createtask(I_HANDLERA, 2000, wkq, S_WAITPKT, handlerfn, 0, 0); - wkq = pkt(0, I_DEVB, K_DEV); - wkq = pkt(wkq, I_DEVB, K_DEV); - wkq = pkt(wkq, I_DEVB, K_DEV); + // wkq = pkt(0, I_DEVB, K_DEV); + // wkq = pkt(wkq, I_DEVB, K_DEV); + // wkq = pkt(wkq, I_DEVB, K_DEV); - createtask(I_HANDLERB, 3000, wkq, S_WAITPKT, handlerfn, 0, 0); + // createtask(I_HANDLERB, 3000, wkq, S_WAITPKT, handlerfn, 0, 0); - wkq = 0; - createtask(I_DEVA, 4000, wkq, S_WAIT, devfn, 0, 0); - createtask(I_DEVB, 5000, wkq, S_WAIT, devfn, 0, 0); + // wkq = 0; + // createtask(I_DEVA, 4000, wkq, S_WAIT, devfn, 0, 0); + // createtask(I_DEVB, 5000, wkq, S_WAIT, devfn, 0, 0); tcb = tasklist; @@ -434,9 +434,9 @@ int inner_loop(int inner) { int main(void) { //INITREGULARALLOC(); - int iterations = 4; + int iterations = 2; int warmup = 0; - int inner_iterations = 4; + int inner_iterations = 2; // parse_argv(argc, argv, &iterations, &warmup, &inner_iterations); diff --git a/Tests/isa/Cprograms/vm.c b/Tests/isa/Cprograms/vm.c index 7195bd7..461b2a2 100644 --- a/Tests/isa/Cprograms/vm.c +++ b/Tests/isa/Cprograms/vm.c @@ -333,7 +333,7 @@ void vm_boot(uintptr_t test_addr) trapframe_t tf; memset(&tf, 0, sizeof(tf)); tf.epc = test_addr - DRAM_BASE; - // call test function + // call C benchmark function main(); pop_tf(&tf); } \ No newline at end of file diff --git a/Tests/isa/testC b/Tests/isa/testC index 843ba76..65ceb4e 100755 Binary files a/Tests/isa/testC and b/Tests/isa/testC differ diff --git a/analysis/graph.py b/analysis/graph.py new file mode 100644 index 0000000..61c9bcf --- /dev/null +++ b/analysis/graph.py @@ -0,0 +1,92 @@ +import matplotlib.pyplot as plt +import numpy as np + +performance_data = { + "Mem": { + "regular": {"CPU_cycles": 33940, "L1_DTLB_access": 13202, "L1_DTLB_miss": 36, "L2_DTLB_miss": 10}, + "modified": {"CPU_cycles": 2457, "L1_DTLB_access": 151, "L1_DTLB_miss": 0, "L2_DTLB_miss": 0}, + }, + "Test_C": { + "regular": {"CPU_cycles": 34040, "L1_DTLB_access": 13284, "L1_DTLB_miss": 36, "L2_DTLB_miss": 10}, + "modified": {"CPU_cycles": 2789, "L1_DTLB_access": 396, "L1_DTLB_miss": 0, "L2_DTLB_miss": 0}, + }, + "Glibc": { + "regular": {"CPU_cycles": 36053, "L1_DTLB_access": 14027, "L1_DTLB_miss": 36, "L2_DTLB_miss": 10}, + "modified": {"CPU_cycles": 4219, "L1_DTLB_access": 783, "L1_DTLB_miss": 0, "L2_DTLB_miss": 0}, + }, + "Richards": { + "regular": {"CPU_cycles": 37808, "L1_DTLB_access": 14363, "L1_DTLB_miss": 10, "L2_DTLB_miss": 6}, + "modified": {"CPU_cycles": 4433, "L1_DTLB_access": 874, "L1_DTLB_miss": 0, "L2_DTLB_miss": 0}, + }, + "Matrix_mul": { + "regular": {"CPU_cycles": 42383, "L1_DTLB_access": 17020, "L1_DTLB_miss": 14, "L2_DTLB_miss": 10}, + "modified": {"CPU_cycles": 12149, "L1_DTLB_access": 4411, "L1_DTLB_miss": 0, "L2_DTLB_miss": 0}, + } +} + +def compute_percent_diff(regular, modified): + out = {} + for k in regular: + if k in modified and regular[k] != 0: + out[k] = ((regular[k] - modified[k]) / regular[k]) * 100 + elif k in modified and regular[k] == 0 and modified[k] == 0: + out[k] = 0.0 + elif k in modified and regular[k] == 0 and modified[k] != 0: + out[k] = -100.0 + return out + +for t, d in performance_data.items(): + d["percent_diff"] = compute_percent_diff(d["regular"], d["modified"]) + +tests = list(performance_data.keys()) +metrics = ["CPU_cycles", "L1_DTLB_access", "L1_DTLB_miss", "L2_DTLB_miss"] + +# 1. Summary plot: Percent Improvement for all metrics grouped by test +x = np.arange(len(tests)) +width = 0.2 +fig, ax = plt.subplots(figsize=(12, 7)) + +for i, metric in enumerate(metrics): + values = [performance_data[t]["percent_diff"].get(metric, 0) for t in tests] + offset = (i - len(metrics)/2 + 0.5) * width + ax.bar(x + offset, values, width, label=metric.replace('_', ' ').title()) + +ax.set_ylabel('Percent Improvement (%)') +ax.set_title('Percent Improvement (Regular -> Modified) by Test and Metric') +ax.set_xticks(x) +ax.set_xticklabels(tests) +ax.legend() +ax.set_ylim(0, 110) +ax.grid(axis='y', linestyle='--', alpha=0.7) +fig.tight_layout() +plt.savefig('percent_improvement_summary.png') + +# 2. Individual metric plots: Regular vs Modified grouped by test +y_label_map = { + "CPU_cycles": "Cycles", + "L1_DTLB_access": "Access Count", + "L1_DTLB_miss": "Miss Count", + "L2_DTLB_miss": "Miss Count" +} + +for metric in metrics: + fig, ax = plt.subplots(figsize=(10, 6)) + reg_vals = [performance_data[t]["regular"][metric] for t in tests] + mod_vals = [performance_data[t]["modified"][metric] for t in tests] + + x_local = np.arange(len(tests)) + w = 0.35 + + ax.bar(x_local - w/2, reg_vals, w, label='Regular', color='steelblue') + ax.bar(x_local + w/2, mod_vals, w, label='Modified', color='salmon') + + # Setting dynamic y-label + ax.set_ylabel(y_label_map.get(metric, metric.replace('_', ' ').title())) + ax.set_title(f'Comparison: {metric.replace("_", " ").title()}') + ax.set_xticks(x_local) + ax.set_xticklabels(tests) + ax.legend() + ax.grid(axis='y', linestyle='--', alpha=0.7) + plt.xticks(rotation=45) + plt.tight_layout() + plt.savefig(f'grouped_comparison_{metric}.png') \ No newline at end of file diff --git a/analysis/grouped_comparison_CPU_cycles.png b/analysis/grouped_comparison_CPU_cycles.png new file mode 100644 index 0000000..8dfd08c Binary files /dev/null and b/analysis/grouped_comparison_CPU_cycles.png differ diff --git a/analysis/grouped_comparison_L1_DTLB_access.png b/analysis/grouped_comparison_L1_DTLB_access.png new file mode 100644 index 0000000..c0ab567 Binary files /dev/null and b/analysis/grouped_comparison_L1_DTLB_access.png differ diff --git a/analysis/grouped_comparison_L1_DTLB_miss.png b/analysis/grouped_comparison_L1_DTLB_miss.png new file mode 100644 index 0000000..6a009c5 Binary files /dev/null and b/analysis/grouped_comparison_L1_DTLB_miss.png differ diff --git a/analysis/grouped_comparison_L2_DTLB_miss.png b/analysis/grouped_comparison_L2_DTLB_miss.png new file mode 100644 index 0000000..709a0bb Binary files /dev/null and b/analysis/grouped_comparison_L2_DTLB_miss.png differ diff --git a/analysis/percent_improvement_summary.png b/analysis/percent_improvement_summary.png new file mode 100644 index 0000000..303c0db Binary files /dev/null and b/analysis/percent_improvement_summary.png differ diff --git a/analysis/perf_data.py b/analysis/perf_data.py new file mode 100644 index 0000000..ec25742 --- /dev/null +++ b/analysis/perf_data.py @@ -0,0 +1,145 @@ +def compute_percent_diff(regular, modified): + percent_diff = {} + for key in regular: + if key in modified and regular[key] != 0: + percent_diff[key] = ((regular[key] - modified[key]) / regular[key]) * 100 + return percent_diff + +def compute_percent_diff_mod_vs_pte(modified, after_pte): + percent_diff = {} + for key in ["CPU_cycles", "L1_DTLB_access"]: + if key in modified and key in after_pte and modified[key] != 0: + percent_diff[key] = ((modified[key] - after_pte[key]) / modified[key]) * 100 + return percent_diff + + +performance_data = { + "Mem": { + "regular": { + "CPU_cycles": 33940, + "L1_DTLB_access": 13202, + "L1_DTLB_miss": 36, + "L2_DTLB_miss": 10, + }, + "modified": { + "CPU_cycles": 2457, + "L1_DTLB_access": 151, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + "after_PTE_setup": { + "CPU_cycles": 531, + "L1_DTLB_access": 25, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + }, + + "Test_C": { + "regular": { + "CPU_cycles": 34040, + "L1_DTLB_access": 13284, + "L1_DTLB_miss": 36, + "L2_DTLB_miss": 10, + }, + "modified": { + "CPU_cycles": 2789, + "L1_DTLB_access": 396, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + "after_PTE_setup": { + "CPU_cycles": 631, + "L1_DTLB_access": 107, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + }, + + "Glibc": { + "regular": { + "CPU_cycles": 36053, + "L1_DTLB_access": 14027, + "L1_DTLB_miss": 36, + "L2_DTLB_miss": 10, + }, + "modified": { + "CPU_cycles": 4219, + "L1_DTLB_access": 783, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + "after_PTE_setup": { + "CPU_cycles": 2644, + "L1_DTLB_access": 850, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + }, + + "Setup": { + "regular": { + "CPU_cycles": 33409, + "L1_DTLB_access": 13177, + "L1_DTLB_miss": 36, + "L2_DTLB_miss": 10, + } + }, + + "Richards": { + "regular": { + "CPU_cycles": 37808, + "L1_DTLB_access": 14363, + "L1_DTLB_miss": 10, + "L2_DTLB_miss": 6, + }, + "modified": { + "CPU_cycles": 4433, + "L1_DTLB_access": 874, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + "after_PTE_setup": { + "CPU_cycles": 4399, + "L1_DTLB_access": 1186, + }, + }, + + "Matrix_mul": { + "regular": { + "CPU_cycles": 42383, + "L1_DTLB_access": 17020, + "L1_DTLB_miss": 14, + "L2_DTLB_miss": 10, + }, + "modified": { + "CPU_cycles": 12149, + "L1_DTLB_access": 4411, + "L1_DTLB_miss": 0, + "L2_DTLB_miss": 0, + }, + "after_PTE_setup": { + "CPU_cycles": 8974, + "L1_DTLB_access": 3843, + }, + } +} + +# Add percentage differences +for test, data in performance_data.items(): + if "regular" in data and "modified" in data: + data["percent_diff"] = compute_percent_diff( + data["regular"], data["modified"] + ) + + +# Add modified vs after_PTE_setup percentage differences +for test, data in performance_data.items(): + if "modified" in data and "after_PTE_setup" in data: + data["mod_vs_pte_percent_diff"] = compute_percent_diff_mod_vs_pte( + data["modified"], data["after_PTE_setup"] + ) + +# Example usage: +print(performance_data["Mem"]["percent_diff"]) +print(performance_data["Mem"]["mod_vs_pte_percent_diff"]) \ No newline at end of file diff --git a/builds/.DS_Store b/builds/.DS_Store new file mode 100644 index 0000000..e5b5f28 Binary files /dev/null and b/builds/.DS_Store differ diff --git a/richards.txt b/richards.txt new file mode 100644 index 0000000..e69de29 diff --git a/richards_reg_10.txt b/richards_reg_10.txt new file mode 100644 index 0000000..e69de29