From 239e011adfa1d1650e8de5af0a437671260681f7 Mon Sep 17 00:00:00 2001
From: Karlis Susters <ks980@cam.ac.uk>
Date: Wed, 15 Mar 2023 16:30:35 +0000
Subject: [PATCH] Config for L1D Stride-2-BigTable

---
 src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv b/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
index 8d2f243..ae4ffbd 100644
--- a/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
+++ b/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
@@ -1185,7 +1185,7 @@ endmodule
 
 module mkBRAMStridePCPrefetcher(PCPrefetcher)
 provisos(
-    NumAlias#(strideTableSize, 64),
+    NumAlias#(strideTableSize, 512),
     NumAlias#(cLinesAheadToPrefetch, 2), // TODO fetch more if have repeatedly hit an entry, and if stride big
     Alias#(strideTableIndexT, Bit#(TLog#(strideTableSize)))
     );