diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
index 690d7e3..3d003c3 100644
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
@@ -1219,8 +1219,8 @@ module mkCommitStage#(CommitInput inIfc)(CommitStage);
                             if ((opcode == opcOp || opcode == opcOp32) && funct7 == opMULDIV)
                                 muldivCnt = muldivCnt + 1;
                         end
-                        Fence, FenceI, SFence: fenceCnt = fenceCnt + 1; // Some of these are "System" instructions.
                     endcase
+                    if (opcode == opcMiscMem && funct3 == fnFENCE) fenceCnt = fenceCnt + 1;
                 end
             end
         end