Provide opt-in wedge debugging info

When DEBUG_WEDGE is defined, expose the last committed and next in the
reorder buffer PC and corresponding instruction via DMI registers, since
even when the core is wedged and we can't read GPRs etc we can still
interact with the debug module itself. Hopefully this proves useful for
debugging wedges.

src_Core/RISCY_OOO/procs/lib/ReorderBuffer.bsv

@@ -661,6 +661,11 @@ interface SupReorderBuffer#(numeric type aluExeNum, numeric type fpuMulDivExeNum
     method Bool isFull_ehrPort0;
 
     interface ROB_SpeculationUpdate specUpdate;
+
+`ifdef DEBUG_WEDGE
+    (* always_enabled *)
+    method Tuple2#(CapMem, Bit#(32)) debugNextInst;
+`endif
 endinterface
 
 typedef struct {
@@ -1305,4 +1310,10 @@ module mkSupReorderBuffer#(
             end
         endmethod
     endinterface
+
+`ifdef DEBUG_WEDGE
+    method Tuple2#(CapMem, Bit#(32)) debugNextInst;
+        return tuple2(fifo_first[0].pc, fifo_first[0].orig_inst);
+    endmethod
+`endif
 endmodule