From 6931201a1440a903be9892c52134a4e69ca74cc9 Mon Sep 17 00:00:00 2001 From: Peter Rugg Date: Tue, 31 Jan 2023 21:02:17 +0000 Subject: [PATCH] Avoid wedge on repeated debug resumes (with jdw57 and aj443) ConfigReg avoids a compile error --- src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv index 0102058..4c0950f 100644 --- a/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv +++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv @@ -63,6 +63,7 @@ import ReservationStationAlu::*; import ReservationStationMem::*; import ReservationStationFpuMulDiv::*; import SplitLSQ::*; +import ConfigReg::*; import CHERICap::*; import CHERICC_Fat::*; import ISA_Decls_CHERI::*; @@ -199,7 +200,7 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage); // Is set to Valid intrDebugStep on dcsr[stepbit]==1 and one instruction has been processed. // Note (step): 1st instruction is guaranteed architectural, cannot possibly be speculative. // Note (step): 1st instruction may trap; we halt pointing at the trap vector - Reg #(Maybe #(Interrupt)) rg_m_halt_req <- mkReg (tagged Invalid); + Reg #(Maybe #(Interrupt)) rg_m_halt_req <- mkConfigReg (tagged Invalid); function Action fa_step_check; action @@ -1234,7 +1235,7 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage); `endif `ifdef INCLUDE_GDB_CONTROL - method Action debug_halt_req () if (rg_m_halt_req == tagged Invalid); + method Action debug_halt_req (); rg_m_halt_req <= tagged Valid intrDebugHalt; if (verbosity >= 1) $display ("%0d: %m.renameStage.renameStage.debug_halt_req", cur_cycle);