From 69b96cc68f2d35b3ffb46754fc9265809af90cb2 Mon Sep 17 00:00:00 2001
From: Peter Rugg <pdr32@cam.ac.uk>
Date: Fri, 10 Feb 2023 17:09:20 +0000
Subject: [PATCH] Extend the final missed id width

---
 src_SSITH_P3/xilinx_ip/component.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src_SSITH_P3/xilinx_ip/component.xml b/src_SSITH_P3/xilinx_ip/component.xml
index 6f961eb..a764e79 100644
--- a/src_SSITH_P3/xilinx_ip/component.xml
+++ b/src_SSITH_P3/xilinx_ip/component.xml
@@ -1047,7 +1047,7 @@
         <spirit:wire>
           <spirit:direction>in</spirit:direction>
           <spirit:vector>
-            <spirit:left spirit:format="long">5</spirit:left>
+            <spirit:left spirit:format="long">6</spirit:left>
             <spirit:right spirit:format="long">0</spirit:right>
           </spirit:vector>
           <spirit:wireTypeDefs>