From 75df204e31a950cdf67d2931bfde9a890f42e1a9 Mon Sep 17 00:00:00 2001 From: rsnikhil Date: Wed, 4 Mar 2020 09:50:39 -0500 Subject: [PATCH] Fixed a Tandem-Verification bug (reporting incorrect MIP/MIE/SIP/SIE post-write values) MIP/MIE/SIP/SIE fields are WARL (Write-Any/Read-Legal). The CSR register forces the user-privilege bits ([8,4,0]) to 0 since riscy-ooo does not support user-level interrupts. However, function Csrfile.fv_warl_xform() was not mirroring this correctly. --- .../Verilog_RTL/mkCore.v | 14136 ++++++++-------- src_Core/CPU/CsrFile.bsv | 9 +- src_SSITH_P3/Verilog_RTL/mkCore.v | 13303 +++++++-------- src_SSITH_P3/Verilog_RTL/mkCoreW.v | 20 +- src_SSITH_P3/Verilog_RTL/mkP3_Core.v | 2 +- src_SSITH_P3/Verilog_RTL_sim/mkCore.v | 13331 +++++++-------- src_SSITH_P3/Verilog_RTL_sim/mkCoreW.v | 20 +- src_SSITH_P3/Verilog_RTL_sim/mkP3_Core.v | 2 +- src_SSITH_P3/xilinx_ip/hdl/mkCore.v | 13303 +++++++-------- src_SSITH_P3/xilinx_ip/hdl/mkCoreW.v | 20 +- src_SSITH_P3/xilinx_ip/hdl/mkP3_Core.v | 2 +- 11 files changed, 27099 insertions(+), 27049 deletions(-) diff --git a/builds/RV64ACDFIMSU_Toooba_verilator/Verilog_RTL/mkCore.v b/builds/RV64ACDFIMSU_Toooba_verilator/Verilog_RTL/mkCore.v index 80cf24a..3ab812a 100644 --- a/builds/RV64ACDFIMSU_Toooba_verilator/Verilog_RTL/mkCore.v +++ b/builds/RV64ACDFIMSU_Toooba_verilator/Verilog_RTL/mkCore.v @@ -4125,33 +4125,33 @@ module mkCore(CLK, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q247, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10055, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2968, - addr__h294611, - curData__h195302, - rVal1__h615930, - rVal1__h640774, - trap_val__h708780, - x__h200345; + addr__h294612, + curData__h195303, + rVal1__h615931, + rVal1__h640775, + trap_val__h708781, + x__h200346; reg [51 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q10, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q12, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q8, - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q209, - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q210, - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q211, - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q212, - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q197, - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q198, - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q199, - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q200, - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q201, - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q202, - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q213, - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q214, - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q215, - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q216, - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q217, - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q218, - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q207, - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q208, + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q209, + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q210, + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q211, + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q212, + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q197, + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q198, + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q199, + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q200, + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q201, + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q202, + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q213, + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q214, + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q215, + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q216, + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q217, + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q218, + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q207, + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q208, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755, @@ -4163,45 +4163,45 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985; reg [31 : 0] SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_073_ETC___d1356, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_31_TO_0_ETC___d1408; - reg [22 : 0] CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75, - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q76, - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79, - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q80, - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81, - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q82, - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112, - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q113, - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42, - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q43, - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110, - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q111, - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40, - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q41, - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114, - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q115, - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44, - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q45, - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116, - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q117, - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46, - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q47, - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77, - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q78, - _theResult___fst_sfd__h350717, - _theResult___fst_sfd__h359440, - _theResult___fst_sfd__h368022, - _theResult___fst_sfd__h377206, - _theResult___fst_sfd__h385842, - _theResult___fst_sfd__h396416, - _theResult___fst_sfd__h405137, - _theResult___fst_sfd__h413719, - _theResult___fst_sfd__h422903, - _theResult___fst_sfd__h431539, - _theResult___fst_sfd__h442111, - _theResult___fst_sfd__h450832, - _theResult___fst_sfd__h459414, - _theResult___fst_sfd__h468598, - _theResult___fst_sfd__h477234; + reg [22 : 0] CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75, + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q76, + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79, + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q80, + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81, + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q82, + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112, + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q113, + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42, + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q43, + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110, + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q111, + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40, + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q41, + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114, + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q115, + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44, + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q45, + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116, + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q117, + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46, + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q47, + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77, + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q78, + _theResult___fst_sfd__h350718, + _theResult___fst_sfd__h359441, + _theResult___fst_sfd__h368023, + _theResult___fst_sfd__h377207, + _theResult___fst_sfd__h385843, + _theResult___fst_sfd__h396417, + _theResult___fst_sfd__h405138, + _theResult___fst_sfd__h413720, + _theResult___fst_sfd__h422904, + _theResult___fst_sfd__h431540, + _theResult___fst_sfd__h442112, + _theResult___fst_sfd__h450833, + _theResult___fst_sfd__h459415, + _theResult___fst_sfd__h468599, + _theResult___fst_sfd__h477235; reg [20 : 0] CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_15_ETC__q271, CASE_coreFix_aluExe_0_regToExeQfirst_BITS_416_ETC__q223, CASE_coreFix_aluExe_0_rsAludispatchData_BITS__ETC__q268, @@ -4225,24 +4225,24 @@ module mkCore(CLK, reg [10 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q11, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q7, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q9, - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q203, - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q204, - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q205, - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q206, - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q175, - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q176, - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q177, - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q178, - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q179, - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q180, - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q152, - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q153, - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q183, - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q184, - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q181, - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q182, - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q135, - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q136, + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q203, + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q204, + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q205, + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q206, + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q175, + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q176, + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q177, + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q178, + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q179, + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q180, + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q152, + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q153, + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q183, + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q184, + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q181, + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q182, + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q135, + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q136, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684, @@ -4252,47 +4252,47 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914; - reg [7 : 0] CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60, - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q61, - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68, - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q69, - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73, - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q74, - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97, - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q98, - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27, - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q28, - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95, - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q96, - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25, - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q26, - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103, - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q104, - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33, - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q34, - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108, - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q109, - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38, - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q39, - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62, - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q63, + reg [7 : 0] CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60, + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q61, + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68, + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q69, + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73, + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q74, + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97, + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q98, + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27, + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q28, + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95, + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q96, + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25, + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q26, + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103, + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q104, + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33, + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q34, + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108, + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q109, + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38, + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q39, + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62, + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q63, SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_073_ETC___d1381, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_7_TO_0__ETC___d1430, - _theResult___fst_exp__h350716, - _theResult___fst_exp__h359439, - _theResult___fst_exp__h368021, - _theResult___fst_exp__h377205, - _theResult___fst_exp__h385841, - _theResult___fst_exp__h396415, - _theResult___fst_exp__h405136, - _theResult___fst_exp__h413718, - _theResult___fst_exp__h422902, - _theResult___fst_exp__h431538, - _theResult___fst_exp__h442110, - _theResult___fst_exp__h450831, - _theResult___fst_exp__h459413, - _theResult___fst_exp__h468597, - _theResult___fst_exp__h477233; + _theResult___fst_exp__h350717, + _theResult___fst_exp__h359440, + _theResult___fst_exp__h368022, + _theResult___fst_exp__h377206, + _theResult___fst_exp__h385842, + _theResult___fst_exp__h396416, + _theResult___fst_exp__h405137, + _theResult___fst_exp__h413719, + _theResult___fst_exp__h422903, + _theResult___fst_exp__h431539, + _theResult___fst_exp__h442111, + _theResult___fst_exp__h450832, + _theResult___fst_exp__h459414, + _theResult___fst_exp__h468598, + _theResult___fst_exp__h477234; reg [5 : 0] CASE_mmioToPlatform_pRq_enq_x_BITS_37_TO_36_0__ETC__q266, CASE_mmio_cRqQ_data_0_BITS_77_TO_76_0_mmio_cRq_ETC__q1, CASE_mmio_dataReqQ_data_0_BITS_77_TO_76_0_mmio_ETC__q263, @@ -4310,8 +4310,8 @@ module mkCore(CLK, IF_fetchStage_pipelines_0_first__2928_BITS_191_ETC___d14219, IF_fetchStage_pipelines_0_first__2928_BIT_68_2_ETC___d13266, IF_fetchStage_pipelines_1_first__2937_BITS_191_ETC___d14380, - i__h707772, - i__h707932; + i__h707773, + i__h707933; reg [2 : 0] CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_13_ETC__q270, CASE_coreFix_aluExe_0_regToExeQfirst_BITS_399_ETC__q222, CASE_coreFix_aluExe_0_rsAludispatchData_BITS__ETC__q267, @@ -4325,8 +4325,8 @@ module mkCore(CLK, CASE_fetchStagepipelines_0_first_BITS_177_TO__ETC__q225, CASE_fetchStagepipelines_1_first_BITS_177_TO__ETC__q228, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10828, - x__h290390, - x__h296160; + x__h290391, + x__h296161; reg [1 : 0] CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q250, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q285, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q253, @@ -4358,46 +4358,46 @@ module mkCore(CLK, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q230, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q231, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q235, - CASE_guard05150_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86, - CASE_guard05150_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85, - CASE_guard08264_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139, - CASE_guard14080_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88, - CASE_guard14080_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87, - CASE_guard17333_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141, - CASE_guard22916_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90, - CASE_guard22916_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89, - CASE_guard37805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195, - CASE_guard37805_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185, - CASE_guard42138_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120, - CASE_guard42138_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118, - CASE_guard47117_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191, - CASE_guard47117_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187, - CASE_guard50744_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49, - CASE_guard50744_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48, - CASE_guard50845_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121, - CASE_guard50845_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119, - CASE_guard56186_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193, - CASE_guard56186_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189, - CASE_guard59453_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51, - CASE_guard59453_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50, - CASE_guard59775_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123, - CASE_guard59775_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122, - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53, - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52, - CASE_guard68611_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125, - CASE_guard68611_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124, - CASE_guard77109_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164, - CASE_guard77109_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154, - CASE_guard77219_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55, - CASE_guard77219_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54, - CASE_guard86421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160, - CASE_guard86421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156, - CASE_guard95490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162, - CASE_guard95490_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158, - CASE_guard96443_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84, - CASE_guard96443_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83, - CASE_guard98952_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137, - CASE_k74091_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232, + CASE_guard05151_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86, + CASE_guard05151_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85, + CASE_guard08265_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139, + CASE_guard14081_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88, + CASE_guard14081_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87, + CASE_guard17334_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141, + CASE_guard22917_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90, + CASE_guard22917_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89, + CASE_guard37806_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195, + CASE_guard37806_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185, + CASE_guard42139_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120, + CASE_guard42139_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118, + CASE_guard47118_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191, + CASE_guard47118_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187, + CASE_guard50745_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49, + CASE_guard50745_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48, + CASE_guard50846_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121, + CASE_guard50846_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119, + CASE_guard56187_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193, + CASE_guard56187_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189, + CASE_guard59454_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51, + CASE_guard59454_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50, + CASE_guard59776_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123, + CASE_guard59776_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122, + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53, + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52, + CASE_guard68612_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125, + CASE_guard68612_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124, + CASE_guard77110_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164, + CASE_guard77110_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154, + CASE_guard77220_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55, + CASE_guard77220_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54, + CASE_guard86422_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160, + CASE_guard86422_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156, + CASE_guard95491_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162, + CASE_guard95491_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158, + CASE_guard96444_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84, + CASE_guard96444_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83, + CASE_guard98953_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137, + CASE_k74092_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6542, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6555, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559, @@ -4482,7 +4482,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11200, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d11193; wire [191 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2023; - wire [127 : 0] b__h608519, b__h608595, b__h608696, b__h608708, x__h609548; + wire [127 : 0] b__h608520, b__h608596, b__h608697, b__h608709, x__h609549; wire [68 : 0] execFpuSimple___d11167; wire [65 : 0] IF_IF_mmio_pRsQ_enqReq_lat_1_whas__82_THEN_NOT_ETC___d627; wire [64 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2598; @@ -4517,162 +4517,162 @@ module mkCore(CLK, IF_coreFix_memExe_lsq_firstLd__285_BIT_96_350__ETC___d1435, IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8, IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15095, - _theResult___fst__h608919, - _theResult___snd__h608920, - a___1__h608533, - a___1__h608924, - a__h608371, + _theResult___fst__h608920, + _theResult___snd__h608921, + a___1__h608534, + a___1__h608925, + a__h608372, amoExec___d882, - b___1__h608534, - b___1__h608985, - b__h608372, - base__h710680, - base__h710700, + b___1__h608535, + b___1__h608986, + b__h608373, + base__h710681, + base__h710701, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11256, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11257, - data___1__h479772, - data___1__h480704, - data__h479260, - data__h480192, - fallthrough_pc__h670383, - fallthrough_pc__h686129, - fcsr_csr__read__h616232, - fflags_csr__read__h616207, - frm_csr__read__h616218, - mcause_csr__read__h617874, - mcounteren_csr__read__h617619, - medeleg_csr__read__h617226, - mideleg_csr__read__h617321, - mie_csr__read__h617445, - mip_csr__read__h618107, - mstatus_csr__read__h617078, - mtvec_csr__read__h617527, - n___1__h201748, - n__h196840, - n__read__h618211, - n__read__h618402, - n__read__h6329, - n__read__h719387, - next_pc__h718597, - q___1__h480779, - rVal1__h487141, - rVal2__h487142, - r___1__h480806, - res_data__h342518, - res_data__h342523, - res_data__h388220, - res_data__h388225, - res_data__h433915, - res_data__h433920, - resp_addr__h296626, - rg_tdata1__read__h619062, + data___1__h479773, + data___1__h480705, + data__h479261, + data__h480193, + fallthrough_pc__h670384, + fallthrough_pc__h686130, + fcsr_csr__read__h616233, + fflags_csr__read__h616208, + frm_csr__read__h616219, + mcause_csr__read__h617875, + mcounteren_csr__read__h617620, + medeleg_csr__read__h617227, + mideleg_csr__read__h617322, + mie_csr__read__h617446, + mip_csr__read__h618108, + mstatus_csr__read__h617079, + mtvec_csr__read__h617528, + n___1__h201749, + n__h196841, + n__read__h618212, + n__read__h618403, + n__read__h6330, + n__read__h719388, + next_pc__h718598, + q___1__h480780, + rVal1__h487142, + rVal2__h487143, + r___1__h480807, + res_data__h342519, + res_data__h342524, + res_data__h388221, + res_data__h388226, + res_data__h433916, + res_data__h433921, + resp_addr__h296627, + rg_tdata1__read__h619063, rob_deqPort_0_deq_data__4451_BITS_353_TO_290_4_ETC___d14954, robdeqPort_0_deq_data_BITS_95_TO_32__q262, - satp_csr__read__h616935, - scause_csr__read__h616732, - scounteren_csr__read__h616594, - shiftData__h184741, - sie_csr__read__h616498, - sip_csr__read__h616872, - sstatus_csr__read__h616428, - stvec_csr__read__h616541, - upd__h3680, - upd__h4997, - v__h614702, - v__h639700, - vaddr__h184736, - x__h155096, - x__h158643, - x__h161457, - x__h163305, - x__h17931, - x__h184648, + satp_csr__read__h616936, + scause_csr__read__h616733, + scounteren_csr__read__h616595, + shiftData__h184742, + sie_csr__read__h616499, + sip_csr__read__h616873, + sstatus_csr__read__h616429, + stvec_csr__read__h616542, + upd__h3681, + upd__h4998, + v__h614703, + v__h639701, + vaddr__h184737, + x__h155097, + x__h158644, + x__h161458, + x__h163306, + x__h17932, x__h184649, - x__h20469, - x__h291835, - x__h293689, - x__h45838, - x__h48374, - x__h487047, + x__h184650, + x__h20470, + x__h291836, + x__h293690, + x__h45839, + x__h48375, x__h487048, x__h487049, - x__h608908, - x__h623641, + x__h487050, + x__h608909, x__h623642, - x__h646270, + x__h623643, x__h646271, - x__h704086, - x_addr__h318723, - x_quotient__h479956, - x_reg_ifc__read__h616337, - x_remainder__h479957, - y__h626443, - y__h648779, - y__h722607, - y_avValue__h183776, - y_avValue__h184495, - y_avValue__h484110, - y_avValue__h484831, - y_avValue__h485546, - y_avValue__h615873, - y_avValue__h621651, - y_avValue__h640719, - y_avValue__h644290, - y_avValue_new_pc__h710461, - y_avValue_new_pc__h710647, - y_avValue_snd_snd_snd_snd_snd__h722001, - y_avValue_snd_snd_snd_snd_snd__h722660, - y_avValue_snd_snd_snd_snd_snd__h722689; + x__h646272, + x__h704087, + x_addr__h318724, + x_quotient__h479957, + x_reg_ifc__read__h616338, + x_remainder__h479958, + y__h626444, + y__h648780, + y__h722608, + y_avValue__h183777, + y_avValue__h184496, + y_avValue__h484111, + y_avValue__h484832, + y_avValue__h485547, + y_avValue__h615874, + y_avValue__h621652, + y_avValue__h640720, + y_avValue__h644291, + y_avValue_new_pc__h710462, + y_avValue_new_pc__h710648, + y_avValue_snd_snd_snd_snd_snd__h722002, + y_avValue_snd_snd_snd_snd_snd__h722661, + y_avValue_snd_snd_snd_snd_snd__h722690; wire [62 : 0] IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10763, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9993, - r1__read__h619387, - r1__read__h619791, - r1__read__h620301, - r1__read__h620306, - r1__read__h620325, - r1__read__h620558, - r1__read__h620724, - r1__read__h620817, - r1__read__h620822, - r1__read__h620841; - wire [61 : 0] r1__read__h619389, - r1__read__h619793, - r1__read__h620308, - r1__read__h620327, - r1__read__h620560, - r1__read__h620700, - r1__read__h620726, - r1__read__h620824, - r1__read__h620843; - wire [60 : 0] r1__read__h620562, - r1__read__h620702, - r1__read__h620728, - r1__read__h620845; - wire [59 : 0] r1__read__h619391, - r1__read__h619795, - r1__read__h620319, - r1__read__h620329, - r1__read__h620564, - r1__read__h620730, - r1__read__h620835, - r1__read__h620847; - wire [58 : 0] r1__read__h619393, - r1__read__h619797, - r1__read__h620331, - r1__read__h620566, - r1__read__h620732, - r1__read__h620849; + r1__read__h619388, + r1__read__h619792, + r1__read__h620302, + r1__read__h620307, + r1__read__h620326, + r1__read__h620559, + r1__read__h620725, + r1__read__h620818, + r1__read__h620823, + r1__read__h620842; + wire [61 : 0] r1__read__h619390, + r1__read__h619794, + r1__read__h620309, + r1__read__h620328, + r1__read__h620561, + r1__read__h620701, + r1__read__h620727, + r1__read__h620825, + r1__read__h620844; + wire [60 : 0] r1__read__h620563, + r1__read__h620703, + r1__read__h620729, + r1__read__h620846; + wire [59 : 0] r1__read__h619392, + r1__read__h619796, + r1__read__h620320, + r1__read__h620330, + r1__read__h620565, + r1__read__h620731, + r1__read__h620836, + r1__read__h620848; + wire [58 : 0] r1__read__h619394, + r1__read__h619798, + r1__read__h620332, + r1__read__h620567, + r1__read__h620733, + r1__read__h620850; wire [57 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2578, IF_coreFix_memExe_dMem_cache_m_banks_0_linkAdd_ETC___d3108, IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2787, - r1__read__h619395, - r1__read__h619799, - r1__read__h620333, - r1__read__h620568, - r1__read__h620704, - r1__read__h620734, - r1__read__h620851, - y__h258433; + r1__read__h619396, + r1__read__h619800, + r1__read__h620334, + r1__read__h620569, + r1__read__h620705, + r1__read__h620735, + r1__read__h620852, + y__h258434; wire [56 : 0] IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q21, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q56, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q91, @@ -4700,187 +4700,187 @@ module mkCore(CLK, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4654, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6046, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7438, - _theResult____h350734, - _theResult____h368373, - _theResult____h396433, - _theResult____h414070, - _theResult____h442128, - _theResult____h459765, - _theResult____h508254, - _theResult____h547107, - _theResult____h586411, - _theResult___snd__h358856, - _theResult___snd__h358867, - _theResult___snd__h358869, - _theResult___snd__h358879, - _theResult___snd__h358885, - _theResult___snd__h358908, - _theResult___snd__h367452, - _theResult___snd__h367454, - _theResult___snd__h367461, - _theResult___snd__h367467, - _theResult___snd__h367490, - _theResult___snd__h376622, - _theResult___snd__h376633, - _theResult___snd__h376635, - _theResult___snd__h376645, - _theResult___snd__h376651, - _theResult___snd__h376674, - _theResult___snd__h385242, - _theResult___snd__h385256, - _theResult___snd__h385262, - _theResult___snd__h385280, - _theResult___snd__h404553, - _theResult___snd__h404564, - _theResult___snd__h404566, - _theResult___snd__h404576, - _theResult___snd__h404582, - _theResult___snd__h404605, - _theResult___snd__h413149, - _theResult___snd__h413151, - _theResult___snd__h413158, - _theResult___snd__h413164, - _theResult___snd__h413187, - _theResult___snd__h422319, - _theResult___snd__h422330, - _theResult___snd__h422332, - _theResult___snd__h422342, - _theResult___snd__h422348, - _theResult___snd__h422371, - _theResult___snd__h430939, - _theResult___snd__h430953, - _theResult___snd__h430959, - _theResult___snd__h430977, - _theResult___snd__h450248, - _theResult___snd__h450259, - _theResult___snd__h450261, - _theResult___snd__h450271, - _theResult___snd__h450277, - _theResult___snd__h450300, - _theResult___snd__h458844, - _theResult___snd__h458846, - _theResult___snd__h458853, - _theResult___snd__h458859, - _theResult___snd__h458882, - _theResult___snd__h468014, - _theResult___snd__h468025, - _theResult___snd__h468027, - _theResult___snd__h468037, - _theResult___snd__h468043, - _theResult___snd__h468066, - _theResult___snd__h476634, - _theResult___snd__h476648, - _theResult___snd__h476654, - _theResult___snd__h476672, - _theResult___snd__h506864, - _theResult___snd__h506866, - _theResult___snd__h506873, - _theResult___snd__h506879, - _theResult___snd__h506902, - _theResult___snd__h516501, - _theResult___snd__h516512, - _theResult___snd__h516514, - _theResult___snd__h516524, - _theResult___snd__h516530, - _theResult___snd__h516553, - _theResult___snd__h525269, - _theResult___snd__h525283, - _theResult___snd__h525289, - _theResult___snd__h525307, - _theResult___snd__h545717, - _theResult___snd__h545719, - _theResult___snd__h545726, - _theResult___snd__h545732, - _theResult___snd__h545755, - _theResult___snd__h555354, - _theResult___snd__h555365, - _theResult___snd__h555367, - _theResult___snd__h555377, - _theResult___snd__h555383, - _theResult___snd__h555406, - _theResult___snd__h564122, - _theResult___snd__h564136, - _theResult___snd__h564142, - _theResult___snd__h564160, - _theResult___snd__h585021, - _theResult___snd__h585023, - _theResult___snd__h585030, - _theResult___snd__h585036, - _theResult___snd__h585059, - _theResult___snd__h594658, - _theResult___snd__h594669, - _theResult___snd__h594671, - _theResult___snd__h594681, - _theResult___snd__h594687, - _theResult___snd__h594710, - _theResult___snd__h603426, - _theResult___snd__h603440, - _theResult___snd__h603446, - _theResult___snd__h603464, - r1__read__h620570, - r1__read__h620706, - r1__read__h620736, - r1__read__h620853, - result__h368986, - result__h414683, - result__h460378, - result__h508867, - result__h547720, - result__h587024, - sfd__h343129, - sfd__h388831, - sfd__h434526, - sfd__h487887, - sfd__h526881, - sfd__h566185, - sfdin__h358839, - sfdin__h376605, - sfdin__h404536, - sfdin__h422302, - sfdin__h450231, - sfdin__h467997, - sfdin__h516484, - sfdin__h555337, - sfdin__h594641, - x__h369083, - x__h414780, - x__h460475, - x__h508962, - x__h547815, - x__h587119; - wire [55 : 0] r1__read__h619397, - r1__read__h619801, - r1__read__h620335, - r1__read__h620572, - r1__read__h620738, - r1__read__h620855; - wire [54 : 0] r1__read__h619399, - r1__read__h619803, - r1__read__h620337, - r1__read__h620574, - r1__read__h620740, - r1__read__h620857; - wire [53 : 0] r1__read__h620683, - r1__read__h620708, - r1__read__h620742, - r1__read__h620859, - sfd__h506931, - sfd__h516582, - sfd__h525342, - sfd__h545784, - sfd__h555435, - sfd__h564195, - sfd__h585088, - sfd__h594739, - sfd__h603499, - value__h351356, - value__h397053, - value__h442748; - wire [52 : 0] r1__read__h620576, - r1__read__h620685, - r1__read__h620710, - r1__read__h620744, - r1__read__h620861; + _theResult____h350735, + _theResult____h368374, + _theResult____h396434, + _theResult____h414071, + _theResult____h442129, + _theResult____h459766, + _theResult____h508255, + _theResult____h547108, + _theResult____h586412, + _theResult___snd__h358857, + _theResult___snd__h358868, + _theResult___snd__h358870, + _theResult___snd__h358880, + _theResult___snd__h358886, + _theResult___snd__h358909, + _theResult___snd__h367453, + _theResult___snd__h367455, + _theResult___snd__h367462, + _theResult___snd__h367468, + _theResult___snd__h367491, + _theResult___snd__h376623, + _theResult___snd__h376634, + _theResult___snd__h376636, + _theResult___snd__h376646, + _theResult___snd__h376652, + _theResult___snd__h376675, + _theResult___snd__h385243, + _theResult___snd__h385257, + _theResult___snd__h385263, + _theResult___snd__h385281, + _theResult___snd__h404554, + _theResult___snd__h404565, + _theResult___snd__h404567, + _theResult___snd__h404577, + _theResult___snd__h404583, + _theResult___snd__h404606, + _theResult___snd__h413150, + _theResult___snd__h413152, + _theResult___snd__h413159, + _theResult___snd__h413165, + _theResult___snd__h413188, + _theResult___snd__h422320, + _theResult___snd__h422331, + _theResult___snd__h422333, + _theResult___snd__h422343, + _theResult___snd__h422349, + _theResult___snd__h422372, + _theResult___snd__h430940, + _theResult___snd__h430954, + _theResult___snd__h430960, + _theResult___snd__h430978, + _theResult___snd__h450249, + _theResult___snd__h450260, + _theResult___snd__h450262, + _theResult___snd__h450272, + _theResult___snd__h450278, + _theResult___snd__h450301, + _theResult___snd__h458845, + _theResult___snd__h458847, + _theResult___snd__h458854, + _theResult___snd__h458860, + _theResult___snd__h458883, + _theResult___snd__h468015, + _theResult___snd__h468026, + _theResult___snd__h468028, + _theResult___snd__h468038, + _theResult___snd__h468044, + _theResult___snd__h468067, + _theResult___snd__h476635, + _theResult___snd__h476649, + _theResult___snd__h476655, + _theResult___snd__h476673, + _theResult___snd__h506865, + _theResult___snd__h506867, + _theResult___snd__h506874, + _theResult___snd__h506880, + _theResult___snd__h506903, + _theResult___snd__h516502, + _theResult___snd__h516513, + _theResult___snd__h516515, + _theResult___snd__h516525, + _theResult___snd__h516531, + _theResult___snd__h516554, + _theResult___snd__h525270, + _theResult___snd__h525284, + _theResult___snd__h525290, + _theResult___snd__h525308, + _theResult___snd__h545718, + _theResult___snd__h545720, + _theResult___snd__h545727, + _theResult___snd__h545733, + _theResult___snd__h545756, + _theResult___snd__h555355, + _theResult___snd__h555366, + _theResult___snd__h555368, + _theResult___snd__h555378, + _theResult___snd__h555384, + _theResult___snd__h555407, + _theResult___snd__h564123, + _theResult___snd__h564137, + _theResult___snd__h564143, + _theResult___snd__h564161, + _theResult___snd__h585022, + _theResult___snd__h585024, + _theResult___snd__h585031, + _theResult___snd__h585037, + _theResult___snd__h585060, + _theResult___snd__h594659, + _theResult___snd__h594670, + _theResult___snd__h594672, + _theResult___snd__h594682, + _theResult___snd__h594688, + _theResult___snd__h594711, + _theResult___snd__h603427, + _theResult___snd__h603441, + _theResult___snd__h603447, + _theResult___snd__h603465, + r1__read__h620571, + r1__read__h620707, + r1__read__h620737, + r1__read__h620854, + result__h368987, + result__h414684, + result__h460379, + result__h508868, + result__h547721, + result__h587025, + sfd__h343130, + sfd__h388832, + sfd__h434527, + sfd__h487888, + sfd__h526882, + sfd__h566186, + sfdin__h358840, + sfdin__h376606, + sfdin__h404537, + sfdin__h422303, + sfdin__h450232, + sfdin__h467998, + sfdin__h516485, + sfdin__h555338, + sfdin__h594642, + x__h369084, + x__h414781, + x__h460476, + x__h508963, + x__h547816, + x__h587120; + wire [55 : 0] r1__read__h619398, + r1__read__h619802, + r1__read__h620336, + r1__read__h620573, + r1__read__h620739, + r1__read__h620856; + wire [54 : 0] r1__read__h619400, + r1__read__h619804, + r1__read__h620338, + r1__read__h620575, + r1__read__h620741, + r1__read__h620858; + wire [53 : 0] r1__read__h620684, + r1__read__h620709, + r1__read__h620743, + r1__read__h620860, + sfd__h506932, + sfd__h516583, + sfd__h525343, + sfd__h545785, + sfd__h555436, + sfd__h564196, + sfd__h585089, + sfd__h594740, + sfd__h603500, + value__h351357, + value__h397054, + value__h442749; + wire [52 : 0] r1__read__h620577, + r1__read__h620686, + r1__read__h620711, + r1__read__h620745, + r1__read__h620862; wire [51 : 0] IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10730, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10732, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9251, @@ -4902,109 +4902,109 @@ module mkCore(CLK, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9283, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9992, - _theResult___fst_sfd__h491841, - _theResult___fst_sfd__h507669, - _theResult___fst_sfd__h507672, - _theResult___fst_sfd__h517320, - _theResult___fst_sfd__h517323, - _theResult___fst_sfd__h526104, - _theResult___fst_sfd__h526107, - _theResult___fst_sfd__h526116, - _theResult___fst_sfd__h526122, - _theResult___fst_sfd__h530694, - _theResult___fst_sfd__h546522, - _theResult___fst_sfd__h546525, - _theResult___fst_sfd__h556173, - _theResult___fst_sfd__h556176, - _theResult___fst_sfd__h564957, - _theResult___fst_sfd__h564960, - _theResult___fst_sfd__h564969, - _theResult___fst_sfd__h564975, - _theResult___fst_sfd__h569998, - _theResult___fst_sfd__h585826, - _theResult___fst_sfd__h585829, - _theResult___fst_sfd__h595477, - _theResult___fst_sfd__h595480, - _theResult___fst_sfd__h604261, - _theResult___fst_sfd__h604264, - _theResult___fst_sfd__h604273, - _theResult___fst_sfd__h604279, - _theResult___sfd__h507569, - _theResult___sfd__h517220, - _theResult___sfd__h526004, - _theResult___sfd__h546422, - _theResult___sfd__h556073, - _theResult___sfd__h564857, - _theResult___sfd__h585726, - _theResult___sfd__h595377, - _theResult___sfd__h604161, - _theResult___snd_fst_sfd__h487841, - _theResult___snd_fst_sfd__h507675, - _theResult___snd_fst_sfd__h526110, - _theResult___snd_fst_sfd__h526835, - _theResult___snd_fst_sfd__h546528, - _theResult___snd_fst_sfd__h564963, - _theResult___snd_fst_sfd__h566139, - _theResult___snd_fst_sfd__h585832, - _theResult___snd_fst_sfd__h604267, - out___1_sfd__h487589, - out___1_sfd__h526583, - out___1_sfd__h565887, - out_sfd__h507572, - out_sfd__h517223, - out_sfd__h526007, - out_sfd__h546425, - out_sfd__h556076, - out_sfd__h564860, - out_sfd__h585729, - out_sfd__h595380, - out_sfd__h604164; - wire [50 : 0] r1__read__h619401, r1__read__h620578; - wire [49 : 0] r1__read__h620687; - wire [48 : 0] r1__read__h619403, r1__read__h620580, r1__read__h620689; - wire [46 : 0] r1__read__h619405, r1__read__h620582; - wire [45 : 0] r1__read__h619407, r1__read__h620584; - wire [44 : 0] r1__read__h619409, r1__read__h620586; - wire [43 : 0] r1__read__h619411, r1__read__h620588; - wire [42 : 0] r1__read__h620590; - wire [41 : 0] r1__read__h620592; - wire [40 : 0] r1__read__h620594; + _theResult___fst_sfd__h491842, + _theResult___fst_sfd__h507670, + _theResult___fst_sfd__h507673, + _theResult___fst_sfd__h517321, + _theResult___fst_sfd__h517324, + _theResult___fst_sfd__h526105, + _theResult___fst_sfd__h526108, + _theResult___fst_sfd__h526117, + _theResult___fst_sfd__h526123, + _theResult___fst_sfd__h530695, + _theResult___fst_sfd__h546523, + _theResult___fst_sfd__h546526, + _theResult___fst_sfd__h556174, + _theResult___fst_sfd__h556177, + _theResult___fst_sfd__h564958, + _theResult___fst_sfd__h564961, + _theResult___fst_sfd__h564970, + _theResult___fst_sfd__h564976, + _theResult___fst_sfd__h569999, + _theResult___fst_sfd__h585827, + _theResult___fst_sfd__h585830, + _theResult___fst_sfd__h595478, + _theResult___fst_sfd__h595481, + _theResult___fst_sfd__h604262, + _theResult___fst_sfd__h604265, + _theResult___fst_sfd__h604274, + _theResult___fst_sfd__h604280, + _theResult___sfd__h507570, + _theResult___sfd__h517221, + _theResult___sfd__h526005, + _theResult___sfd__h546423, + _theResult___sfd__h556074, + _theResult___sfd__h564858, + _theResult___sfd__h585727, + _theResult___sfd__h595378, + _theResult___sfd__h604162, + _theResult___snd_fst_sfd__h487842, + _theResult___snd_fst_sfd__h507676, + _theResult___snd_fst_sfd__h526111, + _theResult___snd_fst_sfd__h526836, + _theResult___snd_fst_sfd__h546529, + _theResult___snd_fst_sfd__h564964, + _theResult___snd_fst_sfd__h566140, + _theResult___snd_fst_sfd__h585833, + _theResult___snd_fst_sfd__h604268, + out___1_sfd__h487590, + out___1_sfd__h526584, + out___1_sfd__h565888, + out_sfd__h507573, + out_sfd__h517224, + out_sfd__h526008, + out_sfd__h546426, + out_sfd__h556077, + out_sfd__h564861, + out_sfd__h585730, + out_sfd__h595381, + out_sfd__h604165; + wire [50 : 0] r1__read__h619402, r1__read__h620579; + wire [49 : 0] r1__read__h620688; + wire [48 : 0] r1__read__h619404, r1__read__h620581, r1__read__h620690; + wire [46 : 0] r1__read__h619406, r1__read__h620583; + wire [45 : 0] r1__read__h619408, r1__read__h620585; + wire [44 : 0] r1__read__h619410, r1__read__h620587; + wire [43 : 0] r1__read__h619412, r1__read__h620589; + wire [42 : 0] r1__read__h620591; + wire [41 : 0] r1__read__h620593; + wire [40 : 0] r1__read__h620595; wire [37 : 0] IF_fetchStage_pipelines_0_first__2928_BIT_160__ETC___d14222, IF_fetchStage_pipelines_1_first__2937_BIT_160__ETC___d14383; wire [31 : 0] coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q4, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q3, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q5, - data79260_BITS_31_TO_0__q2, - data80192_BITS_31_TO_0__q6, - imm__h661836, - r1__read__h619413, - r1__read__h620596, - x__h196065, - x__h342533, - x__h388235, - x__h433930, - x__h75783, - x_data__h65632, - x_data_imm__h681436, - x_data_imm__h697340; - wire [29 : 0] r1__read__h619415, r1__read__h620598; - wire [27 : 0] r1__read__h620600; + data79261_BITS_31_TO_0__q2, + data80193_BITS_31_TO_0__q6, + imm__h661837, + r1__read__h619414, + r1__read__h620597, + x__h196066, + x__h342534, + x__h388236, + x__h433931, + x__h75784, + x_data__h65633, + x_data_imm__h681437, + x_data_imm__h697341; + wire [29 : 0] r1__read__h619416, r1__read__h620599; + wire [27 : 0] r1__read__h620601; wire [24 : 0] NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d14268, - sfd__h358937, - sfd__h367519, - sfd__h376703, - sfd__h385315, - sfd__h404634, - sfd__h413216, - sfd__h422400, - sfd__h431012, - sfd__h450329, - sfd__h458911, - sfd__h468095, - sfd__h476707, - value__h492470, - value__h531323, - value__h570627; + sfd__h358938, + sfd__h367520, + sfd__h376704, + sfd__h385316, + sfd__h404635, + sfd__h413217, + sfd__h422401, + sfd__h431013, + sfd__h450330, + sfd__h458912, + sfd__h468096, + sfd__h476708, + value__h492471, + value__h531324, + value__h570628; wire [22 : 0] IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5053, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5055, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6445, @@ -5029,67 +5029,67 @@ module mkCore(CLK, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7858, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7902, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7904, - _theResult___fst_sfd__h359443, - _theResult___fst_sfd__h368025, - _theResult___fst_sfd__h377209, - _theResult___fst_sfd__h385845, - _theResult___fst_sfd__h385854, - _theResult___fst_sfd__h385860, - _theResult___fst_sfd__h405140, - _theResult___fst_sfd__h413722, - _theResult___fst_sfd__h422906, - _theResult___fst_sfd__h431542, - _theResult___fst_sfd__h431551, - _theResult___fst_sfd__h431557, - _theResult___fst_sfd__h450835, - _theResult___fst_sfd__h459417, - _theResult___fst_sfd__h468601, - _theResult___fst_sfd__h477237, - _theResult___fst_sfd__h477246, - _theResult___fst_sfd__h477252, - _theResult___sfd__h359362, - _theResult___sfd__h367944, - _theResult___sfd__h377128, - _theResult___sfd__h385764, - _theResult___sfd__h385866, - _theResult___sfd__h405059, - _theResult___sfd__h413641, - _theResult___sfd__h422825, - _theResult___sfd__h431461, - _theResult___sfd__h431563, - _theResult___sfd__h450754, - _theResult___sfd__h459336, - _theResult___sfd__h468520, - _theResult___sfd__h477156, - _theResult___sfd__h477258, - _theResult___snd_fst_sfd__h343079, - _theResult___snd_fst_sfd__h368028, - _theResult___snd_fst_sfd__h385848, - _theResult___snd_fst_sfd__h388781, - _theResult___snd_fst_sfd__h413725, - _theResult___snd_fst_sfd__h431545, - _theResult___snd_fst_sfd__h434476, - _theResult___snd_fst_sfd__h459420, - _theResult___snd_fst_sfd__h477240, - f1_sfd__h487526, - f2_sfd__h526520, - f3_sfd__h565824, - out_f_sfd__h386143, - out_f_sfd__h431840, - out_f_sfd__h477535, - out_sfd__h359365, - out_sfd__h367947, - out_sfd__h377131, - out_sfd__h385767, - out_sfd__h405062, - out_sfd__h413644, - out_sfd__h422828, - out_sfd__h431464, - out_sfd__h450757, - out_sfd__h459339, - out_sfd__h468523, - out_sfd__h477159; - wire [19 : 0] r1__read__h620535; + _theResult___fst_sfd__h359444, + _theResult___fst_sfd__h368026, + _theResult___fst_sfd__h377210, + _theResult___fst_sfd__h385846, + _theResult___fst_sfd__h385855, + _theResult___fst_sfd__h385861, + _theResult___fst_sfd__h405141, + _theResult___fst_sfd__h413723, + _theResult___fst_sfd__h422907, + _theResult___fst_sfd__h431543, + _theResult___fst_sfd__h431552, + _theResult___fst_sfd__h431558, + _theResult___fst_sfd__h450836, + _theResult___fst_sfd__h459418, + _theResult___fst_sfd__h468602, + _theResult___fst_sfd__h477238, + _theResult___fst_sfd__h477247, + _theResult___fst_sfd__h477253, + _theResult___sfd__h359363, + _theResult___sfd__h367945, + _theResult___sfd__h377129, + _theResult___sfd__h385765, + _theResult___sfd__h385867, + _theResult___sfd__h405060, + _theResult___sfd__h413642, + _theResult___sfd__h422826, + _theResult___sfd__h431462, + _theResult___sfd__h431564, + _theResult___sfd__h450755, + _theResult___sfd__h459337, + _theResult___sfd__h468521, + _theResult___sfd__h477157, + _theResult___sfd__h477259, + _theResult___snd_fst_sfd__h343080, + _theResult___snd_fst_sfd__h368029, + _theResult___snd_fst_sfd__h385849, + _theResult___snd_fst_sfd__h388782, + _theResult___snd_fst_sfd__h413726, + _theResult___snd_fst_sfd__h431546, + _theResult___snd_fst_sfd__h434477, + _theResult___snd_fst_sfd__h459421, + _theResult___snd_fst_sfd__h477241, + f1_sfd__h487527, + f2_sfd__h526521, + f3_sfd__h565825, + out_f_sfd__h386144, + out_f_sfd__h431841, + out_f_sfd__h477536, + out_sfd__h359366, + out_sfd__h367948, + out_sfd__h377132, + out_sfd__h385768, + out_sfd__h405063, + out_sfd__h413645, + out_sfd__h422829, + out_sfd__h431465, + out_sfd__h450758, + out_sfd__h459340, + out_sfd__h468524, + out_sfd__h477160; + wire [19 : 0] r1__read__h620536; wire [12 : 0] fetchStage_pipelines_1_first__2937_BIT_173_368_ETC___d13770; wire [11 : 0] IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d12992, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10542, @@ -5120,30 +5120,30 @@ module mkCore(CLK, _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4650, _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6042, _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7434, - _theResult____h658025, - csr_addr__h661834, - enabled_ints___1__h658438, - enabled_ints__h658484, - pend_ints__h658023, - renaming_spec_bits__h689555, - result__h653732, - result__h653783, - spec_bits__h692682, - w__h653727, - x__h369116, - x__h414813, - x__h460508, - x__h508995, - x__h547848, - x__h587152, - x__h653731, - x__h653782, - y__h653761, - y__h658450, - y__h692695, - y_avValue_fst__h685979, - y_avValue_snd_fst__h686253, - y_avValue_snd_fst__h686288; + _theResult____h658026, + csr_addr__h661835, + enabled_ints___1__h658439, + enabled_ints__h658485, + pend_ints__h658024, + renaming_spec_bits__h689556, + result__h653733, + result__h653784, + spec_bits__h692683, + w__h653728, + x__h369117, + x__h414814, + x__h460509, + x__h508996, + x__h547849, + x__h587153, + x__h653732, + x__h653783, + y__h653762, + y__h658451, + y__h692696, + y_avValue_fst__h685980, + y_avValue_snd_fst__h686254, + y_avValue_snd_fst__h686289; wire [10 : 0] IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10647, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10649, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9167, @@ -5165,103 +5165,103 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q132, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q149, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q172, - _theResult___exp__h507568, - _theResult___exp__h517219, - _theResult___exp__h526003, - _theResult___exp__h546421, - _theResult___exp__h556072, - _theResult___exp__h564856, - _theResult___exp__h585725, - _theResult___exp__h595376, - _theResult___exp__h604160, - _theResult___fst_exp__h491840, - _theResult___fst_exp__h506904, - _theResult___fst_exp__h506910, - _theResult___fst_exp__h506913, - _theResult___fst_exp__h507668, - _theResult___fst_exp__h507671, - _theResult___fst_exp__h516490, - _theResult___fst_exp__h516555, - _theResult___fst_exp__h516561, - _theResult___fst_exp__h516564, - _theResult___fst_exp__h517319, - _theResult___fst_exp__h517322, - _theResult___fst_exp__h525275, - _theResult___fst_exp__h525314, - _theResult___fst_exp__h525320, - _theResult___fst_exp__h525323, - _theResult___fst_exp__h526103, - _theResult___fst_exp__h526106, - _theResult___fst_exp__h526115, - _theResult___fst_exp__h526118, - _theResult___fst_exp__h530693, - _theResult___fst_exp__h545757, - _theResult___fst_exp__h545763, - _theResult___fst_exp__h545766, - _theResult___fst_exp__h546521, - _theResult___fst_exp__h546524, - _theResult___fst_exp__h555343, - _theResult___fst_exp__h555408, - _theResult___fst_exp__h555414, - _theResult___fst_exp__h555417, - _theResult___fst_exp__h556172, - _theResult___fst_exp__h556175, - _theResult___fst_exp__h564128, - _theResult___fst_exp__h564167, - _theResult___fst_exp__h564173, - _theResult___fst_exp__h564176, - _theResult___fst_exp__h564956, - _theResult___fst_exp__h564959, - _theResult___fst_exp__h564968, - _theResult___fst_exp__h564971, - _theResult___fst_exp__h569997, - _theResult___fst_exp__h585061, - _theResult___fst_exp__h585067, - _theResult___fst_exp__h585070, - _theResult___fst_exp__h585825, - _theResult___fst_exp__h585828, - _theResult___fst_exp__h594647, - _theResult___fst_exp__h594712, - _theResult___fst_exp__h594718, - _theResult___fst_exp__h594721, - _theResult___fst_exp__h595476, - _theResult___fst_exp__h595479, - _theResult___fst_exp__h603432, - _theResult___fst_exp__h603471, - _theResult___fst_exp__h603477, - _theResult___fst_exp__h603480, - _theResult___fst_exp__h604260, - _theResult___fst_exp__h604263, - _theResult___fst_exp__h604272, - _theResult___fst_exp__h604275, - _theResult___snd_fst_exp__h507674, - _theResult___snd_fst_exp__h526109, - _theResult___snd_fst_exp__h546527, - _theResult___snd_fst_exp__h564962, - _theResult___snd_fst_exp__h585831, - _theResult___snd_fst_exp__h604266, + _theResult___exp__h507569, + _theResult___exp__h517220, + _theResult___exp__h526004, + _theResult___exp__h546422, + _theResult___exp__h556073, + _theResult___exp__h564857, + _theResult___exp__h585726, + _theResult___exp__h595377, + _theResult___exp__h604161, + _theResult___fst_exp__h491841, + _theResult___fst_exp__h506905, + _theResult___fst_exp__h506911, + _theResult___fst_exp__h506914, + _theResult___fst_exp__h507669, + _theResult___fst_exp__h507672, + _theResult___fst_exp__h516491, + _theResult___fst_exp__h516556, + _theResult___fst_exp__h516562, + _theResult___fst_exp__h516565, + _theResult___fst_exp__h517320, + _theResult___fst_exp__h517323, + _theResult___fst_exp__h525276, + _theResult___fst_exp__h525315, + _theResult___fst_exp__h525321, + _theResult___fst_exp__h525324, + _theResult___fst_exp__h526104, + _theResult___fst_exp__h526107, + _theResult___fst_exp__h526116, + _theResult___fst_exp__h526119, + _theResult___fst_exp__h530694, + _theResult___fst_exp__h545758, + _theResult___fst_exp__h545764, + _theResult___fst_exp__h545767, + _theResult___fst_exp__h546522, + _theResult___fst_exp__h546525, + _theResult___fst_exp__h555344, + _theResult___fst_exp__h555409, + _theResult___fst_exp__h555415, + _theResult___fst_exp__h555418, + _theResult___fst_exp__h556173, + _theResult___fst_exp__h556176, + _theResult___fst_exp__h564129, + _theResult___fst_exp__h564168, + _theResult___fst_exp__h564174, + _theResult___fst_exp__h564177, + _theResult___fst_exp__h564957, + _theResult___fst_exp__h564960, + _theResult___fst_exp__h564969, + _theResult___fst_exp__h564972, + _theResult___fst_exp__h569998, + _theResult___fst_exp__h585062, + _theResult___fst_exp__h585068, + _theResult___fst_exp__h585071, + _theResult___fst_exp__h585826, + _theResult___fst_exp__h585829, + _theResult___fst_exp__h594648, + _theResult___fst_exp__h594713, + _theResult___fst_exp__h594719, + _theResult___fst_exp__h594722, + _theResult___fst_exp__h595477, + _theResult___fst_exp__h595480, + _theResult___fst_exp__h603433, + _theResult___fst_exp__h603472, + _theResult___fst_exp__h603478, + _theResult___fst_exp__h603481, + _theResult___fst_exp__h604261, + _theResult___fst_exp__h604264, + _theResult___fst_exp__h604273, + _theResult___fst_exp__h604276, + _theResult___snd_fst_exp__h507675, + _theResult___snd_fst_exp__h526110, + _theResult___snd_fst_exp__h546528, + _theResult___snd_fst_exp__h564963, + _theResult___snd_fst_exp__h585832, + _theResult___snd_fst_exp__h604267, coreFix_fpuMulDivExe_0_fpuExec_double_divresp_ETC__q64, coreFix_fpuMulDivExe_0_fpuExec_double_fmaresp_ETC__q29, coreFix_fpuMulDivExe_0_fpuExec_double_sqrtres_ETC__q99, - din_inc___2_exp__h526163, - din_inc___2_exp__h526198, - din_inc___2_exp__h526224, - din_inc___2_exp__h565016, - din_inc___2_exp__h565051, - din_inc___2_exp__h565077, - din_inc___2_exp__h604320, - din_inc___2_exp__h604355, - din_inc___2_exp__h604381, - out_exp__h507571, - out_exp__h517222, - out_exp__h526006, - out_exp__h546424, - out_exp__h556075, - out_exp__h564859, - out_exp__h585728, - out_exp__h595379, - out_exp__h604163; - wire [9 : 0] r1__read_BITS_9_TO_0___h658460; + din_inc___2_exp__h526164, + din_inc___2_exp__h526199, + din_inc___2_exp__h526225, + din_inc___2_exp__h565017, + din_inc___2_exp__h565052, + din_inc___2_exp__h565078, + din_inc___2_exp__h604321, + din_inc___2_exp__h604356, + din_inc___2_exp__h604382, + out_exp__h507572, + out_exp__h517223, + out_exp__h526007, + out_exp__h546425, + out_exp__h556076, + out_exp__h564860, + out_exp__h585729, + out_exp__h595380, + out_exp__h604164; + wire [9 : 0] r1__read_BITS_9_TO_0___h658461; wire [8 : 0] IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4968, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6360, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7752; @@ -5292,125 +5292,125 @@ module mkCore(CLK, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q70, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q35, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q105, - _theResult___exp__h359361, - _theResult___exp__h367943, - _theResult___exp__h377127, - _theResult___exp__h385763, - _theResult___exp__h385865, - _theResult___exp__h405058, - _theResult___exp__h413640, - _theResult___exp__h422824, - _theResult___exp__h431460, - _theResult___exp__h431562, - _theResult___exp__h450753, - _theResult___exp__h459335, - _theResult___exp__h468519, - _theResult___exp__h477155, - _theResult___exp__h477257, - _theResult___fst_exp__h358845, - _theResult___fst_exp__h358910, - _theResult___fst_exp__h358916, - _theResult___fst_exp__h358919, - _theResult___fst_exp__h359442, - _theResult___fst_exp__h367492, - _theResult___fst_exp__h367498, - _theResult___fst_exp__h367501, - _theResult___fst_exp__h368024, - _theResult___fst_exp__h376611, - _theResult___fst_exp__h376676, - _theResult___fst_exp__h376682, - _theResult___fst_exp__h376685, - _theResult___fst_exp__h377208, - _theResult___fst_exp__h385248, - _theResult___fst_exp__h385287, - _theResult___fst_exp__h385293, - _theResult___fst_exp__h385296, - _theResult___fst_exp__h385844, - _theResult___fst_exp__h385853, - _theResult___fst_exp__h385856, - _theResult___fst_exp__h404542, - _theResult___fst_exp__h404607, - _theResult___fst_exp__h404613, - _theResult___fst_exp__h404616, - _theResult___fst_exp__h405139, - _theResult___fst_exp__h413189, - _theResult___fst_exp__h413195, - _theResult___fst_exp__h413198, - _theResult___fst_exp__h413721, - _theResult___fst_exp__h422308, - _theResult___fst_exp__h422373, - _theResult___fst_exp__h422379, - _theResult___fst_exp__h422382, - _theResult___fst_exp__h422905, - _theResult___fst_exp__h430945, - _theResult___fst_exp__h430984, - _theResult___fst_exp__h430990, - _theResult___fst_exp__h430993, - _theResult___fst_exp__h431541, - _theResult___fst_exp__h431550, - _theResult___fst_exp__h431553, - _theResult___fst_exp__h450237, - _theResult___fst_exp__h450302, - _theResult___fst_exp__h450308, - _theResult___fst_exp__h450311, - _theResult___fst_exp__h450834, - _theResult___fst_exp__h458884, - _theResult___fst_exp__h458890, - _theResult___fst_exp__h458893, - _theResult___fst_exp__h459416, - _theResult___fst_exp__h468003, - _theResult___fst_exp__h468068, - _theResult___fst_exp__h468074, - _theResult___fst_exp__h468077, - _theResult___fst_exp__h468600, - _theResult___fst_exp__h476640, - _theResult___fst_exp__h476679, - _theResult___fst_exp__h476685, - _theResult___fst_exp__h476688, - _theResult___fst_exp__h477236, - _theResult___fst_exp__h477245, - _theResult___fst_exp__h477248, - _theResult___snd_fst_exp__h368027, - _theResult___snd_fst_exp__h385847, - _theResult___snd_fst_exp__h413724, - _theResult___snd_fst_exp__h431544, - _theResult___snd_fst_exp__h459419, - _theResult___snd_fst_exp__h477239, + _theResult___exp__h359362, + _theResult___exp__h367944, + _theResult___exp__h377128, + _theResult___exp__h385764, + _theResult___exp__h385866, + _theResult___exp__h405059, + _theResult___exp__h413641, + _theResult___exp__h422825, + _theResult___exp__h431461, + _theResult___exp__h431563, + _theResult___exp__h450754, + _theResult___exp__h459336, + _theResult___exp__h468520, + _theResult___exp__h477156, + _theResult___exp__h477258, + _theResult___fst_exp__h358846, + _theResult___fst_exp__h358911, + _theResult___fst_exp__h358917, + _theResult___fst_exp__h358920, + _theResult___fst_exp__h359443, + _theResult___fst_exp__h367493, + _theResult___fst_exp__h367499, + _theResult___fst_exp__h367502, + _theResult___fst_exp__h368025, + _theResult___fst_exp__h376612, + _theResult___fst_exp__h376677, + _theResult___fst_exp__h376683, + _theResult___fst_exp__h376686, + _theResult___fst_exp__h377209, + _theResult___fst_exp__h385249, + _theResult___fst_exp__h385288, + _theResult___fst_exp__h385294, + _theResult___fst_exp__h385297, + _theResult___fst_exp__h385845, + _theResult___fst_exp__h385854, + _theResult___fst_exp__h385857, + _theResult___fst_exp__h404543, + _theResult___fst_exp__h404608, + _theResult___fst_exp__h404614, + _theResult___fst_exp__h404617, + _theResult___fst_exp__h405140, + _theResult___fst_exp__h413190, + _theResult___fst_exp__h413196, + _theResult___fst_exp__h413199, + _theResult___fst_exp__h413722, + _theResult___fst_exp__h422309, + _theResult___fst_exp__h422374, + _theResult___fst_exp__h422380, + _theResult___fst_exp__h422383, + _theResult___fst_exp__h422906, + _theResult___fst_exp__h430946, + _theResult___fst_exp__h430985, + _theResult___fst_exp__h430991, + _theResult___fst_exp__h430994, + _theResult___fst_exp__h431542, + _theResult___fst_exp__h431551, + _theResult___fst_exp__h431554, + _theResult___fst_exp__h450238, + _theResult___fst_exp__h450303, + _theResult___fst_exp__h450309, + _theResult___fst_exp__h450312, + _theResult___fst_exp__h450835, + _theResult___fst_exp__h458885, + _theResult___fst_exp__h458891, + _theResult___fst_exp__h458894, + _theResult___fst_exp__h459417, + _theResult___fst_exp__h468004, + _theResult___fst_exp__h468069, + _theResult___fst_exp__h468075, + _theResult___fst_exp__h468078, + _theResult___fst_exp__h468601, + _theResult___fst_exp__h476641, + _theResult___fst_exp__h476680, + _theResult___fst_exp__h476686, + _theResult___fst_exp__h476689, + _theResult___fst_exp__h477237, + _theResult___fst_exp__h477246, + _theResult___fst_exp__h477249, + _theResult___snd_fst_exp__h368028, + _theResult___snd_fst_exp__h385848, + _theResult___snd_fst_exp__h413725, + _theResult___snd_fst_exp__h431545, + _theResult___snd_fst_exp__h459420, + _theResult___snd_fst_exp__h477240, csrf_external_int_en_vec_3_read__1844_AND_csrf_ETC___d12967, - din_inc___2_exp__h385878, - din_inc___2_exp__h385902, - din_inc___2_exp__h385932, - din_inc___2_exp__h385956, - din_inc___2_exp__h431575, - din_inc___2_exp__h431599, - din_inc___2_exp__h431629, - din_inc___2_exp__h431653, - din_inc___2_exp__h477270, - din_inc___2_exp__h477294, - din_inc___2_exp__h477324, - din_inc___2_exp__h477348, - f1_exp87525_MINUS_127__q128, - f1_exp__h487525, - f2_exp26519_MINUS_127__q168, - f2_exp__h526519, - f3_exp65823_MINUS_127__q145, - f3_exp__h565823, - out_exp__h359364, - out_exp__h367946, - out_exp__h377130, - out_exp__h385766, - out_exp__h405061, - out_exp__h413643, - out_exp__h422827, - out_exp__h431463, - out_exp__h450756, - out_exp__h459338, - out_exp__h468522, - out_exp__h477158, - out_f_exp__h386142, - out_f_exp__h431839, - out_f_exp__h477534, - x__h619372; + din_inc___2_exp__h385879, + din_inc___2_exp__h385903, + din_inc___2_exp__h385933, + din_inc___2_exp__h385957, + din_inc___2_exp__h431576, + din_inc___2_exp__h431600, + din_inc___2_exp__h431630, + din_inc___2_exp__h431654, + din_inc___2_exp__h477271, + din_inc___2_exp__h477295, + din_inc___2_exp__h477325, + din_inc___2_exp__h477349, + f1_exp87526_MINUS_127__q128, + f1_exp__h487526, + f2_exp26520_MINUS_127__q168, + f2_exp__h526520, + f3_exp65824_MINUS_127__q145, + f3_exp__h565824, + out_exp__h359365, + out_exp__h367947, + out_exp__h377131, + out_exp__h385767, + out_exp__h405062, + out_exp__h413644, + out_exp__h422828, + out_exp__h431464, + out_exp__h450757, + out_exp__h459339, + out_exp__h468523, + out_exp__h477159, + out_f_exp__h386143, + out_f_exp__h431840, + out_f_exp__h477535, + x__h619373; wire [5 : 0] IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4343, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5735, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7127, @@ -5431,8 +5431,8 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7358, IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2172, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d15324, - x__h184870, - x__h710695; + x__h184871, + x__h710696; wire [4 : 0] IF_fetchStage_pipelines_1_first__2937_BITS_194_ETC___d14436, IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15184, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5265, @@ -5452,19 +5452,19 @@ module mkCore(CLK, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d8061, checkForException___d13160, checkForException___d13792, - fflags__h722584, - r1__read__h620938, - res_fflags__h342519, - res_fflags__h388221, - res_fflags__h433916, - rs1__h661835, - x__h155090, - x__h158637, - x__h161453, - x__h291823, - y_avValue_fst__h721561, - y_avValue_fst__h722503, - y_avValue_fst__h722531; + fflags__h722585, + r1__read__h620939, + res_fflags__h342520, + res_fflags__h388222, + res_fflags__h433917, + rs1__h661836, + x__h155091, + x__h158638, + x__h161454, + x__h291824, + y_avValue_fst__h721562, + y_avValue_fst__h722504, + y_avValue_fst__h722532; wire [3 : 0] IF_IF_coreFix_memExe_dTlb_procResp__740_BIT_11_ETC___d1875, IF_IF_coreFix_memExe_dTlb_procResp__740_BIT_11_ETC___d1877, IF_IF_coreFix_memExe_dTlb_procResp__740_BIT_11_ETC___d1879, @@ -5491,74 +5491,74 @@ module mkCore(CLK, IF_coreFix_memExe_dTlb_procResp__740_BITS_105__ETC___d1820, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1263, IF_fetchStage_pipelines_0_first__2928_BIT_68_2_ETC___d13385, - cause_code__h707757, - vm_mode_reg__read__h620541; + cause_code__h707758, + vm_mode_reg__read__h620542; wire [2 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2567, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2886, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1220, - _theResult_____2__h301170, - next_deqP___1__h301449, - v__h300590, - v__h300821, - x__h306800, - x_decodeInfo_frm__h661519; + _theResult_____2__h301171, + next_deqP___1__h301450, + v__h300591, + v__h300822, + x__h306801, + x_decodeInfo_frm__h661520; wire [1 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2882, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1216, IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15205, - IF_sfdin04536_BIT_33_THEN_2_ELSE_0__q57, - IF_sfdin16484_BIT_4_THEN_2_ELSE_0__q131, - IF_sfdin22302_BIT_33_THEN_2_ELSE_0__q67, - IF_sfdin50231_BIT_33_THEN_2_ELSE_0__q92, - IF_sfdin55337_BIT_4_THEN_2_ELSE_0__q171, - IF_sfdin58839_BIT_33_THEN_2_ELSE_0__q22, - IF_sfdin67997_BIT_33_THEN_2_ELSE_0__q102, - IF_sfdin76605_BIT_33_THEN_2_ELSE_0__q32, - IF_sfdin94641_BIT_4_THEN_2_ELSE_0__q148, - IF_theResult___snd03426_BIT_4_THEN_2_ELSE_0__q151, - IF_theResult___snd06864_BIT_4_THEN_2_ELSE_0__q127, - IF_theResult___snd13149_BIT_33_THEN_2_ELSE_0__q59, - IF_theResult___snd25269_BIT_4_THEN_2_ELSE_0__q134, - IF_theResult___snd30939_BIT_33_THEN_2_ELSE_0__q72, - IF_theResult___snd45717_BIT_4_THEN_2_ELSE_0__q167, - IF_theResult___snd58844_BIT_33_THEN_2_ELSE_0__q94, - IF_theResult___snd64122_BIT_4_THEN_2_ELSE_0__q174, - IF_theResult___snd67452_BIT_33_THEN_2_ELSE_0__q24, - IF_theResult___snd76634_BIT_33_THEN_2_ELSE_0__q107, - IF_theResult___snd85021_BIT_4_THEN_2_ELSE_0__q144, - IF_theResult___snd85242_BIT_33_THEN_2_ELSE_0__q37, - guard__h350744, - guard__h359453, - guard__h368383, - guard__h377219, - guard__h396443, - guard__h405150, - guard__h414080, - guard__h422916, - guard__h442138, - guard__h450845, - guard__h459775, - guard__h468611, - guard__h498952, - guard__h508264, - guard__h517333, - guard__h537805, - guard__h547117, - guard__h556186, - guard__h577109, - guard__h586421, - guard__h595490, - prv__h724098, - prv__h724142, - r1__read_BITS_13_TO_12___h661704, - sbIdx__h158516, - v__h609618, - v__h609628, - v__h610686, - x__h718766, - x__h722831, - y_avValue_snd_snd_snd_fst__h721995, - y_avValue_snd_snd_snd_fst__h722654, - y_avValue_snd_snd_snd_fst__h722683; + IF_sfdin04537_BIT_33_THEN_2_ELSE_0__q57, + IF_sfdin16485_BIT_4_THEN_2_ELSE_0__q131, + IF_sfdin22303_BIT_33_THEN_2_ELSE_0__q67, + IF_sfdin50232_BIT_33_THEN_2_ELSE_0__q92, + IF_sfdin55338_BIT_4_THEN_2_ELSE_0__q171, + IF_sfdin58840_BIT_33_THEN_2_ELSE_0__q22, + IF_sfdin67998_BIT_33_THEN_2_ELSE_0__q102, + IF_sfdin76606_BIT_33_THEN_2_ELSE_0__q32, + IF_sfdin94642_BIT_4_THEN_2_ELSE_0__q148, + IF_theResult___snd03427_BIT_4_THEN_2_ELSE_0__q151, + IF_theResult___snd06865_BIT_4_THEN_2_ELSE_0__q127, + IF_theResult___snd13150_BIT_33_THEN_2_ELSE_0__q59, + IF_theResult___snd25270_BIT_4_THEN_2_ELSE_0__q134, + IF_theResult___snd30940_BIT_33_THEN_2_ELSE_0__q72, + IF_theResult___snd45718_BIT_4_THEN_2_ELSE_0__q167, + IF_theResult___snd58845_BIT_33_THEN_2_ELSE_0__q94, + IF_theResult___snd64123_BIT_4_THEN_2_ELSE_0__q174, + IF_theResult___snd67453_BIT_33_THEN_2_ELSE_0__q24, + IF_theResult___snd76635_BIT_33_THEN_2_ELSE_0__q107, + IF_theResult___snd85022_BIT_4_THEN_2_ELSE_0__q144, + IF_theResult___snd85243_BIT_33_THEN_2_ELSE_0__q37, + guard__h350745, + guard__h359454, + guard__h368384, + guard__h377220, + guard__h396444, + guard__h405151, + guard__h414081, + guard__h422917, + guard__h442139, + guard__h450846, + guard__h459776, + guard__h468612, + guard__h498953, + guard__h508265, + guard__h517334, + guard__h537806, + guard__h547118, + guard__h556187, + guard__h577110, + guard__h586422, + guard__h595491, + prv__h724099, + prv__h724143, + r1__read_BITS_13_TO_12___h661705, + sbIdx__h158517, + v__h609619, + v__h609629, + v__h610687, + x__h718767, + x__h722832, + y_avValue_snd_snd_snd_fst__h721996, + y_avValue_snd_snd_snd_fst__h722655, + y_avValue_snd_snd_snd_fst__h722684; wire IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5165, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5215, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6557, @@ -6011,11 +6011,11 @@ module mkCore(CLK, _dor1sbAggr$EN_setReady_3_put, _dor1sbCons$EN_setReady_0_put, _dor1sbCons$EN_setReady_1_put, - _theResult_____2__h309166, - _theResult_____2__h315160, - _theResult_____2__h323014, - _theResult_____2__h333358, - _theResult_____2__h336583, + _theResult_____2__h309167, + _theResult_____2__h315161, + _theResult_____2__h323015, + _theResult_____2__h333359, + _theResult_____2__h336584, coreFix_aluExe_0_bypassWire_0_wget__2367_BITS__ETC___d12369, coreFix_aluExe_0_bypassWire_0_wget__2367_BITS__ETC___d12410, coreFix_aluExe_0_bypassWire_1_wget__2380_BITS__ETC___d12382, @@ -6166,14 +6166,14 @@ module mkCore(CLK, fetchStage_pipelines_1_first__2937_BITS_194_TO_ETC___d14054, fetchStage_pipelines_1_first__2937_BITS_199_TO_ETC___d13889, fetchStage_pipelines_1_first__2937_BIT_68_3660_ETC___d14058, - guard__h368981, - guard__h414678, - guard__h460373, - guard__h508862, - guard__h547715, - guard__h587019, - idx__h689686, - k__h674091, + guard__h368982, + guard__h414679, + guard__h460374, + guard__h508863, + guard__h547716, + guard__h587020, + idx__h689687, + k__h674092, mmio_cRqQ_enqReq_dummy2_2_read__32_AND_IF_mmio_ETC___d444, mmio_cRsQ_enqReq_dummy2_2_read__24_AND_IF_mmio_ETC___d836, mmio_dataPendQ_enqReq_dummy2_2_read__00_AND_IF_ETC___d312, @@ -6184,14 +6184,14 @@ module mkCore(CLK, mmio_pRqQ_empty_53_AND_epochManager_checkEpoch_ETC___d14165, mmio_pRqQ_enqReq_dummy2_2_read__35_AND_IF_mmio_ETC___d747, mmio_pRsQ_enqReq_dummy2_2_read__94_AND_IF_mmio_ETC___d606, - msip__h75668, - next_deqP___1__h309445, - next_deqP___1__h315726, - next_deqP___1__h323580, - next_deqP___1__h333637, - next_deqP___1__h336862, - r1__read_BIT_20___h662368, - r__h619419, + msip__h75669, + next_deqP___1__h309446, + next_deqP___1__h315727, + next_deqP___1__h323581, + next_deqP___1__h333638, + next_deqP___1__h336863, + r1__read_BIT_20___h662369, + r__h619420, regRenamingTable_RDY_rename_0_getRename__3398__ETC___d13407, regRenamingTable_RDY_rename_0_getRename__3398__ETC___d14022, regRenamingTable_RDY_rename_1_getRename__4078__ETC___d14096, @@ -6215,17 +6215,17 @@ module mkCore(CLK, rob_enqPort_1_canEnq__3821_AND_epochManager_ch_ETC___d13826, rob_enqPort_1_canEnq__3821_AND_epochManager_ch_ETC___d13960, rob_enqPort_1_canEnq__3821_AND_epochManager_ch_ETC___d13977, - v__h303935, - v__h304453, - v__h314449, - v__h314680, - v__h318325, - v__h318556, - v__h332926, - v__h333157, - v__h336151, - v__h336382, - x__h608934; + v__h303936, + v__h304454, + v__h314450, + v__h314681, + v__h318326, + v__h318557, + v__h332927, + v__h333158, + v__h336152, + v__h336383, + x__h608935; // action method coreReq_start assign RDY_coreReq_start = 1'd1 ; @@ -11034,7 +11034,7 @@ module mkCore(CLK, assign MUX_commitStage_commitTrap$write_1__VAL_2 = { 1'd1, rob$deqPort_0_deq_data[353:290], - x__h704086, + x__h704087, rob$deqPort_0_deq_data[166], rob$deqPort_0_deq_data[166] ? CASE_robdeqPort_0_deq_data_BITS_165_TO_162_0__ETC__q260 : @@ -11043,7 +11043,7 @@ module mkCore(CLK, assign MUX_commitStage_rg_serial_num$write_1__VAL_1 = commitStage_rg_serial_num + 64'd1 ; assign MUX_commitStage_rg_serial_num$write_1__VAL_2 = - commitStage_rg_serial_num + y__h722607 ; + commitStage_rg_serial_num + y__h722608 ; assign MUX_coreFix_aluExe_0_rsAlu$enq_1__VAL_1 = { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2928_BITS_194_ETC___d13043, @@ -11057,7 +11057,7 @@ module mkCore(CLK, 5'd10, sbAggr$eagerLookup_0_get } ; assign MUX_coreFix_aluExe_0_rsAlu$enq_1__VAL_2 = - (k__h674091 == 1'd0 && + (k__h674092 == 1'd0 && fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14171) ? { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2928_BITS_194_ETC___d13043, @@ -11078,7 +11078,7 @@ module mkCore(CLK, fetchStage$pipelines_1_first[255:232], regRenamingTable$rename_1_getRename, rob$enqPort_1_getEnqInstTag, - renaming_spec_bits__h689555, + renaming_spec_bits__h689556, fetchStage$pipelines_1_first[194:192] == 3'd1, specTagManager$nextSpecTag, sbAggr$eagerLookup_1_get } ; @@ -11169,7 +11169,7 @@ module mkCore(CLK, IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2033, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd0) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$deqWrite_2__VAL_4 = { IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2787, @@ -11183,10 +11183,10 @@ module mkCore(CLK, assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_1 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq[147:84], - x__h290390 } ; + x__h290391 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_2 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, - x__h291835, + x__h291836, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_3 = { 518'h1AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, @@ -11194,7 +11194,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_4 = { 2'd2, - addr__h294611, + addr__h294612, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3038 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_processAmo$write_1__VAL_1 = { 1'd1, @@ -11207,12 +11207,12 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getSucc } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_1 = - { x__h155090, x__h155096, 84'h82AAAAAAAAAAAAAAAAAAA } ; + { x__h155091, x__h155097, 84'h82AAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_2 = - { x__h158637, x__h158643, 84'hCAAAAAAAAAAAAAAAAAAAA } ; + { x__h158638, x__h158644, 84'hCAAAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_3 = - { x__h161453, - x__h161457, + { x__h161454, + x__h161458, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1216, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1220, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1224, @@ -11223,7 +11223,7 @@ module mkCore(CLK, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1246, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1250, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1255, - x__h163305, + x__h163306, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1263, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1267, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1271, @@ -11236,7 +11236,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[576:574] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, - resp_addr__h296626, + resp_addr__h296627, 2'd0, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getData } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_2 = @@ -11316,7 +11316,7 @@ module mkCore(CLK, assign MUX_coreFix_memExe_memRespLdQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[152:148], - x__h200345 } ; + x__h200346 } ; assign MUX_coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wset_1__VAL_1 = { 5'd0, coreFix_memExe_lsq$firstSt[141:78], @@ -11351,8 +11351,8 @@ module mkCore(CLK, assign MUX_coreFix_memExe_respLrScAmoQ_enqReq_lat_0$wset_1__VAL_3 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_processAmo[6] ? - curData__h195302 : - { {32{x__h196065[31]}}, x__h196065 } } ; + curData__h195303 : + { {32{x__h196066[31]}}, x__h196066 } } ; assign MUX_coreFix_trainBPQ_0$enq_1__VAL_1 = { coreFix_aluExe_0_exeToFinQ$first[146:19], coreFix_aluExe_0_exeToFinQ$first[326:322], @@ -11385,7 +11385,7 @@ module mkCore(CLK, MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_1 || MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_2 ; assign MUX_csrf_fflags_reg$write_1__VAL_2 = - csrf_fflags_reg | fflags__h722584 ; + csrf_fflags_reg | fflags__h722585 ; always@(IF_rob_deqPort_0_deq_data__4451_BIT_181_4681_T_ETC___d14763 or robdeqPort_0_deq_data_BITS_95_TO_32__q262) begin @@ -11411,9 +11411,9 @@ module mkCore(CLK, csrf_prev_ie_vec_3 ; assign MUX_csrf_mepc_csr$write_1__VAL_2 = rob$deqPort_0_deq_data[95:32] ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 = - n__read__h719387 + 64'd1 ; + n__read__h719388 + 64'd1 ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 = - n__read__h719387 + { 62'd0, x__h722831 } ; + n__read__h719388 + { 62'd0, x__h722832 } ; assign MUX_csrf_mpp_reg$write_1__VAL_2 = (rob$deqPort_0_deq_data[257:253] == 5'd13 && IF_rob_deqPort_0_deq_data__4451_BIT_181_4681_T_ETC___d14763 == @@ -11421,7 +11421,7 @@ module mkCore(CLK, MUX_csrf_mepc_csr$write_1__VAL_2[12:11] : 2'd0 ; assign MUX_csrf_mtval_csr$write_1__VAL_1 = - commitStage_commitTrap[36] ? 64'd0 : trap_val__h708780 ; + commitStage_commitTrap[36] ? 64'd0 : trap_val__h708781 ; assign MUX_csrf_mtval_csr$write_1__VAL_2 = rob$deqPort_0_deq_data[95:32] ; assign MUX_csrf_prev_ie_vec_1$write_1__VAL_2 = rob$deqPort_0_deq_data[257:253] != 5'd13 || @@ -11437,7 +11437,7 @@ module mkCore(CLK, MUX_csrf_mtval_csr$write_1__VAL_2[7] ; assign MUX_csrf_prv_reg$write_1__VAL_1 = (rob$deqPort_0_deq_data[257:253] == 5'd19) ? - x__h718766 : + x__h718767 : csrf_mpp_reg ; assign MUX_csrf_prv_reg$write_1__VAL_2 = csrf_prv_reg_read__2956_ULE_1_4592_AND_IF_comm_ETC___d14631 ? @@ -11457,15 +11457,15 @@ module mkCore(CLK, MUX_csrf_sepc_csr$write_1__VAL_2[8] ; assign MUX_fetchStage$redirect_1__VAL_4 = csrf_prv_reg_read__2956_ULE_1_4592_AND_IF_comm_ETC___d14631 ? - y_avValue_new_pc__h710461 : - y_avValue_new_pc__h710647 ; + y_avValue_new_pc__h710462 : + y_avValue_new_pc__h710648 ; always@(rob$deqPort_0_deq_data or - next_pc__h718597 or csrf_sepc_csr or csrf_mepc_csr) + next_pc__h718598 or csrf_sepc_csr or csrf_mepc_csr) begin case (rob$deqPort_0_deq_data[257:253]) 5'd19: MUX_fetchStage$redirect_1__VAL_5 = csrf_sepc_csr; 5'd20: MUX_fetchStage$redirect_1__VAL_5 = csrf_mepc_csr; - default: MUX_fetchStage$redirect_1__VAL_5 = next_pc__h718597; + default: MUX_fetchStage$redirect_1__VAL_5 = next_pc__h718598; endcase end assign MUX_l2Tlb$toChildren_rqFromC_put_1__VAL_1 = @@ -11500,24 +11500,24 @@ module mkCore(CLK, 56'hAAAAAAAAAAAAAA } ; assign MUX_rf$write_2_wr_2__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? - res_data__h342523 : - res_data__h342518 ; + res_data__h342524 : + res_data__h342519 ; assign MUX_rf$write_2_wr_2__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? - res_data__h388225 : - res_data__h388220 ; + res_data__h388226 : + res_data__h388221 ; assign MUX_rf$write_2_wr_2__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? - res_data__h433920 : - res_data__h433915 ; + res_data__h433921 : + res_data__h433916 ; assign MUX_rf$write_2_wr_2__VAL_5 = coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[33] ? - data___1__h479772 : - data__h479260 ; + data___1__h479773 : + data__h479261 ; assign MUX_rf$write_2_wr_2__VAL_6 = coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[33] ? - data___1__h480704 : - data__h480192 ; + data___1__h480705 : + data__h480193 ; assign MUX_rf$write_3_wr_2__VAL_4 = coreFix_memExe_lsq$firstLd[100] ? coreFix_memExe_respLrScAmoQ_data_0 : @@ -11598,15 +11598,15 @@ module mkCore(CLK, assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] : - res_fflags__h342519 ; + res_fflags__h342520 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] : - res_fflags__h388221 ; + res_fflags__h388222 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] : - res_fflags__h433916 ; + res_fflags__h433917 ; // inlined wires assign csrf_minstret_ehr_data_lat_0$whas = @@ -11944,8 +11944,8 @@ module mkCore(CLK, // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$D_IN = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas ? - v__h610686 : - v__h609618 ; + v__h610687 : + v__h609619 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$EN = 1'd1 ; // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned_pipe_0 @@ -12091,7 +12091,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - _theResult_____2__h301170 ; + _theResult_____2__h301171 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl @@ -12113,7 +12113,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - v__h300590 ; + v__h300591 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_rl @@ -12159,7 +12159,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3223 && - _theResult_____2__h309166 ; + _theResult_____2__h309167 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl @@ -12177,7 +12177,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3223 && - v__h303935 ; + v__h303936 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl @@ -12277,7 +12277,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3394 && - _theResult_____2__h315160 ; + _theResult_____2__h315161 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl @@ -12295,7 +12295,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3394 && - v__h314449 ; + v__h314450 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_rl @@ -12316,7 +12316,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0 assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0$D_IN = - { x_addr__h318723, + { x_addr__h318724, coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[514:513] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[514:513], @@ -12346,7 +12346,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3490 && - _theResult_____2__h323014 ; + _theResult_____2__h323015 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl @@ -12364,7 +12364,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3490 && - v__h318325 ; + v__h318326 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl @@ -12441,7 +12441,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_deqP assign coreFix_memExe_forwardQ_deqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3813 && - _theResult_____2__h336583 ; + _theResult_____2__h336584 ; assign coreFix_memExe_forwardQ_deqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_deqReq_rl @@ -12459,7 +12459,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_enqP assign coreFix_memExe_forwardQ_enqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3813 && - v__h336151 ; + v__h336152 ; assign coreFix_memExe_forwardQ_enqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_enqReq_rl @@ -12502,7 +12502,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_deqP assign coreFix_memExe_memRespLdQ_deqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3719 && - _theResult_____2__h333358 ; + _theResult_____2__h333359 ; assign coreFix_memExe_memRespLdQ_deqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_deqReq_rl @@ -12520,7 +12520,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_enqP assign coreFix_memExe_memRespLdQ_enqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3719 && - v__h332926 ; + v__h332927 ; assign coreFix_memExe_memRespLdQ_enqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_enqReq_rl @@ -12793,7 +12793,7 @@ module mkCore(CLK, // register csrf_mcause_code_reg assign csrf_mcause_code_reg$D_IN = MUX_csrf_ie_vec_3$write_1__SEL_1 ? - cause_code__h707757 : + cause_code__h707758 : csrf_mcycle_ehr_data_lat_0$wget[3:0] ; assign csrf_mcause_code_reg$EN = WILL_FIRE_RL_commitStage_doCommitTrap_handle && @@ -12841,7 +12841,7 @@ module mkCore(CLK, 6'd24 ; // register csrf_mcycle_ehr_data_rl - assign csrf_mcycle_ehr_data_rl$D_IN = upd__h4997 ; + assign csrf_mcycle_ehr_data_rl$D_IN = upd__h4998 ; assign csrf_mcycle_ehr_data_rl$EN = 1'd1 ; // register csrf_medeleg_13_11_reg @@ -12917,7 +12917,7 @@ module mkCore(CLK, // register csrf_minstret_ehr_data_rl assign csrf_minstret_ehr_data_rl$D_IN = csrf_minstret_ehr_data_lat_1$whas ? - upd__h3680 : + upd__h3681 : IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 ; assign csrf_minstret_ehr_data_rl$EN = 1'd1 ; @@ -13078,7 +13078,7 @@ module mkCore(CLK, // register csrf_scause_code_reg assign csrf_scause_code_reg$D_IN = MUX_csrf_ie_vec_1$write_1__SEL_1 ? - cause_code__h707757 : + cause_code__h707758 : csrf_rg_tdata3$D_IN[3:0] ; assign csrf_scause_code_reg$EN = WILL_FIRE_RL_commitStage_doCommitTrap_handle && @@ -13340,7 +13340,7 @@ module mkCore(CLK, // register mmio_cRqQ_data_0 assign mmio_cRqQ_data_0$D_IN = - { x__h45838, + { x__h45839, (mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_cRqQ_enqReq_rl[77:76] == 2'd0) ? @@ -13352,7 +13352,7 @@ module mkCore(CLK, mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[71:64] : mmio_cRqQ_enqReq_rl[71:64], - x__h48374 } ; + x__h48375 } ; assign mmio_cRqQ_data_0$EN = NOT_mmio_cRqQ_clearReq_dummy2_1_read__26_27_OR_ETC___d431 && mmio_cRqQ_enqReq_dummy2_2$Q_OUT && @@ -13445,7 +13445,7 @@ module mkCore(CLK, // register mmio_dataReqQ_data_0 assign mmio_dataReqQ_data_0$D_IN = - { x__h17931, + { x__h17932, (mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_dataReqQ_enqReq_rl[77:76] == 2'd0) ? @@ -13457,7 +13457,7 @@ module mkCore(CLK, mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[71:64] : mmio_dataReqQ_enqReq_rl[71:64], - x__h20469 } ; + x__h20470 } ; assign mmio_dataReqQ_data_0$EN = NOT_mmio_dataReqQ_clearReq_dummy2_1_read__35_3_ETC___d140 && mmio_dataReqQ_enqReq_dummy2_2$Q_OUT && @@ -13541,7 +13541,7 @@ module mkCore(CLK, mmio_pRqQ_enqReq_lat_0$wget[32] : mmio_pRqQ_enqReq_rl[32] } : IF_IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmi_ETC___d766, - x_data__h65632 } ; + x_data__h65633 } ; assign mmio_pRqQ_data_0$EN = NOT_mmio_pRqQ_clearReq_dummy2_1_read__29_30_OR_ETC___d734 && mmio_pRqQ_enqReq_dummy2_2$Q_OUT && @@ -13722,8 +13722,8 @@ module mkCore(CLK, CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_13_ETC__q272, coreFix_aluExe_0_dispToRegQ$first[118:86], coreFix_aluExe_0_dispToRegQ$first[61:17], - x__h646270, x__h646271, + x__h646272, rob$getOrigPC_0_get, rob$getOrigPredPC_0_get, rob$getOrig_Inst_0_get, @@ -14013,8 +14013,8 @@ module mkCore(CLK, CASE_coreFix_aluExe_1_dispToRegQfirst_BITS_13_ETC__q278, coreFix_aluExe_1_dispToRegQ$first[118:86], coreFix_aluExe_1_dispToRegQ$first[61:17], - x__h623641, x__h623642, + x__h623643, rob$getOrigPC_1_get, rob$getOrigPredPC_1_get, rob$getOrig_Inst_1_get, @@ -14056,7 +14056,7 @@ module mkCore(CLK, // submodule coreFix_aluExe_1_rsAlu assign coreFix_aluExe_1_rsAlu$enq_x = - (k__h674091 == 1'd1 && + (k__h674092 == 1'd1 && fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14171) ? { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2928_BITS_194_ETC___d13043, @@ -14077,7 +14077,7 @@ module mkCore(CLK, fetchStage$pipelines_1_first[255:232], regRenamingTable$rename_1_getRename, rob$enqPort_1_getEnqInstTag, - renaming_spec_bits__h689555, + renaming_spec_bits__h689556, fetchStage$pipelines_1_first[194:192] == 3'd1, specTagManager$nextSpecTag, sbAggr$eagerLookup_1_get } ; @@ -14175,7 +14175,7 @@ module mkCore(CLK, end assign coreFix_aluExe_1_rsAlu$EN_enq = WILL_FIRE_RL_renameStage_doRenaming && - (k__h674091 == 1'd1 && + (k__h674092 == 1'd1 && fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14171 || fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14290 == 1'd1 && @@ -14560,12 +14560,12 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$D_IN = - { x__h608908, - b__h608372 == 64'd0, - a__h608371, + { x__h608909, + b__h608373 == 64'd0, + a__h608372, coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0, - x__h608934, - a__h608371[63], + x__h608935, + a__h608372[63], 8'd0 } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$ENQ = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && @@ -14580,8 +14580,8 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$D_IN = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___snd__h608920 : - b__h608372 ; + _theResult___snd__h608921 : + b__h608373 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$ENQ = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && coreFix_fpuMulDivExe_0_regToExeQ$first[245:243] == 3'd3 && @@ -14594,7 +14594,7 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_IN = - { x__h609548, + { x__h609549, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$D_OUT[75:0] } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$ENQ = CAN_FIRE_RL_coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_compute ; @@ -14675,9 +14675,9 @@ module mkCore(CLK, assign coreFix_fpuMulDivExe_0_regToExeQ$enq_x = { CASE_coreFix_fpuMulDivExe_0_dispToRegQfirst_B_ETC__q284, coreFix_fpuMulDivExe_0_dispToRegQ$first[32:12], - x__h487047, x__h487048, x__h487049, + x__h487050, coreFix_fpuMulDivExe_0_dispToRegQ$first[11:0] } ; assign coreFix_fpuMulDivExe_0_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12869 ; @@ -14729,7 +14729,7 @@ module mkCore(CLK, { IF_fetchStage_pipelines_1_first__2937_BITS_194_ETC___d13686, regRenamingTable$rename_1_getRename, rob$enqPort_1_getEnqInstTag, - renaming_spec_bits__h689555, + renaming_spec_bits__h689556, fetchStage$pipelines_1_first[194:192] == 3'd1, specTagManager$nextSpecTag, sbAggr$eagerLookup_1_get } ; @@ -14887,8 +14887,8 @@ module mkCore(CLK, // submodule coreFix_memExe_dMem_cache_m_banks_0_cRqMshr assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit_r = - { x__h291823, - x__h291835, + { x__h291824, + x__h291836, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2882, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2886, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2890, @@ -14899,13 +14899,13 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2912, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2916, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2921, - x__h293689, + x__h293690, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2929, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2933, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2937, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2941 } ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq_n = - x__h290390 ; + x__h290391 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq_n = (coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[578:577] == 2'd0) ? @@ -15542,13 +15542,13 @@ module mkCore(CLK, assign coreFix_memExe_dTlb$procReq_req = { coreFix_memExe_regToExeQ$first[192:190], coreFix_memExe_regToExeQ$first[157:140], - coreFix_memExe_lsq$getOrigBE << vaddr__h184736[2:0], - vaddr__h184736, + coreFix_memExe_lsq$getOrigBE << vaddr__h184737[2:0], + vaddr__h184737, coreFix_memExe_lsq$getOrigBE[7] ? - vaddr__h184736[2:0] != 3'd0 : + vaddr__h184737[2:0] != 3'd0 : (coreFix_memExe_lsq$getOrigBE[3] ? - vaddr__h184736[1:0] != 2'd0 : - coreFix_memExe_lsq$getOrigBE[1] && vaddr__h184736[0]), + vaddr__h184737[1:0] != 2'd0 : + coreFix_memExe_lsq$getOrigBE[1] && vaddr__h184737[0]), coreFix_memExe_regToExeQ$first[11:0] } ; assign coreFix_memExe_dTlb$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12869 ; @@ -15578,8 +15578,8 @@ module mkCore(CLK, { l2Tlb$toChildren_rsToC_first[80:0], l2Tlb$toChildren_rsToC_first[82:81] } ; assign coreFix_memExe_dTlb$updateVMInfo_vm = - { prv__h724142, - prv__h724142 != 2'd3 && csrf_vm_mode_sv39_reg, + { prv__h724143, + prv__h724143 != 2'd3 && csrf_vm_mode_sv39_reg, csrf_mxr_reg, csrf_sum_reg, csrf_ppn_reg } ; @@ -15704,7 +15704,7 @@ module mkCore(CLK, (fetchStage$pipelines_0_canDeq && regRenamingTable_rename_0_canRename__3513_AND__ETC___d14240) ? specTagManager$currentSpecBits : - renaming_spec_bits__h689555 ; + renaming_spec_bits__h689556 ; assign coreFix_memExe_lsq$enqSt_dst = (fetchStage$pipelines_0_canDeq && regRenamingTable_rename_0_canRename__3513_AND__ETC___d14248) ? @@ -15724,7 +15724,7 @@ module mkCore(CLK, (fetchStage$pipelines_0_canDeq && regRenamingTable_rename_0_canRename__3513_AND__ETC___d14248) ? specTagManager$currentSpecBits : - renaming_spec_bits__h689555 ; + renaming_spec_bits__h689556 ; assign coreFix_memExe_lsq$getHit_t = MUX_coreFix_memExe_lsq$getHit_1__SEL_1 ? MUX_coreFix_memExe_lsq$getHit_1__VAL_1 : @@ -15804,7 +15804,7 @@ module mkCore(CLK, assign coreFix_memExe_lsq$updateData_d = (coreFix_memExe_regToExeQ$first[192:190] == 3'd4) ? coreFix_memExe_regToExeQ$first[75:12] : - shiftData__h184741 ; + shiftData__h184742 ; assign coreFix_memExe_lsq$updateData_t = coreFix_memExe_regToExeQ$first[143:140] ; assign coreFix_memExe_lsq$wakeupLdStalledBySB_sbIdx = @@ -15904,8 +15904,8 @@ module mkCore(CLK, assign coreFix_memExe_regToExeQ$enq_x = { coreFix_memExe_dispToRegQ$first[97:63], coreFix_memExe_dispToRegQ$first[29:12], - x__h184648, x__h184649, + x__h184650, coreFix_memExe_dispToRegQ$first[11:0] } ; assign coreFix_memExe_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12869 ; @@ -16169,7 +16169,7 @@ module mkCore(CLK, IF_fetchStage_pipelines_1_first__2937_BIT_160__ETC___d14383, regRenamingTable$rename_1_getRename, rob$enqPort_1_getEnqInstTag, - renaming_spec_bits__h689555, + renaming_spec_bits__h689556, fetchStage$pipelines_1_first[194:192] == 3'd1, specTagManager$nextSpecTag, sbAggr$eagerLookup_1_get } ; @@ -16882,7 +16882,7 @@ module mkCore(CLK, assign regRenamingTable$rename_1_claimRename_r = fetchStage$pipelines_1_first[95:69] ; assign regRenamingTable$rename_1_claimRename_sb = - renaming_spec_bits__h689555 ; + renaming_spec_bits__h689556 ; assign regRenamingTable$rename_1_getRename_r = fetchStage$pipelines_1_first[95:69] ; assign regRenamingTable$specUpdate_correctSpeculation_mask = @@ -17149,7 +17149,7 @@ module mkCore(CLK, IF_fetchStage_pipelines_1_first__2937_BITS_191_ETC___d14377, IF_fetchStage_pipelines_1_first__2937_BITS_194_ETC___d14436, 7'd32, - renaming_spec_bits__h689555 } ; + renaming_spec_bits__h689556 } ; assign rob$getOrigPC_0_get_x = coreFix_aluExe_0_dispToRegQ$first[52:41] ; assign rob$getOrigPC_1_get_x = coreFix_aluExe_1_dispToRegQ$first[52:41] ; assign rob$getOrigPC_2_get_x = 12'h0 ; @@ -17698,15 +17698,15 @@ module mkCore(CLK, // remaining internal signals module_amoExec instance_amoExec_2(.amoExec_amo_inst(coreFix_memExe_dMem_cache_m_banks_0_processAmo[10:4]), - .amoExec_current_data(curData__h195302), + .amoExec_current_data(curData__h195303), .amoExec_in_data(coreFix_memExe_dMem_cache_m_banks_0_processAmo[74:11]), .amoExec_upper_32_bits(coreFix_memExe_dMem_cache_m_banks_0_processAmo[90]), - .amoExec(n__h196840)); + .amoExec(n__h196841)); module_amoExec instance_amoExec_3(.amoExec_amo_inst({ mmio_pRqQ_data_0[35:32], 3'd0 }), .amoExec_current_data({ 63'd0, - msip__h75668 }), - .amoExec_in_data({ 32'd0, x__h75783 }), + msip__h75669 }), + .amoExec_in_data({ 32'd0, x__h75784 }), .amoExec_upper_32_bits(1'd0), .amoExec(amoExec___d882)); module_basicExec instance_basicExec_6(.basicExec_dInst({ coreFix_aluExe_1_regToExeQ$first[421:417], @@ -17738,7 +17738,7 @@ module mkCore(CLK, { { fetchStage$pipelines_0_first[173], IF_fetchStage_pipelines_0_first__2928_BITS_172_ETC___d13125 }, fetchStage$pipelines_0_first[160], - x_data_imm__h681436 } }), + x_data_imm__h681437 } }), .checkForException_regs({ fetchStage$pipelines_0_first[95], fetchStage$pipelines_0_first[94:89], { fetchStage$pipelines_0_first[88], @@ -17747,12 +17747,12 @@ module mkCore(CLK, fetchStage$pipelines_0_first[80:76], { fetchStage$pipelines_0_first[75], fetchStage$pipelines_0_first[74:69] } } }), - .checkForException_csrState({ x_decodeInfo_frm__h661519, - r1__read_BITS_13_TO_12___h661704 != + .checkForException_csrState({ x_decodeInfo_frm__h661520, + r1__read_BITS_13_TO_12___h661705 != 2'd0, - { prv__h724098, + { prv__h724099, csrf_tvm_reg, - { r1__read_BIT_20___h662368, + { r1__read_BIT_20___h662369, csrf_tsr_reg, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && @@ -17768,7 +17768,7 @@ module mkCore(CLK, IF_fetchStage_pipelines_1_first__2937_BITS_194_ETC___d13686, { fetchStage_pipelines_1_first__2937_BIT_173_368_ETC___d13770, fetchStage$pipelines_1_first[160], - x_data_imm__h697340 } }), + x_data_imm__h697341 } }), .checkForException_regs({ fetchStage$pipelines_1_first[95], fetchStage$pipelines_1_first[94:89], { fetchStage$pipelines_1_first[88], @@ -17777,12 +17777,12 @@ module mkCore(CLK, fetchStage$pipelines_1_first[80:76], { fetchStage$pipelines_1_first[75], fetchStage$pipelines_1_first[74:69] } } }), - .checkForException_csrState({ x_decodeInfo_frm__h661519, - r1__read_BITS_13_TO_12___h661704 != + .checkForException_csrState({ x_decodeInfo_frm__h661520, + r1__read_BITS_13_TO_12___h661705 != 2'd0, - { prv__h724098, + { prv__h724099, csrf_tvm_reg, - { r1__read_BIT_20___h662368, + { r1__read_BIT_20___h662369, csrf_tsr_reg, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && @@ -17797,1196 +17797,1196 @@ module mkCore(CLK, module_execFpuSimple instance_execFpuSimple_4(.execFpuSimple_fpu_inst({ coreFix_fpuMulDivExe_0_regToExeQ$first[233:229], CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q242, coreFix_fpuMulDivExe_0_regToExeQ$first[225] }), - .execFpuSimple_rVal1(rVal1__h487141), - .execFpuSimple_rVal2(rVal2__h487142), + .execFpuSimple_rVal1(rVal1__h487142), + .execFpuSimple_rVal2(rVal2__h487143), .execFpuSimple(execFpuSimple___d11167)); assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q21 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4345 ? - _theResult___snd__h358908 : - _theResult____h350734 ; + _theResult___snd__h358909 : + _theResult____h350735 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q56 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5737 ? - _theResult___snd__h404605 : - _theResult____h396433 ; + _theResult___snd__h404606 : + _theResult____h396434 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q91 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7129 ? - _theResult___snd__h450300 : - _theResult____h442128 ; + _theResult___snd__h450301 : + _theResult____h442129 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q130 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9008 ? - _theResult___snd__h516553 : - _theResult____h508254 ; + _theResult___snd__h516554 : + _theResult____h508255 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q147 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9723 ? - _theResult___snd__h594710 : - _theResult____h586411 ; + _theResult___snd__h594711 : + _theResult____h586412 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q170 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10493 ? - _theResult___snd__h555406 : - _theResult____h547107 ; + _theResult___snd__h555407 : + _theResult____h547108 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q101 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7680 ? - _theResult___snd__h468066 : - _theResult____h459765 ; + _theResult___snd__h468067 : + _theResult____h459766 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q31 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4896 ? - _theResult___snd__h376674 : - _theResult____h368373 ; + _theResult___snd__h376675 : + _theResult____h368374 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q66 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6288 ? - _theResult___snd__h422371 : - _theResult____h414070 ; + _theResult___snd__h422372 : + _theResult____h414071 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q126 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8696 ? - _theResult___snd__h506902 : + _theResult___snd__h506903 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q133 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9058 ? - _theResult___snd__h506902 : - _theResult___snd__h525307 ; + _theResult___snd__h506903 : + _theResult___snd__h525308 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q143 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9426 ? - _theResult___snd__h585059 : + _theResult___snd__h585060 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q150 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9773 ? - _theResult___snd__h585059 : - _theResult___snd__h603464 ; + _theResult___snd__h585060 : + _theResult___snd__h603465 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q166 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10196 ? - _theResult___snd__h545755 : + _theResult___snd__h545756 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q173 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10543 ? - _theResult___snd__h545755 : - _theResult___snd__h564160 ; + _theResult___snd__h545756 : + _theResult___snd__h564161 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q106 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7753 ? - _theResult___snd__h458882 : - _theResult___snd__h476672 ; + _theResult___snd__h458883 : + _theResult___snd__h476673 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q23 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4576 ? - _theResult___snd__h367490 : + _theResult___snd__h367491 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q36 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4969 ? - _theResult___snd__h367490 : - _theResult___snd__h385280 ; + _theResult___snd__h367491 : + _theResult___snd__h385281 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q58 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5968 ? - _theResult___snd__h413187 : + _theResult___snd__h413188 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q71 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6361 ? - _theResult___snd__h413187 : - _theResult___snd__h430977 ; + _theResult___snd__h413188 : + _theResult___snd__h430978 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q93 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7360 ? - _theResult___snd__h458882 : + _theResult___snd__h458883 : 57'd0 ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5165 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4109 ? - ((_theResult___fst_exp__h358845 == 8'd255) ? + ((_theResult___fst_exp__h358846 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5150) : - ((_theResult___fst_exp__h367501 == 8'd255) ? + ((_theResult___fst_exp__h367502 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5163) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5215 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4109 ? - ((_theResult___fst_exp__h358845 == 8'd255) ? + ((_theResult___fst_exp__h358846 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5206) : - ((_theResult___fst_exp__h367501 == 8'd255) ? + ((_theResult___fst_exp__h367502 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5213) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6557 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5501 ? - ((_theResult___fst_exp__h404542 == 8'd255) ? + ((_theResult___fst_exp__h404543 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6542) : - ((_theResult___fst_exp__h413198 == 8'd255) ? + ((_theResult___fst_exp__h413199 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6555) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6607 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5501 ? - ((_theResult___fst_exp__h404542 == 8'd255) ? + ((_theResult___fst_exp__h404543 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6598) : - ((_theResult___fst_exp__h413198 == 8'd255) ? + ((_theResult___fst_exp__h413199 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6605) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7949 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6893 ? - ((_theResult___fst_exp__h450237 == 8'd255) ? + ((_theResult___fst_exp__h450238 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7934) : - ((_theResult___fst_exp__h458893 == 8'd255) ? + ((_theResult___fst_exp__h458894 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7947) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7999 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6893 ? - ((_theResult___fst_exp__h450237 == 8'd255) ? + ((_theResult___fst_exp__h450238 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7990) : - ((_theResult___fst_exp__h458893 == 8'd255) ? + ((_theResult___fst_exp__h458894 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7997) ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4343 = - (_theResult____h350734[56] ? + (_theResult____h350735[56] ? 6'd0 : - (_theResult____h350734[55] ? + (_theResult____h350735[55] ? 6'd1 : - (_theResult____h350734[54] ? + (_theResult____h350735[54] ? 6'd2 : - (_theResult____h350734[53] ? + (_theResult____h350735[53] ? 6'd3 : - (_theResult____h350734[52] ? + (_theResult____h350735[52] ? 6'd4 : - (_theResult____h350734[51] ? + (_theResult____h350735[51] ? 6'd5 : - (_theResult____h350734[50] ? + (_theResult____h350735[50] ? 6'd6 : - (_theResult____h350734[49] ? + (_theResult____h350735[49] ? 6'd7 : - (_theResult____h350734[48] ? + (_theResult____h350735[48] ? 6'd8 : - (_theResult____h350734[47] ? + (_theResult____h350735[47] ? 6'd9 : - (_theResult____h350734[46] ? + (_theResult____h350735[46] ? 6'd10 : - (_theResult____h350734[45] ? + (_theResult____h350735[45] ? 6'd11 : - (_theResult____h350734[44] ? + (_theResult____h350735[44] ? 6'd12 : - (_theResult____h350734[43] ? + (_theResult____h350735[43] ? 6'd13 : - (_theResult____h350734[42] ? + (_theResult____h350735[42] ? 6'd14 : - (_theResult____h350734[41] ? + (_theResult____h350735[41] ? 6'd15 : - (_theResult____h350734[40] ? + (_theResult____h350735[40] ? 6'd16 : - (_theResult____h350734[39] ? + (_theResult____h350735[39] ? 6'd17 : - (_theResult____h350734[38] ? + (_theResult____h350735[38] ? 6'd18 : - (_theResult____h350734[37] ? + (_theResult____h350735[37] ? 6'd19 : - (_theResult____h350734[36] ? + (_theResult____h350735[36] ? 6'd20 : - (_theResult____h350734[35] ? + (_theResult____h350735[35] ? 6'd21 : - (_theResult____h350734[34] ? + (_theResult____h350735[34] ? 6'd22 : - (_theResult____h350734[33] ? + (_theResult____h350735[33] ? 6'd23 : - (_theResult____h350734[32] ? + (_theResult____h350735[32] ? 6'd24 : - (_theResult____h350734[31] ? + (_theResult____h350735[31] ? 6'd25 : - (_theResult____h350734[30] ? + (_theResult____h350735[30] ? 6'd26 : - (_theResult____h350734[29] ? + (_theResult____h350735[29] ? 6'd27 : - (_theResult____h350734[28] ? + (_theResult____h350735[28] ? 6'd28 : - (_theResult____h350734[27] ? + (_theResult____h350735[27] ? 6'd29 : - (_theResult____h350734[26] ? + (_theResult____h350735[26] ? 6'd30 : - (_theResult____h350734[25] ? + (_theResult____h350735[25] ? 6'd31 : - (_theResult____h350734[24] ? + (_theResult____h350735[24] ? 6'd32 : - (_theResult____h350734[23] ? + (_theResult____h350735[23] ? 6'd33 : - (_theResult____h350734[22] ? + (_theResult____h350735[22] ? 6'd34 : - (_theResult____h350734[21] ? + (_theResult____h350735[21] ? 6'd35 : - (_theResult____h350734[20] ? + (_theResult____h350735[20] ? 6'd36 : - (_theResult____h350734[19] ? + (_theResult____h350735[19] ? 6'd37 : - (_theResult____h350734[18] ? + (_theResult____h350735[18] ? 6'd38 : - (_theResult____h350734[17] ? + (_theResult____h350735[17] ? 6'd39 : - (_theResult____h350734[16] ? + (_theResult____h350735[16] ? 6'd40 : - (_theResult____h350734[15] ? + (_theResult____h350735[15] ? 6'd41 : - (_theResult____h350734[14] ? + (_theResult____h350735[14] ? 6'd42 : - (_theResult____h350734[13] ? + (_theResult____h350735[13] ? 6'd43 : - (_theResult____h350734[12] ? + (_theResult____h350735[12] ? 6'd44 : - (_theResult____h350734[11] ? + (_theResult____h350735[11] ? 6'd45 : - (_theResult____h350734[10] ? + (_theResult____h350735[10] ? 6'd46 : - (_theResult____h350734[9] ? + (_theResult____h350735[9] ? 6'd47 : - (_theResult____h350734[8] ? + (_theResult____h350735[8] ? 6'd48 : - (_theResult____h350734[7] ? + (_theResult____h350735[7] ? 6'd49 : - (_theResult____h350734[6] ? + (_theResult____h350735[6] ? 6'd50 : - (_theResult____h350734[5] ? + (_theResult____h350735[5] ? 6'd51 : - (_theResult____h350734[4] ? + (_theResult____h350735[4] ? 6'd52 : - (_theResult____h350734[3] ? + (_theResult____h350735[3] ? 6'd53 : - (_theResult____h350734[2] ? + (_theResult____h350735[2] ? 6'd54 : - (_theResult____h350734[1] ? + (_theResult____h350735[1] ? 6'd55 : - (_theResult____h350734[0] ? + (_theResult____h350735[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5735 = - (_theResult____h396433[56] ? + (_theResult____h396434[56] ? 6'd0 : - (_theResult____h396433[55] ? + (_theResult____h396434[55] ? 6'd1 : - (_theResult____h396433[54] ? + (_theResult____h396434[54] ? 6'd2 : - (_theResult____h396433[53] ? + (_theResult____h396434[53] ? 6'd3 : - (_theResult____h396433[52] ? + (_theResult____h396434[52] ? 6'd4 : - (_theResult____h396433[51] ? + (_theResult____h396434[51] ? 6'd5 : - (_theResult____h396433[50] ? + (_theResult____h396434[50] ? 6'd6 : - (_theResult____h396433[49] ? + (_theResult____h396434[49] ? 6'd7 : - (_theResult____h396433[48] ? + (_theResult____h396434[48] ? 6'd8 : - (_theResult____h396433[47] ? + (_theResult____h396434[47] ? 6'd9 : - (_theResult____h396433[46] ? + (_theResult____h396434[46] ? 6'd10 : - (_theResult____h396433[45] ? + (_theResult____h396434[45] ? 6'd11 : - (_theResult____h396433[44] ? + (_theResult____h396434[44] ? 6'd12 : - (_theResult____h396433[43] ? + (_theResult____h396434[43] ? 6'd13 : - (_theResult____h396433[42] ? + (_theResult____h396434[42] ? 6'd14 : - (_theResult____h396433[41] ? + (_theResult____h396434[41] ? 6'd15 : - (_theResult____h396433[40] ? + (_theResult____h396434[40] ? 6'd16 : - (_theResult____h396433[39] ? + (_theResult____h396434[39] ? 6'd17 : - (_theResult____h396433[38] ? + (_theResult____h396434[38] ? 6'd18 : - (_theResult____h396433[37] ? + (_theResult____h396434[37] ? 6'd19 : - (_theResult____h396433[36] ? + (_theResult____h396434[36] ? 6'd20 : - (_theResult____h396433[35] ? + (_theResult____h396434[35] ? 6'd21 : - (_theResult____h396433[34] ? + (_theResult____h396434[34] ? 6'd22 : - (_theResult____h396433[33] ? + (_theResult____h396434[33] ? 6'd23 : - (_theResult____h396433[32] ? + (_theResult____h396434[32] ? 6'd24 : - (_theResult____h396433[31] ? + (_theResult____h396434[31] ? 6'd25 : - (_theResult____h396433[30] ? + (_theResult____h396434[30] ? 6'd26 : - (_theResult____h396433[29] ? + (_theResult____h396434[29] ? 6'd27 : - (_theResult____h396433[28] ? + (_theResult____h396434[28] ? 6'd28 : - (_theResult____h396433[27] ? + (_theResult____h396434[27] ? 6'd29 : - (_theResult____h396433[26] ? + (_theResult____h396434[26] ? 6'd30 : - (_theResult____h396433[25] ? + (_theResult____h396434[25] ? 6'd31 : - (_theResult____h396433[24] ? + (_theResult____h396434[24] ? 6'd32 : - (_theResult____h396433[23] ? + (_theResult____h396434[23] ? 6'd33 : - (_theResult____h396433[22] ? + (_theResult____h396434[22] ? 6'd34 : - (_theResult____h396433[21] ? + (_theResult____h396434[21] ? 6'd35 : - (_theResult____h396433[20] ? + (_theResult____h396434[20] ? 6'd36 : - (_theResult____h396433[19] ? + (_theResult____h396434[19] ? 6'd37 : - (_theResult____h396433[18] ? + (_theResult____h396434[18] ? 6'd38 : - (_theResult____h396433[17] ? + (_theResult____h396434[17] ? 6'd39 : - (_theResult____h396433[16] ? + (_theResult____h396434[16] ? 6'd40 : - (_theResult____h396433[15] ? + (_theResult____h396434[15] ? 6'd41 : - (_theResult____h396433[14] ? + (_theResult____h396434[14] ? 6'd42 : - (_theResult____h396433[13] ? + (_theResult____h396434[13] ? 6'd43 : - (_theResult____h396433[12] ? + (_theResult____h396434[12] ? 6'd44 : - (_theResult____h396433[11] ? + (_theResult____h396434[11] ? 6'd45 : - (_theResult____h396433[10] ? + (_theResult____h396434[10] ? 6'd46 : - (_theResult____h396433[9] ? + (_theResult____h396434[9] ? 6'd47 : - (_theResult____h396433[8] ? + (_theResult____h396434[8] ? 6'd48 : - (_theResult____h396433[7] ? + (_theResult____h396434[7] ? 6'd49 : - (_theResult____h396433[6] ? + (_theResult____h396434[6] ? 6'd50 : - (_theResult____h396433[5] ? + (_theResult____h396434[5] ? 6'd51 : - (_theResult____h396433[4] ? + (_theResult____h396434[4] ? 6'd52 : - (_theResult____h396433[3] ? + (_theResult____h396434[3] ? 6'd53 : - (_theResult____h396433[2] ? + (_theResult____h396434[2] ? 6'd54 : - (_theResult____h396433[1] ? + (_theResult____h396434[1] ? 6'd55 : - (_theResult____h396433[0] ? + (_theResult____h396434[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7127 = - (_theResult____h442128[56] ? + (_theResult____h442129[56] ? 6'd0 : - (_theResult____h442128[55] ? + (_theResult____h442129[55] ? 6'd1 : - (_theResult____h442128[54] ? + (_theResult____h442129[54] ? 6'd2 : - (_theResult____h442128[53] ? + (_theResult____h442129[53] ? 6'd3 : - (_theResult____h442128[52] ? + (_theResult____h442129[52] ? 6'd4 : - (_theResult____h442128[51] ? + (_theResult____h442129[51] ? 6'd5 : - (_theResult____h442128[50] ? + (_theResult____h442129[50] ? 6'd6 : - (_theResult____h442128[49] ? + (_theResult____h442129[49] ? 6'd7 : - (_theResult____h442128[48] ? + (_theResult____h442129[48] ? 6'd8 : - (_theResult____h442128[47] ? + (_theResult____h442129[47] ? 6'd9 : - (_theResult____h442128[46] ? + (_theResult____h442129[46] ? 6'd10 : - (_theResult____h442128[45] ? + (_theResult____h442129[45] ? 6'd11 : - (_theResult____h442128[44] ? + (_theResult____h442129[44] ? 6'd12 : - (_theResult____h442128[43] ? + (_theResult____h442129[43] ? 6'd13 : - (_theResult____h442128[42] ? + (_theResult____h442129[42] ? 6'd14 : - (_theResult____h442128[41] ? + (_theResult____h442129[41] ? 6'd15 : - (_theResult____h442128[40] ? + (_theResult____h442129[40] ? 6'd16 : - (_theResult____h442128[39] ? + (_theResult____h442129[39] ? 6'd17 : - (_theResult____h442128[38] ? + (_theResult____h442129[38] ? 6'd18 : - (_theResult____h442128[37] ? + (_theResult____h442129[37] ? 6'd19 : - (_theResult____h442128[36] ? + (_theResult____h442129[36] ? 6'd20 : - (_theResult____h442128[35] ? + (_theResult____h442129[35] ? 6'd21 : - (_theResult____h442128[34] ? + (_theResult____h442129[34] ? 6'd22 : - (_theResult____h442128[33] ? + (_theResult____h442129[33] ? 6'd23 : - (_theResult____h442128[32] ? + (_theResult____h442129[32] ? 6'd24 : - (_theResult____h442128[31] ? + (_theResult____h442129[31] ? 6'd25 : - (_theResult____h442128[30] ? + (_theResult____h442129[30] ? 6'd26 : - (_theResult____h442128[29] ? + (_theResult____h442129[29] ? 6'd27 : - (_theResult____h442128[28] ? + (_theResult____h442129[28] ? 6'd28 : - (_theResult____h442128[27] ? + (_theResult____h442129[27] ? 6'd29 : - (_theResult____h442128[26] ? + (_theResult____h442129[26] ? 6'd30 : - (_theResult____h442128[25] ? + (_theResult____h442129[25] ? 6'd31 : - (_theResult____h442128[24] ? + (_theResult____h442129[24] ? 6'd32 : - (_theResult____h442128[23] ? + (_theResult____h442129[23] ? 6'd33 : - (_theResult____h442128[22] ? + (_theResult____h442129[22] ? 6'd34 : - (_theResult____h442128[21] ? + (_theResult____h442129[21] ? 6'd35 : - (_theResult____h442128[20] ? + (_theResult____h442129[20] ? 6'd36 : - (_theResult____h442128[19] ? + (_theResult____h442129[19] ? 6'd37 : - (_theResult____h442128[18] ? + (_theResult____h442129[18] ? 6'd38 : - (_theResult____h442128[17] ? + (_theResult____h442129[17] ? 6'd39 : - (_theResult____h442128[16] ? + (_theResult____h442129[16] ? 6'd40 : - (_theResult____h442128[15] ? + (_theResult____h442129[15] ? 6'd41 : - (_theResult____h442128[14] ? + (_theResult____h442129[14] ? 6'd42 : - (_theResult____h442128[13] ? + (_theResult____h442129[13] ? 6'd43 : - (_theResult____h442128[12] ? + (_theResult____h442129[12] ? 6'd44 : - (_theResult____h442128[11] ? + (_theResult____h442129[11] ? 6'd45 : - (_theResult____h442128[10] ? + (_theResult____h442129[10] ? 6'd46 : - (_theResult____h442128[9] ? + (_theResult____h442129[9] ? 6'd47 : - (_theResult____h442128[8] ? + (_theResult____h442129[8] ? 6'd48 : - (_theResult____h442128[7] ? + (_theResult____h442129[7] ? 6'd49 : - (_theResult____h442128[6] ? + (_theResult____h442129[6] ? 6'd50 : - (_theResult____h442128[5] ? + (_theResult____h442129[5] ? 6'd51 : - (_theResult____h442128[4] ? + (_theResult____h442129[4] ? 6'd52 : - (_theResult____h442128[3] ? + (_theResult____h442129[3] ? 6'd53 : - (_theResult____h442128[2] ? + (_theResult____h442129[2] ? 6'd54 : - (_theResult____h442128[1] ? + (_theResult____h442129[1] ? 6'd55 : - (_theResult____h442128[0] ? + (_theResult____h442129[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10491 = - (_theResult____h547107[56] ? + (_theResult____h547108[56] ? 6'd0 : - (_theResult____h547107[55] ? + (_theResult____h547108[55] ? 6'd1 : - (_theResult____h547107[54] ? + (_theResult____h547108[54] ? 6'd2 : - (_theResult____h547107[53] ? + (_theResult____h547108[53] ? 6'd3 : - (_theResult____h547107[52] ? + (_theResult____h547108[52] ? 6'd4 : - (_theResult____h547107[51] ? + (_theResult____h547108[51] ? 6'd5 : - (_theResult____h547107[50] ? + (_theResult____h547108[50] ? 6'd6 : - (_theResult____h547107[49] ? + (_theResult____h547108[49] ? 6'd7 : - (_theResult____h547107[48] ? + (_theResult____h547108[48] ? 6'd8 : - (_theResult____h547107[47] ? + (_theResult____h547108[47] ? 6'd9 : - (_theResult____h547107[46] ? + (_theResult____h547108[46] ? 6'd10 : - (_theResult____h547107[45] ? + (_theResult____h547108[45] ? 6'd11 : - (_theResult____h547107[44] ? + (_theResult____h547108[44] ? 6'd12 : - (_theResult____h547107[43] ? + (_theResult____h547108[43] ? 6'd13 : - (_theResult____h547107[42] ? + (_theResult____h547108[42] ? 6'd14 : - (_theResult____h547107[41] ? + (_theResult____h547108[41] ? 6'd15 : - (_theResult____h547107[40] ? + (_theResult____h547108[40] ? 6'd16 : - (_theResult____h547107[39] ? + (_theResult____h547108[39] ? 6'd17 : - (_theResult____h547107[38] ? + (_theResult____h547108[38] ? 6'd18 : - (_theResult____h547107[37] ? + (_theResult____h547108[37] ? 6'd19 : - (_theResult____h547107[36] ? + (_theResult____h547108[36] ? 6'd20 : - (_theResult____h547107[35] ? + (_theResult____h547108[35] ? 6'd21 : - (_theResult____h547107[34] ? + (_theResult____h547108[34] ? 6'd22 : - (_theResult____h547107[33] ? + (_theResult____h547108[33] ? 6'd23 : - (_theResult____h547107[32] ? + (_theResult____h547108[32] ? 6'd24 : - (_theResult____h547107[31] ? + (_theResult____h547108[31] ? 6'd25 : - (_theResult____h547107[30] ? + (_theResult____h547108[30] ? 6'd26 : - (_theResult____h547107[29] ? + (_theResult____h547108[29] ? 6'd27 : - (_theResult____h547107[28] ? + (_theResult____h547108[28] ? 6'd28 : - (_theResult____h547107[27] ? + (_theResult____h547108[27] ? 6'd29 : - (_theResult____h547107[26] ? + (_theResult____h547108[26] ? 6'd30 : - (_theResult____h547107[25] ? + (_theResult____h547108[25] ? 6'd31 : - (_theResult____h547107[24] ? + (_theResult____h547108[24] ? 6'd32 : - (_theResult____h547107[23] ? + (_theResult____h547108[23] ? 6'd33 : - (_theResult____h547107[22] ? + (_theResult____h547108[22] ? 6'd34 : - (_theResult____h547107[21] ? + (_theResult____h547108[21] ? 6'd35 : - (_theResult____h547107[20] ? + (_theResult____h547108[20] ? 6'd36 : - (_theResult____h547107[19] ? + (_theResult____h547108[19] ? 6'd37 : - (_theResult____h547107[18] ? + (_theResult____h547108[18] ? 6'd38 : - (_theResult____h547107[17] ? + (_theResult____h547108[17] ? 6'd39 : - (_theResult____h547107[16] ? + (_theResult____h547108[16] ? 6'd40 : - (_theResult____h547107[15] ? + (_theResult____h547108[15] ? 6'd41 : - (_theResult____h547107[14] ? + (_theResult____h547108[14] ? 6'd42 : - (_theResult____h547107[13] ? + (_theResult____h547108[13] ? 6'd43 : - (_theResult____h547107[12] ? + (_theResult____h547108[12] ? 6'd44 : - (_theResult____h547107[11] ? + (_theResult____h547108[11] ? 6'd45 : - (_theResult____h547107[10] ? + (_theResult____h547108[10] ? 6'd46 : - (_theResult____h547107[9] ? + (_theResult____h547108[9] ? 6'd47 : - (_theResult____h547107[8] ? + (_theResult____h547108[8] ? 6'd48 : - (_theResult____h547107[7] ? + (_theResult____h547108[7] ? 6'd49 : - (_theResult____h547107[6] ? + (_theResult____h547108[6] ? 6'd50 : - (_theResult____h547107[5] ? + (_theResult____h547108[5] ? 6'd51 : - (_theResult____h547107[4] ? + (_theResult____h547108[4] ? 6'd52 : - (_theResult____h547107[3] ? + (_theResult____h547108[3] ? 6'd53 : - (_theResult____h547107[2] ? + (_theResult____h547108[2] ? 6'd54 : - (_theResult____h547107[1] ? + (_theResult____h547108[1] ? 6'd55 : - (_theResult____h547107[0] ? + (_theResult____h547108[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9006 = - (_theResult____h508254[56] ? + (_theResult____h508255[56] ? 6'd0 : - (_theResult____h508254[55] ? + (_theResult____h508255[55] ? 6'd1 : - (_theResult____h508254[54] ? + (_theResult____h508255[54] ? 6'd2 : - (_theResult____h508254[53] ? + (_theResult____h508255[53] ? 6'd3 : - (_theResult____h508254[52] ? + (_theResult____h508255[52] ? 6'd4 : - (_theResult____h508254[51] ? + (_theResult____h508255[51] ? 6'd5 : - (_theResult____h508254[50] ? + (_theResult____h508255[50] ? 6'd6 : - (_theResult____h508254[49] ? + (_theResult____h508255[49] ? 6'd7 : - (_theResult____h508254[48] ? + (_theResult____h508255[48] ? 6'd8 : - (_theResult____h508254[47] ? + (_theResult____h508255[47] ? 6'd9 : - (_theResult____h508254[46] ? + (_theResult____h508255[46] ? 6'd10 : - (_theResult____h508254[45] ? + (_theResult____h508255[45] ? 6'd11 : - (_theResult____h508254[44] ? + (_theResult____h508255[44] ? 6'd12 : - (_theResult____h508254[43] ? + (_theResult____h508255[43] ? 6'd13 : - (_theResult____h508254[42] ? + (_theResult____h508255[42] ? 6'd14 : - (_theResult____h508254[41] ? + (_theResult____h508255[41] ? 6'd15 : - (_theResult____h508254[40] ? + (_theResult____h508255[40] ? 6'd16 : - (_theResult____h508254[39] ? + (_theResult____h508255[39] ? 6'd17 : - (_theResult____h508254[38] ? + (_theResult____h508255[38] ? 6'd18 : - (_theResult____h508254[37] ? + (_theResult____h508255[37] ? 6'd19 : - (_theResult____h508254[36] ? + (_theResult____h508255[36] ? 6'd20 : - (_theResult____h508254[35] ? + (_theResult____h508255[35] ? 6'd21 : - (_theResult____h508254[34] ? + (_theResult____h508255[34] ? 6'd22 : - (_theResult____h508254[33] ? + (_theResult____h508255[33] ? 6'd23 : - (_theResult____h508254[32] ? + (_theResult____h508255[32] ? 6'd24 : - (_theResult____h508254[31] ? + (_theResult____h508255[31] ? 6'd25 : - (_theResult____h508254[30] ? + (_theResult____h508255[30] ? 6'd26 : - (_theResult____h508254[29] ? + (_theResult____h508255[29] ? 6'd27 : - (_theResult____h508254[28] ? + (_theResult____h508255[28] ? 6'd28 : - (_theResult____h508254[27] ? + (_theResult____h508255[27] ? 6'd29 : - (_theResult____h508254[26] ? + (_theResult____h508255[26] ? 6'd30 : - (_theResult____h508254[25] ? + (_theResult____h508255[25] ? 6'd31 : - (_theResult____h508254[24] ? + (_theResult____h508255[24] ? 6'd32 : - (_theResult____h508254[23] ? + (_theResult____h508255[23] ? 6'd33 : - (_theResult____h508254[22] ? + (_theResult____h508255[22] ? 6'd34 : - (_theResult____h508254[21] ? + (_theResult____h508255[21] ? 6'd35 : - (_theResult____h508254[20] ? + (_theResult____h508255[20] ? 6'd36 : - (_theResult____h508254[19] ? + (_theResult____h508255[19] ? 6'd37 : - (_theResult____h508254[18] ? + (_theResult____h508255[18] ? 6'd38 : - (_theResult____h508254[17] ? + (_theResult____h508255[17] ? 6'd39 : - (_theResult____h508254[16] ? + (_theResult____h508255[16] ? 6'd40 : - (_theResult____h508254[15] ? + (_theResult____h508255[15] ? 6'd41 : - (_theResult____h508254[14] ? + (_theResult____h508255[14] ? 6'd42 : - (_theResult____h508254[13] ? + (_theResult____h508255[13] ? 6'd43 : - (_theResult____h508254[12] ? + (_theResult____h508255[12] ? 6'd44 : - (_theResult____h508254[11] ? + (_theResult____h508255[11] ? 6'd45 : - (_theResult____h508254[10] ? + (_theResult____h508255[10] ? 6'd46 : - (_theResult____h508254[9] ? + (_theResult____h508255[9] ? 6'd47 : - (_theResult____h508254[8] ? + (_theResult____h508255[8] ? 6'd48 : - (_theResult____h508254[7] ? + (_theResult____h508255[7] ? 6'd49 : - (_theResult____h508254[6] ? + (_theResult____h508255[6] ? 6'd50 : - (_theResult____h508254[5] ? + (_theResult____h508255[5] ? 6'd51 : - (_theResult____h508254[4] ? + (_theResult____h508255[4] ? 6'd52 : - (_theResult____h508254[3] ? + (_theResult____h508255[3] ? 6'd53 : - (_theResult____h508254[2] ? + (_theResult____h508255[2] ? 6'd54 : - (_theResult____h508254[1] ? + (_theResult____h508255[1] ? 6'd55 : - (_theResult____h508254[0] ? + (_theResult____h508255[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9721 = - (_theResult____h586411[56] ? + (_theResult____h586412[56] ? 6'd0 : - (_theResult____h586411[55] ? + (_theResult____h586412[55] ? 6'd1 : - (_theResult____h586411[54] ? + (_theResult____h586412[54] ? 6'd2 : - (_theResult____h586411[53] ? + (_theResult____h586412[53] ? 6'd3 : - (_theResult____h586411[52] ? + (_theResult____h586412[52] ? 6'd4 : - (_theResult____h586411[51] ? + (_theResult____h586412[51] ? 6'd5 : - (_theResult____h586411[50] ? + (_theResult____h586412[50] ? 6'd6 : - (_theResult____h586411[49] ? + (_theResult____h586412[49] ? 6'd7 : - (_theResult____h586411[48] ? + (_theResult____h586412[48] ? 6'd8 : - (_theResult____h586411[47] ? + (_theResult____h586412[47] ? 6'd9 : - (_theResult____h586411[46] ? + (_theResult____h586412[46] ? 6'd10 : - (_theResult____h586411[45] ? + (_theResult____h586412[45] ? 6'd11 : - (_theResult____h586411[44] ? + (_theResult____h586412[44] ? 6'd12 : - (_theResult____h586411[43] ? + (_theResult____h586412[43] ? 6'd13 : - (_theResult____h586411[42] ? + (_theResult____h586412[42] ? 6'd14 : - (_theResult____h586411[41] ? + (_theResult____h586412[41] ? 6'd15 : - (_theResult____h586411[40] ? + (_theResult____h586412[40] ? 6'd16 : - (_theResult____h586411[39] ? + (_theResult____h586412[39] ? 6'd17 : - (_theResult____h586411[38] ? + (_theResult____h586412[38] ? 6'd18 : - (_theResult____h586411[37] ? + (_theResult____h586412[37] ? 6'd19 : - (_theResult____h586411[36] ? + (_theResult____h586412[36] ? 6'd20 : - (_theResult____h586411[35] ? + (_theResult____h586412[35] ? 6'd21 : - (_theResult____h586411[34] ? + (_theResult____h586412[34] ? 6'd22 : - (_theResult____h586411[33] ? + (_theResult____h586412[33] ? 6'd23 : - (_theResult____h586411[32] ? + (_theResult____h586412[32] ? 6'd24 : - (_theResult____h586411[31] ? + (_theResult____h586412[31] ? 6'd25 : - (_theResult____h586411[30] ? + (_theResult____h586412[30] ? 6'd26 : - (_theResult____h586411[29] ? + (_theResult____h586412[29] ? 6'd27 : - (_theResult____h586411[28] ? + (_theResult____h586412[28] ? 6'd28 : - (_theResult____h586411[27] ? + (_theResult____h586412[27] ? 6'd29 : - (_theResult____h586411[26] ? + (_theResult____h586412[26] ? 6'd30 : - (_theResult____h586411[25] ? + (_theResult____h586412[25] ? 6'd31 : - (_theResult____h586411[24] ? + (_theResult____h586412[24] ? 6'd32 : - (_theResult____h586411[23] ? + (_theResult____h586412[23] ? 6'd33 : - (_theResult____h586411[22] ? + (_theResult____h586412[22] ? 6'd34 : - (_theResult____h586411[21] ? + (_theResult____h586412[21] ? 6'd35 : - (_theResult____h586411[20] ? + (_theResult____h586412[20] ? 6'd36 : - (_theResult____h586411[19] ? + (_theResult____h586412[19] ? 6'd37 : - (_theResult____h586411[18] ? + (_theResult____h586412[18] ? 6'd38 : - (_theResult____h586411[17] ? + (_theResult____h586412[17] ? 6'd39 : - (_theResult____h586411[16] ? + (_theResult____h586412[16] ? 6'd40 : - (_theResult____h586411[15] ? + (_theResult____h586412[15] ? 6'd41 : - (_theResult____h586411[14] ? + (_theResult____h586412[14] ? 6'd42 : - (_theResult____h586411[13] ? + (_theResult____h586412[13] ? 6'd43 : - (_theResult____h586411[12] ? + (_theResult____h586412[12] ? 6'd44 : - (_theResult____h586411[11] ? + (_theResult____h586412[11] ? 6'd45 : - (_theResult____h586411[10] ? + (_theResult____h586412[10] ? 6'd46 : - (_theResult____h586411[9] ? + (_theResult____h586412[9] ? 6'd47 : - (_theResult____h586411[8] ? + (_theResult____h586412[8] ? 6'd48 : - (_theResult____h586411[7] ? + (_theResult____h586412[7] ? 6'd49 : - (_theResult____h586411[6] ? + (_theResult____h586412[6] ? 6'd50 : - (_theResult____h586411[5] ? + (_theResult____h586412[5] ? 6'd51 : - (_theResult____h586411[4] ? + (_theResult____h586412[4] ? 6'd52 : - (_theResult____h586411[3] ? + (_theResult____h586412[3] ? 6'd53 : - (_theResult____h586411[2] ? + (_theResult____h586412[2] ? 6'd54 : - (_theResult____h586411[1] ? + (_theResult____h586412[1] ? 6'd55 : - (_theResult____h586411[0] ? + (_theResult____h586412[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4894 = - (_theResult____h368373[56] ? + (_theResult____h368374[56] ? 6'd0 : - (_theResult____h368373[55] ? + (_theResult____h368374[55] ? 6'd1 : - (_theResult____h368373[54] ? + (_theResult____h368374[54] ? 6'd2 : - (_theResult____h368373[53] ? + (_theResult____h368374[53] ? 6'd3 : - (_theResult____h368373[52] ? + (_theResult____h368374[52] ? 6'd4 : - (_theResult____h368373[51] ? + (_theResult____h368374[51] ? 6'd5 : - (_theResult____h368373[50] ? + (_theResult____h368374[50] ? 6'd6 : - (_theResult____h368373[49] ? + (_theResult____h368374[49] ? 6'd7 : - (_theResult____h368373[48] ? + (_theResult____h368374[48] ? 6'd8 : - (_theResult____h368373[47] ? + (_theResult____h368374[47] ? 6'd9 : - (_theResult____h368373[46] ? + (_theResult____h368374[46] ? 6'd10 : - (_theResult____h368373[45] ? + (_theResult____h368374[45] ? 6'd11 : - (_theResult____h368373[44] ? + (_theResult____h368374[44] ? 6'd12 : - (_theResult____h368373[43] ? + (_theResult____h368374[43] ? 6'd13 : - (_theResult____h368373[42] ? + (_theResult____h368374[42] ? 6'd14 : - (_theResult____h368373[41] ? + (_theResult____h368374[41] ? 6'd15 : - (_theResult____h368373[40] ? + (_theResult____h368374[40] ? 6'd16 : - (_theResult____h368373[39] ? + (_theResult____h368374[39] ? 6'd17 : - (_theResult____h368373[38] ? + (_theResult____h368374[38] ? 6'd18 : - (_theResult____h368373[37] ? + (_theResult____h368374[37] ? 6'd19 : - (_theResult____h368373[36] ? + (_theResult____h368374[36] ? 6'd20 : - (_theResult____h368373[35] ? + (_theResult____h368374[35] ? 6'd21 : - (_theResult____h368373[34] ? + (_theResult____h368374[34] ? 6'd22 : - (_theResult____h368373[33] ? + (_theResult____h368374[33] ? 6'd23 : - (_theResult____h368373[32] ? + (_theResult____h368374[32] ? 6'd24 : - (_theResult____h368373[31] ? + (_theResult____h368374[31] ? 6'd25 : - (_theResult____h368373[30] ? + (_theResult____h368374[30] ? 6'd26 : - (_theResult____h368373[29] ? + (_theResult____h368374[29] ? 6'd27 : - (_theResult____h368373[28] ? + (_theResult____h368374[28] ? 6'd28 : - (_theResult____h368373[27] ? + (_theResult____h368374[27] ? 6'd29 : - (_theResult____h368373[26] ? + (_theResult____h368374[26] ? 6'd30 : - (_theResult____h368373[25] ? + (_theResult____h368374[25] ? 6'd31 : - (_theResult____h368373[24] ? + (_theResult____h368374[24] ? 6'd32 : - (_theResult____h368373[23] ? + (_theResult____h368374[23] ? 6'd33 : - (_theResult____h368373[22] ? + (_theResult____h368374[22] ? 6'd34 : - (_theResult____h368373[21] ? + (_theResult____h368374[21] ? 6'd35 : - (_theResult____h368373[20] ? + (_theResult____h368374[20] ? 6'd36 : - (_theResult____h368373[19] ? + (_theResult____h368374[19] ? 6'd37 : - (_theResult____h368373[18] ? + (_theResult____h368374[18] ? 6'd38 : - (_theResult____h368373[17] ? + (_theResult____h368374[17] ? 6'd39 : - (_theResult____h368373[16] ? + (_theResult____h368374[16] ? 6'd40 : - (_theResult____h368373[15] ? + (_theResult____h368374[15] ? 6'd41 : - (_theResult____h368373[14] ? + (_theResult____h368374[14] ? 6'd42 : - (_theResult____h368373[13] ? + (_theResult____h368374[13] ? 6'd43 : - (_theResult____h368373[12] ? + (_theResult____h368374[12] ? 6'd44 : - (_theResult____h368373[11] ? + (_theResult____h368374[11] ? 6'd45 : - (_theResult____h368373[10] ? + (_theResult____h368374[10] ? 6'd46 : - (_theResult____h368373[9] ? + (_theResult____h368374[9] ? 6'd47 : - (_theResult____h368373[8] ? + (_theResult____h368374[8] ? 6'd48 : - (_theResult____h368373[7] ? + (_theResult____h368374[7] ? 6'd49 : - (_theResult____h368373[6] ? + (_theResult____h368374[6] ? 6'd50 : - (_theResult____h368373[5] ? + (_theResult____h368374[5] ? 6'd51 : - (_theResult____h368373[4] ? + (_theResult____h368374[4] ? 6'd52 : - (_theResult____h368373[3] ? + (_theResult____h368374[3] ? 6'd53 : - (_theResult____h368373[2] ? + (_theResult____h368374[2] ? 6'd54 : - (_theResult____h368373[1] ? + (_theResult____h368374[1] ? 6'd55 : - (_theResult____h368373[0] ? + (_theResult____h368374[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6286 = - (_theResult____h414070[56] ? + (_theResult____h414071[56] ? 6'd0 : - (_theResult____h414070[55] ? + (_theResult____h414071[55] ? 6'd1 : - (_theResult____h414070[54] ? + (_theResult____h414071[54] ? 6'd2 : - (_theResult____h414070[53] ? + (_theResult____h414071[53] ? 6'd3 : - (_theResult____h414070[52] ? + (_theResult____h414071[52] ? 6'd4 : - (_theResult____h414070[51] ? + (_theResult____h414071[51] ? 6'd5 : - (_theResult____h414070[50] ? + (_theResult____h414071[50] ? 6'd6 : - (_theResult____h414070[49] ? + (_theResult____h414071[49] ? 6'd7 : - (_theResult____h414070[48] ? + (_theResult____h414071[48] ? 6'd8 : - (_theResult____h414070[47] ? + (_theResult____h414071[47] ? 6'd9 : - (_theResult____h414070[46] ? + (_theResult____h414071[46] ? 6'd10 : - (_theResult____h414070[45] ? + (_theResult____h414071[45] ? 6'd11 : - (_theResult____h414070[44] ? + (_theResult____h414071[44] ? 6'd12 : - (_theResult____h414070[43] ? + (_theResult____h414071[43] ? 6'd13 : - (_theResult____h414070[42] ? + (_theResult____h414071[42] ? 6'd14 : - (_theResult____h414070[41] ? + (_theResult____h414071[41] ? 6'd15 : - (_theResult____h414070[40] ? + (_theResult____h414071[40] ? 6'd16 : - (_theResult____h414070[39] ? + (_theResult____h414071[39] ? 6'd17 : - (_theResult____h414070[38] ? + (_theResult____h414071[38] ? 6'd18 : - (_theResult____h414070[37] ? + (_theResult____h414071[37] ? 6'd19 : - (_theResult____h414070[36] ? + (_theResult____h414071[36] ? 6'd20 : - (_theResult____h414070[35] ? + (_theResult____h414071[35] ? 6'd21 : - (_theResult____h414070[34] ? + (_theResult____h414071[34] ? 6'd22 : - (_theResult____h414070[33] ? + (_theResult____h414071[33] ? 6'd23 : - (_theResult____h414070[32] ? + (_theResult____h414071[32] ? 6'd24 : - (_theResult____h414070[31] ? + (_theResult____h414071[31] ? 6'd25 : - (_theResult____h414070[30] ? + (_theResult____h414071[30] ? 6'd26 : - (_theResult____h414070[29] ? + (_theResult____h414071[29] ? 6'd27 : - (_theResult____h414070[28] ? + (_theResult____h414071[28] ? 6'd28 : - (_theResult____h414070[27] ? + (_theResult____h414071[27] ? 6'd29 : - (_theResult____h414070[26] ? + (_theResult____h414071[26] ? 6'd30 : - (_theResult____h414070[25] ? + (_theResult____h414071[25] ? 6'd31 : - (_theResult____h414070[24] ? + (_theResult____h414071[24] ? 6'd32 : - (_theResult____h414070[23] ? + (_theResult____h414071[23] ? 6'd33 : - (_theResult____h414070[22] ? + (_theResult____h414071[22] ? 6'd34 : - (_theResult____h414070[21] ? + (_theResult____h414071[21] ? 6'd35 : - (_theResult____h414070[20] ? + (_theResult____h414071[20] ? 6'd36 : - (_theResult____h414070[19] ? + (_theResult____h414071[19] ? 6'd37 : - (_theResult____h414070[18] ? + (_theResult____h414071[18] ? 6'd38 : - (_theResult____h414070[17] ? + (_theResult____h414071[17] ? 6'd39 : - (_theResult____h414070[16] ? + (_theResult____h414071[16] ? 6'd40 : - (_theResult____h414070[15] ? + (_theResult____h414071[15] ? 6'd41 : - (_theResult____h414070[14] ? + (_theResult____h414071[14] ? 6'd42 : - (_theResult____h414070[13] ? + (_theResult____h414071[13] ? 6'd43 : - (_theResult____h414070[12] ? + (_theResult____h414071[12] ? 6'd44 : - (_theResult____h414070[11] ? + (_theResult____h414071[11] ? 6'd45 : - (_theResult____h414070[10] ? + (_theResult____h414071[10] ? 6'd46 : - (_theResult____h414070[9] ? + (_theResult____h414071[9] ? 6'd47 : - (_theResult____h414070[8] ? + (_theResult____h414071[8] ? 6'd48 : - (_theResult____h414070[7] ? + (_theResult____h414071[7] ? 6'd49 : - (_theResult____h414070[6] ? + (_theResult____h414071[6] ? 6'd50 : - (_theResult____h414070[5] ? + (_theResult____h414071[5] ? 6'd51 : - (_theResult____h414070[4] ? + (_theResult____h414071[4] ? 6'd52 : - (_theResult____h414070[3] ? + (_theResult____h414071[3] ? 6'd53 : - (_theResult____h414070[2] ? + (_theResult____h414071[2] ? 6'd54 : - (_theResult____h414070[1] ? + (_theResult____h414071[1] ? 6'd55 : - (_theResult____h414070[0] ? + (_theResult____h414071[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7678 = - (_theResult____h459765[56] ? + (_theResult____h459766[56] ? 6'd0 : - (_theResult____h459765[55] ? + (_theResult____h459766[55] ? 6'd1 : - (_theResult____h459765[54] ? + (_theResult____h459766[54] ? 6'd2 : - (_theResult____h459765[53] ? + (_theResult____h459766[53] ? 6'd3 : - (_theResult____h459765[52] ? + (_theResult____h459766[52] ? 6'd4 : - (_theResult____h459765[51] ? + (_theResult____h459766[51] ? 6'd5 : - (_theResult____h459765[50] ? + (_theResult____h459766[50] ? 6'd6 : - (_theResult____h459765[49] ? + (_theResult____h459766[49] ? 6'd7 : - (_theResult____h459765[48] ? + (_theResult____h459766[48] ? 6'd8 : - (_theResult____h459765[47] ? + (_theResult____h459766[47] ? 6'd9 : - (_theResult____h459765[46] ? + (_theResult____h459766[46] ? 6'd10 : - (_theResult____h459765[45] ? + (_theResult____h459766[45] ? 6'd11 : - (_theResult____h459765[44] ? + (_theResult____h459766[44] ? 6'd12 : - (_theResult____h459765[43] ? + (_theResult____h459766[43] ? 6'd13 : - (_theResult____h459765[42] ? + (_theResult____h459766[42] ? 6'd14 : - (_theResult____h459765[41] ? + (_theResult____h459766[41] ? 6'd15 : - (_theResult____h459765[40] ? + (_theResult____h459766[40] ? 6'd16 : - (_theResult____h459765[39] ? + (_theResult____h459766[39] ? 6'd17 : - (_theResult____h459765[38] ? + (_theResult____h459766[38] ? 6'd18 : - (_theResult____h459765[37] ? + (_theResult____h459766[37] ? 6'd19 : - (_theResult____h459765[36] ? + (_theResult____h459766[36] ? 6'd20 : - (_theResult____h459765[35] ? + (_theResult____h459766[35] ? 6'd21 : - (_theResult____h459765[34] ? + (_theResult____h459766[34] ? 6'd22 : - (_theResult____h459765[33] ? + (_theResult____h459766[33] ? 6'd23 : - (_theResult____h459765[32] ? + (_theResult____h459766[32] ? 6'd24 : - (_theResult____h459765[31] ? + (_theResult____h459766[31] ? 6'd25 : - (_theResult____h459765[30] ? + (_theResult____h459766[30] ? 6'd26 : - (_theResult____h459765[29] ? + (_theResult____h459766[29] ? 6'd27 : - (_theResult____h459765[28] ? + (_theResult____h459766[28] ? 6'd28 : - (_theResult____h459765[27] ? + (_theResult____h459766[27] ? 6'd29 : - (_theResult____h459765[26] ? + (_theResult____h459766[26] ? 6'd30 : - (_theResult____h459765[25] ? + (_theResult____h459766[25] ? 6'd31 : - (_theResult____h459765[24] ? + (_theResult____h459766[24] ? 6'd32 : - (_theResult____h459765[23] ? + (_theResult____h459766[23] ? 6'd33 : - (_theResult____h459765[22] ? + (_theResult____h459766[22] ? 6'd34 : - (_theResult____h459765[21] ? + (_theResult____h459766[21] ? 6'd35 : - (_theResult____h459765[20] ? + (_theResult____h459766[20] ? 6'd36 : - (_theResult____h459765[19] ? + (_theResult____h459766[19] ? 6'd37 : - (_theResult____h459765[18] ? + (_theResult____h459766[18] ? 6'd38 : - (_theResult____h459765[17] ? + (_theResult____h459766[17] ? 6'd39 : - (_theResult____h459765[16] ? + (_theResult____h459766[16] ? 6'd40 : - (_theResult____h459765[15] ? + (_theResult____h459766[15] ? 6'd41 : - (_theResult____h459765[14] ? + (_theResult____h459766[14] ? 6'd42 : - (_theResult____h459765[13] ? + (_theResult____h459766[13] ? 6'd43 : - (_theResult____h459765[12] ? + (_theResult____h459766[12] ? 6'd44 : - (_theResult____h459765[11] ? + (_theResult____h459766[11] ? 6'd45 : - (_theResult____h459765[10] ? + (_theResult____h459766[10] ? 6'd46 : - (_theResult____h459765[9] ? + (_theResult____h459766[9] ? 6'd47 : - (_theResult____h459765[8] ? + (_theResult____h459766[8] ? 6'd48 : - (_theResult____h459765[7] ? + (_theResult____h459766[7] ? 6'd49 : - (_theResult____h459765[6] ? + (_theResult____h459766[6] ? 6'd50 : - (_theResult____h459765[5] ? + (_theResult____h459766[5] ? 6'd51 : - (_theResult____h459765[4] ? + (_theResult____h459766[4] ? 6'd52 : - (_theResult____h459765[3] ? + (_theResult____h459766[3] ? 6'd53 : - (_theResult____h459765[2] ? + (_theResult____h459766[2] ? 6'd54 : - (_theResult____h459765[1] ? + (_theResult____h459766[1] ? 6'd55 : - (_theResult____h459765[0] ? + (_theResult____h459766[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10033 = - (_theResult___fst_exp__h594647 == 11'd2047) ? + (_theResult___fst_exp__h594648 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -18994,10 +18994,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard86421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 : + CASE_guard86422_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q161) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10535 = - (_theResult___fst_exp__h555343 == 11'd2047) ? + (_theResult___fst_exp__h555344 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -19005,10 +19005,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard47117_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 : + CASE_guard47118_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q188) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10802 = - (_theResult___fst_exp__h555343 == 11'd2047) ? + (_theResult___fst_exp__h555344 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -19016,10 +19016,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard47117_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 : + CASE_guard47118_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q192) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9050 = - (_theResult___fst_exp__h516490 == 11'd2047) ? + (_theResult___fst_exp__h516491 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -19027,10 +19027,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard08264_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 : + CASE_guard08265_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q140) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9765 = - (_theResult___fst_exp__h594647 == 11'd2047) ? + (_theResult___fst_exp__h594648 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -19038,538 +19038,538 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard86421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 : + CASE_guard86422_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q157) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4406 = - (guard__h350744 == 2'b0 || + (guard__h350745 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h358845 : - _theResult___exp__h359361 ; + _theResult___fst_exp__h358846 : + _theResult___exp__h359362 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4409 = - (guard__h350744 == 2'b0) ? - _theResult___fst_exp__h358845 : + (guard__h350745 == 2'b0) ? + _theResult___fst_exp__h358846 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h359361 : - _theResult___fst_exp__h358845) ; + _theResult___exp__h359362 : + _theResult___fst_exp__h358846) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5053 = - (guard__h350744 == 2'b0 || + (guard__h350745 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h358839[56:34] : - _theResult___sfd__h359362 ; + sfdin__h358840[56:34] : + _theResult___sfd__h359363 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5055 = - (guard__h350744 == 2'b0) ? - sfdin__h358839[56:34] : + (guard__h350745 == 2'b0) ? + sfdin__h358840[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h359362 : - sfdin__h358839[56:34]) ; + _theResult___sfd__h359363 : + sfdin__h358840[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5798 = - (guard__h396443 == 2'b0 || + (guard__h396444 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h404542 : - _theResult___exp__h405058 ; + _theResult___fst_exp__h404543 : + _theResult___exp__h405059 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5801 = - (guard__h396443 == 2'b0) ? - _theResult___fst_exp__h404542 : + (guard__h396444 == 2'b0) ? + _theResult___fst_exp__h404543 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h405058 : - _theResult___fst_exp__h404542) ; + _theResult___exp__h405059 : + _theResult___fst_exp__h404543) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6445 = - (guard__h396443 == 2'b0 || + (guard__h396444 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h404536[56:34] : - _theResult___sfd__h405059 ; + sfdin__h404537[56:34] : + _theResult___sfd__h405060 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6447 = - (guard__h396443 == 2'b0) ? - sfdin__h404536[56:34] : + (guard__h396444 == 2'b0) ? + sfdin__h404537[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h405059 : - sfdin__h404536[56:34]) ; + _theResult___sfd__h405060 : + sfdin__h404537[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7190 = - (guard__h442138 == 2'b0 || + (guard__h442139 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h450237 : - _theResult___exp__h450753 ; + _theResult___fst_exp__h450238 : + _theResult___exp__h450754 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7193 = - (guard__h442138 == 2'b0) ? - _theResult___fst_exp__h450237 : + (guard__h442139 == 2'b0) ? + _theResult___fst_exp__h450238 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h450753 : - _theResult___fst_exp__h450237) ; + _theResult___exp__h450754 : + _theResult___fst_exp__h450238) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7837 = - (guard__h442138 == 2'b0 || + (guard__h442139 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h450231[56:34] : - _theResult___sfd__h450754 ; + sfdin__h450232[56:34] : + _theResult___sfd__h450755 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7839 = - (guard__h442138 == 2'b0) ? - sfdin__h450231[56:34] : + (guard__h442139 == 2'b0) ? + sfdin__h450232[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h450754 : - sfdin__h450231[56:34]) ; + _theResult___sfd__h450755 : + sfdin__h450232[56:34]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10647 = - (guard__h547117 == 2'b0 || + (guard__h547118 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h555343 : - _theResult___exp__h556072 ; + _theResult___fst_exp__h555344 : + _theResult___exp__h556073 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10649 = - (guard__h547117 == 2'b0) ? - _theResult___fst_exp__h555343 : + (guard__h547118 == 2'b0) ? + _theResult___fst_exp__h555344 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h556072 : - _theResult___fst_exp__h555343) ; + _theResult___exp__h556073 : + _theResult___fst_exp__h555344) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10730 = - (guard__h547117 == 2'b0 || + (guard__h547118 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - sfdin__h555337[56:5] : - _theResult___sfd__h556073 ; + sfdin__h555338[56:5] : + _theResult___sfd__h556074 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10732 = - (guard__h547117 == 2'b0) ? - sfdin__h555337[56:5] : + (guard__h547118 == 2'b0) ? + sfdin__h555338[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h556073 : - sfdin__h555337[56:5]) ; + _theResult___sfd__h556074 : + sfdin__h555338[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9167 = - (guard__h508264 == 2'b0 || + (guard__h508265 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h516490 : - _theResult___exp__h517219 ; + _theResult___fst_exp__h516491 : + _theResult___exp__h517220 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9169 = - (guard__h508264 == 2'b0) ? - _theResult___fst_exp__h516490 : + (guard__h508265 == 2'b0) ? + _theResult___fst_exp__h516491 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h517219 : - _theResult___fst_exp__h516490) ; + _theResult___exp__h517220 : + _theResult___fst_exp__h516491) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9251 = - (guard__h508264 == 2'b0 || + (guard__h508265 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - sfdin__h516484[56:5] : - _theResult___sfd__h517220 ; + sfdin__h516485[56:5] : + _theResult___sfd__h517221 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9253 = - (guard__h508264 == 2'b0) ? - sfdin__h516484[56:5] : + (guard__h508265 == 2'b0) ? + sfdin__h516485[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h517220 : - sfdin__h516484[56:5]) ; + _theResult___sfd__h517221 : + sfdin__h516485[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9877 = - (guard__h586421 == 2'b0 || + (guard__h586422 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h594647 : - _theResult___exp__h595376 ; + _theResult___fst_exp__h594648 : + _theResult___exp__h595377 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9879 = - (guard__h586421 == 2'b0) ? - _theResult___fst_exp__h594647 : + (guard__h586422 == 2'b0) ? + _theResult___fst_exp__h594648 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h595376 : - _theResult___fst_exp__h594647) ; + _theResult___exp__h595377 : + _theResult___fst_exp__h594648) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9960 = - (guard__h586421 == 2'b0 || + (guard__h586422 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - sfdin__h594641[56:5] : - _theResult___sfd__h595377 ; + sfdin__h594642[56:5] : + _theResult___sfd__h595378 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9962 = - (guard__h586421 == 2'b0) ? - sfdin__h594641[56:5] : + (guard__h586422 == 2'b0) ? + sfdin__h594642[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h595377 : - sfdin__h594641[56:5]) ; + _theResult___sfd__h595378 : + sfdin__h594642[56:5]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4953 = - (guard__h368383 == 2'b0 || + (guard__h368384 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h376611 : - _theResult___exp__h377127 ; + _theResult___fst_exp__h376612 : + _theResult___exp__h377128 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4955 = - (guard__h368383 == 2'b0) ? - _theResult___fst_exp__h376611 : + (guard__h368384 == 2'b0) ? + _theResult___fst_exp__h376612 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h377127 : - _theResult___fst_exp__h376611) ; + _theResult___exp__h377128 : + _theResult___fst_exp__h376612) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5099 = - (guard__h368383 == 2'b0 || + (guard__h368384 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h376605[56:34] : - _theResult___sfd__h377128 ; + sfdin__h376606[56:34] : + _theResult___sfd__h377129 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5101 = - (guard__h368383 == 2'b0) ? - sfdin__h376605[56:34] : + (guard__h368384 == 2'b0) ? + sfdin__h376606[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h377128 : - sfdin__h376605[56:34]) ; + _theResult___sfd__h377129 : + sfdin__h376606[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6345 = - (guard__h414080 == 2'b0 || + (guard__h414081 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h422308 : - _theResult___exp__h422824 ; + _theResult___fst_exp__h422309 : + _theResult___exp__h422825 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6347 = - (guard__h414080 == 2'b0) ? - _theResult___fst_exp__h422308 : + (guard__h414081 == 2'b0) ? + _theResult___fst_exp__h422309 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h422824 : - _theResult___fst_exp__h422308) ; + _theResult___exp__h422825 : + _theResult___fst_exp__h422309) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6491 = - (guard__h414080 == 2'b0 || + (guard__h414081 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h422302[56:34] : - _theResult___sfd__h422825 ; + sfdin__h422303[56:34] : + _theResult___sfd__h422826 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6493 = - (guard__h414080 == 2'b0) ? - sfdin__h422302[56:34] : + (guard__h414081 == 2'b0) ? + sfdin__h422303[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h422825 : - sfdin__h422302[56:34]) ; + _theResult___sfd__h422826 : + sfdin__h422303[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7737 = - (guard__h459775 == 2'b0 || + (guard__h459776 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h468003 : - _theResult___exp__h468519 ; + _theResult___fst_exp__h468004 : + _theResult___exp__h468520 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7739 = - (guard__h459775 == 2'b0) ? - _theResult___fst_exp__h468003 : + (guard__h459776 == 2'b0) ? + _theResult___fst_exp__h468004 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h468519 : - _theResult___fst_exp__h468003) ; + _theResult___exp__h468520 : + _theResult___fst_exp__h468004) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7883 = - (guard__h459775 == 2'b0 || + (guard__h459776 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h467997[56:34] : - _theResult___sfd__h468520 ; + sfdin__h467998[56:34] : + _theResult___sfd__h468521 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7885 = - (guard__h459775 == 2'b0) ? - sfdin__h467997[56:34] : + (guard__h459776 == 2'b0) ? + sfdin__h467998[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h468520 : - sfdin__h467997[56:34]) ; + _theResult___sfd__h468521 : + sfdin__h467998[56:34]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10609 = - (guard__h537805 == 2'b0 || + (guard__h537806 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h545766 : - _theResult___exp__h546421 ; + _theResult___fst_exp__h545767 : + _theResult___exp__h546422 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10611 = - (guard__h537805 == 2'b0) ? - _theResult___fst_exp__h545766 : + (guard__h537806 == 2'b0) ? + _theResult___fst_exp__h545767 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h546421 : - _theResult___fst_exp__h545766) ; + _theResult___exp__h546422 : + _theResult___fst_exp__h545767) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10678 = - (guard__h556186 == 2'b0 || + (guard__h556187 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h564176 : - _theResult___exp__h564856 ; + _theResult___fst_exp__h564177 : + _theResult___exp__h564857 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10680 = - (guard__h556186 == 2'b0) ? - _theResult___fst_exp__h564176 : + (guard__h556187 == 2'b0) ? + _theResult___fst_exp__h564177 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h564856 : - _theResult___fst_exp__h564176) ; + _theResult___exp__h564857 : + _theResult___fst_exp__h564177) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10704 = - (guard__h537805 == 2'b0 || + (guard__h537806 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h545717[56:5] : - _theResult___sfd__h546422 ; + _theResult___snd__h545718[56:5] : + _theResult___sfd__h546423 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10706 = - (guard__h537805 == 2'b0) ? - _theResult___snd__h545717[56:5] : + (guard__h537806 == 2'b0) ? + _theResult___snd__h545718[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h546422 : - _theResult___snd__h545717[56:5]) ; + _theResult___sfd__h546423 : + _theResult___snd__h545718[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10749 = - (guard__h556186 == 2'b0 || + (guard__h556187 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h564122[56:5] : - _theResult___sfd__h564857 ; + _theResult___snd__h564123[56:5] : + _theResult___sfd__h564858 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10751 = - (guard__h556186 == 2'b0) ? - _theResult___snd__h564122[56:5] : + (guard__h556187 == 2'b0) ? + _theResult___snd__h564123[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h564857 : - _theResult___snd__h564122[56:5]) ; + _theResult___sfd__h564858 : + _theResult___snd__h564123[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9124 = - (guard__h498952 == 2'b0 || + (guard__h498953 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h506913 : - _theResult___exp__h507568 ; + _theResult___fst_exp__h506914 : + _theResult___exp__h507569 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9126 = - (guard__h498952 == 2'b0) ? - _theResult___fst_exp__h506913 : + (guard__h498953 == 2'b0) ? + _theResult___fst_exp__h506914 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h507568 : - _theResult___fst_exp__h506913) ; + _theResult___exp__h507569 : + _theResult___fst_exp__h506914) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9198 = - (guard__h517333 == 2'b0 || + (guard__h517334 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h525323 : - _theResult___exp__h526003 ; + _theResult___fst_exp__h525324 : + _theResult___exp__h526004 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9200 = - (guard__h517333 == 2'b0) ? - _theResult___fst_exp__h525323 : + (guard__h517334 == 2'b0) ? + _theResult___fst_exp__h525324 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h526003 : - _theResult___fst_exp__h525323) ; + _theResult___exp__h526004 : + _theResult___fst_exp__h525324) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9224 = - (guard__h498952 == 2'b0 || + (guard__h498953 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h506864[56:5] : - _theResult___sfd__h507569 ; + _theResult___snd__h506865[56:5] : + _theResult___sfd__h507570 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9226 = - (guard__h498952 == 2'b0) ? - _theResult___snd__h506864[56:5] : + (guard__h498953 == 2'b0) ? + _theResult___snd__h506865[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h507569 : - _theResult___snd__h506864[56:5]) ; + _theResult___sfd__h507570 : + _theResult___snd__h506865[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9270 = - (guard__h517333 == 2'b0 || + (guard__h517334 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h525269[56:5] : - _theResult___sfd__h526004 ; + _theResult___snd__h525270[56:5] : + _theResult___sfd__h526005 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9272 = - (guard__h517333 == 2'b0) ? - _theResult___snd__h525269[56:5] : + (guard__h517334 == 2'b0) ? + _theResult___snd__h525270[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h526004 : - _theResult___snd__h525269[56:5]) ; + _theResult___sfd__h526005 : + _theResult___snd__h525270[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9839 = - (guard__h577109 == 2'b0 || + (guard__h577110 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h585070 : - _theResult___exp__h585725 ; + _theResult___fst_exp__h585071 : + _theResult___exp__h585726 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9841 = - (guard__h577109 == 2'b0) ? - _theResult___fst_exp__h585070 : + (guard__h577110 == 2'b0) ? + _theResult___fst_exp__h585071 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h585725 : - _theResult___fst_exp__h585070) ; + _theResult___exp__h585726 : + _theResult___fst_exp__h585071) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9908 = - (guard__h595490 == 2'b0 || + (guard__h595491 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h603480 : - _theResult___exp__h604160 ; + _theResult___fst_exp__h603481 : + _theResult___exp__h604161 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9910 = - (guard__h595490 == 2'b0) ? - _theResult___fst_exp__h603480 : + (guard__h595491 == 2'b0) ? + _theResult___fst_exp__h603481 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h604160 : - _theResult___fst_exp__h603480) ; + _theResult___exp__h604161 : + _theResult___fst_exp__h603481) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9934 = - (guard__h577109 == 2'b0 || + (guard__h577110 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h585021[56:5] : - _theResult___sfd__h585726 ; + _theResult___snd__h585022[56:5] : + _theResult___sfd__h585727 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9936 = - (guard__h577109 == 2'b0) ? - _theResult___snd__h585021[56:5] : + (guard__h577110 == 2'b0) ? + _theResult___snd__h585022[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h585726 : - _theResult___snd__h585021[56:5]) ; + _theResult___sfd__h585727 : + _theResult___snd__h585022[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9979 = - (guard__h595490 == 2'b0 || + (guard__h595491 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h603426[56:5] : - _theResult___sfd__h604161 ; + _theResult___snd__h603427[56:5] : + _theResult___sfd__h604162 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9981 = - (guard__h595490 == 2'b0) ? - _theResult___snd__h603426[56:5] : + (guard__h595491 == 2'b0) ? + _theResult___snd__h603427[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h604161 : - _theResult___snd__h603426[56:5]) ; + _theResult___sfd__h604162 : + _theResult___snd__h603427[56:5]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4628 = - (guard__h359453 == 2'b0 || + (guard__h359454 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h367501 : - _theResult___exp__h367943 ; + _theResult___fst_exp__h367502 : + _theResult___exp__h367944 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4630 = - (guard__h359453 == 2'b0) ? - _theResult___fst_exp__h367501 : + (guard__h359454 == 2'b0) ? + _theResult___fst_exp__h367502 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h367943 : - _theResult___fst_exp__h367501) ; + _theResult___exp__h367944 : + _theResult___fst_exp__h367502) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 = - (guard__h377219 == 2'b0 || + (guard__h377220 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h385296 : - _theResult___exp__h385763 ; + _theResult___fst_exp__h385297 : + _theResult___exp__h385764 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 = - (guard__h377219 == 2'b0) ? - _theResult___fst_exp__h385296 : + (guard__h377220 == 2'b0) ? + _theResult___fst_exp__h385297 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h385763 : - _theResult___fst_exp__h385296) ; + _theResult___exp__h385764 : + _theResult___fst_exp__h385297) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5072 = - (guard__h359453 == 2'b0 || + (guard__h359454 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h367452[56:34] : - _theResult___sfd__h367944 ; + _theResult___snd__h367453[56:34] : + _theResult___sfd__h367945 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5074 = - (guard__h359453 == 2'b0) ? - _theResult___snd__h367452[56:34] : + (guard__h359454 == 2'b0) ? + _theResult___snd__h367453[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h367944 : - _theResult___snd__h367452[56:34]) ; + _theResult___sfd__h367945 : + _theResult___snd__h367453[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5118 = - (guard__h377219 == 2'b0 || + (guard__h377220 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h385242[56:34] : - _theResult___sfd__h385764 ; + _theResult___snd__h385243[56:34] : + _theResult___sfd__h385765 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5120 = - (guard__h377219 == 2'b0) ? - _theResult___snd__h385242[56:34] : + (guard__h377220 == 2'b0) ? + _theResult___snd__h385243[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h385764 : - _theResult___snd__h385242[56:34]) ; + _theResult___sfd__h385765 : + _theResult___snd__h385243[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6020 = - (guard__h405150 == 2'b0 || + (guard__h405151 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h413198 : - _theResult___exp__h413640 ; + _theResult___fst_exp__h413199 : + _theResult___exp__h413641 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6022 = - (guard__h405150 == 2'b0) ? - _theResult___fst_exp__h413198 : + (guard__h405151 == 2'b0) ? + _theResult___fst_exp__h413199 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h413640 : - _theResult___fst_exp__h413198) ; + _theResult___exp__h413641 : + _theResult___fst_exp__h413199) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 = - (guard__h422916 == 2'b0 || + (guard__h422917 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h430993 : - _theResult___exp__h431460 ; + _theResult___fst_exp__h430994 : + _theResult___exp__h431461 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 = - (guard__h422916 == 2'b0) ? - _theResult___fst_exp__h430993 : + (guard__h422917 == 2'b0) ? + _theResult___fst_exp__h430994 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h431460 : - _theResult___fst_exp__h430993) ; + _theResult___exp__h431461 : + _theResult___fst_exp__h430994) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6464 = - (guard__h405150 == 2'b0 || + (guard__h405151 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h413149[56:34] : - _theResult___sfd__h413641 ; + _theResult___snd__h413150[56:34] : + _theResult___sfd__h413642 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6466 = - (guard__h405150 == 2'b0) ? - _theResult___snd__h413149[56:34] : + (guard__h405151 == 2'b0) ? + _theResult___snd__h413150[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h413641 : - _theResult___snd__h413149[56:34]) ; + _theResult___sfd__h413642 : + _theResult___snd__h413150[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6510 = - (guard__h422916 == 2'b0 || + (guard__h422917 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h430939[56:34] : - _theResult___sfd__h431461 ; + _theResult___snd__h430940[56:34] : + _theResult___sfd__h431462 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6512 = - (guard__h422916 == 2'b0) ? - _theResult___snd__h430939[56:34] : + (guard__h422917 == 2'b0) ? + _theResult___snd__h430940[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h431461 : - _theResult___snd__h430939[56:34]) ; + _theResult___sfd__h431462 : + _theResult___snd__h430940[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7412 = - (guard__h450845 == 2'b0 || + (guard__h450846 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h458893 : - _theResult___exp__h459335 ; + _theResult___fst_exp__h458894 : + _theResult___exp__h459336 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7414 = - (guard__h450845 == 2'b0) ? - _theResult___fst_exp__h458893 : + (guard__h450846 == 2'b0) ? + _theResult___fst_exp__h458894 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h459335 : - _theResult___fst_exp__h458893) ; + _theResult___exp__h459336 : + _theResult___fst_exp__h458894) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 = - (guard__h468611 == 2'b0 || + (guard__h468612 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h476688 : - _theResult___exp__h477155 ; + _theResult___fst_exp__h476689 : + _theResult___exp__h477156 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 = - (guard__h468611 == 2'b0) ? - _theResult___fst_exp__h476688 : + (guard__h468612 == 2'b0) ? + _theResult___fst_exp__h476689 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h477155 : - _theResult___fst_exp__h476688) ; + _theResult___exp__h477156 : + _theResult___fst_exp__h476689) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7856 = - (guard__h450845 == 2'b0 || + (guard__h450846 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h458844[56:34] : - _theResult___sfd__h459336 ; + _theResult___snd__h458845[56:34] : + _theResult___sfd__h459337 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7858 = - (guard__h450845 == 2'b0) ? - _theResult___snd__h458844[56:34] : + (guard__h450846 == 2'b0) ? + _theResult___snd__h458845[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h459336 : - _theResult___snd__h458844[56:34]) ; + _theResult___sfd__h459337 : + _theResult___snd__h458845[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7902 = - (guard__h468611 == 2'b0 || + (guard__h468612 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h476634[56:34] : - _theResult___sfd__h477156 ; + _theResult___snd__h476635[56:34] : + _theResult___sfd__h477157 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7904 = - (guard__h468611 == 2'b0) ? - _theResult___snd__h476634[56:34] : + (guard__h468612 == 2'b0) ? + _theResult___snd__h476635[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h477156 : - _theResult___snd__h476634[56:34]) ; + _theResult___sfd__h477157 : + _theResult___snd__h476635[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10018 = - (_theResult___fst_exp__h585070 == 11'd2047) ? + (_theResult___fst_exp__h585071 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -19577,10 +19577,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard77109_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 : + CASE_guard77110_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10045 = - (_theResult___fst_exp__h603480 == 11'd2047) ? + (_theResult___fst_exp__h603481 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -19588,10 +19588,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 : + CASE_guard95491_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10581 = - (_theResult___fst_exp__h564176 == 11'd2047) ? + (_theResult___fst_exp__h564177 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -19599,10 +19599,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard56186_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 : + CASE_guard56187_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q190) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10787 = - (_theResult___fst_exp__h545766 == 11'd2047) ? + (_theResult___fst_exp__h545767 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -19610,10 +19610,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 : + CASE_guard37806_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10814 = - (_theResult___fst_exp__h564176 == 11'd2047) ? + (_theResult___fst_exp__h564177 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -19621,10 +19621,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard56186_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 : + CASE_guard56187_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9096 = - (_theResult___fst_exp__h525323 == 11'd2047) ? + (_theResult___fst_exp__h525324 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -19632,10 +19632,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard17333_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 : + CASE_guard17334_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q142) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9811 = - (_theResult___fst_exp__h603480 == 11'd2047) ? + (_theResult___fst_exp__h603481 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -19643,14 +19643,14 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95490_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 : + CASE_guard95491_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q159) ; assign IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d12992 = - (_theResult____h658025 == 12'd0 && + (_theResult____h658026 == 12'd0 && (csrf_prv_reg == 2'd0 || csrf_prv_reg == 2'd1 && csrf_ie_vec_1)) ? - enabled_ints__h658484 : - _theResult____h658025 ; + enabled_ints__h658485 : + _theResult____h658026 ; assign IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d13204 = IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d12992[0] || IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d12992[1] || @@ -19700,7 +19700,7 @@ module mkCore(CLK, checkForException___d13792[4] || csrf_fs_reg_read__1726_EQ_0_3149_AND_fetchStag_ETC___d13881 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10048 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != @@ -19710,85 +19710,85 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10020) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10047 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10049 = - (f3_exp__h565823 == 8'd255 && f3_sfd__h565824 != 23'd0 || - (f3_exp__h565823 == 8'd255 || f3_exp__h565823 == 8'd0) && - f3_sfd__h565824 == 23'd0) ? + (f3_exp__h565824 == 8'd255 && f3_sfd__h565825 != 23'd0 || + (f3_exp__h565824 == 8'd255 || f3_exp__h565824 == 8'd0) && + f3_sfd__h565825 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10048 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10194 = - ((f2_exp__h526519 == 8'd0) ? - (f2_sfd__h526520[22] ? + ((f2_exp__h526520 == 8'd0) ? + (f2_sfd__h526521[22] ? 6'd2 : - (f2_sfd__h526520[21] ? + (f2_sfd__h526521[21] ? 6'd3 : - (f2_sfd__h526520[20] ? + (f2_sfd__h526521[20] ? 6'd4 : - (f2_sfd__h526520[19] ? + (f2_sfd__h526521[19] ? 6'd5 : - (f2_sfd__h526520[18] ? + (f2_sfd__h526521[18] ? 6'd6 : - (f2_sfd__h526520[17] ? + (f2_sfd__h526521[17] ? 6'd7 : - (f2_sfd__h526520[16] ? + (f2_sfd__h526521[16] ? 6'd8 : - (f2_sfd__h526520[15] ? + (f2_sfd__h526521[15] ? 6'd9 : - (f2_sfd__h526520[14] ? + (f2_sfd__h526521[14] ? 6'd10 : - (f2_sfd__h526520[13] ? + (f2_sfd__h526521[13] ? 6'd11 : - (f2_sfd__h526520[12] ? + (f2_sfd__h526521[12] ? 6'd12 : - (f2_sfd__h526520[11] ? + (f2_sfd__h526521[11] ? 6'd13 : - (f2_sfd__h526520[10] ? + (f2_sfd__h526521[10] ? 6'd14 : - (f2_sfd__h526520[9] ? + (f2_sfd__h526521[9] ? 6'd15 : - (f2_sfd__h526520[8] ? + (f2_sfd__h526521[8] ? 6'd16 : - (f2_sfd__h526520[7] ? + (f2_sfd__h526521[7] ? 6'd17 : - (f2_sfd__h526520[6] ? + (f2_sfd__h526521[6] ? 6'd18 : - (f2_sfd__h526520[5] ? + (f2_sfd__h526521[5] ? 6'd19 : - (f2_sfd__h526520[4] ? + (f2_sfd__h526521[4] ? 6'd20 : - (f2_sfd__h526520[3] ? + (f2_sfd__h526521[3] ? 6'd21 : - (f2_sfd__h526520[2] ? + (f2_sfd__h526521[2] ? 6'd22 : - (f2_sfd__h526520[1] ? + (f2_sfd__h526521[1] ? 6'd23 : - (f2_sfd__h526520[0] ? + (f2_sfd__h526521[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10585 = - (f2_exp__h526519 == 8'd255 && f2_sfd__h526520 != 23'd0 || - (f2_exp__h526519 == 8'd255 || f2_exp__h526519 == 8'd0) && - f2_sfd__h526520 == 23'd0) ? + (f2_exp__h526520 == 8'd255 && f2_sfd__h526521 != 23'd0 || + (f2_exp__h526520 == 8'd255 || f2_exp__h526520 == 8'd0) && + f2_sfd__h526521 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - ((f2_exp__h526519 == 8'd0) ? + ((f2_exp__h526520 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10240 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10583) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 = - (f2_exp__h526519 == 8'd255 && f2_sfd__h526520 != 23'd0) ? - _theResult___snd_fst_sfd__h526835 : - _theResult___fst_sfd__h564975 ; + (f2_exp__h526520 == 8'd255 && f2_sfd__h526521 != 23'd0) ? + _theResult___snd_fst_sfd__h526836 : + _theResult___fst_sfd__h564976 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10763 = - { (f2_exp__h526519 == 8'd255) ? + { (f2_exp__h526520 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h564971, + _theResult___fst_exp__h564972, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10817 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != @@ -19798,15 +19798,15 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10789) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10816 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10818 = - (f2_exp__h526519 == 8'd255 && f2_sfd__h526520 != 23'd0 || - (f2_exp__h526519 == 8'd255 || f2_exp__h526519 == 8'd0) && - f2_sfd__h526520 == 23'd0) ? + (f2_exp__h526520 == 8'd255 && f2_sfd__h526521 != 23'd0 || + (f2_exp__h526520 == 8'd255 || f2_exp__h526520 == 8'd0) && + f2_sfd__h526521 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10817 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10873 = - (f1_exp__h487525 == 8'd0) ? + (f1_exp__h487526 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852[4] : @@ -19814,7 +19814,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10914 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893[4] : @@ -19822,7 +19822,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10958 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937[4] : @@ -19830,7 +19830,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973 = - (f1_exp__h487525 == 8'd0) ? + (f1_exp__h487526 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852[3] : @@ -19838,7 +19838,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10983 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893[3] : @@ -19846,7 +19846,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10994 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937[3] : @@ -19854,208 +19854,208 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11013 = - (f1_exp__h487525 == 8'd0) ? + (f1_exp__h487526 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11011 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11027 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11025 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11042 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11040 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11059 = - (f1_exp__h487525 == 8'd0) ? + (f1_exp__h487526 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11057 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11071 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11069 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11084 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11082 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11101 = - (f1_exp__h487525 == 8'd0) ? + (f1_exp__h487526 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11099 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11113 = - (f2_exp__h526519 == 8'd0) ? + (f2_exp__h526520 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11111 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11126 = - (f3_exp__h565823 == 8'd0) ? + (f3_exp__h565824 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11124 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8694 = - ((f1_exp__h487525 == 8'd0) ? - (f1_sfd__h487526[22] ? + ((f1_exp__h487526 == 8'd0) ? + (f1_sfd__h487527[22] ? 6'd2 : - (f1_sfd__h487526[21] ? + (f1_sfd__h487527[21] ? 6'd3 : - (f1_sfd__h487526[20] ? + (f1_sfd__h487527[20] ? 6'd4 : - (f1_sfd__h487526[19] ? + (f1_sfd__h487527[19] ? 6'd5 : - (f1_sfd__h487526[18] ? + (f1_sfd__h487527[18] ? 6'd6 : - (f1_sfd__h487526[17] ? + (f1_sfd__h487527[17] ? 6'd7 : - (f1_sfd__h487526[16] ? + (f1_sfd__h487527[16] ? 6'd8 : - (f1_sfd__h487526[15] ? + (f1_sfd__h487527[15] ? 6'd9 : - (f1_sfd__h487526[14] ? + (f1_sfd__h487527[14] ? 6'd10 : - (f1_sfd__h487526[13] ? + (f1_sfd__h487527[13] ? 6'd11 : - (f1_sfd__h487526[12] ? + (f1_sfd__h487527[12] ? 6'd12 : - (f1_sfd__h487526[11] ? + (f1_sfd__h487527[11] ? 6'd13 : - (f1_sfd__h487526[10] ? + (f1_sfd__h487527[10] ? 6'd14 : - (f1_sfd__h487526[9] ? + (f1_sfd__h487527[9] ? 6'd15 : - (f1_sfd__h487526[8] ? + (f1_sfd__h487527[8] ? 6'd16 : - (f1_sfd__h487526[7] ? + (f1_sfd__h487527[7] ? 6'd17 : - (f1_sfd__h487526[6] ? + (f1_sfd__h487527[6] ? 6'd18 : - (f1_sfd__h487526[5] ? + (f1_sfd__h487527[5] ? 6'd19 : - (f1_sfd__h487526[4] ? + (f1_sfd__h487527[4] ? 6'd20 : - (f1_sfd__h487526[3] ? + (f1_sfd__h487527[3] ? 6'd21 : - (f1_sfd__h487526[2] ? + (f1_sfd__h487527[2] ? 6'd22 : - (f1_sfd__h487526[1] ? + (f1_sfd__h487527[1] ? 6'd23 : - (f1_sfd__h487526[0] ? + (f1_sfd__h487527[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9100 = - (f1_exp__h487525 == 8'd255 && f1_sfd__h487526 != 23'd0 || - (f1_exp__h487525 == 8'd255 || f1_exp__h487525 == 8'd0) && - f1_sfd__h487526 == 23'd0) ? + (f1_exp__h487526 == 8'd255 && f1_sfd__h487527 != 23'd0 || + (f1_exp__h487526 == 8'd255 || f1_exp__h487526 == 8'd0) && + f1_sfd__h487527 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - ((f1_exp__h487525 == 8'd0) ? + ((f1_exp__h487526 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8755 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9098) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9283 = - (f1_exp__h487525 == 8'd255 && f1_sfd__h487526 != 23'd0) ? - _theResult___snd_fst_sfd__h487841 : - _theResult___fst_sfd__h526122 ; + (f1_exp__h487526 == 8'd255 && f1_sfd__h487527 != 23'd0) ? + _theResult___snd_fst_sfd__h487842 : + _theResult___fst_sfd__h526123 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9284 = { IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9100, - (f1_exp__h487525 == 8'd255) ? + (f1_exp__h487526 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h526118, + _theResult___fst_exp__h526119, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9283 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9424 = - ((f3_exp__h565823 == 8'd0) ? - (f3_sfd__h565824[22] ? + ((f3_exp__h565824 == 8'd0) ? + (f3_sfd__h565825[22] ? 6'd2 : - (f3_sfd__h565824[21] ? + (f3_sfd__h565825[21] ? 6'd3 : - (f3_sfd__h565824[20] ? + (f3_sfd__h565825[20] ? 6'd4 : - (f3_sfd__h565824[19] ? + (f3_sfd__h565825[19] ? 6'd5 : - (f3_sfd__h565824[18] ? + (f3_sfd__h565825[18] ? 6'd6 : - (f3_sfd__h565824[17] ? + (f3_sfd__h565825[17] ? 6'd7 : - (f3_sfd__h565824[16] ? + (f3_sfd__h565825[16] ? 6'd8 : - (f3_sfd__h565824[15] ? + (f3_sfd__h565825[15] ? 6'd9 : - (f3_sfd__h565824[14] ? + (f3_sfd__h565825[14] ? 6'd10 : - (f3_sfd__h565824[13] ? + (f3_sfd__h565825[13] ? 6'd11 : - (f3_sfd__h565824[12] ? + (f3_sfd__h565825[12] ? 6'd12 : - (f3_sfd__h565824[11] ? + (f3_sfd__h565825[11] ? 6'd13 : - (f3_sfd__h565824[10] ? + (f3_sfd__h565825[10] ? 6'd14 : - (f3_sfd__h565824[9] ? + (f3_sfd__h565825[9] ? 6'd15 : - (f3_sfd__h565824[8] ? + (f3_sfd__h565825[8] ? 6'd16 : - (f3_sfd__h565824[7] ? + (f3_sfd__h565825[7] ? 6'd17 : - (f3_sfd__h565824[6] ? + (f3_sfd__h565825[6] ? 6'd18 : - (f3_sfd__h565824[5] ? + (f3_sfd__h565825[5] ? 6'd19 : - (f3_sfd__h565824[4] ? + (f3_sfd__h565825[4] ? 6'd20 : - (f3_sfd__h565824[3] ? + (f3_sfd__h565825[3] ? 6'd21 : - (f3_sfd__h565824[2] ? + (f3_sfd__h565825[2] ? 6'd22 : - (f3_sfd__h565824[1] ? + (f3_sfd__h565825[1] ? 6'd23 : - (f3_sfd__h565824[0] ? + (f3_sfd__h565825[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9815 = - (f3_exp__h565823 == 8'd255 && f3_sfd__h565824 != 23'd0 || - (f3_exp__h565823 == 8'd255 || f3_exp__h565823 == 8'd0) && - f3_sfd__h565824 == 23'd0) ? + (f3_exp__h565824 == 8'd255 && f3_sfd__h565825 != 23'd0 || + (f3_exp__h565824 == 8'd255 || f3_exp__h565824 == 8'd0) && + f3_sfd__h565825 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - ((f3_exp__h565823 == 8'd0) ? + ((f3_exp__h565824 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9470 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9813) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9992 = - (f3_exp__h565823 == 8'd255 && f3_sfd__h565824 != 23'd0) ? - _theResult___snd_fst_sfd__h566139 : - _theResult___fst_sfd__h604279 ; + (f3_exp__h565824 == 8'd255 && f3_sfd__h565825 != 23'd0) ? + _theResult___snd_fst_sfd__h566140 : + _theResult___fst_sfd__h604280 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9993 = - { (f3_exp__h565823 == 8'd255) ? + { (f3_exp__h565824 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h604275, + _theResult___fst_exp__h604276, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9992 } ; assign IF_IF_coreFix_memExe_dTlb_procResp__740_BIT_11_ETC___d1875 = IF_coreFix_memExe_dTlb_procResp__740_BIT_110_7_ETC___d1864 ? @@ -20261,7 +20261,7 @@ module mkCore(CLK, assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10240 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 || - _theResult___fst_exp__h545766 == 11'd2047) ? + _theResult___fst_exp__h545767 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -20269,12 +20269,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37805_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 : + CASE_guard37806_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q186) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8755 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 || - _theResult___fst_exp__h506913 == 11'd2047) ? + _theResult___fst_exp__h506914 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -20282,12 +20282,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98952_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 : + CASE_guard98953_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q138) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9470 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 || - _theResult___fst_exp__h585070 == 11'd2047) ? + _theResult___fst_exp__h585071 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -20295,7 +20295,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard77109_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 : + CASE_guard77110_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q155) ; assign IF_NOT_IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3__ETC___d13368 = IF_IF_NOT_csrf_prv_reg_read__2956_EQ_3_2957_29_ETC___d12992[0] ? @@ -20779,48 +20779,48 @@ module mkCore(CLK, assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11011 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869[2] : - _theResult___fst_exp__h526106 == 11'd2047 && - _theResult___fst_sfd__h526107 == 52'd0 ; + _theResult___fst_exp__h526107 == 11'd2047 && + _theResult___fst_sfd__h526108 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11025 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910[2] : - _theResult___fst_exp__h564959 == 11'd2047 && - _theResult___fst_sfd__h564960 == 52'd0 ; + _theResult___fst_exp__h564960 == 11'd2047 && + _theResult___fst_sfd__h564961 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11040 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954[2] : - _theResult___fst_exp__h604263 == 11'd2047 && - _theResult___fst_sfd__h604264 == 52'd0 ; + _theResult___fst_exp__h604264 == 11'd2047 && + _theResult___fst_sfd__h604265 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11057 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869[1] : - _theResult___fst_exp__h525323 == 11'd0 && - guard__h517333 != 2'b0 ; + _theResult___fst_exp__h525324 == 11'd0 && + guard__h517334 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11069 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910[1] : - _theResult___fst_exp__h564176 == 11'd0 && - guard__h556186 != 2'b0 ; + _theResult___fst_exp__h564177 == 11'd0 && + guard__h556187 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11082 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954[1] : - _theResult___fst_exp__h603480 == 11'd0 && - guard__h595490 != 2'b0 ; + _theResult___fst_exp__h603481 == 11'd0 && + guard__h595491 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11099 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869[0] : - _theResult___fst_exp__h525323 != 11'd2047 && - guard__h517333 != 2'b0 ; + _theResult___fst_exp__h525324 != 11'd2047 && + guard__h517334 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11111 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910[0] : - _theResult___fst_exp__h564176 != 11'd2047 && - guard__h556186 != 2'b0 ; + _theResult___fst_exp__h564177 != 11'd2047 && + guard__h556187 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11124 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954[0] : - _theResult___fst_exp__h603480 != 11'd2047 && - guard__h595490 != 2'b0 ; + _theResult___fst_exp__h603481 != 11'd2047 && + guard__h595491 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9057 = ((SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q129[10:0] == 11'd0) ? @@ -20860,35 +20860,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5195 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? - ((_theResult___fst_exp__h376611 == 8'd255) ? + ((_theResult___fst_exp__h376612 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5180) : - ((_theResult___fst_exp__h385296 == 8'd255) ? + ((_theResult___fst_exp__h385297 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5193) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5232 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? - ((_theResult___fst_exp__h376611 == 8'd255) ? + ((_theResult___fst_exp__h376612 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5223) : - ((_theResult___fst_exp__h385296 == 8'd255) ? + ((_theResult___fst_exp__h385297 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5230) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5323 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5294[2] : - _theResult___fst_exp__h385844 == 8'd255 && - _theResult___fst_sfd__h385845 == 23'd0 ; + _theResult___fst_exp__h385845 == 8'd255 && + _theResult___fst_sfd__h385846 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5336 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5294[1] : - _theResult___fst_exp__h385296 == 8'd0 && - guard__h377219 != 2'b0 ; + _theResult___fst_exp__h385297 == 8'd0 && + guard__h377220 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5349 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5294[0] : - _theResult___fst_exp__h385296 != 8'd255 && - guard__h377219 != 2'b0 ; + _theResult___fst_exp__h385297 != 8'd255 && + guard__h377220 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6360 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q65[7:0] == 8'd0) ? @@ -20898,35 +20898,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6587 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? - ((_theResult___fst_exp__h422308 == 8'd255) ? + ((_theResult___fst_exp__h422309 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6572) : - ((_theResult___fst_exp__h430993 == 8'd255) ? + ((_theResult___fst_exp__h430994 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6585) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6624 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? - ((_theResult___fst_exp__h422308 == 8'd255) ? + ((_theResult___fst_exp__h422309 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6615) : - ((_theResult___fst_exp__h430993 == 8'd255) ? + ((_theResult___fst_exp__h430994 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6622) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6715 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6686[2] : - _theResult___fst_exp__h431541 == 8'd255 && - _theResult___fst_sfd__h431542 == 23'd0 ; + _theResult___fst_exp__h431542 == 8'd255 && + _theResult___fst_sfd__h431543 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6728 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6686[1] : - _theResult___fst_exp__h430993 == 8'd0 && - guard__h422916 != 2'b0 ; + _theResult___fst_exp__h430994 == 8'd0 && + guard__h422917 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6741 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6686[0] : - _theResult___fst_exp__h430993 != 8'd255 && - guard__h422916 != 2'b0 ; + _theResult___fst_exp__h430994 != 8'd255 && + guard__h422917 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7752 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q100[7:0] == 8'd0) ? @@ -20936,35 +20936,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7979 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? - ((_theResult___fst_exp__h468003 == 8'd255) ? + ((_theResult___fst_exp__h468004 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7964) : - ((_theResult___fst_exp__h476688 == 8'd255) ? + ((_theResult___fst_exp__h476689 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7977) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8016 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? - ((_theResult___fst_exp__h468003 == 8'd255) ? + ((_theResult___fst_exp__h468004 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8007) : - ((_theResult___fst_exp__h476688 == 8'd255) ? + ((_theResult___fst_exp__h476689 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8014) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8107 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8078[2] : - _theResult___fst_exp__h477236 == 8'd255 && - _theResult___fst_sfd__h477237 == 23'd0 ; + _theResult___fst_exp__h477237 == 8'd255 && + _theResult___fst_sfd__h477238 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8120 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8078[1] : - _theResult___fst_exp__h476688 == 8'd0 && - guard__h468611 != 2'b0 ; + _theResult___fst_exp__h476689 == 8'd0 && + guard__h468612 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8133 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8078[0] : - _theResult___fst_exp__h476688 != 8'd255 && - guard__h468611 != 2'b0 ; + _theResult___fst_exp__h476689 != 8'd255 && + guard__h468612 != 2'b0 ; assign IF_checkForException_3160_BIT_4_3161_THEN_IF_c_ETC___d13295 = checkForException___d13160[4] ? CASE_checkForException_3160_BITS_3_TO_0_0_chec_ETC__q226 : @@ -21622,8 +21622,8 @@ module mkCore(CLK, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9993 } ; assign IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12869 = coreFix_globalSpecUpdate_correctSpecTag_1$whas ? - result__h653732 : - w__h653727 ; + result__h653733 : + w__h653728 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2112 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == 3'd3 && @@ -21645,39 +21645,39 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2226 = { (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd7) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd6) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd5) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd4) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2231 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2226, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd3) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd2) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2236 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2231, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd1) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd0) ? - n___1__h201748 : + n___1__h201749 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2549 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == @@ -21730,7 +21730,7 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2595 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == 3'd2) ? - x__h200345 : + x__h200346 : (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEh_ETC___d2178 ? 64'd0 : 64'd1) ; @@ -21742,7 +21742,7 @@ module mkCore(CLK, WILL_FIRE_RL_coreFix_memExe_dMem_cache_m_banks_0_cRqTransfer_retry || coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3154 = - _theResult_____2__h301170 == v__h300590 ; + _theResult_____2__h301171 == v__h300591 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3234 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -21751,7 +21751,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_lat_0$whas || coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3256 = - _theResult_____2__h309166 == v__h303935 ; + _theResult_____2__h309167 == v__h303936 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3276 = EN_dCacheToParent_fromP_enq ? !coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -21780,7 +21780,7 @@ module mkCore(CLK, EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[514:3] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[514:3], - x__h306800 } ; + x__h306801 } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_linkAdd_ETC___d3100 = !MUX_flush_reservation$write_1__SEL_1 && (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_lat_0$whas ? @@ -21878,35 +21878,35 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2023 = { (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd7) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd6) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd5) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2028 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2023, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd4) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd3) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2033 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2028, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd2) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd1) ? - n__h196840 : + n__h196841 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2882 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? @@ -21934,7 +21934,7 @@ module mkCore(CLK, EN_dCacheToParent_rqToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3428 = - _theResult_____2__h315160 == v__h314449 ; + _theResult_____2__h315161 == v__h314450 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3501 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -21943,7 +21943,7 @@ module mkCore(CLK, EN_dCacheToParent_rsToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3524 = - _theResult_____2__h323014 == v__h318325 ; + _theResult_____2__h323015 == v__h318326 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3543 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -22095,7 +22095,7 @@ module mkCore(CLK, !coreFix_aluExe_0_bypassWire_1$whas || coreFix_memExe_dispToRegQ$RDY_first ; assign IF_coreFix_memExe_forwardQ_deqReq_dummy2_2_rea_ETC___d3846 = - _theResult_____2__h336583 == v__h336151 ; + _theResult_____2__h336584 == v__h336152 ; assign IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3839 = WILL_FIRE_RL_coreFix_memExe_doRespLdForward || coreFix_memExe_forwardQ_deqReq_rl ; @@ -22144,7 +22144,7 @@ module mkCore(CLK, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_31_TO_0_ETC___d1408 }) : IF_coreFix_memExe_lsq_firstLd__285_BIT_94_360__ETC___d1434 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_dummy2_2_r_ETC___d3752 = - _theResult_____2__h333358 == v__h332926 ; + _theResult_____2__h333359 == v__h332927 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3745 = WILL_FIRE_RL_coreFix_memExe_doRespLdMem || coreFix_memExe_memRespLdQ_deqReq_rl ; @@ -22284,60 +22284,60 @@ module mkCore(CLK, mmio_pRsQ_enqReq_rl[67] ; assign IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15095 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_snd_snd__h722001 : + y_avValue_snd_snd_snd_snd_snd__h722002 : 64'd0 ; assign IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15184 = - rob$deqPort_0_canDeq ? y_avValue_fst__h721561 : 5'd0 ; + rob$deqPort_0_canDeq ? y_avValue_fst__h721562 : 5'd0 ; assign IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15205 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_fst__h721995 : + y_avValue_snd_snd_snd_fst__h721996 : 2'd0 ; assign IF_rob_deqPort_1_canDeq__4990_THEN_IF_NOT_rob__ETC___d15197 = rob$deqPort_1_canDeq ? IF_NOT_rob_deqPort_1_deq_data__4993_BIT_25_499_ETC___d15196 : rob$deqPort_0_canDeq && rob$deqPort_0_deq_data[26] ; - assign IF_sfdin04536_BIT_33_THEN_2_ELSE_0__q57 = - sfdin__h404536[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin16484_BIT_4_THEN_2_ELSE_0__q131 = - sfdin__h516484[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin22302_BIT_33_THEN_2_ELSE_0__q67 = - sfdin__h422302[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin50231_BIT_33_THEN_2_ELSE_0__q92 = - sfdin__h450231[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin55337_BIT_4_THEN_2_ELSE_0__q171 = - sfdin__h555337[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin58839_BIT_33_THEN_2_ELSE_0__q22 = - sfdin__h358839[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin67997_BIT_33_THEN_2_ELSE_0__q102 = - sfdin__h467997[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin76605_BIT_33_THEN_2_ELSE_0__q32 = - sfdin__h376605[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin94641_BIT_4_THEN_2_ELSE_0__q148 = - sfdin__h594641[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd03426_BIT_4_THEN_2_ELSE_0__q151 = - _theResult___snd__h603426[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd06864_BIT_4_THEN_2_ELSE_0__q127 = - _theResult___snd__h506864[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd13149_BIT_33_THEN_2_ELSE_0__q59 = - _theResult___snd__h413149[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd25269_BIT_4_THEN_2_ELSE_0__q134 = - _theResult___snd__h525269[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd30939_BIT_33_THEN_2_ELSE_0__q72 = - _theResult___snd__h430939[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd45717_BIT_4_THEN_2_ELSE_0__q167 = - _theResult___snd__h545717[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd58844_BIT_33_THEN_2_ELSE_0__q94 = - _theResult___snd__h458844[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd64122_BIT_4_THEN_2_ELSE_0__q174 = - _theResult___snd__h564122[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd67452_BIT_33_THEN_2_ELSE_0__q24 = - _theResult___snd__h367452[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd76634_BIT_33_THEN_2_ELSE_0__q107 = - _theResult___snd__h476634[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd85021_BIT_4_THEN_2_ELSE_0__q144 = - _theResult___snd__h585021[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd85242_BIT_33_THEN_2_ELSE_0__q37 = - _theResult___snd__h385242[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin04537_BIT_33_THEN_2_ELSE_0__q57 = + sfdin__h404537[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin16485_BIT_4_THEN_2_ELSE_0__q131 = + sfdin__h516485[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin22303_BIT_33_THEN_2_ELSE_0__q67 = + sfdin__h422303[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin50232_BIT_33_THEN_2_ELSE_0__q92 = + sfdin__h450232[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin55338_BIT_4_THEN_2_ELSE_0__q171 = + sfdin__h555338[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin58840_BIT_33_THEN_2_ELSE_0__q22 = + sfdin__h358840[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin67998_BIT_33_THEN_2_ELSE_0__q102 = + sfdin__h467998[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin76606_BIT_33_THEN_2_ELSE_0__q32 = + sfdin__h376606[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin94642_BIT_4_THEN_2_ELSE_0__q148 = + sfdin__h594642[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd03427_BIT_4_THEN_2_ELSE_0__q151 = + _theResult___snd__h603427[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd06865_BIT_4_THEN_2_ELSE_0__q127 = + _theResult___snd__h506865[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd13150_BIT_33_THEN_2_ELSE_0__q59 = + _theResult___snd__h413150[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd25270_BIT_4_THEN_2_ELSE_0__q134 = + _theResult___snd__h525270[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd30940_BIT_33_THEN_2_ELSE_0__q72 = + _theResult___snd__h430940[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd45718_BIT_4_THEN_2_ELSE_0__q167 = + _theResult___snd__h545718[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd58845_BIT_33_THEN_2_ELSE_0__q94 = + _theResult___snd__h458845[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd64123_BIT_4_THEN_2_ELSE_0__q174 = + _theResult___snd__h564123[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd67453_BIT_33_THEN_2_ELSE_0__q24 = + _theResult___snd__h367453[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd76635_BIT_33_THEN_2_ELSE_0__q107 = + _theResult___snd__h476635[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd85022_BIT_4_THEN_2_ELSE_0__q144 = + _theResult___snd__h585022[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd85243_BIT_33_THEN_2_ELSE_0__q37 = + _theResult___snd__h385243[33] ? 2'd2 : 2'd0 ; assign NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5317 = !_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4108 || (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4109 ? @@ -22417,133 +22417,133 @@ module mkCore(CLK, !checkForException___d13792[4] && NOT_csrf_fs_reg_read__1726_EQ_0_3149_3150_OR_N_ETC___d13817 ; assign NOT_IF_NOT_rob_deqPort_0_canDeq__4986_4987_OR__ETC___d15202 = - (fflags__h722584 & csrf_fflags_reg) != fflags__h722584 || - !r__h619419 && + (fflags__h722585 & csrf_fflags_reg) != fflags__h722585 || + !r__h619420 && (IF_rob_deqPort_1_canDeq__4990_THEN_IF_NOT_rob__ETC___d15197 || - fflags__h722584 != 5'd0) ; + fflags__h722585 != 5'd0) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10167 = - !f2_sfd__h526520[21] && !f2_sfd__h526520[20] && - !f2_sfd__h526520[19] && - !f2_sfd__h526520[18] && - !f2_sfd__h526520[17] && - !f2_sfd__h526520[16] && - !f2_sfd__h526520[15] && - !f2_sfd__h526520[14] && - !f2_sfd__h526520[13] && - !f2_sfd__h526520[12] && - !f2_sfd__h526520[11] && - !f2_sfd__h526520[10] && - !f2_sfd__h526520[9] && - !f2_sfd__h526520[8] && - !f2_sfd__h526520[7] && - !f2_sfd__h526520[6] && - !f2_sfd__h526520[5] && - !f2_sfd__h526520[4] && - !f2_sfd__h526520[3] && - !f2_sfd__h526520[2] && - !f2_sfd__h526520[1] && - !f2_sfd__h526520[0] ; + !f2_sfd__h526521[21] && !f2_sfd__h526521[20] && + !f2_sfd__h526521[19] && + !f2_sfd__h526521[18] && + !f2_sfd__h526521[17] && + !f2_sfd__h526521[16] && + !f2_sfd__h526521[15] && + !f2_sfd__h526521[14] && + !f2_sfd__h526521[13] && + !f2_sfd__h526521[12] && + !f2_sfd__h526521[11] && + !f2_sfd__h526521[10] && + !f2_sfd__h526521[9] && + !f2_sfd__h526521[8] && + !f2_sfd__h526521[7] && + !f2_sfd__h526521[6] && + !f2_sfd__h526521[5] && + !f2_sfd__h526521[4] && + !f2_sfd__h526521[3] && + !f2_sfd__h526521[2] && + !f2_sfd__h526521[1] && + !f2_sfd__h526521[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 = - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 == 23'd0) && - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 != 23'd0) && - (f1_exp__h487525 != 8'd0 || f1_sfd__h487526 != 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 == 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 != 23'd0) && + (f1_exp__h487526 != 8'd0 || f1_sfd__h487527 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10873 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10918 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 | - ((f2_exp__h526519 != 8'd255 || f2_sfd__h526520 == 23'd0) && - (f2_exp__h526519 != 8'd255 || f2_sfd__h526520 != 23'd0) && - (f2_exp__h526519 != 8'd0 || f2_sfd__h526520 != 23'd0) && + ((f2_exp__h526520 != 8'd255 || f2_sfd__h526521 == 23'd0) && + (f2_exp__h526520 != 8'd255 || f2_sfd__h526521 != 23'd0) && + (f2_exp__h526520 != 8'd0 || f2_sfd__h526521 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10914) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10976 = - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 == 23'd0) && - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 != 23'd0) && - (f1_exp__h487525 != 8'd0 || f1_sfd__h487526 != 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 == 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 != 23'd0) && + (f1_exp__h487526 != 8'd0 || f1_sfd__h487527 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10987 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10976 | - ((f2_exp__h526519 != 8'd255 || f2_sfd__h526520 == 23'd0) && - (f2_exp__h526519 != 8'd255 || f2_sfd__h526520 != 23'd0) && - (f2_exp__h526519 != 8'd0 || f2_sfd__h526520 != 23'd0) && + ((f2_exp__h526520 != 8'd255 || f2_sfd__h526521 == 23'd0) && + (f2_exp__h526520 != 8'd255 || f2_sfd__h526521 != 23'd0) && + (f2_exp__h526520 != 8'd0 || f2_sfd__h526521 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10983) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11016 = - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 == 23'd0) && - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 != 23'd0) && - (f1_exp__h487525 != 8'd0 || f1_sfd__h487526 != 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 == 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 != 23'd0) && + (f1_exp__h487526 != 8'd0 || f1_sfd__h487527 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11013 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11031 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11016 | - ((f2_exp__h526519 != 8'd255 || f2_sfd__h526520 == 23'd0) && - (f2_exp__h526519 != 8'd255 || f2_sfd__h526520 != 23'd0) && - (f2_exp__h526519 != 8'd0 || f2_sfd__h526520 != 23'd0) && + ((f2_exp__h526520 != 8'd255 || f2_sfd__h526521 == 23'd0) && + (f2_exp__h526520 != 8'd255 || f2_sfd__h526521 != 23'd0) && + (f2_exp__h526520 != 8'd0 || f2_sfd__h526521 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11027) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11062 = - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 == 23'd0) && - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 != 23'd0) && - (f1_exp__h487525 != 8'd0 || f1_sfd__h487526 != 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 == 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 != 23'd0) && + (f1_exp__h487526 != 8'd0 || f1_sfd__h487527 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11059 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11075 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11062 | - ((f2_exp__h526519 != 8'd255 || f2_sfd__h526520 == 23'd0) && - (f2_exp__h526519 != 8'd255 || f2_sfd__h526520 != 23'd0) && - (f2_exp__h526519 != 8'd0 || f2_sfd__h526520 != 23'd0) && + ((f2_exp__h526520 != 8'd255 || f2_sfd__h526521 == 23'd0) && + (f2_exp__h526520 != 8'd255 || f2_sfd__h526521 != 23'd0) && + (f2_exp__h526520 != 8'd0 || f2_sfd__h526521 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11071) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11104 = - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 == 23'd0) && - (f1_exp__h487525 != 8'd255 || f1_sfd__h487526 != 23'd0) && - (f1_exp__h487525 != 8'd0 || f1_sfd__h487526 != 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 == 23'd0) && + (f1_exp__h487526 != 8'd255 || f1_sfd__h487527 != 23'd0) && + (f1_exp__h487526 != 8'd0 || f1_sfd__h487527 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11101 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11117 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11104 | - ((f2_exp__h526519 != 8'd255 || f2_sfd__h526520 == 23'd0) && - (f2_exp__h526519 != 8'd255 || f2_sfd__h526520 != 23'd0) && - (f2_exp__h526519 != 8'd0 || f2_sfd__h526520 != 23'd0) && + ((f2_exp__h526520 != 8'd255 || f2_sfd__h526521 == 23'd0) && + (f2_exp__h526520 != 8'd255 || f2_sfd__h526521 != 23'd0) && + (f2_exp__h526520 != 8'd0 || f2_sfd__h526521 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11113) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8667 = - !f1_sfd__h487526[21] && !f1_sfd__h487526[20] && - !f1_sfd__h487526[19] && - !f1_sfd__h487526[18] && - !f1_sfd__h487526[17] && - !f1_sfd__h487526[16] && - !f1_sfd__h487526[15] && - !f1_sfd__h487526[14] && - !f1_sfd__h487526[13] && - !f1_sfd__h487526[12] && - !f1_sfd__h487526[11] && - !f1_sfd__h487526[10] && - !f1_sfd__h487526[9] && - !f1_sfd__h487526[8] && - !f1_sfd__h487526[7] && - !f1_sfd__h487526[6] && - !f1_sfd__h487526[5] && - !f1_sfd__h487526[4] && - !f1_sfd__h487526[3] && - !f1_sfd__h487526[2] && - !f1_sfd__h487526[1] && - !f1_sfd__h487526[0] ; + !f1_sfd__h487527[21] && !f1_sfd__h487527[20] && + !f1_sfd__h487527[19] && + !f1_sfd__h487527[18] && + !f1_sfd__h487527[17] && + !f1_sfd__h487527[16] && + !f1_sfd__h487527[15] && + !f1_sfd__h487527[14] && + !f1_sfd__h487527[13] && + !f1_sfd__h487527[12] && + !f1_sfd__h487527[11] && + !f1_sfd__h487527[10] && + !f1_sfd__h487527[9] && + !f1_sfd__h487527[8] && + !f1_sfd__h487527[7] && + !f1_sfd__h487527[6] && + !f1_sfd__h487527[5] && + !f1_sfd__h487527[4] && + !f1_sfd__h487527[3] && + !f1_sfd__h487527[2] && + !f1_sfd__h487527[1] && + !f1_sfd__h487527[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9397 = - !f3_sfd__h565824[21] && !f3_sfd__h565824[20] && - !f3_sfd__h565824[19] && - !f3_sfd__h565824[18] && - !f3_sfd__h565824[17] && - !f3_sfd__h565824[16] && - !f3_sfd__h565824[15] && - !f3_sfd__h565824[14] && - !f3_sfd__h565824[13] && - !f3_sfd__h565824[12] && - !f3_sfd__h565824[11] && - !f3_sfd__h565824[10] && - !f3_sfd__h565824[9] && - !f3_sfd__h565824[8] && - !f3_sfd__h565824[7] && - !f3_sfd__h565824[6] && - !f3_sfd__h565824[5] && - !f3_sfd__h565824[4] && - !f3_sfd__h565824[3] && - !f3_sfd__h565824[2] && - !f3_sfd__h565824[1] && - !f3_sfd__h565824[0] ; + !f3_sfd__h565825[21] && !f3_sfd__h565825[20] && + !f3_sfd__h565825[19] && + !f3_sfd__h565825[18] && + !f3_sfd__h565825[17] && + !f3_sfd__h565825[16] && + !f3_sfd__h565825[15] && + !f3_sfd__h565825[14] && + !f3_sfd__h565825[13] && + !f3_sfd__h565825[12] && + !f3_sfd__h565825[11] && + !f3_sfd__h565825[10] && + !f3_sfd__h565825[9] && + !f3_sfd__h565825[8] && + !f3_sfd__h565825[7] && + !f3_sfd__h565825[6] && + !f3_sfd__h565825[5] && + !f3_sfd__h565825[4] && + !f3_sfd__h565825[3] && + !f3_sfd__h565825[2] && + !f3_sfd__h565825[1] && + !f3_sfd__h565825[0] ; assign NOT_IF_rob_deqPort_0_deq_data__4451_BITS_97_TO_ETC___d14957 = - next_pc__h718597 != + next_pc__h718598 != rob_deqPort_0_deq_data__4451_BITS_353_TO_290_4_ETC___d14954 ; assign NOT_SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__ETC___d13588 = !SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__354_ETC___d13586 && @@ -23146,7 +23146,7 @@ module mkCore(CLK, (fetchStage$pipelines_0_first[199:195] != 5'd13 || NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13429 && !csrf_prv_reg_read__2956_ULT_IF_fetchStage_pipe_ETC___d13192 && - csr_addr__h661834 != 12'h8FF) ; + csr_addr__h661835 != 12'h8FF) ; assign NOT_csrf_fs_reg_read__1726_EQ_0_3149_3150_OR_N_ETC___d13526 = (csrf_fs_reg != 2'd0 || (!fetchStage$pipelines_0_first[95] || @@ -23276,9 +23276,9 @@ module mkCore(CLK, assign NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13429 = (fetchStage$pipelines_0_first[194:192] != 3'd0 || fetchStage$pipelines_0_first[178:174] != 5'd15) && - rs1__h661835 == 5'd0 && - imm__h661836 == 32'd0 || - csr_addr__h661834[11:10] != 2'b11 ; + rs1__h661836 == 5'd0 && + imm__h661837 == 32'd0 || + csr_addr__h661835[11:10] != 2'b11 ; assign NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13533 = fetchStage$pipelines_0_first[199:195] != 5'd0 && fetchStage$pipelines_0_first[199:195] != 5'd21 && @@ -23343,7 +23343,7 @@ module mkCore(CLK, specTagManager$currentSpecBits } ; assign NOT_fetchStage_pipelines_0_first__2928_BITS_32_ETC___d14192 = fetchStage$pipelines_0_first[323:260] != - fallthrough_pc__h670383 ; + fallthrough_pc__h670384 ; assign NOT_fetchStage_pipelines_0_first__2928_BIT_68__ETC___d13581 = !fetchStage$pipelines_0_first[68] && !checkForException___d13160[4] && @@ -23425,7 +23425,7 @@ module mkCore(CLK, fetchStage$pipelines_1_first[173] ; assign NOT_fetchStage_pipelines_1_first__2937_BITS_32_ETC___d14358 = fetchStage$pipelines_1_first[323:260] != - fallthrough_pc__h686129 ; + fallthrough_pc__h686130 ; assign NOT_fetchStage_pipelines_1_first__2937_BIT_68__ETC___d14301 = !fetchStage$pipelines_1_first[68] && !checkForException___d13792[4] && @@ -23626,7 +23626,7 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q250, !CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q251, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3031, - x__h296160 } ; + x__h296161 } ; assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d15324 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q253, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q254, @@ -23651,8 +23651,8 @@ module mkCore(CLK, !regRenamingTable$rename_1_canRename || fetchStage_pipelines_1_first__2937_BITS_199_TO_ETC___d13889 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10242 = - { {4{f2_exp26519_MINUS_127__q168[7]}}, - f2_exp26519_MINUS_127__q168 } ; + { {4{f2_exp26520_MINUS_127__q168[7]}}, + f2_exp26520_MINUS_127__q168 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10242 ^ 12'h800) <= @@ -23662,12 +23662,12 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11187 = - b__h608519 * b__h608595 ; + b__h608520 * b__h608596 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11200 = - b__h608519 * b__h608708 ; + b__h608520 * b__h608709 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8757 = - { {4{f1_exp87525_MINUS_127__q128[7]}}, - f1_exp87525_MINUS_127__q128 } ; + { {4{f1_exp87526_MINUS_127__q128[7]}}, + f1_exp87526_MINUS_127__q128 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8757 ^ 12'h800) <= @@ -23677,8 +23677,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9472 = - { {4{f3_exp65823_MINUS_127__q145[7]}}, - f3_exp65823_MINUS_127__q145 } ; + { {4{f3_exp65824_MINUS_127__q145[7]}}, + f3_exp65824_MINUS_127__q145 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9472 ^ 12'h800) <= @@ -23763,15 +23763,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5265 = { 3'd0, - _theResult___fst_exp__h358845 == 8'd0 && - (sfdin__h358839[56:34] == 23'd0 || guard__h350744 != 2'b0), + _theResult___fst_exp__h358846 == 8'd0 && + (sfdin__h358840[56:34] == 23'd0 || guard__h350745 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h359442 == 8'd255 && - _theResult___fst_sfd__h359443 == 23'd0, + _theResult___fst_exp__h359443 == 8'd255 && + _theResult___fst_sfd__h359444 == 23'd0, 1'd0, - _theResult___fst_exp__h358845 != 8'd255 && - guard__h350744 != 2'b0 } ; + _theResult___fst_exp__h358846 != 8'd255 && + guard__h350745 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5737 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5735 } ^ @@ -23779,15 +23779,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6657 = { 3'd0, - _theResult___fst_exp__h404542 == 8'd0 && - (sfdin__h404536[56:34] == 23'd0 || guard__h396443 != 2'b0), + _theResult___fst_exp__h404543 == 8'd0 && + (sfdin__h404537[56:34] == 23'd0 || guard__h396444 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h405139 == 8'd255 && - _theResult___fst_sfd__h405140 == 23'd0, + _theResult___fst_exp__h405140 == 8'd255 && + _theResult___fst_sfd__h405141 == 23'd0, 1'd0, - _theResult___fst_exp__h404542 != 8'd255 && - guard__h396443 != 2'b0 } ; + _theResult___fst_exp__h404543 != 8'd255 && + guard__h396444 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7129 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7127 } ^ @@ -23795,15 +23795,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d8049 = { 3'd0, - _theResult___fst_exp__h450237 == 8'd0 && - (sfdin__h450231[56:34] == 23'd0 || guard__h442138 != 2'b0), + _theResult___fst_exp__h450238 == 8'd0 && + (sfdin__h450232[56:34] == 23'd0 || guard__h442139 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h450834 == 8'd255 && - _theResult___fst_sfd__h450835 == 23'd0, + _theResult___fst_exp__h450835 == 8'd255 && + _theResult___fst_sfd__h450836 == 23'd0, 1'd0, - _theResult___fst_exp__h450237 != 8'd255 && - guard__h442138 != 2'b0 } ; + _theResult___fst_exp__h450238 != 8'd255 && + guard__h442139 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10493 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10491 } ^ @@ -23811,37 +23811,37 @@ module mkCore(CLK, 12'd2048 ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10869 = { 3'd0, - _theResult___fst_exp__h516490 == 11'd0 && - (sfdin__h516484[56:5] == 52'd0 || guard__h508264 != 2'b0), + _theResult___fst_exp__h516491 == 11'd0 && + (sfdin__h516485[56:5] == 52'd0 || guard__h508265 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h517322 == 11'd2047 && - _theResult___fst_sfd__h517323 == 52'd0, + _theResult___fst_exp__h517323 == 11'd2047 && + _theResult___fst_sfd__h517324 == 52'd0, 1'd0, - _theResult___fst_exp__h516490 != 11'd2047 && - guard__h508264 != 2'b0 } ; + _theResult___fst_exp__h516491 != 11'd2047 && + guard__h508265 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10910 = { 3'd0, - _theResult___fst_exp__h555343 == 11'd0 && - (sfdin__h555337[56:5] == 52'd0 || guard__h547117 != 2'b0), + _theResult___fst_exp__h555344 == 11'd0 && + (sfdin__h555338[56:5] == 52'd0 || guard__h547118 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h556175 == 11'd2047 && - _theResult___fst_sfd__h556176 == 52'd0, + _theResult___fst_exp__h556176 == 11'd2047 && + _theResult___fst_sfd__h556177 == 52'd0, 1'd0, - _theResult___fst_exp__h555343 != 11'd2047 && - guard__h547117 != 2'b0 } ; + _theResult___fst_exp__h555344 != 11'd2047 && + guard__h547118 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10954 = { 3'd0, - _theResult___fst_exp__h594647 == 11'd0 && - (sfdin__h594641[56:5] == 52'd0 || guard__h586421 != 2'b0), + _theResult___fst_exp__h594648 == 11'd0 && + (sfdin__h594642[56:5] == 52'd0 || guard__h586422 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h595479 == 11'd2047 && - _theResult___fst_sfd__h595480 == 52'd0, + _theResult___fst_exp__h595480 == 11'd2047 && + _theResult___fst_sfd__h595481 == 52'd0, 1'd0, - _theResult___fst_exp__h594647 != 11'd2047 && - guard__h586421 != 2'b0 } ; + _theResult___fst_exp__h594648 != 11'd2047 && + guard__h586422 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9008 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9006 } ^ @@ -23859,15 +23859,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5294 = { 3'd0, - _theResult___fst_exp__h376611 == 8'd0 && - (sfdin__h376605[56:34] == 23'd0 || guard__h368383 != 2'b0), + _theResult___fst_exp__h376612 == 8'd0 && + (sfdin__h376606[56:34] == 23'd0 || guard__h368384 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h377208 == 8'd255 && - _theResult___fst_sfd__h377209 == 23'd0, + _theResult___fst_exp__h377209 == 8'd255 && + _theResult___fst_sfd__h377210 == 23'd0, 1'd0, - _theResult___fst_exp__h376611 != 8'd255 && - guard__h368383 != 2'b0 } ; + _theResult___fst_exp__h376612 != 8'd255 && + guard__h368384 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6288 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6286 } ^ @@ -23875,15 +23875,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6686 = { 3'd0, - _theResult___fst_exp__h422308 == 8'd0 && - (sfdin__h422302[56:34] == 23'd0 || guard__h414080 != 2'b0), + _theResult___fst_exp__h422309 == 8'd0 && + (sfdin__h422303[56:34] == 23'd0 || guard__h414081 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h422905 == 8'd255 && - _theResult___fst_sfd__h422906 == 23'd0, + _theResult___fst_exp__h422906 == 8'd255 && + _theResult___fst_sfd__h422907 == 23'd0, 1'd0, - _theResult___fst_exp__h422308 != 8'd255 && - guard__h414080 != 2'b0 } ; + _theResult___fst_exp__h422309 != 8'd255 && + guard__h414081 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7680 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7678 } ^ @@ -23891,15 +23891,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8078 = { 3'd0, - _theResult___fst_exp__h468003 == 8'd0 && - (sfdin__h467997[56:34] == 23'd0 || guard__h459775 != 2'b0), + _theResult___fst_exp__h468004 == 8'd0 && + (sfdin__h467998[56:34] == 23'd0 || guard__h459776 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h468600 == 8'd255 && - _theResult___fst_sfd__h468601 == 23'd0, + _theResult___fst_exp__h468601 == 8'd255 && + _theResult___fst_sfd__h468602 == 23'd0, 1'd0, - _theResult___fst_exp__h468003 != 8'd255 && - guard__h459775 != 2'b0 } ; + _theResult___fst_exp__h468004 != 8'd255 && + guard__h459776 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10196 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10194 } ^ @@ -23913,37 +23913,37 @@ module mkCore(CLK, 12'h800) ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10852 = { 3'd0, - _theResult___fst_exp__h506913 == 11'd0 && - guard__h498952 != 2'b0, + _theResult___fst_exp__h506914 == 11'd0 && + guard__h498953 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h507671 == 11'd2047 && - _theResult___fst_sfd__h507672 == 52'd0, + _theResult___fst_exp__h507672 == 11'd2047 && + _theResult___fst_sfd__h507673 == 52'd0, 1'd0, - _theResult___fst_exp__h506913 != 11'd2047 && - guard__h498952 != 2'b0 } ; + _theResult___fst_exp__h506914 != 11'd2047 && + guard__h498953 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10893 = { 3'd0, - _theResult___fst_exp__h545766 == 11'd0 && - guard__h537805 != 2'b0, + _theResult___fst_exp__h545767 == 11'd0 && + guard__h537806 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h546524 == 11'd2047 && - _theResult___fst_sfd__h546525 == 52'd0, + _theResult___fst_exp__h546525 == 11'd2047 && + _theResult___fst_sfd__h546526 == 52'd0, 1'd0, - _theResult___fst_exp__h545766 != 11'd2047 && - guard__h537805 != 2'b0 } ; + _theResult___fst_exp__h545767 != 11'd2047 && + guard__h537806 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10937 = { 3'd0, - _theResult___fst_exp__h585070 == 11'd0 && - guard__h577109 != 2'b0, + _theResult___fst_exp__h585071 == 11'd0 && + guard__h577110 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h585828 == 11'd2047 && - _theResult___fst_sfd__h585829 == 52'd0, + _theResult___fst_exp__h585829 == 11'd2047 && + _theResult___fst_sfd__h585830 == 52'd0, 1'd0, - _theResult___fst_exp__h585070 != 11'd2047 && - guard__h577109 != 2'b0 } ; + _theResult___fst_exp__h585071 != 11'd2047 && + guard__h577110 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8696 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8694 } ^ @@ -23979,15 +23979,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5277 = { 3'd0, - _theResult___fst_exp__h367501 == 8'd0 && - guard__h359453 != 2'b0, + _theResult___fst_exp__h367502 == 8'd0 && + guard__h359454 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h368024 == 8'd255 && - _theResult___fst_sfd__h368025 == 23'd0, + _theResult___fst_exp__h368025 == 8'd255 && + _theResult___fst_sfd__h368026 == 23'd0, 1'd0, - _theResult___fst_exp__h367501 != 8'd255 && - guard__h359453 != 2'b0 } ; + _theResult___fst_exp__h367502 != 8'd255 && + guard__h359454 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5968 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5966 } ^ @@ -24001,15 +24001,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6669 = { 3'd0, - _theResult___fst_exp__h413198 == 8'd0 && - guard__h405150 != 2'b0, + _theResult___fst_exp__h413199 == 8'd0 && + guard__h405151 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h413721 == 8'd255 && - _theResult___fst_sfd__h413722 == 23'd0, + _theResult___fst_exp__h413722 == 8'd255 && + _theResult___fst_sfd__h413723 == 23'd0, 1'd0, - _theResult___fst_exp__h413198 != 8'd255 && - guard__h405150 != 2'b0 } ; + _theResult___fst_exp__h413199 != 8'd255 && + guard__h405151 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7360 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7358 } ^ @@ -24023,21 +24023,21 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d8061 = { 3'd0, - _theResult___fst_exp__h458893 == 8'd0 && - guard__h450845 != 2'b0, + _theResult___fst_exp__h458894 == 8'd0 && + guard__h450846 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h459416 == 8'd255 && - _theResult___fst_sfd__h459417 == 23'd0, + _theResult___fst_exp__h459417 == 8'd255 && + _theResult___fst_sfd__h459418 == 23'd0, 1'd0, - _theResult___fst_exp__h458893 != 8'd255 && - guard__h450845 != 2'b0 } ; + _theResult___fst_exp__h458894 != 8'd255 && + guard__h450846 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d11193 = - b__h608696 * b__h608708 ; + b__h608697 * b__h608709 ; assign _0_OR_NOT_fetchStage_pipelines_0_first__2928_BI_ETC___d14009 = (fetchStage$pipelines_0_first[194:192] != 3'd1 || specTagManager$RDY_nextSpecTag) && - CASE_k74091_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 ; + CASE_k74092_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 ; assign _0_OR_NOT_fetchStage_pipelines_1_first__2937_BI_ETC___d14094 = (fetchStage$pipelines_1_first[194:192] != 3'd1 || specTagManager$RDY_nextSpecTag) && @@ -24049,33 +24049,33 @@ module mkCore(CLK, !regRenamingTable$rename_1_canRename || fetchStage_pipelines_1_first__2937_BITS_199_TO_ETC___d13889 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10249 = - sfd__h526881 >> + sfd__h526882 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10245 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8764 = - sfd__h487887 >> + sfd__h487888 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8760 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9479 = - sfd__h566185 >> + sfd__h566186 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9475 ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4654 = - sfd__h343129 >> + sfd__h343130 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4650[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4650) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6046 = - sfd__h388831 >> + sfd__h388832 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6042[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6042) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7438 = - sfd__h434526 >> + sfd__h434527 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7434[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7434) ; assign _0b0_CONCAT_csrf_medeleg_15_reg_read__1825_1826_ETC___d14629 = - medeleg_csr__read__h617226[i__h707772] ; + medeleg_csr__read__h617227[i__h707773] ; assign _0b0_CONCAT_csrf_mideleg_11_reg_read__1833_1834_ETC___d14610 = - mideleg_csr__read__h617321[i__h707932] ; + mideleg_csr__read__h617322[i__h707933] ; assign _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4107 = 12'd3074 - { 6'd0, @@ -24481,51 +24481,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10120 = 12'd3970 - { 7'd0, - f2_sfd__h526520[22] ? + f2_sfd__h526521[22] ? 5'd0 : - (f2_sfd__h526520[21] ? + (f2_sfd__h526521[21] ? 5'd1 : - (f2_sfd__h526520[20] ? + (f2_sfd__h526521[20] ? 5'd2 : - (f2_sfd__h526520[19] ? + (f2_sfd__h526521[19] ? 5'd3 : - (f2_sfd__h526520[18] ? + (f2_sfd__h526521[18] ? 5'd4 : - (f2_sfd__h526520[17] ? + (f2_sfd__h526521[17] ? 5'd5 : - (f2_sfd__h526520[16] ? + (f2_sfd__h526521[16] ? 5'd6 : - (f2_sfd__h526520[15] ? + (f2_sfd__h526521[15] ? 5'd7 : - (f2_sfd__h526520[14] ? + (f2_sfd__h526521[14] ? 5'd8 : - (f2_sfd__h526520[13] ? + (f2_sfd__h526521[13] ? 5'd9 : - (f2_sfd__h526520[12] ? + (f2_sfd__h526521[12] ? 5'd10 : - (f2_sfd__h526520[11] ? + (f2_sfd__h526521[11] ? 5'd11 : - (f2_sfd__h526520[10] ? + (f2_sfd__h526521[10] ? 5'd12 : - (f2_sfd__h526520[9] ? + (f2_sfd__h526521[9] ? 5'd13 : - (f2_sfd__h526520[8] ? + (f2_sfd__h526521[8] ? 5'd14 : - (f2_sfd__h526520[7] ? + (f2_sfd__h526521[7] ? 5'd15 : - (f2_sfd__h526520[6] ? + (f2_sfd__h526521[6] ? 5'd16 : - (f2_sfd__h526520[5] ? + (f2_sfd__h526521[5] ? 5'd17 : - (f2_sfd__h526520[4] ? + (f2_sfd__h526521[4] ? 5'd18 : - (f2_sfd__h526520[3] ? + (f2_sfd__h526521[3] ? 5'd19 : - (f2_sfd__h526520[2] ? + (f2_sfd__h526521[2] ? 5'd20 : - (f2_sfd__h526520[1] ? + (f2_sfd__h526521[1] ? 5'd21 : - (f2_sfd__h526520[0] ? + (f2_sfd__h526521[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 = @@ -24539,51 +24539,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8620 = 12'd3970 - { 7'd0, - f1_sfd__h487526[22] ? + f1_sfd__h487527[22] ? 5'd0 : - (f1_sfd__h487526[21] ? + (f1_sfd__h487527[21] ? 5'd1 : - (f1_sfd__h487526[20] ? + (f1_sfd__h487527[20] ? 5'd2 : - (f1_sfd__h487526[19] ? + (f1_sfd__h487527[19] ? 5'd3 : - (f1_sfd__h487526[18] ? + (f1_sfd__h487527[18] ? 5'd4 : - (f1_sfd__h487526[17] ? + (f1_sfd__h487527[17] ? 5'd5 : - (f1_sfd__h487526[16] ? + (f1_sfd__h487527[16] ? 5'd6 : - (f1_sfd__h487526[15] ? + (f1_sfd__h487527[15] ? 5'd7 : - (f1_sfd__h487526[14] ? + (f1_sfd__h487527[14] ? 5'd8 : - (f1_sfd__h487526[13] ? + (f1_sfd__h487527[13] ? 5'd9 : - (f1_sfd__h487526[12] ? + (f1_sfd__h487527[12] ? 5'd10 : - (f1_sfd__h487526[11] ? + (f1_sfd__h487527[11] ? 5'd11 : - (f1_sfd__h487526[10] ? + (f1_sfd__h487527[10] ? 5'd12 : - (f1_sfd__h487526[9] ? + (f1_sfd__h487527[9] ? 5'd13 : - (f1_sfd__h487526[8] ? + (f1_sfd__h487527[8] ? 5'd14 : - (f1_sfd__h487526[7] ? + (f1_sfd__h487527[7] ? 5'd15 : - (f1_sfd__h487526[6] ? + (f1_sfd__h487527[6] ? 5'd16 : - (f1_sfd__h487526[5] ? + (f1_sfd__h487527[5] ? 5'd17 : - (f1_sfd__h487526[4] ? + (f1_sfd__h487527[4] ? 5'd18 : - (f1_sfd__h487526[3] ? + (f1_sfd__h487527[3] ? 5'd19 : - (f1_sfd__h487526[2] ? + (f1_sfd__h487527[2] ? 5'd20 : - (f1_sfd__h487526[1] ? + (f1_sfd__h487527[1] ? 5'd21 : - (f1_sfd__h487526[0] ? + (f1_sfd__h487527[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 = @@ -24597,51 +24597,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9350 = 12'd3970 - { 7'd0, - f3_sfd__h565824[22] ? + f3_sfd__h565825[22] ? 5'd0 : - (f3_sfd__h565824[21] ? + (f3_sfd__h565825[21] ? 5'd1 : - (f3_sfd__h565824[20] ? + (f3_sfd__h565825[20] ? 5'd2 : - (f3_sfd__h565824[19] ? + (f3_sfd__h565825[19] ? 5'd3 : - (f3_sfd__h565824[18] ? + (f3_sfd__h565825[18] ? 5'd4 : - (f3_sfd__h565824[17] ? + (f3_sfd__h565825[17] ? 5'd5 : - (f3_sfd__h565824[16] ? + (f3_sfd__h565825[16] ? 5'd6 : - (f3_sfd__h565824[15] ? + (f3_sfd__h565825[15] ? 5'd7 : - (f3_sfd__h565824[14] ? + (f3_sfd__h565825[14] ? 5'd8 : - (f3_sfd__h565824[13] ? + (f3_sfd__h565825[13] ? 5'd9 : - (f3_sfd__h565824[12] ? + (f3_sfd__h565825[12] ? 5'd10 : - (f3_sfd__h565824[11] ? + (f3_sfd__h565825[11] ? 5'd11 : - (f3_sfd__h565824[10] ? + (f3_sfd__h565825[10] ? 5'd12 : - (f3_sfd__h565824[9] ? + (f3_sfd__h565825[9] ? 5'd13 : - (f3_sfd__h565824[8] ? + (f3_sfd__h565825[8] ? 5'd14 : - (f3_sfd__h565824[7] ? + (f3_sfd__h565825[7] ? 5'd15 : - (f3_sfd__h565824[6] ? + (f3_sfd__h565825[6] ? 5'd16 : - (f3_sfd__h565824[5] ? + (f3_sfd__h565825[5] ? 5'd17 : - (f3_sfd__h565824[4] ? + (f3_sfd__h565825[4] ? 5'd18 : - (f3_sfd__h565824[3] ? + (f3_sfd__h565825[3] ? 5'd19 : - (f3_sfd__h565824[2] ? + (f3_sfd__h565825[2] ? 5'd20 : - (f3_sfd__h565824[1] ? + (f3_sfd__h565825[1] ? 5'd21 : - (f3_sfd__h565824[0] ? + (f3_sfd__h565825[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 = @@ -24670,7 +24670,7 @@ module mkCore(CLK, NOT_fetchStage_pipelines_0_canDeq__2926_2927_O_ETC___d14371 && fetchStage$pipelines_1_first[199:195] != 5'd14 ; assign _dfoo18 = - k__h674091 == 1'd0 && + k__h674092 == 1'd0 && fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14171 || fetchStage_pipelines_0_canDeq__2926_AND_NOT_fe_ETC___d14290 == 1'd0 && @@ -24777,1421 +24777,1421 @@ module mkCore(CLK, assign _dor1sbCons$EN_setReady_1_put = WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_F || WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_T ; - assign _theResult_____2__h301170 = + assign _theResult_____2__h301171 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3142) ? - next_deqP___1__h301449 : + next_deqP___1__h301450 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP ; - assign _theResult_____2__h309166 = + assign _theResult_____2__h309167 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3249) ? - next_deqP___1__h309445 : + next_deqP___1__h309446 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP ; - assign _theResult_____2__h315160 = + assign _theResult_____2__h315161 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3420) ? - next_deqP___1__h315726 : + next_deqP___1__h315727 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP ; - assign _theResult_____2__h323014 = + assign _theResult_____2__h323015 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3516) ? - next_deqP___1__h323580 : + next_deqP___1__h323581 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP ; - assign _theResult_____2__h333358 = + assign _theResult_____2__h333359 = (coreFix_memExe_memRespLdQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3745) ? - next_deqP___1__h333637 : + next_deqP___1__h333638 : coreFix_memExe_memRespLdQ_deqP ; - assign _theResult_____2__h336583 = + assign _theResult_____2__h336584 = (coreFix_memExe_forwardQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3839) ? - next_deqP___1__h336862 : + next_deqP___1__h336863 : coreFix_memExe_forwardQ_deqP ; - assign _theResult____h350734 = - (value__h351356 == 54'd0) ? sfd__h343129 : 57'd1 ; - assign _theResult____h368373 = + assign _theResult____h350735 = + (value__h351357 == 54'd0) ? sfd__h343130 : 57'd1 ; + assign _theResult____h368374 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4650 ^ 12'h800) < 12'd2105) ? - result__h368986 : - _theResult____h350734 ; - assign _theResult____h396433 = - (value__h397053 == 54'd0) ? sfd__h388831 : 57'd1 ; - assign _theResult____h414070 = + result__h368987 : + _theResult____h350735 ; + assign _theResult____h396434 = + (value__h397054 == 54'd0) ? sfd__h388832 : 57'd1 ; + assign _theResult____h414071 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6042 ^ 12'h800) < 12'd2105) ? - result__h414683 : - _theResult____h396433 ; - assign _theResult____h442128 = - (value__h442748 == 54'd0) ? sfd__h434526 : 57'd1 ; - assign _theResult____h459765 = + result__h414684 : + _theResult____h396434 ; + assign _theResult____h442129 = + (value__h442749 == 54'd0) ? sfd__h434527 : 57'd1 ; + assign _theResult____h459766 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7434 ^ 12'h800) < 12'd2105) ? - result__h460378 : - _theResult____h442128 ; - assign _theResult____h508254 = + result__h460379 : + _theResult____h442129 ; + assign _theResult____h508255 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8760 ^ 12'h800) < 12'd2105) ? - result__h508867 : - ((value__h492470 == 25'd0) ? sfd__h487887 : 57'd1) ; - assign _theResult____h547107 = + result__h508868 : + ((value__h492471 == 25'd0) ? sfd__h487888 : 57'd1) ; + assign _theResult____h547108 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10245 ^ 12'h800) < 12'd2105) ? - result__h547720 : - ((value__h531323 == 25'd0) ? sfd__h526881 : 57'd1) ; - assign _theResult____h586411 = + result__h547721 : + ((value__h531324 == 25'd0) ? sfd__h526882 : 57'd1) ; + assign _theResult____h586412 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9475 ^ 12'h800) < 12'd2105) ? - result__h587024 : - ((value__h570627 == 25'd0) ? sfd__h566185 : 57'd1) ; - assign _theResult____h658025 = + result__h587025 : + ((value__h570628 == 25'd0) ? sfd__h566186 : 57'd1) ; + assign _theResult____h658026 = (csrf_prv_reg != 2'd3 || csrf_ie_vec_3) ? - enabled_ints___1__h658438 : + enabled_ints___1__h658439 : 12'd0 ; - assign _theResult___exp__h359361 = - sfd__h358937[24] ? - ((_theResult___fst_exp__h358845 == 8'd254) ? + assign _theResult___exp__h359362 = + sfd__h358938[24] ? + ((_theResult___fst_exp__h358846 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385878) : - ((_theResult___fst_exp__h358845 == 8'd0 && - sfd__h358937[24:23] == 2'b01) ? + din_inc___2_exp__h385879) : + ((_theResult___fst_exp__h358846 == 8'd0 && + sfd__h358938[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h358845) ; - assign _theResult___exp__h367943 = - sfd__h367519[24] ? - ((_theResult___fst_exp__h367501 == 8'd254) ? + _theResult___fst_exp__h358846) ; + assign _theResult___exp__h367944 = + sfd__h367520[24] ? + ((_theResult___fst_exp__h367502 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385902) : - ((_theResult___fst_exp__h367501 == 8'd0 && - sfd__h367519[24:23] == 2'b01) ? + din_inc___2_exp__h385903) : + ((_theResult___fst_exp__h367502 == 8'd0 && + sfd__h367520[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h367501) ; - assign _theResult___exp__h377127 = - sfd__h376703[24] ? - ((_theResult___fst_exp__h376611 == 8'd254) ? + _theResult___fst_exp__h367502) ; + assign _theResult___exp__h377128 = + sfd__h376704[24] ? + ((_theResult___fst_exp__h376612 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385932) : - ((_theResult___fst_exp__h376611 == 8'd0 && - sfd__h376703[24:23] == 2'b01) ? + din_inc___2_exp__h385933) : + ((_theResult___fst_exp__h376612 == 8'd0 && + sfd__h376704[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h376611) ; - assign _theResult___exp__h385763 = - sfd__h385315[24] ? - ((_theResult___fst_exp__h385296 == 8'd254) ? + _theResult___fst_exp__h376612) ; + assign _theResult___exp__h385764 = + sfd__h385316[24] ? + ((_theResult___fst_exp__h385297 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385956) : - ((_theResult___fst_exp__h385296 == 8'd0 && - sfd__h385315[24:23] == 2'b01) ? + din_inc___2_exp__h385957) : + ((_theResult___fst_exp__h385297 == 8'd0 && + sfd__h385316[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h385296) ; - assign _theResult___exp__h385865 = + _theResult___fst_exp__h385297) ; + assign _theResult___exp__h385866 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h385856 ; - assign _theResult___exp__h405058 = - sfd__h404634[24] ? - ((_theResult___fst_exp__h404542 == 8'd254) ? + _theResult___fst_exp__h385857 ; + assign _theResult___exp__h405059 = + sfd__h404635[24] ? + ((_theResult___fst_exp__h404543 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431575) : - ((_theResult___fst_exp__h404542 == 8'd0 && - sfd__h404634[24:23] == 2'b01) ? + din_inc___2_exp__h431576) : + ((_theResult___fst_exp__h404543 == 8'd0 && + sfd__h404635[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h404542) ; - assign _theResult___exp__h413640 = - sfd__h413216[24] ? - ((_theResult___fst_exp__h413198 == 8'd254) ? + _theResult___fst_exp__h404543) ; + assign _theResult___exp__h413641 = + sfd__h413217[24] ? + ((_theResult___fst_exp__h413199 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431599) : - ((_theResult___fst_exp__h413198 == 8'd0 && - sfd__h413216[24:23] == 2'b01) ? + din_inc___2_exp__h431600) : + ((_theResult___fst_exp__h413199 == 8'd0 && + sfd__h413217[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h413198) ; - assign _theResult___exp__h422824 = - sfd__h422400[24] ? - ((_theResult___fst_exp__h422308 == 8'd254) ? + _theResult___fst_exp__h413199) ; + assign _theResult___exp__h422825 = + sfd__h422401[24] ? + ((_theResult___fst_exp__h422309 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431629) : - ((_theResult___fst_exp__h422308 == 8'd0 && - sfd__h422400[24:23] == 2'b01) ? + din_inc___2_exp__h431630) : + ((_theResult___fst_exp__h422309 == 8'd0 && + sfd__h422401[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h422308) ; - assign _theResult___exp__h431460 = - sfd__h431012[24] ? - ((_theResult___fst_exp__h430993 == 8'd254) ? + _theResult___fst_exp__h422309) ; + assign _theResult___exp__h431461 = + sfd__h431013[24] ? + ((_theResult___fst_exp__h430994 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431653) : - ((_theResult___fst_exp__h430993 == 8'd0 && - sfd__h431012[24:23] == 2'b01) ? + din_inc___2_exp__h431654) : + ((_theResult___fst_exp__h430994 == 8'd0 && + sfd__h431013[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h430993) ; - assign _theResult___exp__h431562 = + _theResult___fst_exp__h430994) ; + assign _theResult___exp__h431563 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h431553 ; - assign _theResult___exp__h450753 = - sfd__h450329[24] ? - ((_theResult___fst_exp__h450237 == 8'd254) ? + _theResult___fst_exp__h431554 ; + assign _theResult___exp__h450754 = + sfd__h450330[24] ? + ((_theResult___fst_exp__h450238 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477270) : - ((_theResult___fst_exp__h450237 == 8'd0 && - sfd__h450329[24:23] == 2'b01) ? + din_inc___2_exp__h477271) : + ((_theResult___fst_exp__h450238 == 8'd0 && + sfd__h450330[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h450237) ; - assign _theResult___exp__h459335 = - sfd__h458911[24] ? - ((_theResult___fst_exp__h458893 == 8'd254) ? + _theResult___fst_exp__h450238) ; + assign _theResult___exp__h459336 = + sfd__h458912[24] ? + ((_theResult___fst_exp__h458894 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477294) : - ((_theResult___fst_exp__h458893 == 8'd0 && - sfd__h458911[24:23] == 2'b01) ? + din_inc___2_exp__h477295) : + ((_theResult___fst_exp__h458894 == 8'd0 && + sfd__h458912[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h458893) ; - assign _theResult___exp__h468519 = - sfd__h468095[24] ? - ((_theResult___fst_exp__h468003 == 8'd254) ? + _theResult___fst_exp__h458894) ; + assign _theResult___exp__h468520 = + sfd__h468096[24] ? + ((_theResult___fst_exp__h468004 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477324) : - ((_theResult___fst_exp__h468003 == 8'd0 && - sfd__h468095[24:23] == 2'b01) ? + din_inc___2_exp__h477325) : + ((_theResult___fst_exp__h468004 == 8'd0 && + sfd__h468096[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h468003) ; - assign _theResult___exp__h477155 = - sfd__h476707[24] ? - ((_theResult___fst_exp__h476688 == 8'd254) ? + _theResult___fst_exp__h468004) ; + assign _theResult___exp__h477156 = + sfd__h476708[24] ? + ((_theResult___fst_exp__h476689 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477348) : - ((_theResult___fst_exp__h476688 == 8'd0 && - sfd__h476707[24:23] == 2'b01) ? + din_inc___2_exp__h477349) : + ((_theResult___fst_exp__h476689 == 8'd0 && + sfd__h476708[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h476688) ; - assign _theResult___exp__h477257 = + _theResult___fst_exp__h476689) ; + assign _theResult___exp__h477258 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h477248 ; - assign _theResult___exp__h507568 = - sfd__h506931[53] ? - ((_theResult___fst_exp__h506913 == 11'd2046) ? + _theResult___fst_exp__h477249 ; + assign _theResult___exp__h507569 = + sfd__h506932[53] ? + ((_theResult___fst_exp__h506914 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h526163) : - ((_theResult___fst_exp__h506913 == 11'd0 && - sfd__h506931[53:52] == 2'b01) ? + din_inc___2_exp__h526164) : + ((_theResult___fst_exp__h506914 == 11'd0 && + sfd__h506932[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h506913) ; - assign _theResult___exp__h517219 = - sfd__h516582[53] ? - ((_theResult___fst_exp__h516490 == 11'd2046) ? + _theResult___fst_exp__h506914) ; + assign _theResult___exp__h517220 = + sfd__h516583[53] ? + ((_theResult___fst_exp__h516491 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h526198) : - ((_theResult___fst_exp__h516490 == 11'd0 && - sfd__h516582[53:52] == 2'b01) ? + din_inc___2_exp__h526199) : + ((_theResult___fst_exp__h516491 == 11'd0 && + sfd__h516583[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h516490) ; - assign _theResult___exp__h526003 = - sfd__h525342[53] ? - ((_theResult___fst_exp__h525323 == 11'd2046) ? + _theResult___fst_exp__h516491) ; + assign _theResult___exp__h526004 = + sfd__h525343[53] ? + ((_theResult___fst_exp__h525324 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h526224) : - ((_theResult___fst_exp__h525323 == 11'd0 && - sfd__h525342[53:52] == 2'b01) ? + din_inc___2_exp__h526225) : + ((_theResult___fst_exp__h525324 == 11'd0 && + sfd__h525343[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h525323) ; - assign _theResult___exp__h546421 = - sfd__h545784[53] ? - ((_theResult___fst_exp__h545766 == 11'd2046) ? + _theResult___fst_exp__h525324) ; + assign _theResult___exp__h546422 = + sfd__h545785[53] ? + ((_theResult___fst_exp__h545767 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h565016) : - ((_theResult___fst_exp__h545766 == 11'd0 && - sfd__h545784[53:52] == 2'b01) ? + din_inc___2_exp__h565017) : + ((_theResult___fst_exp__h545767 == 11'd0 && + sfd__h545785[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h545766) ; - assign _theResult___exp__h556072 = - sfd__h555435[53] ? - ((_theResult___fst_exp__h555343 == 11'd2046) ? + _theResult___fst_exp__h545767) ; + assign _theResult___exp__h556073 = + sfd__h555436[53] ? + ((_theResult___fst_exp__h555344 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h565051) : - ((_theResult___fst_exp__h555343 == 11'd0 && - sfd__h555435[53:52] == 2'b01) ? + din_inc___2_exp__h565052) : + ((_theResult___fst_exp__h555344 == 11'd0 && + sfd__h555436[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h555343) ; - assign _theResult___exp__h564856 = - sfd__h564195[53] ? - ((_theResult___fst_exp__h564176 == 11'd2046) ? + _theResult___fst_exp__h555344) ; + assign _theResult___exp__h564857 = + sfd__h564196[53] ? + ((_theResult___fst_exp__h564177 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h565077) : - ((_theResult___fst_exp__h564176 == 11'd0 && - sfd__h564195[53:52] == 2'b01) ? + din_inc___2_exp__h565078) : + ((_theResult___fst_exp__h564177 == 11'd0 && + sfd__h564196[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h564176) ; - assign _theResult___exp__h585725 = - sfd__h585088[53] ? - ((_theResult___fst_exp__h585070 == 11'd2046) ? + _theResult___fst_exp__h564177) ; + assign _theResult___exp__h585726 = + sfd__h585089[53] ? + ((_theResult___fst_exp__h585071 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h604320) : - ((_theResult___fst_exp__h585070 == 11'd0 && - sfd__h585088[53:52] == 2'b01) ? + din_inc___2_exp__h604321) : + ((_theResult___fst_exp__h585071 == 11'd0 && + sfd__h585089[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h585070) ; - assign _theResult___exp__h595376 = - sfd__h594739[53] ? - ((_theResult___fst_exp__h594647 == 11'd2046) ? + _theResult___fst_exp__h585071) ; + assign _theResult___exp__h595377 = + sfd__h594740[53] ? + ((_theResult___fst_exp__h594648 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h604355) : - ((_theResult___fst_exp__h594647 == 11'd0 && - sfd__h594739[53:52] == 2'b01) ? + din_inc___2_exp__h604356) : + ((_theResult___fst_exp__h594648 == 11'd0 && + sfd__h594740[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h594647) ; - assign _theResult___exp__h604160 = - sfd__h603499[53] ? - ((_theResult___fst_exp__h603480 == 11'd2046) ? + _theResult___fst_exp__h594648) ; + assign _theResult___exp__h604161 = + sfd__h603500[53] ? + ((_theResult___fst_exp__h603481 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h604381) : - ((_theResult___fst_exp__h603480 == 11'd0 && - sfd__h603499[53:52] == 2'b01) ? + din_inc___2_exp__h604382) : + ((_theResult___fst_exp__h603481 == 11'd0 && + sfd__h603500[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h603480) ; - assign _theResult___fst__h608919 = - a__h608371[63] ? a___1__h608924 : a__h608371 ; - assign _theResult___fst_exp__h358845 = - _theResult____h350734[56] ? + _theResult___fst_exp__h603481) ; + assign _theResult___fst__h608920 = + a__h608372[63] ? a___1__h608925 : a__h608372 ; + assign _theResult___fst_exp__h358846 = + _theResult____h350735[56] ? 8'd2 : - _theResult___fst_exp__h358919 ; - assign _theResult___fst_exp__h358910 = + _theResult___fst_exp__h358920 ; + assign _theResult___fst_exp__h358911 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4343 } ; - assign _theResult___fst_exp__h358916 = - (!_theResult____h350734[56] && !_theResult____h350734[55] && - !_theResult____h350734[54] && - !_theResult____h350734[53] && - !_theResult____h350734[52] && - !_theResult____h350734[51] && - !_theResult____h350734[50] && - !_theResult____h350734[49] && - !_theResult____h350734[48] && - !_theResult____h350734[47] && - !_theResult____h350734[46] && - !_theResult____h350734[45] && - !_theResult____h350734[44] && - !_theResult____h350734[43] && - !_theResult____h350734[42] && - !_theResult____h350734[41] && - !_theResult____h350734[40] && - !_theResult____h350734[39] && - !_theResult____h350734[38] && - !_theResult____h350734[37] && - !_theResult____h350734[36] && - !_theResult____h350734[35] && - !_theResult____h350734[34] && - !_theResult____h350734[33] && - !_theResult____h350734[32] && - !_theResult____h350734[31] && - !_theResult____h350734[30] && - !_theResult____h350734[29] && - !_theResult____h350734[28] && - !_theResult____h350734[27] && - !_theResult____h350734[26] && - !_theResult____h350734[25] && - !_theResult____h350734[24] && - !_theResult____h350734[23] && - !_theResult____h350734[22] && - !_theResult____h350734[21] && - !_theResult____h350734[20] && - !_theResult____h350734[19] && - !_theResult____h350734[18] && - !_theResult____h350734[17] && - !_theResult____h350734[16] && - !_theResult____h350734[15] && - !_theResult____h350734[14] && - !_theResult____h350734[13] && - !_theResult____h350734[12] && - !_theResult____h350734[11] && - !_theResult____h350734[10] && - !_theResult____h350734[9] && - !_theResult____h350734[8] && - !_theResult____h350734[7] && - !_theResult____h350734[6] && - !_theResult____h350734[5] && - !_theResult____h350734[4] && - !_theResult____h350734[3] && - !_theResult____h350734[2] && - !_theResult____h350734[1] && - !_theResult____h350734[0] || + assign _theResult___fst_exp__h358917 = + (!_theResult____h350735[56] && !_theResult____h350735[55] && + !_theResult____h350735[54] && + !_theResult____h350735[53] && + !_theResult____h350735[52] && + !_theResult____h350735[51] && + !_theResult____h350735[50] && + !_theResult____h350735[49] && + !_theResult____h350735[48] && + !_theResult____h350735[47] && + !_theResult____h350735[46] && + !_theResult____h350735[45] && + !_theResult____h350735[44] && + !_theResult____h350735[43] && + !_theResult____h350735[42] && + !_theResult____h350735[41] && + !_theResult____h350735[40] && + !_theResult____h350735[39] && + !_theResult____h350735[38] && + !_theResult____h350735[37] && + !_theResult____h350735[36] && + !_theResult____h350735[35] && + !_theResult____h350735[34] && + !_theResult____h350735[33] && + !_theResult____h350735[32] && + !_theResult____h350735[31] && + !_theResult____h350735[30] && + !_theResult____h350735[29] && + !_theResult____h350735[28] && + !_theResult____h350735[27] && + !_theResult____h350735[26] && + !_theResult____h350735[25] && + !_theResult____h350735[24] && + !_theResult____h350735[23] && + !_theResult____h350735[22] && + !_theResult____h350735[21] && + !_theResult____h350735[20] && + !_theResult____h350735[19] && + !_theResult____h350735[18] && + !_theResult____h350735[17] && + !_theResult____h350735[16] && + !_theResult____h350735[15] && + !_theResult____h350735[14] && + !_theResult____h350735[13] && + !_theResult____h350735[12] && + !_theResult____h350735[11] && + !_theResult____h350735[10] && + !_theResult____h350735[9] && + !_theResult____h350735[8] && + !_theResult____h350735[7] && + !_theResult____h350735[6] && + !_theResult____h350735[5] && + !_theResult____h350735[4] && + !_theResult____h350735[3] && + !_theResult____h350735[2] && + !_theResult____h350735[1] && + !_theResult____h350735[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4345) ? 8'd0 : - _theResult___fst_exp__h358910 ; - assign _theResult___fst_exp__h358919 = - (!_theResult____h350734[56] && _theResult____h350734[55]) ? + _theResult___fst_exp__h358911 ; + assign _theResult___fst_exp__h358920 = + (!_theResult____h350735[56] && _theResult____h350735[55]) ? 8'd1 : - _theResult___fst_exp__h358916 ; - assign _theResult___fst_exp__h359442 = - (_theResult___fst_exp__h358845 == 8'd255) ? - _theResult___fst_exp__h358845 : - _theResult___fst_exp__h359439 ; - assign _theResult___fst_exp__h367492 = + _theResult___fst_exp__h358917 ; + assign _theResult___fst_exp__h359443 = + (_theResult___fst_exp__h358846 == 8'd255) ? + _theResult___fst_exp__h358846 : + _theResult___fst_exp__h359440 ; + assign _theResult___fst_exp__h367493 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4574 } ; - assign _theResult___fst_exp__h367498 = + assign _theResult___fst_exp__h367499 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4519 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4576) ? 8'd0 : - _theResult___fst_exp__h367492 ; - assign _theResult___fst_exp__h367501 = + _theResult___fst_exp__h367493 ; + assign _theResult___fst_exp__h367502 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h367498 : + _theResult___fst_exp__h367499 : 8'd129 ; - assign _theResult___fst_exp__h368024 = - (_theResult___fst_exp__h367501 == 8'd255) ? - _theResult___fst_exp__h367501 : - _theResult___fst_exp__h368021 ; - assign _theResult___fst_exp__h376611 = - _theResult____h368373[56] ? + assign _theResult___fst_exp__h368025 = + (_theResult___fst_exp__h367502 == 8'd255) ? + _theResult___fst_exp__h367502 : + _theResult___fst_exp__h368022 ; + assign _theResult___fst_exp__h376612 = + _theResult____h368374[56] ? 8'd2 : - _theResult___fst_exp__h376685 ; - assign _theResult___fst_exp__h376676 = + _theResult___fst_exp__h376686 ; + assign _theResult___fst_exp__h376677 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4894 } ; - assign _theResult___fst_exp__h376682 = - (!_theResult____h368373[56] && !_theResult____h368373[55] && - !_theResult____h368373[54] && - !_theResult____h368373[53] && - !_theResult____h368373[52] && - !_theResult____h368373[51] && - !_theResult____h368373[50] && - !_theResult____h368373[49] && - !_theResult____h368373[48] && - !_theResult____h368373[47] && - !_theResult____h368373[46] && - !_theResult____h368373[45] && - !_theResult____h368373[44] && - !_theResult____h368373[43] && - !_theResult____h368373[42] && - !_theResult____h368373[41] && - !_theResult____h368373[40] && - !_theResult____h368373[39] && - !_theResult____h368373[38] && - !_theResult____h368373[37] && - !_theResult____h368373[36] && - !_theResult____h368373[35] && - !_theResult____h368373[34] && - !_theResult____h368373[33] && - !_theResult____h368373[32] && - !_theResult____h368373[31] && - !_theResult____h368373[30] && - !_theResult____h368373[29] && - !_theResult____h368373[28] && - !_theResult____h368373[27] && - !_theResult____h368373[26] && - !_theResult____h368373[25] && - !_theResult____h368373[24] && - !_theResult____h368373[23] && - !_theResult____h368373[22] && - !_theResult____h368373[21] && - !_theResult____h368373[20] && - !_theResult____h368373[19] && - !_theResult____h368373[18] && - !_theResult____h368373[17] && - !_theResult____h368373[16] && - !_theResult____h368373[15] && - !_theResult____h368373[14] && - !_theResult____h368373[13] && - !_theResult____h368373[12] && - !_theResult____h368373[11] && - !_theResult____h368373[10] && - !_theResult____h368373[9] && - !_theResult____h368373[8] && - !_theResult____h368373[7] && - !_theResult____h368373[6] && - !_theResult____h368373[5] && - !_theResult____h368373[4] && - !_theResult____h368373[3] && - !_theResult____h368373[2] && - !_theResult____h368373[1] && - !_theResult____h368373[0] || + assign _theResult___fst_exp__h376683 = + (!_theResult____h368374[56] && !_theResult____h368374[55] && + !_theResult____h368374[54] && + !_theResult____h368374[53] && + !_theResult____h368374[52] && + !_theResult____h368374[51] && + !_theResult____h368374[50] && + !_theResult____h368374[49] && + !_theResult____h368374[48] && + !_theResult____h368374[47] && + !_theResult____h368374[46] && + !_theResult____h368374[45] && + !_theResult____h368374[44] && + !_theResult____h368374[43] && + !_theResult____h368374[42] && + !_theResult____h368374[41] && + !_theResult____h368374[40] && + !_theResult____h368374[39] && + !_theResult____h368374[38] && + !_theResult____h368374[37] && + !_theResult____h368374[36] && + !_theResult____h368374[35] && + !_theResult____h368374[34] && + !_theResult____h368374[33] && + !_theResult____h368374[32] && + !_theResult____h368374[31] && + !_theResult____h368374[30] && + !_theResult____h368374[29] && + !_theResult____h368374[28] && + !_theResult____h368374[27] && + !_theResult____h368374[26] && + !_theResult____h368374[25] && + !_theResult____h368374[24] && + !_theResult____h368374[23] && + !_theResult____h368374[22] && + !_theResult____h368374[21] && + !_theResult____h368374[20] && + !_theResult____h368374[19] && + !_theResult____h368374[18] && + !_theResult____h368374[17] && + !_theResult____h368374[16] && + !_theResult____h368374[15] && + !_theResult____h368374[14] && + !_theResult____h368374[13] && + !_theResult____h368374[12] && + !_theResult____h368374[11] && + !_theResult____h368374[10] && + !_theResult____h368374[9] && + !_theResult____h368374[8] && + !_theResult____h368374[7] && + !_theResult____h368374[6] && + !_theResult____h368374[5] && + !_theResult____h368374[4] && + !_theResult____h368374[3] && + !_theResult____h368374[2] && + !_theResult____h368374[1] && + !_theResult____h368374[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4896) ? 8'd0 : - _theResult___fst_exp__h376676 ; - assign _theResult___fst_exp__h376685 = - (!_theResult____h368373[56] && _theResult____h368373[55]) ? + _theResult___fst_exp__h376677 ; + assign _theResult___fst_exp__h376686 = + (!_theResult____h368374[56] && _theResult____h368374[55]) ? 8'd1 : - _theResult___fst_exp__h376682 ; - assign _theResult___fst_exp__h377208 = - (_theResult___fst_exp__h376611 == 8'd255) ? - _theResult___fst_exp__h376611 : - _theResult___fst_exp__h377205 ; - assign _theResult___fst_exp__h385248 = + _theResult___fst_exp__h376683 ; + assign _theResult___fst_exp__h377209 = + (_theResult___fst_exp__h376612 == 8'd255) ? + _theResult___fst_exp__h376612 : + _theResult___fst_exp__h377206 ; + assign _theResult___fst_exp__h385249 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q30[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q30[7:0] ; - assign _theResult___fst_exp__h385287 = + assign _theResult___fst_exp__h385288 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q30[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4574 } ; - assign _theResult___fst_exp__h385293 = + assign _theResult___fst_exp__h385294 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4519 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4969) ? 8'd0 : - _theResult___fst_exp__h385287 ; - assign _theResult___fst_exp__h385296 = + _theResult___fst_exp__h385288 ; + assign _theResult___fst_exp__h385297 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h385293 : - _theResult___fst_exp__h385248 ; - assign _theResult___fst_exp__h385844 = - (_theResult___fst_exp__h385296 == 8'd255) ? - _theResult___fst_exp__h385296 : - _theResult___fst_exp__h385841 ; - assign _theResult___fst_exp__h385853 = + _theResult___fst_exp__h385294 : + _theResult___fst_exp__h385249 ; + assign _theResult___fst_exp__h385845 = + (_theResult___fst_exp__h385297 == 8'd255) ? + _theResult___fst_exp__h385297 : + _theResult___fst_exp__h385842 ; + assign _theResult___fst_exp__h385854 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4108 ? - _theResult___snd_fst_exp__h368027 : - _theResult___fst_exp__h350716) : + _theResult___snd_fst_exp__h368028 : + _theResult___fst_exp__h350717) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4648 ? - _theResult___snd_fst_exp__h385847 : - _theResult___fst_exp__h350716) ; - assign _theResult___fst_exp__h385856 = + _theResult___snd_fst_exp__h385848 : + _theResult___fst_exp__h350717) ; + assign _theResult___fst_exp__h385857 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h385853 ; - assign _theResult___fst_exp__h404542 = - _theResult____h396433[56] ? + _theResult___fst_exp__h385854 ; + assign _theResult___fst_exp__h404543 = + _theResult____h396434[56] ? 8'd2 : - _theResult___fst_exp__h404616 ; - assign _theResult___fst_exp__h404607 = + _theResult___fst_exp__h404617 ; + assign _theResult___fst_exp__h404608 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5735 } ; - assign _theResult___fst_exp__h404613 = - (!_theResult____h396433[56] && !_theResult____h396433[55] && - !_theResult____h396433[54] && - !_theResult____h396433[53] && - !_theResult____h396433[52] && - !_theResult____h396433[51] && - !_theResult____h396433[50] && - !_theResult____h396433[49] && - !_theResult____h396433[48] && - !_theResult____h396433[47] && - !_theResult____h396433[46] && - !_theResult____h396433[45] && - !_theResult____h396433[44] && - !_theResult____h396433[43] && - !_theResult____h396433[42] && - !_theResult____h396433[41] && - !_theResult____h396433[40] && - !_theResult____h396433[39] && - !_theResult____h396433[38] && - !_theResult____h396433[37] && - !_theResult____h396433[36] && - !_theResult____h396433[35] && - !_theResult____h396433[34] && - !_theResult____h396433[33] && - !_theResult____h396433[32] && - !_theResult____h396433[31] && - !_theResult____h396433[30] && - !_theResult____h396433[29] && - !_theResult____h396433[28] && - !_theResult____h396433[27] && - !_theResult____h396433[26] && - !_theResult____h396433[25] && - !_theResult____h396433[24] && - !_theResult____h396433[23] && - !_theResult____h396433[22] && - !_theResult____h396433[21] && - !_theResult____h396433[20] && - !_theResult____h396433[19] && - !_theResult____h396433[18] && - !_theResult____h396433[17] && - !_theResult____h396433[16] && - !_theResult____h396433[15] && - !_theResult____h396433[14] && - !_theResult____h396433[13] && - !_theResult____h396433[12] && - !_theResult____h396433[11] && - !_theResult____h396433[10] && - !_theResult____h396433[9] && - !_theResult____h396433[8] && - !_theResult____h396433[7] && - !_theResult____h396433[6] && - !_theResult____h396433[5] && - !_theResult____h396433[4] && - !_theResult____h396433[3] && - !_theResult____h396433[2] && - !_theResult____h396433[1] && - !_theResult____h396433[0] || + assign _theResult___fst_exp__h404614 = + (!_theResult____h396434[56] && !_theResult____h396434[55] && + !_theResult____h396434[54] && + !_theResult____h396434[53] && + !_theResult____h396434[52] && + !_theResult____h396434[51] && + !_theResult____h396434[50] && + !_theResult____h396434[49] && + !_theResult____h396434[48] && + !_theResult____h396434[47] && + !_theResult____h396434[46] && + !_theResult____h396434[45] && + !_theResult____h396434[44] && + !_theResult____h396434[43] && + !_theResult____h396434[42] && + !_theResult____h396434[41] && + !_theResult____h396434[40] && + !_theResult____h396434[39] && + !_theResult____h396434[38] && + !_theResult____h396434[37] && + !_theResult____h396434[36] && + !_theResult____h396434[35] && + !_theResult____h396434[34] && + !_theResult____h396434[33] && + !_theResult____h396434[32] && + !_theResult____h396434[31] && + !_theResult____h396434[30] && + !_theResult____h396434[29] && + !_theResult____h396434[28] && + !_theResult____h396434[27] && + !_theResult____h396434[26] && + !_theResult____h396434[25] && + !_theResult____h396434[24] && + !_theResult____h396434[23] && + !_theResult____h396434[22] && + !_theResult____h396434[21] && + !_theResult____h396434[20] && + !_theResult____h396434[19] && + !_theResult____h396434[18] && + !_theResult____h396434[17] && + !_theResult____h396434[16] && + !_theResult____h396434[15] && + !_theResult____h396434[14] && + !_theResult____h396434[13] && + !_theResult____h396434[12] && + !_theResult____h396434[11] && + !_theResult____h396434[10] && + !_theResult____h396434[9] && + !_theResult____h396434[8] && + !_theResult____h396434[7] && + !_theResult____h396434[6] && + !_theResult____h396434[5] && + !_theResult____h396434[4] && + !_theResult____h396434[3] && + !_theResult____h396434[2] && + !_theResult____h396434[1] && + !_theResult____h396434[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5737) ? 8'd0 : - _theResult___fst_exp__h404607 ; - assign _theResult___fst_exp__h404616 = - (!_theResult____h396433[56] && _theResult____h396433[55]) ? + _theResult___fst_exp__h404608 ; + assign _theResult___fst_exp__h404617 = + (!_theResult____h396434[56] && _theResult____h396434[55]) ? 8'd1 : - _theResult___fst_exp__h404613 ; - assign _theResult___fst_exp__h405139 = - (_theResult___fst_exp__h404542 == 8'd255) ? - _theResult___fst_exp__h404542 : - _theResult___fst_exp__h405136 ; - assign _theResult___fst_exp__h413189 = + _theResult___fst_exp__h404614 ; + assign _theResult___fst_exp__h405140 = + (_theResult___fst_exp__h404543 == 8'd255) ? + _theResult___fst_exp__h404543 : + _theResult___fst_exp__h405137 ; + assign _theResult___fst_exp__h413190 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5966 } ; - assign _theResult___fst_exp__h413195 = + assign _theResult___fst_exp__h413196 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5911 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5968) ? 8'd0 : - _theResult___fst_exp__h413189 ; - assign _theResult___fst_exp__h413198 = + _theResult___fst_exp__h413190 ; + assign _theResult___fst_exp__h413199 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h413195 : + _theResult___fst_exp__h413196 : 8'd129 ; - assign _theResult___fst_exp__h413721 = - (_theResult___fst_exp__h413198 == 8'd255) ? - _theResult___fst_exp__h413198 : - _theResult___fst_exp__h413718 ; - assign _theResult___fst_exp__h422308 = - _theResult____h414070[56] ? + assign _theResult___fst_exp__h413722 = + (_theResult___fst_exp__h413199 == 8'd255) ? + _theResult___fst_exp__h413199 : + _theResult___fst_exp__h413719 ; + assign _theResult___fst_exp__h422309 = + _theResult____h414071[56] ? 8'd2 : - _theResult___fst_exp__h422382 ; - assign _theResult___fst_exp__h422373 = + _theResult___fst_exp__h422383 ; + assign _theResult___fst_exp__h422374 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6286 } ; - assign _theResult___fst_exp__h422379 = - (!_theResult____h414070[56] && !_theResult____h414070[55] && - !_theResult____h414070[54] && - !_theResult____h414070[53] && - !_theResult____h414070[52] && - !_theResult____h414070[51] && - !_theResult____h414070[50] && - !_theResult____h414070[49] && - !_theResult____h414070[48] && - !_theResult____h414070[47] && - !_theResult____h414070[46] && - !_theResult____h414070[45] && - !_theResult____h414070[44] && - !_theResult____h414070[43] && - !_theResult____h414070[42] && - !_theResult____h414070[41] && - !_theResult____h414070[40] && - !_theResult____h414070[39] && - !_theResult____h414070[38] && - !_theResult____h414070[37] && - !_theResult____h414070[36] && - !_theResult____h414070[35] && - !_theResult____h414070[34] && - !_theResult____h414070[33] && - !_theResult____h414070[32] && - !_theResult____h414070[31] && - !_theResult____h414070[30] && - !_theResult____h414070[29] && - !_theResult____h414070[28] && - !_theResult____h414070[27] && - !_theResult____h414070[26] && - !_theResult____h414070[25] && - !_theResult____h414070[24] && - !_theResult____h414070[23] && - !_theResult____h414070[22] && - !_theResult____h414070[21] && - !_theResult____h414070[20] && - !_theResult____h414070[19] && - !_theResult____h414070[18] && - !_theResult____h414070[17] && - !_theResult____h414070[16] && - !_theResult____h414070[15] && - !_theResult____h414070[14] && - !_theResult____h414070[13] && - !_theResult____h414070[12] && - !_theResult____h414070[11] && - !_theResult____h414070[10] && - !_theResult____h414070[9] && - !_theResult____h414070[8] && - !_theResult____h414070[7] && - !_theResult____h414070[6] && - !_theResult____h414070[5] && - !_theResult____h414070[4] && - !_theResult____h414070[3] && - !_theResult____h414070[2] && - !_theResult____h414070[1] && - !_theResult____h414070[0] || + assign _theResult___fst_exp__h422380 = + (!_theResult____h414071[56] && !_theResult____h414071[55] && + !_theResult____h414071[54] && + !_theResult____h414071[53] && + !_theResult____h414071[52] && + !_theResult____h414071[51] && + !_theResult____h414071[50] && + !_theResult____h414071[49] && + !_theResult____h414071[48] && + !_theResult____h414071[47] && + !_theResult____h414071[46] && + !_theResult____h414071[45] && + !_theResult____h414071[44] && + !_theResult____h414071[43] && + !_theResult____h414071[42] && + !_theResult____h414071[41] && + !_theResult____h414071[40] && + !_theResult____h414071[39] && + !_theResult____h414071[38] && + !_theResult____h414071[37] && + !_theResult____h414071[36] && + !_theResult____h414071[35] && + !_theResult____h414071[34] && + !_theResult____h414071[33] && + !_theResult____h414071[32] && + !_theResult____h414071[31] && + !_theResult____h414071[30] && + !_theResult____h414071[29] && + !_theResult____h414071[28] && + !_theResult____h414071[27] && + !_theResult____h414071[26] && + !_theResult____h414071[25] && + !_theResult____h414071[24] && + !_theResult____h414071[23] && + !_theResult____h414071[22] && + !_theResult____h414071[21] && + !_theResult____h414071[20] && + !_theResult____h414071[19] && + !_theResult____h414071[18] && + !_theResult____h414071[17] && + !_theResult____h414071[16] && + !_theResult____h414071[15] && + !_theResult____h414071[14] && + !_theResult____h414071[13] && + !_theResult____h414071[12] && + !_theResult____h414071[11] && + !_theResult____h414071[10] && + !_theResult____h414071[9] && + !_theResult____h414071[8] && + !_theResult____h414071[7] && + !_theResult____h414071[6] && + !_theResult____h414071[5] && + !_theResult____h414071[4] && + !_theResult____h414071[3] && + !_theResult____h414071[2] && + !_theResult____h414071[1] && + !_theResult____h414071[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6288) ? 8'd0 : - _theResult___fst_exp__h422373 ; - assign _theResult___fst_exp__h422382 = - (!_theResult____h414070[56] && _theResult____h414070[55]) ? + _theResult___fst_exp__h422374 ; + assign _theResult___fst_exp__h422383 = + (!_theResult____h414071[56] && _theResult____h414071[55]) ? 8'd1 : - _theResult___fst_exp__h422379 ; - assign _theResult___fst_exp__h422905 = - (_theResult___fst_exp__h422308 == 8'd255) ? - _theResult___fst_exp__h422308 : - _theResult___fst_exp__h422902 ; - assign _theResult___fst_exp__h430945 = + _theResult___fst_exp__h422380 ; + assign _theResult___fst_exp__h422906 = + (_theResult___fst_exp__h422309 == 8'd255) ? + _theResult___fst_exp__h422309 : + _theResult___fst_exp__h422903 ; + assign _theResult___fst_exp__h430946 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q65[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q65[7:0] ; - assign _theResult___fst_exp__h430984 = + assign _theResult___fst_exp__h430985 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q65[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5966 } ; - assign _theResult___fst_exp__h430990 = + assign _theResult___fst_exp__h430991 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5911 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6361) ? 8'd0 : - _theResult___fst_exp__h430984 ; - assign _theResult___fst_exp__h430993 = + _theResult___fst_exp__h430985 ; + assign _theResult___fst_exp__h430994 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h430990 : - _theResult___fst_exp__h430945 ; - assign _theResult___fst_exp__h431541 = - (_theResult___fst_exp__h430993 == 8'd255) ? - _theResult___fst_exp__h430993 : - _theResult___fst_exp__h431538 ; - assign _theResult___fst_exp__h431550 = + _theResult___fst_exp__h430991 : + _theResult___fst_exp__h430946 ; + assign _theResult___fst_exp__h431542 = + (_theResult___fst_exp__h430994 == 8'd255) ? + _theResult___fst_exp__h430994 : + _theResult___fst_exp__h431539 ; + assign _theResult___fst_exp__h431551 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5500 ? - _theResult___snd_fst_exp__h413724 : - _theResult___fst_exp__h396415) : + _theResult___snd_fst_exp__h413725 : + _theResult___fst_exp__h396416) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6040 ? - _theResult___snd_fst_exp__h431544 : - _theResult___fst_exp__h396415) ; - assign _theResult___fst_exp__h431553 = + _theResult___snd_fst_exp__h431545 : + _theResult___fst_exp__h396416) ; + assign _theResult___fst_exp__h431554 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h431550 ; - assign _theResult___fst_exp__h450237 = - _theResult____h442128[56] ? + _theResult___fst_exp__h431551 ; + assign _theResult___fst_exp__h450238 = + _theResult____h442129[56] ? 8'd2 : - _theResult___fst_exp__h450311 ; - assign _theResult___fst_exp__h450302 = + _theResult___fst_exp__h450312 ; + assign _theResult___fst_exp__h450303 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7127 } ; - assign _theResult___fst_exp__h450308 = - (!_theResult____h442128[56] && !_theResult____h442128[55] && - !_theResult____h442128[54] && - !_theResult____h442128[53] && - !_theResult____h442128[52] && - !_theResult____h442128[51] && - !_theResult____h442128[50] && - !_theResult____h442128[49] && - !_theResult____h442128[48] && - !_theResult____h442128[47] && - !_theResult____h442128[46] && - !_theResult____h442128[45] && - !_theResult____h442128[44] && - !_theResult____h442128[43] && - !_theResult____h442128[42] && - !_theResult____h442128[41] && - !_theResult____h442128[40] && - !_theResult____h442128[39] && - !_theResult____h442128[38] && - !_theResult____h442128[37] && - !_theResult____h442128[36] && - !_theResult____h442128[35] && - !_theResult____h442128[34] && - !_theResult____h442128[33] && - !_theResult____h442128[32] && - !_theResult____h442128[31] && - !_theResult____h442128[30] && - !_theResult____h442128[29] && - !_theResult____h442128[28] && - !_theResult____h442128[27] && - !_theResult____h442128[26] && - !_theResult____h442128[25] && - !_theResult____h442128[24] && - !_theResult____h442128[23] && - !_theResult____h442128[22] && - !_theResult____h442128[21] && - !_theResult____h442128[20] && - !_theResult____h442128[19] && - !_theResult____h442128[18] && - !_theResult____h442128[17] && - !_theResult____h442128[16] && - !_theResult____h442128[15] && - !_theResult____h442128[14] && - !_theResult____h442128[13] && - !_theResult____h442128[12] && - !_theResult____h442128[11] && - !_theResult____h442128[10] && - !_theResult____h442128[9] && - !_theResult____h442128[8] && - !_theResult____h442128[7] && - !_theResult____h442128[6] && - !_theResult____h442128[5] && - !_theResult____h442128[4] && - !_theResult____h442128[3] && - !_theResult____h442128[2] && - !_theResult____h442128[1] && - !_theResult____h442128[0] || + assign _theResult___fst_exp__h450309 = + (!_theResult____h442129[56] && !_theResult____h442129[55] && + !_theResult____h442129[54] && + !_theResult____h442129[53] && + !_theResult____h442129[52] && + !_theResult____h442129[51] && + !_theResult____h442129[50] && + !_theResult____h442129[49] && + !_theResult____h442129[48] && + !_theResult____h442129[47] && + !_theResult____h442129[46] && + !_theResult____h442129[45] && + !_theResult____h442129[44] && + !_theResult____h442129[43] && + !_theResult____h442129[42] && + !_theResult____h442129[41] && + !_theResult____h442129[40] && + !_theResult____h442129[39] && + !_theResult____h442129[38] && + !_theResult____h442129[37] && + !_theResult____h442129[36] && + !_theResult____h442129[35] && + !_theResult____h442129[34] && + !_theResult____h442129[33] && + !_theResult____h442129[32] && + !_theResult____h442129[31] && + !_theResult____h442129[30] && + !_theResult____h442129[29] && + !_theResult____h442129[28] && + !_theResult____h442129[27] && + !_theResult____h442129[26] && + !_theResult____h442129[25] && + !_theResult____h442129[24] && + !_theResult____h442129[23] && + !_theResult____h442129[22] && + !_theResult____h442129[21] && + !_theResult____h442129[20] && + !_theResult____h442129[19] && + !_theResult____h442129[18] && + !_theResult____h442129[17] && + !_theResult____h442129[16] && + !_theResult____h442129[15] && + !_theResult____h442129[14] && + !_theResult____h442129[13] && + !_theResult____h442129[12] && + !_theResult____h442129[11] && + !_theResult____h442129[10] && + !_theResult____h442129[9] && + !_theResult____h442129[8] && + !_theResult____h442129[7] && + !_theResult____h442129[6] && + !_theResult____h442129[5] && + !_theResult____h442129[4] && + !_theResult____h442129[3] && + !_theResult____h442129[2] && + !_theResult____h442129[1] && + !_theResult____h442129[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7129) ? 8'd0 : - _theResult___fst_exp__h450302 ; - assign _theResult___fst_exp__h450311 = - (!_theResult____h442128[56] && _theResult____h442128[55]) ? + _theResult___fst_exp__h450303 ; + assign _theResult___fst_exp__h450312 = + (!_theResult____h442129[56] && _theResult____h442129[55]) ? 8'd1 : - _theResult___fst_exp__h450308 ; - assign _theResult___fst_exp__h450834 = - (_theResult___fst_exp__h450237 == 8'd255) ? - _theResult___fst_exp__h450237 : - _theResult___fst_exp__h450831 ; - assign _theResult___fst_exp__h458884 = + _theResult___fst_exp__h450309 ; + assign _theResult___fst_exp__h450835 = + (_theResult___fst_exp__h450238 == 8'd255) ? + _theResult___fst_exp__h450238 : + _theResult___fst_exp__h450832 ; + assign _theResult___fst_exp__h458885 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7358 } ; - assign _theResult___fst_exp__h458890 = + assign _theResult___fst_exp__h458891 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7303 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7360) ? 8'd0 : - _theResult___fst_exp__h458884 ; - assign _theResult___fst_exp__h458893 = + _theResult___fst_exp__h458885 ; + assign _theResult___fst_exp__h458894 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h458890 : + _theResult___fst_exp__h458891 : 8'd129 ; - assign _theResult___fst_exp__h459416 = - (_theResult___fst_exp__h458893 == 8'd255) ? - _theResult___fst_exp__h458893 : - _theResult___fst_exp__h459413 ; - assign _theResult___fst_exp__h468003 = - _theResult____h459765[56] ? + assign _theResult___fst_exp__h459417 = + (_theResult___fst_exp__h458894 == 8'd255) ? + _theResult___fst_exp__h458894 : + _theResult___fst_exp__h459414 ; + assign _theResult___fst_exp__h468004 = + _theResult____h459766[56] ? 8'd2 : - _theResult___fst_exp__h468077 ; - assign _theResult___fst_exp__h468068 = + _theResult___fst_exp__h468078 ; + assign _theResult___fst_exp__h468069 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7678 } ; - assign _theResult___fst_exp__h468074 = - (!_theResult____h459765[56] && !_theResult____h459765[55] && - !_theResult____h459765[54] && - !_theResult____h459765[53] && - !_theResult____h459765[52] && - !_theResult____h459765[51] && - !_theResult____h459765[50] && - !_theResult____h459765[49] && - !_theResult____h459765[48] && - !_theResult____h459765[47] && - !_theResult____h459765[46] && - !_theResult____h459765[45] && - !_theResult____h459765[44] && - !_theResult____h459765[43] && - !_theResult____h459765[42] && - !_theResult____h459765[41] && - !_theResult____h459765[40] && - !_theResult____h459765[39] && - !_theResult____h459765[38] && - !_theResult____h459765[37] && - !_theResult____h459765[36] && - !_theResult____h459765[35] && - !_theResult____h459765[34] && - !_theResult____h459765[33] && - !_theResult____h459765[32] && - !_theResult____h459765[31] && - !_theResult____h459765[30] && - !_theResult____h459765[29] && - !_theResult____h459765[28] && - !_theResult____h459765[27] && - !_theResult____h459765[26] && - !_theResult____h459765[25] && - !_theResult____h459765[24] && - !_theResult____h459765[23] && - !_theResult____h459765[22] && - !_theResult____h459765[21] && - !_theResult____h459765[20] && - !_theResult____h459765[19] && - !_theResult____h459765[18] && - !_theResult____h459765[17] && - !_theResult____h459765[16] && - !_theResult____h459765[15] && - !_theResult____h459765[14] && - !_theResult____h459765[13] && - !_theResult____h459765[12] && - !_theResult____h459765[11] && - !_theResult____h459765[10] && - !_theResult____h459765[9] && - !_theResult____h459765[8] && - !_theResult____h459765[7] && - !_theResult____h459765[6] && - !_theResult____h459765[5] && - !_theResult____h459765[4] && - !_theResult____h459765[3] && - !_theResult____h459765[2] && - !_theResult____h459765[1] && - !_theResult____h459765[0] || + assign _theResult___fst_exp__h468075 = + (!_theResult____h459766[56] && !_theResult____h459766[55] && + !_theResult____h459766[54] && + !_theResult____h459766[53] && + !_theResult____h459766[52] && + !_theResult____h459766[51] && + !_theResult____h459766[50] && + !_theResult____h459766[49] && + !_theResult____h459766[48] && + !_theResult____h459766[47] && + !_theResult____h459766[46] && + !_theResult____h459766[45] && + !_theResult____h459766[44] && + !_theResult____h459766[43] && + !_theResult____h459766[42] && + !_theResult____h459766[41] && + !_theResult____h459766[40] && + !_theResult____h459766[39] && + !_theResult____h459766[38] && + !_theResult____h459766[37] && + !_theResult____h459766[36] && + !_theResult____h459766[35] && + !_theResult____h459766[34] && + !_theResult____h459766[33] && + !_theResult____h459766[32] && + !_theResult____h459766[31] && + !_theResult____h459766[30] && + !_theResult____h459766[29] && + !_theResult____h459766[28] && + !_theResult____h459766[27] && + !_theResult____h459766[26] && + !_theResult____h459766[25] && + !_theResult____h459766[24] && + !_theResult____h459766[23] && + !_theResult____h459766[22] && + !_theResult____h459766[21] && + !_theResult____h459766[20] && + !_theResult____h459766[19] && + !_theResult____h459766[18] && + !_theResult____h459766[17] && + !_theResult____h459766[16] && + !_theResult____h459766[15] && + !_theResult____h459766[14] && + !_theResult____h459766[13] && + !_theResult____h459766[12] && + !_theResult____h459766[11] && + !_theResult____h459766[10] && + !_theResult____h459766[9] && + !_theResult____h459766[8] && + !_theResult____h459766[7] && + !_theResult____h459766[6] && + !_theResult____h459766[5] && + !_theResult____h459766[4] && + !_theResult____h459766[3] && + !_theResult____h459766[2] && + !_theResult____h459766[1] && + !_theResult____h459766[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7680) ? 8'd0 : - _theResult___fst_exp__h468068 ; - assign _theResult___fst_exp__h468077 = - (!_theResult____h459765[56] && _theResult____h459765[55]) ? + _theResult___fst_exp__h468069 ; + assign _theResult___fst_exp__h468078 = + (!_theResult____h459766[56] && _theResult____h459766[55]) ? 8'd1 : - _theResult___fst_exp__h468074 ; - assign _theResult___fst_exp__h468600 = - (_theResult___fst_exp__h468003 == 8'd255) ? - _theResult___fst_exp__h468003 : - _theResult___fst_exp__h468597 ; - assign _theResult___fst_exp__h476640 = + _theResult___fst_exp__h468075 ; + assign _theResult___fst_exp__h468601 = + (_theResult___fst_exp__h468004 == 8'd255) ? + _theResult___fst_exp__h468004 : + _theResult___fst_exp__h468598 ; + assign _theResult___fst_exp__h476641 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q100[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q100[7:0] ; - assign _theResult___fst_exp__h476679 = + assign _theResult___fst_exp__h476680 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q100[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7358 } ; - assign _theResult___fst_exp__h476685 = + assign _theResult___fst_exp__h476686 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7303 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7753) ? 8'd0 : - _theResult___fst_exp__h476679 ; - assign _theResult___fst_exp__h476688 = + _theResult___fst_exp__h476680 ; + assign _theResult___fst_exp__h476689 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h476685 : - _theResult___fst_exp__h476640 ; - assign _theResult___fst_exp__h477236 = - (_theResult___fst_exp__h476688 == 8'd255) ? - _theResult___fst_exp__h476688 : - _theResult___fst_exp__h477233 ; - assign _theResult___fst_exp__h477245 = + _theResult___fst_exp__h476686 : + _theResult___fst_exp__h476641 ; + assign _theResult___fst_exp__h477237 = + (_theResult___fst_exp__h476689 == 8'd255) ? + _theResult___fst_exp__h476689 : + _theResult___fst_exp__h477234 ; + assign _theResult___fst_exp__h477246 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6892 ? - _theResult___snd_fst_exp__h459419 : - _theResult___fst_exp__h442110) : + _theResult___snd_fst_exp__h459420 : + _theResult___fst_exp__h442111) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7432 ? - _theResult___snd_fst_exp__h477239 : - _theResult___fst_exp__h442110) ; - assign _theResult___fst_exp__h477248 = + _theResult___snd_fst_exp__h477240 : + _theResult___fst_exp__h442111) ; + assign _theResult___fst_exp__h477249 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h477245 ; - assign _theResult___fst_exp__h491840 = + _theResult___fst_exp__h477246 ; + assign _theResult___fst_exp__h491841 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q7 ; - assign _theResult___fst_exp__h506904 = + assign _theResult___fst_exp__h506905 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8694 } ; - assign _theResult___fst_exp__h506910 = - (f1_exp__h487525 == 8'd0 && !f1_sfd__h487526[22] && + assign _theResult___fst_exp__h506911 = + (f1_exp__h487526 == 8'd0 && !f1_sfd__h487527[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8667 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8696) ? 11'd0 : - _theResult___fst_exp__h506904 ; - assign _theResult___fst_exp__h506913 = - (f1_exp__h487525 == 8'd0) ? - _theResult___fst_exp__h506910 : + _theResult___fst_exp__h506905 ; + assign _theResult___fst_exp__h506914 = + (f1_exp__h487526 == 8'd0) ? + _theResult___fst_exp__h506911 : 11'd897 ; - assign _theResult___fst_exp__h507668 = + assign _theResult___fst_exp__h507669 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q136 : + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q136 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9130 ; - assign _theResult___fst_exp__h507671 = - (_theResult___fst_exp__h506913 == 11'd2047) ? - _theResult___fst_exp__h506913 : - _theResult___fst_exp__h507668 ; - assign _theResult___fst_exp__h516490 = - _theResult____h508254[56] ? + assign _theResult___fst_exp__h507672 = + (_theResult___fst_exp__h506914 == 11'd2047) ? + _theResult___fst_exp__h506914 : + _theResult___fst_exp__h507669 ; + assign _theResult___fst_exp__h516491 = + _theResult____h508255[56] ? 11'd2 : - _theResult___fst_exp__h516564 ; - assign _theResult___fst_exp__h516555 = + _theResult___fst_exp__h516565 ; + assign _theResult___fst_exp__h516556 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9006 } ; - assign _theResult___fst_exp__h516561 = - (!_theResult____h508254[56] && !_theResult____h508254[55] && - !_theResult____h508254[54] && - !_theResult____h508254[53] && - !_theResult____h508254[52] && - !_theResult____h508254[51] && - !_theResult____h508254[50] && - !_theResult____h508254[49] && - !_theResult____h508254[48] && - !_theResult____h508254[47] && - !_theResult____h508254[46] && - !_theResult____h508254[45] && - !_theResult____h508254[44] && - !_theResult____h508254[43] && - !_theResult____h508254[42] && - !_theResult____h508254[41] && - !_theResult____h508254[40] && - !_theResult____h508254[39] && - !_theResult____h508254[38] && - !_theResult____h508254[37] && - !_theResult____h508254[36] && - !_theResult____h508254[35] && - !_theResult____h508254[34] && - !_theResult____h508254[33] && - !_theResult____h508254[32] && - !_theResult____h508254[31] && - !_theResult____h508254[30] && - !_theResult____h508254[29] && - !_theResult____h508254[28] && - !_theResult____h508254[27] && - !_theResult____h508254[26] && - !_theResult____h508254[25] && - !_theResult____h508254[24] && - !_theResult____h508254[23] && - !_theResult____h508254[22] && - !_theResult____h508254[21] && - !_theResult____h508254[20] && - !_theResult____h508254[19] && - !_theResult____h508254[18] && - !_theResult____h508254[17] && - !_theResult____h508254[16] && - !_theResult____h508254[15] && - !_theResult____h508254[14] && - !_theResult____h508254[13] && - !_theResult____h508254[12] && - !_theResult____h508254[11] && - !_theResult____h508254[10] && - !_theResult____h508254[9] && - !_theResult____h508254[8] && - !_theResult____h508254[7] && - !_theResult____h508254[6] && - !_theResult____h508254[5] && - !_theResult____h508254[4] && - !_theResult____h508254[3] && - !_theResult____h508254[2] && - !_theResult____h508254[1] && - !_theResult____h508254[0] || + assign _theResult___fst_exp__h516562 = + (!_theResult____h508255[56] && !_theResult____h508255[55] && + !_theResult____h508255[54] && + !_theResult____h508255[53] && + !_theResult____h508255[52] && + !_theResult____h508255[51] && + !_theResult____h508255[50] && + !_theResult____h508255[49] && + !_theResult____h508255[48] && + !_theResult____h508255[47] && + !_theResult____h508255[46] && + !_theResult____h508255[45] && + !_theResult____h508255[44] && + !_theResult____h508255[43] && + !_theResult____h508255[42] && + !_theResult____h508255[41] && + !_theResult____h508255[40] && + !_theResult____h508255[39] && + !_theResult____h508255[38] && + !_theResult____h508255[37] && + !_theResult____h508255[36] && + !_theResult____h508255[35] && + !_theResult____h508255[34] && + !_theResult____h508255[33] && + !_theResult____h508255[32] && + !_theResult____h508255[31] && + !_theResult____h508255[30] && + !_theResult____h508255[29] && + !_theResult____h508255[28] && + !_theResult____h508255[27] && + !_theResult____h508255[26] && + !_theResult____h508255[25] && + !_theResult____h508255[24] && + !_theResult____h508255[23] && + !_theResult____h508255[22] && + !_theResult____h508255[21] && + !_theResult____h508255[20] && + !_theResult____h508255[19] && + !_theResult____h508255[18] && + !_theResult____h508255[17] && + !_theResult____h508255[16] && + !_theResult____h508255[15] && + !_theResult____h508255[14] && + !_theResult____h508255[13] && + !_theResult____h508255[12] && + !_theResult____h508255[11] && + !_theResult____h508255[10] && + !_theResult____h508255[9] && + !_theResult____h508255[8] && + !_theResult____h508255[7] && + !_theResult____h508255[6] && + !_theResult____h508255[5] && + !_theResult____h508255[4] && + !_theResult____h508255[3] && + !_theResult____h508255[2] && + !_theResult____h508255[1] && + !_theResult____h508255[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9008) ? 11'd0 : - _theResult___fst_exp__h516555 ; - assign _theResult___fst_exp__h516564 = - (!_theResult____h508254[56] && _theResult____h508254[55]) ? + _theResult___fst_exp__h516556 ; + assign _theResult___fst_exp__h516565 = + (!_theResult____h508255[56] && _theResult____h508255[55]) ? 11'd1 : - _theResult___fst_exp__h516561 ; - assign _theResult___fst_exp__h517319 = + _theResult___fst_exp__h516562 ; + assign _theResult___fst_exp__h517320 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q204 : + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q204 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9173 ; - assign _theResult___fst_exp__h517322 = - (_theResult___fst_exp__h516490 == 11'd2047) ? - _theResult___fst_exp__h516490 : - _theResult___fst_exp__h517319 ; - assign _theResult___fst_exp__h525275 = + assign _theResult___fst_exp__h517323 = + (_theResult___fst_exp__h516491 == 11'd2047) ? + _theResult___fst_exp__h516491 : + _theResult___fst_exp__h517320 ; + assign _theResult___fst_exp__h525276 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q129[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q129[10:0] ; - assign _theResult___fst_exp__h525314 = + assign _theResult___fst_exp__h525315 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q129[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8694 } ; - assign _theResult___fst_exp__h525320 = - (f1_exp__h487525 == 8'd0 && !f1_sfd__h487526[22] && + assign _theResult___fst_exp__h525321 = + (f1_exp__h487526 == 8'd0 && !f1_sfd__h487527[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8667 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9058) ? 11'd0 : - _theResult___fst_exp__h525314 ; - assign _theResult___fst_exp__h525323 = - (f1_exp__h487525 == 8'd0) ? - _theResult___fst_exp__h525320 : - _theResult___fst_exp__h525275 ; - assign _theResult___fst_exp__h526103 = + _theResult___fst_exp__h525315 ; + assign _theResult___fst_exp__h525324 = + (f1_exp__h487526 == 8'd0) ? + _theResult___fst_exp__h525321 : + _theResult___fst_exp__h525276 ; + assign _theResult___fst_exp__h526104 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q206 : + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q206 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9204 ; - assign _theResult___fst_exp__h526106 = - (_theResult___fst_exp__h525323 == 11'd2047) ? - _theResult___fst_exp__h525323 : - _theResult___fst_exp__h526103 ; - assign _theResult___fst_exp__h526115 = - (f1_exp__h487525 == 8'd0) ? + assign _theResult___fst_exp__h526107 = + (_theResult___fst_exp__h525324 == 11'd2047) ? + _theResult___fst_exp__h525324 : + _theResult___fst_exp__h526104 ; + assign _theResult___fst_exp__h526116 = + (f1_exp__h487526 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 ? - _theResult___snd_fst_exp__h507674 : - _theResult___fst_exp__h491840) : + _theResult___snd_fst_exp__h507675 : + _theResult___fst_exp__h491841) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 ? - _theResult___snd_fst_exp__h526109 : - _theResult___fst_exp__h491840) ; - assign _theResult___fst_exp__h526118 = - (f1_exp__h487525 == 8'd0 && f1_sfd__h487526 == 23'd0) ? + _theResult___snd_fst_exp__h526110 : + _theResult___fst_exp__h491841) ; + assign _theResult___fst_exp__h526119 = + (f1_exp__h487526 == 8'd0 && f1_sfd__h487527 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h526115 ; - assign _theResult___fst_exp__h530693 = + _theResult___fst_exp__h526116 ; + assign _theResult___fst_exp__h530694 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q9 ; - assign _theResult___fst_exp__h545757 = + assign _theResult___fst_exp__h545758 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10194 } ; - assign _theResult___fst_exp__h545763 = - (f2_exp__h526519 == 8'd0 && !f2_sfd__h526520[22] && + assign _theResult___fst_exp__h545764 = + (f2_exp__h526520 == 8'd0 && !f2_sfd__h526521[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10167 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10196) ? 11'd0 : - _theResult___fst_exp__h545757 ; - assign _theResult___fst_exp__h545766 = - (f2_exp__h526519 == 8'd0) ? - _theResult___fst_exp__h545763 : + _theResult___fst_exp__h545758 ; + assign _theResult___fst_exp__h545767 = + (f2_exp__h526520 == 8'd0) ? + _theResult___fst_exp__h545764 : 11'd897 ; - assign _theResult___fst_exp__h546521 = + assign _theResult___fst_exp__h546522 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q176 : + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q176 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615 ; - assign _theResult___fst_exp__h546524 = - (_theResult___fst_exp__h545766 == 11'd2047) ? - _theResult___fst_exp__h545766 : - _theResult___fst_exp__h546521 ; - assign _theResult___fst_exp__h555343 = - _theResult____h547107[56] ? + assign _theResult___fst_exp__h546525 = + (_theResult___fst_exp__h545767 == 11'd2047) ? + _theResult___fst_exp__h545767 : + _theResult___fst_exp__h546522 ; + assign _theResult___fst_exp__h555344 = + _theResult____h547108[56] ? 11'd2 : - _theResult___fst_exp__h555417 ; - assign _theResult___fst_exp__h555408 = + _theResult___fst_exp__h555418 ; + assign _theResult___fst_exp__h555409 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10491 } ; - assign _theResult___fst_exp__h555414 = - (!_theResult____h547107[56] && !_theResult____h547107[55] && - !_theResult____h547107[54] && - !_theResult____h547107[53] && - !_theResult____h547107[52] && - !_theResult____h547107[51] && - !_theResult____h547107[50] && - !_theResult____h547107[49] && - !_theResult____h547107[48] && - !_theResult____h547107[47] && - !_theResult____h547107[46] && - !_theResult____h547107[45] && - !_theResult____h547107[44] && - !_theResult____h547107[43] && - !_theResult____h547107[42] && - !_theResult____h547107[41] && - !_theResult____h547107[40] && - !_theResult____h547107[39] && - !_theResult____h547107[38] && - !_theResult____h547107[37] && - !_theResult____h547107[36] && - !_theResult____h547107[35] && - !_theResult____h547107[34] && - !_theResult____h547107[33] && - !_theResult____h547107[32] && - !_theResult____h547107[31] && - !_theResult____h547107[30] && - !_theResult____h547107[29] && - !_theResult____h547107[28] && - !_theResult____h547107[27] && - !_theResult____h547107[26] && - !_theResult____h547107[25] && - !_theResult____h547107[24] && - !_theResult____h547107[23] && - !_theResult____h547107[22] && - !_theResult____h547107[21] && - !_theResult____h547107[20] && - !_theResult____h547107[19] && - !_theResult____h547107[18] && - !_theResult____h547107[17] && - !_theResult____h547107[16] && - !_theResult____h547107[15] && - !_theResult____h547107[14] && - !_theResult____h547107[13] && - !_theResult____h547107[12] && - !_theResult____h547107[11] && - !_theResult____h547107[10] && - !_theResult____h547107[9] && - !_theResult____h547107[8] && - !_theResult____h547107[7] && - !_theResult____h547107[6] && - !_theResult____h547107[5] && - !_theResult____h547107[4] && - !_theResult____h547107[3] && - !_theResult____h547107[2] && - !_theResult____h547107[1] && - !_theResult____h547107[0] || + assign _theResult___fst_exp__h555415 = + (!_theResult____h547108[56] && !_theResult____h547108[55] && + !_theResult____h547108[54] && + !_theResult____h547108[53] && + !_theResult____h547108[52] && + !_theResult____h547108[51] && + !_theResult____h547108[50] && + !_theResult____h547108[49] && + !_theResult____h547108[48] && + !_theResult____h547108[47] && + !_theResult____h547108[46] && + !_theResult____h547108[45] && + !_theResult____h547108[44] && + !_theResult____h547108[43] && + !_theResult____h547108[42] && + !_theResult____h547108[41] && + !_theResult____h547108[40] && + !_theResult____h547108[39] && + !_theResult____h547108[38] && + !_theResult____h547108[37] && + !_theResult____h547108[36] && + !_theResult____h547108[35] && + !_theResult____h547108[34] && + !_theResult____h547108[33] && + !_theResult____h547108[32] && + !_theResult____h547108[31] && + !_theResult____h547108[30] && + !_theResult____h547108[29] && + !_theResult____h547108[28] && + !_theResult____h547108[27] && + !_theResult____h547108[26] && + !_theResult____h547108[25] && + !_theResult____h547108[24] && + !_theResult____h547108[23] && + !_theResult____h547108[22] && + !_theResult____h547108[21] && + !_theResult____h547108[20] && + !_theResult____h547108[19] && + !_theResult____h547108[18] && + !_theResult____h547108[17] && + !_theResult____h547108[16] && + !_theResult____h547108[15] && + !_theResult____h547108[14] && + !_theResult____h547108[13] && + !_theResult____h547108[12] && + !_theResult____h547108[11] && + !_theResult____h547108[10] && + !_theResult____h547108[9] && + !_theResult____h547108[8] && + !_theResult____h547108[7] && + !_theResult____h547108[6] && + !_theResult____h547108[5] && + !_theResult____h547108[4] && + !_theResult____h547108[3] && + !_theResult____h547108[2] && + !_theResult____h547108[1] && + !_theResult____h547108[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10493) ? 11'd0 : - _theResult___fst_exp__h555408 ; - assign _theResult___fst_exp__h555417 = - (!_theResult____h547107[56] && _theResult____h547107[55]) ? + _theResult___fst_exp__h555409 ; + assign _theResult___fst_exp__h555418 = + (!_theResult____h547108[56] && _theResult____h547108[55]) ? 11'd1 : - _theResult___fst_exp__h555414 ; - assign _theResult___fst_exp__h556172 = + _theResult___fst_exp__h555415 ; + assign _theResult___fst_exp__h556173 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q178 : + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q178 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653 ; - assign _theResult___fst_exp__h556175 = - (_theResult___fst_exp__h555343 == 11'd2047) ? - _theResult___fst_exp__h555343 : - _theResult___fst_exp__h556172 ; - assign _theResult___fst_exp__h564128 = + assign _theResult___fst_exp__h556176 = + (_theResult___fst_exp__h555344 == 11'd2047) ? + _theResult___fst_exp__h555344 : + _theResult___fst_exp__h556173 ; + assign _theResult___fst_exp__h564129 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q169[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q169[10:0] ; - assign _theResult___fst_exp__h564167 = + assign _theResult___fst_exp__h564168 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q169[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10194 } ; - assign _theResult___fst_exp__h564173 = - (f2_exp__h526519 == 8'd0 && !f2_sfd__h526520[22] && + assign _theResult___fst_exp__h564174 = + (f2_exp__h526520 == 8'd0 && !f2_sfd__h526521[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10167 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10543) ? 11'd0 : - _theResult___fst_exp__h564167 ; - assign _theResult___fst_exp__h564176 = - (f2_exp__h526519 == 8'd0) ? - _theResult___fst_exp__h564173 : - _theResult___fst_exp__h564128 ; - assign _theResult___fst_exp__h564956 = + _theResult___fst_exp__h564168 ; + assign _theResult___fst_exp__h564177 = + (f2_exp__h526520 == 8'd0) ? + _theResult___fst_exp__h564174 : + _theResult___fst_exp__h564129 ; + assign _theResult___fst_exp__h564957 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q180 : + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q180 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684 ; - assign _theResult___fst_exp__h564959 = - (_theResult___fst_exp__h564176 == 11'd2047) ? - _theResult___fst_exp__h564176 : - _theResult___fst_exp__h564956 ; - assign _theResult___fst_exp__h564968 = - (f2_exp__h526519 == 8'd0) ? + assign _theResult___fst_exp__h564960 = + (_theResult___fst_exp__h564177 == 11'd2047) ? + _theResult___fst_exp__h564177 : + _theResult___fst_exp__h564957 ; + assign _theResult___fst_exp__h564969 = + (f2_exp__h526520 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 ? - _theResult___snd_fst_exp__h546527 : - _theResult___fst_exp__h530693) : + _theResult___snd_fst_exp__h546528 : + _theResult___fst_exp__h530694) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 ? - _theResult___snd_fst_exp__h564962 : - _theResult___fst_exp__h530693) ; - assign _theResult___fst_exp__h564971 = - (f2_exp__h526519 == 8'd0 && f2_sfd__h526520 == 23'd0) ? + _theResult___snd_fst_exp__h564963 : + _theResult___fst_exp__h530694) ; + assign _theResult___fst_exp__h564972 = + (f2_exp__h526520 == 8'd0 && f2_sfd__h526521 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h564968 ; - assign _theResult___fst_exp__h569997 = + _theResult___fst_exp__h564969 ; + assign _theResult___fst_exp__h569998 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q11 ; - assign _theResult___fst_exp__h585061 = + assign _theResult___fst_exp__h585062 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9424 } ; - assign _theResult___fst_exp__h585067 = - (f3_exp__h565823 == 8'd0 && !f3_sfd__h565824[22] && + assign _theResult___fst_exp__h585068 = + (f3_exp__h565824 == 8'd0 && !f3_sfd__h565825[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9397 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9426) ? 11'd0 : - _theResult___fst_exp__h585061 ; - assign _theResult___fst_exp__h585070 = - (f3_exp__h565823 == 8'd0) ? - _theResult___fst_exp__h585067 : + _theResult___fst_exp__h585062 ; + assign _theResult___fst_exp__h585071 = + (f3_exp__h565824 == 8'd0) ? + _theResult___fst_exp__h585068 : 11'd897 ; - assign _theResult___fst_exp__h585825 = + assign _theResult___fst_exp__h585826 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q153 : + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q153 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845 ; - assign _theResult___fst_exp__h585828 = - (_theResult___fst_exp__h585070 == 11'd2047) ? - _theResult___fst_exp__h585070 : - _theResult___fst_exp__h585825 ; - assign _theResult___fst_exp__h594647 = - _theResult____h586411[56] ? + assign _theResult___fst_exp__h585829 = + (_theResult___fst_exp__h585071 == 11'd2047) ? + _theResult___fst_exp__h585071 : + _theResult___fst_exp__h585826 ; + assign _theResult___fst_exp__h594648 = + _theResult____h586412[56] ? 11'd2 : - _theResult___fst_exp__h594721 ; - assign _theResult___fst_exp__h594712 = + _theResult___fst_exp__h594722 ; + assign _theResult___fst_exp__h594713 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9721 } ; - assign _theResult___fst_exp__h594718 = - (!_theResult____h586411[56] && !_theResult____h586411[55] && - !_theResult____h586411[54] && - !_theResult____h586411[53] && - !_theResult____h586411[52] && - !_theResult____h586411[51] && - !_theResult____h586411[50] && - !_theResult____h586411[49] && - !_theResult____h586411[48] && - !_theResult____h586411[47] && - !_theResult____h586411[46] && - !_theResult____h586411[45] && - !_theResult____h586411[44] && - !_theResult____h586411[43] && - !_theResult____h586411[42] && - !_theResult____h586411[41] && - !_theResult____h586411[40] && - !_theResult____h586411[39] && - !_theResult____h586411[38] && - !_theResult____h586411[37] && - !_theResult____h586411[36] && - !_theResult____h586411[35] && - !_theResult____h586411[34] && - !_theResult____h586411[33] && - !_theResult____h586411[32] && - !_theResult____h586411[31] && - !_theResult____h586411[30] && - !_theResult____h586411[29] && - !_theResult____h586411[28] && - !_theResult____h586411[27] && - !_theResult____h586411[26] && - !_theResult____h586411[25] && - !_theResult____h586411[24] && - !_theResult____h586411[23] && - !_theResult____h586411[22] && - !_theResult____h586411[21] && - !_theResult____h586411[20] && - !_theResult____h586411[19] && - !_theResult____h586411[18] && - !_theResult____h586411[17] && - !_theResult____h586411[16] && - !_theResult____h586411[15] && - !_theResult____h586411[14] && - !_theResult____h586411[13] && - !_theResult____h586411[12] && - !_theResult____h586411[11] && - !_theResult____h586411[10] && - !_theResult____h586411[9] && - !_theResult____h586411[8] && - !_theResult____h586411[7] && - !_theResult____h586411[6] && - !_theResult____h586411[5] && - !_theResult____h586411[4] && - !_theResult____h586411[3] && - !_theResult____h586411[2] && - !_theResult____h586411[1] && - !_theResult____h586411[0] || + assign _theResult___fst_exp__h594719 = + (!_theResult____h586412[56] && !_theResult____h586412[55] && + !_theResult____h586412[54] && + !_theResult____h586412[53] && + !_theResult____h586412[52] && + !_theResult____h586412[51] && + !_theResult____h586412[50] && + !_theResult____h586412[49] && + !_theResult____h586412[48] && + !_theResult____h586412[47] && + !_theResult____h586412[46] && + !_theResult____h586412[45] && + !_theResult____h586412[44] && + !_theResult____h586412[43] && + !_theResult____h586412[42] && + !_theResult____h586412[41] && + !_theResult____h586412[40] && + !_theResult____h586412[39] && + !_theResult____h586412[38] && + !_theResult____h586412[37] && + !_theResult____h586412[36] && + !_theResult____h586412[35] && + !_theResult____h586412[34] && + !_theResult____h586412[33] && + !_theResult____h586412[32] && + !_theResult____h586412[31] && + !_theResult____h586412[30] && + !_theResult____h586412[29] && + !_theResult____h586412[28] && + !_theResult____h586412[27] && + !_theResult____h586412[26] && + !_theResult____h586412[25] && + !_theResult____h586412[24] && + !_theResult____h586412[23] && + !_theResult____h586412[22] && + !_theResult____h586412[21] && + !_theResult____h586412[20] && + !_theResult____h586412[19] && + !_theResult____h586412[18] && + !_theResult____h586412[17] && + !_theResult____h586412[16] && + !_theResult____h586412[15] && + !_theResult____h586412[14] && + !_theResult____h586412[13] && + !_theResult____h586412[12] && + !_theResult____h586412[11] && + !_theResult____h586412[10] && + !_theResult____h586412[9] && + !_theResult____h586412[8] && + !_theResult____h586412[7] && + !_theResult____h586412[6] && + !_theResult____h586412[5] && + !_theResult____h586412[4] && + !_theResult____h586412[3] && + !_theResult____h586412[2] && + !_theResult____h586412[1] && + !_theResult____h586412[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9723) ? 11'd0 : - _theResult___fst_exp__h594712 ; - assign _theResult___fst_exp__h594721 = - (!_theResult____h586411[56] && _theResult____h586411[55]) ? + _theResult___fst_exp__h594713 ; + assign _theResult___fst_exp__h594722 = + (!_theResult____h586412[56] && _theResult____h586412[55]) ? 11'd1 : - _theResult___fst_exp__h594718 ; - assign _theResult___fst_exp__h595476 = + _theResult___fst_exp__h594719 ; + assign _theResult___fst_exp__h595477 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q184 : + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q184 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883 ; - assign _theResult___fst_exp__h595479 = - (_theResult___fst_exp__h594647 == 11'd2047) ? - _theResult___fst_exp__h594647 : - _theResult___fst_exp__h595476 ; - assign _theResult___fst_exp__h603432 = + assign _theResult___fst_exp__h595480 = + (_theResult___fst_exp__h594648 == 11'd2047) ? + _theResult___fst_exp__h594648 : + _theResult___fst_exp__h595477 ; + assign _theResult___fst_exp__h603433 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q146[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q146[10:0] ; - assign _theResult___fst_exp__h603471 = + assign _theResult___fst_exp__h603472 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q146[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9424 } ; - assign _theResult___fst_exp__h603477 = - (f3_exp__h565823 == 8'd0 && !f3_sfd__h565824[22] && + assign _theResult___fst_exp__h603478 = + (f3_exp__h565824 == 8'd0 && !f3_sfd__h565825[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9397 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9773) ? 11'd0 : - _theResult___fst_exp__h603471 ; - assign _theResult___fst_exp__h603480 = - (f3_exp__h565823 == 8'd0) ? - _theResult___fst_exp__h603477 : - _theResult___fst_exp__h603432 ; - assign _theResult___fst_exp__h604260 = + _theResult___fst_exp__h603472 ; + assign _theResult___fst_exp__h603481 = + (f3_exp__h565824 == 8'd0) ? + _theResult___fst_exp__h603478 : + _theResult___fst_exp__h603433 ; + assign _theResult___fst_exp__h604261 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q182 : + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q182 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914 ; - assign _theResult___fst_exp__h604263 = - (_theResult___fst_exp__h603480 == 11'd2047) ? - _theResult___fst_exp__h603480 : - _theResult___fst_exp__h604260 ; - assign _theResult___fst_exp__h604272 = - (f3_exp__h565823 == 8'd0) ? + assign _theResult___fst_exp__h604264 = + (_theResult___fst_exp__h603481 == 11'd2047) ? + _theResult___fst_exp__h603481 : + _theResult___fst_exp__h604261 ; + assign _theResult___fst_exp__h604273 = + (f3_exp__h565824 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 ? - _theResult___snd_fst_exp__h585831 : - _theResult___fst_exp__h569997) : + _theResult___snd_fst_exp__h585832 : + _theResult___fst_exp__h569998) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 ? - _theResult___snd_fst_exp__h604266 : - _theResult___fst_exp__h569997) ; - assign _theResult___fst_exp__h604275 = - (f3_exp__h565823 == 8'd0 && f3_sfd__h565824 == 23'd0) ? + _theResult___snd_fst_exp__h604267 : + _theResult___fst_exp__h569998) ; + assign _theResult___fst_exp__h604276 = + (f3_exp__h565824 == 8'd0 && f3_sfd__h565825 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h604272 ; - assign _theResult___fst_sfd__h359443 = - (_theResult___fst_exp__h358845 == 8'd255) ? - sfdin__h358839[56:34] : - _theResult___fst_sfd__h359440 ; - assign _theResult___fst_sfd__h368025 = - (_theResult___fst_exp__h367501 == 8'd255) ? - _theResult___snd__h367452[56:34] : - _theResult___fst_sfd__h368022 ; - assign _theResult___fst_sfd__h377209 = - (_theResult___fst_exp__h376611 == 8'd255) ? - sfdin__h376605[56:34] : - _theResult___fst_sfd__h377206 ; - assign _theResult___fst_sfd__h385845 = - (_theResult___fst_exp__h385296 == 8'd255) ? - _theResult___snd__h385242[56:34] : - _theResult___fst_sfd__h385842 ; - assign _theResult___fst_sfd__h385854 = + _theResult___fst_exp__h604273 ; + assign _theResult___fst_sfd__h359444 = + (_theResult___fst_exp__h358846 == 8'd255) ? + sfdin__h358840[56:34] : + _theResult___fst_sfd__h359441 ; + assign _theResult___fst_sfd__h368026 = + (_theResult___fst_exp__h367502 == 8'd255) ? + _theResult___snd__h367453[56:34] : + _theResult___fst_sfd__h368023 ; + assign _theResult___fst_sfd__h377210 = + (_theResult___fst_exp__h376612 == 8'd255) ? + sfdin__h376606[56:34] : + _theResult___fst_sfd__h377207 ; + assign _theResult___fst_sfd__h385846 = + (_theResult___fst_exp__h385297 == 8'd255) ? + _theResult___snd__h385243[56:34] : + _theResult___fst_sfd__h385843 ; + assign _theResult___fst_sfd__h385855 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4108 ? - _theResult___snd_fst_sfd__h368028 : - _theResult___fst_sfd__h350717) : + _theResult___snd_fst_sfd__h368029 : + _theResult___fst_sfd__h350718) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4648 ? - _theResult___snd_fst_sfd__h385848 : - _theResult___fst_sfd__h350717) ; - assign _theResult___fst_sfd__h385860 = + _theResult___snd_fst_sfd__h385849 : + _theResult___fst_sfd__h350718) ; + assign _theResult___fst_sfd__h385861 = ((coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == @@ -26199,33 +26199,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h385854 ; - assign _theResult___fst_sfd__h405140 = - (_theResult___fst_exp__h404542 == 8'd255) ? - sfdin__h404536[56:34] : - _theResult___fst_sfd__h405137 ; - assign _theResult___fst_sfd__h413722 = - (_theResult___fst_exp__h413198 == 8'd255) ? - _theResult___snd__h413149[56:34] : - _theResult___fst_sfd__h413719 ; - assign _theResult___fst_sfd__h422906 = - (_theResult___fst_exp__h422308 == 8'd255) ? - sfdin__h422302[56:34] : - _theResult___fst_sfd__h422903 ; - assign _theResult___fst_sfd__h431542 = - (_theResult___fst_exp__h430993 == 8'd255) ? - _theResult___snd__h430939[56:34] : - _theResult___fst_sfd__h431539 ; - assign _theResult___fst_sfd__h431551 = + _theResult___fst_sfd__h385855 ; + assign _theResult___fst_sfd__h405141 = + (_theResult___fst_exp__h404543 == 8'd255) ? + sfdin__h404537[56:34] : + _theResult___fst_sfd__h405138 ; + assign _theResult___fst_sfd__h413723 = + (_theResult___fst_exp__h413199 == 8'd255) ? + _theResult___snd__h413150[56:34] : + _theResult___fst_sfd__h413720 ; + assign _theResult___fst_sfd__h422907 = + (_theResult___fst_exp__h422309 == 8'd255) ? + sfdin__h422303[56:34] : + _theResult___fst_sfd__h422904 ; + assign _theResult___fst_sfd__h431543 = + (_theResult___fst_exp__h430994 == 8'd255) ? + _theResult___snd__h430940[56:34] : + _theResult___fst_sfd__h431540 ; + assign _theResult___fst_sfd__h431552 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5500 ? - _theResult___snd_fst_sfd__h413725 : - _theResult___fst_sfd__h396416) : + _theResult___snd_fst_sfd__h413726 : + _theResult___fst_sfd__h396417) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6040 ? - _theResult___snd_fst_sfd__h431545 : - _theResult___fst_sfd__h396416) ; - assign _theResult___fst_sfd__h431557 = + _theResult___snd_fst_sfd__h431546 : + _theResult___fst_sfd__h396417) ; + assign _theResult___fst_sfd__h431558 = ((coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == @@ -26233,33 +26233,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h431551 ; - assign _theResult___fst_sfd__h450835 = - (_theResult___fst_exp__h450237 == 8'd255) ? - sfdin__h450231[56:34] : - _theResult___fst_sfd__h450832 ; - assign _theResult___fst_sfd__h459417 = - (_theResult___fst_exp__h458893 == 8'd255) ? - _theResult___snd__h458844[56:34] : - _theResult___fst_sfd__h459414 ; - assign _theResult___fst_sfd__h468601 = - (_theResult___fst_exp__h468003 == 8'd255) ? - sfdin__h467997[56:34] : - _theResult___fst_sfd__h468598 ; - assign _theResult___fst_sfd__h477237 = - (_theResult___fst_exp__h476688 == 8'd255) ? - _theResult___snd__h476634[56:34] : - _theResult___fst_sfd__h477234 ; - assign _theResult___fst_sfd__h477246 = + _theResult___fst_sfd__h431552 ; + assign _theResult___fst_sfd__h450836 = + (_theResult___fst_exp__h450238 == 8'd255) ? + sfdin__h450232[56:34] : + _theResult___fst_sfd__h450833 ; + assign _theResult___fst_sfd__h459418 = + (_theResult___fst_exp__h458894 == 8'd255) ? + _theResult___snd__h458845[56:34] : + _theResult___fst_sfd__h459415 ; + assign _theResult___fst_sfd__h468602 = + (_theResult___fst_exp__h468004 == 8'd255) ? + sfdin__h467998[56:34] : + _theResult___fst_sfd__h468599 ; + assign _theResult___fst_sfd__h477238 = + (_theResult___fst_exp__h476689 == 8'd255) ? + _theResult___snd__h476635[56:34] : + _theResult___fst_sfd__h477235 ; + assign _theResult___fst_sfd__h477247 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6892 ? - _theResult___snd_fst_sfd__h459420 : - _theResult___fst_sfd__h442111) : + _theResult___snd_fst_sfd__h459421 : + _theResult___fst_sfd__h442112) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7432 ? - _theResult___snd_fst_sfd__h477240 : - _theResult___fst_sfd__h442111) ; - assign _theResult___fst_sfd__h477252 = + _theResult___snd_fst_sfd__h477241 : + _theResult___fst_sfd__h442112) ; + assign _theResult___fst_sfd__h477253 = ((coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == @@ -26267,1312 +26267,1312 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h477246 ; - assign _theResult___fst_sfd__h491841 = + _theResult___fst_sfd__h477247 ; + assign _theResult___fst_sfd__h491842 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q8 ; - assign _theResult___fst_sfd__h507669 = + assign _theResult___fst_sfd__h507670 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q208 : + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q208 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9230 ; - assign _theResult___fst_sfd__h507672 = - (_theResult___fst_exp__h506913 == 11'd2047) ? - _theResult___snd__h506864[56:5] : - _theResult___fst_sfd__h507669 ; - assign _theResult___fst_sfd__h517320 = + assign _theResult___fst_sfd__h507673 = + (_theResult___fst_exp__h506914 == 11'd2047) ? + _theResult___snd__h506865[56:5] : + _theResult___fst_sfd__h507670 ; + assign _theResult___fst_sfd__h517321 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q210 : + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q210 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9257 ; - assign _theResult___fst_sfd__h517323 = - (_theResult___fst_exp__h516490 == 11'd2047) ? - sfdin__h516484[56:5] : - _theResult___fst_sfd__h517320 ; - assign _theResult___fst_sfd__h526104 = + assign _theResult___fst_sfd__h517324 = + (_theResult___fst_exp__h516491 == 11'd2047) ? + sfdin__h516485[56:5] : + _theResult___fst_sfd__h517321 ; + assign _theResult___fst_sfd__h526105 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q212 : + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q212 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9276 ; - assign _theResult___fst_sfd__h526107 = - (_theResult___fst_exp__h525323 == 11'd2047) ? - _theResult___snd__h525269[56:5] : - _theResult___fst_sfd__h526104 ; - assign _theResult___fst_sfd__h526116 = - (f1_exp__h487525 == 8'd0) ? + assign _theResult___fst_sfd__h526108 = + (_theResult___fst_exp__h525324 == 11'd2047) ? + _theResult___snd__h525270[56:5] : + _theResult___fst_sfd__h526105 ; + assign _theResult___fst_sfd__h526117 = + (f1_exp__h487526 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8621 ? - _theResult___snd_fst_sfd__h507675 : - _theResult___fst_sfd__h491841) : + _theResult___snd_fst_sfd__h507676 : + _theResult___fst_sfd__h491842) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8758 ? - _theResult___snd_fst_sfd__h526110 : - _theResult___fst_sfd__h491841) ; - assign _theResult___fst_sfd__h526122 = - ((f1_exp__h487525 == 8'd255 || f1_exp__h487525 == 8'd0) && - f1_sfd__h487526 == 23'd0) ? + _theResult___snd_fst_sfd__h526111 : + _theResult___fst_sfd__h491842) ; + assign _theResult___fst_sfd__h526123 = + ((f1_exp__h487526 == 8'd255 || f1_exp__h487526 == 8'd0) && + f1_sfd__h487527 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h526116 ; - assign _theResult___fst_sfd__h530694 = + _theResult___fst_sfd__h526117 ; + assign _theResult___fst_sfd__h530695 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q10 ; - assign _theResult___fst_sfd__h546522 = + assign _theResult___fst_sfd__h546523 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q198 : + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q198 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710 ; - assign _theResult___fst_sfd__h546525 = - (_theResult___fst_exp__h545766 == 11'd2047) ? - _theResult___snd__h545717[56:5] : - _theResult___fst_sfd__h546522 ; - assign _theResult___fst_sfd__h556173 = + assign _theResult___fst_sfd__h546526 = + (_theResult___fst_exp__h545767 == 11'd2047) ? + _theResult___snd__h545718[56:5] : + _theResult___fst_sfd__h546523 ; + assign _theResult___fst_sfd__h556174 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q200 : + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q200 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736 ; - assign _theResult___fst_sfd__h556176 = - (_theResult___fst_exp__h555343 == 11'd2047) ? - sfdin__h555337[56:5] : - _theResult___fst_sfd__h556173 ; - assign _theResult___fst_sfd__h564957 = + assign _theResult___fst_sfd__h556177 = + (_theResult___fst_exp__h555344 == 11'd2047) ? + sfdin__h555338[56:5] : + _theResult___fst_sfd__h556174 ; + assign _theResult___fst_sfd__h564958 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q202 : + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q202 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755 ; - assign _theResult___fst_sfd__h564960 = - (_theResult___fst_exp__h564176 == 11'd2047) ? - _theResult___snd__h564122[56:5] : - _theResult___fst_sfd__h564957 ; - assign _theResult___fst_sfd__h564969 = - (f2_exp__h526519 == 8'd0) ? + assign _theResult___fst_sfd__h564961 = + (_theResult___fst_exp__h564177 == 11'd2047) ? + _theResult___snd__h564123[56:5] : + _theResult___fst_sfd__h564958 ; + assign _theResult___fst_sfd__h564970 = + (f2_exp__h526520 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10121 ? - _theResult___snd_fst_sfd__h546528 : - _theResult___fst_sfd__h530694) : + _theResult___snd_fst_sfd__h546529 : + _theResult___fst_sfd__h530695) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10243 ? - _theResult___snd_fst_sfd__h564963 : - _theResult___fst_sfd__h530694) ; - assign _theResult___fst_sfd__h564975 = - ((f2_exp__h526519 == 8'd255 || f2_exp__h526519 == 8'd0) && - f2_sfd__h526520 == 23'd0) ? + _theResult___snd_fst_sfd__h564964 : + _theResult___fst_sfd__h530695) ; + assign _theResult___fst_sfd__h564976 = + ((f2_exp__h526520 == 8'd255 || f2_exp__h526520 == 8'd0) && + f2_sfd__h526521 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h564969 ; - assign _theResult___fst_sfd__h569998 = + _theResult___fst_sfd__h564970 ; + assign _theResult___fst_sfd__h569999 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q12 ; - assign _theResult___fst_sfd__h585826 = + assign _theResult___fst_sfd__h585827 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q214 : + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q214 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9940 ; - assign _theResult___fst_sfd__h585829 = - (_theResult___fst_exp__h585070 == 11'd2047) ? - _theResult___snd__h585021[56:5] : - _theResult___fst_sfd__h585826 ; - assign _theResult___fst_sfd__h595477 = + assign _theResult___fst_sfd__h585830 = + (_theResult___fst_exp__h585071 == 11'd2047) ? + _theResult___snd__h585022[56:5] : + _theResult___fst_sfd__h585827 ; + assign _theResult___fst_sfd__h595478 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q216 : + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q216 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9966 ; - assign _theResult___fst_sfd__h595480 = - (_theResult___fst_exp__h594647 == 11'd2047) ? - sfdin__h594641[56:5] : - _theResult___fst_sfd__h595477 ; - assign _theResult___fst_sfd__h604261 = + assign _theResult___fst_sfd__h595481 = + (_theResult___fst_exp__h594648 == 11'd2047) ? + sfdin__h594642[56:5] : + _theResult___fst_sfd__h595478 ; + assign _theResult___fst_sfd__h604262 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q218 : + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q218 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985 ; - assign _theResult___fst_sfd__h604264 = - (_theResult___fst_exp__h603480 == 11'd2047) ? - _theResult___snd__h603426[56:5] : - _theResult___fst_sfd__h604261 ; - assign _theResult___fst_sfd__h604273 = - (f3_exp__h565823 == 8'd0) ? + assign _theResult___fst_sfd__h604265 = + (_theResult___fst_exp__h603481 == 11'd2047) ? + _theResult___snd__h603427[56:5] : + _theResult___fst_sfd__h604262 ; + assign _theResult___fst_sfd__h604274 = + (f3_exp__h565824 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9351 ? - _theResult___snd_fst_sfd__h585832 : - _theResult___fst_sfd__h569998) : + _theResult___snd_fst_sfd__h585833 : + _theResult___fst_sfd__h569999) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9473 ? - _theResult___snd_fst_sfd__h604267 : - _theResult___fst_sfd__h569998) ; - assign _theResult___fst_sfd__h604279 = - ((f3_exp__h565823 == 8'd255 || f3_exp__h565823 == 8'd0) && - f3_sfd__h565824 == 23'd0) ? + _theResult___snd_fst_sfd__h604268 : + _theResult___fst_sfd__h569999) ; + assign _theResult___fst_sfd__h604280 = + ((f3_exp__h565824 == 8'd255 || f3_exp__h565824 == 8'd0) && + f3_sfd__h565825 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h604273 ; - assign _theResult___sfd__h359362 = - sfd__h358937[24] ? - ((_theResult___fst_exp__h358845 == 8'd254) ? + _theResult___fst_sfd__h604274 ; + assign _theResult___sfd__h359363 = + sfd__h358938[24] ? + ((_theResult___fst_exp__h358846 == 8'd254) ? 23'd0 : - sfd__h358937[23:1]) : - sfd__h358937[22:0] ; - assign _theResult___sfd__h367944 = - sfd__h367519[24] ? - ((_theResult___fst_exp__h367501 == 8'd254) ? + sfd__h358938[23:1]) : + sfd__h358938[22:0] ; + assign _theResult___sfd__h367945 = + sfd__h367520[24] ? + ((_theResult___fst_exp__h367502 == 8'd254) ? 23'd0 : - sfd__h367519[23:1]) : - sfd__h367519[22:0] ; - assign _theResult___sfd__h377128 = - sfd__h376703[24] ? - ((_theResult___fst_exp__h376611 == 8'd254) ? + sfd__h367520[23:1]) : + sfd__h367520[22:0] ; + assign _theResult___sfd__h377129 = + sfd__h376704[24] ? + ((_theResult___fst_exp__h376612 == 8'd254) ? 23'd0 : - sfd__h376703[23:1]) : - sfd__h376703[22:0] ; - assign _theResult___sfd__h385764 = - sfd__h385315[24] ? - ((_theResult___fst_exp__h385296 == 8'd254) ? + sfd__h376704[23:1]) : + sfd__h376704[22:0] ; + assign _theResult___sfd__h385765 = + sfd__h385316[24] ? + ((_theResult___fst_exp__h385297 == 8'd254) ? 23'd0 : - sfd__h385315[23:1]) : - sfd__h385315[22:0] ; - assign _theResult___sfd__h385866 = + sfd__h385316[23:1]) : + sfd__h385316[22:0] ; + assign _theResult___sfd__h385867 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h343079 : - _theResult___fst_sfd__h385860 ; - assign _theResult___sfd__h405059 = - sfd__h404634[24] ? - ((_theResult___fst_exp__h404542 == 8'd254) ? + _theResult___snd_fst_sfd__h343080 : + _theResult___fst_sfd__h385861 ; + assign _theResult___sfd__h405060 = + sfd__h404635[24] ? + ((_theResult___fst_exp__h404543 == 8'd254) ? 23'd0 : - sfd__h404634[23:1]) : - sfd__h404634[22:0] ; - assign _theResult___sfd__h413641 = - sfd__h413216[24] ? - ((_theResult___fst_exp__h413198 == 8'd254) ? + sfd__h404635[23:1]) : + sfd__h404635[22:0] ; + assign _theResult___sfd__h413642 = + sfd__h413217[24] ? + ((_theResult___fst_exp__h413199 == 8'd254) ? 23'd0 : - sfd__h413216[23:1]) : - sfd__h413216[22:0] ; - assign _theResult___sfd__h422825 = - sfd__h422400[24] ? - ((_theResult___fst_exp__h422308 == 8'd254) ? + sfd__h413217[23:1]) : + sfd__h413217[22:0] ; + assign _theResult___sfd__h422826 = + sfd__h422401[24] ? + ((_theResult___fst_exp__h422309 == 8'd254) ? 23'd0 : - sfd__h422400[23:1]) : - sfd__h422400[22:0] ; - assign _theResult___sfd__h431461 = - sfd__h431012[24] ? - ((_theResult___fst_exp__h430993 == 8'd254) ? + sfd__h422401[23:1]) : + sfd__h422401[22:0] ; + assign _theResult___sfd__h431462 = + sfd__h431013[24] ? + ((_theResult___fst_exp__h430994 == 8'd254) ? 23'd0 : - sfd__h431012[23:1]) : - sfd__h431012[22:0] ; - assign _theResult___sfd__h431563 = + sfd__h431013[23:1]) : + sfd__h431013[22:0] ; + assign _theResult___sfd__h431564 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h388781 : - _theResult___fst_sfd__h431557 ; - assign _theResult___sfd__h450754 = - sfd__h450329[24] ? - ((_theResult___fst_exp__h450237 == 8'd254) ? + _theResult___snd_fst_sfd__h388782 : + _theResult___fst_sfd__h431558 ; + assign _theResult___sfd__h450755 = + sfd__h450330[24] ? + ((_theResult___fst_exp__h450238 == 8'd254) ? 23'd0 : - sfd__h450329[23:1]) : - sfd__h450329[22:0] ; - assign _theResult___sfd__h459336 = - sfd__h458911[24] ? - ((_theResult___fst_exp__h458893 == 8'd254) ? + sfd__h450330[23:1]) : + sfd__h450330[22:0] ; + assign _theResult___sfd__h459337 = + sfd__h458912[24] ? + ((_theResult___fst_exp__h458894 == 8'd254) ? 23'd0 : - sfd__h458911[23:1]) : - sfd__h458911[22:0] ; - assign _theResult___sfd__h468520 = - sfd__h468095[24] ? - ((_theResult___fst_exp__h468003 == 8'd254) ? + sfd__h458912[23:1]) : + sfd__h458912[22:0] ; + assign _theResult___sfd__h468521 = + sfd__h468096[24] ? + ((_theResult___fst_exp__h468004 == 8'd254) ? 23'd0 : - sfd__h468095[23:1]) : - sfd__h468095[22:0] ; - assign _theResult___sfd__h477156 = - sfd__h476707[24] ? - ((_theResult___fst_exp__h476688 == 8'd254) ? + sfd__h468096[23:1]) : + sfd__h468096[22:0] ; + assign _theResult___sfd__h477157 = + sfd__h476708[24] ? + ((_theResult___fst_exp__h476689 == 8'd254) ? 23'd0 : - sfd__h476707[23:1]) : - sfd__h476707[22:0] ; - assign _theResult___sfd__h477258 = + sfd__h476708[23:1]) : + sfd__h476708[22:0] ; + assign _theResult___sfd__h477259 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h434476 : - _theResult___fst_sfd__h477252 ; - assign _theResult___sfd__h507569 = - sfd__h506931[53] ? - ((_theResult___fst_exp__h506913 == 11'd2046) ? + _theResult___snd_fst_sfd__h434477 : + _theResult___fst_sfd__h477253 ; + assign _theResult___sfd__h507570 = + sfd__h506932[53] ? + ((_theResult___fst_exp__h506914 == 11'd2046) ? 52'd0 : - sfd__h506931[52:1]) : - sfd__h506931[51:0] ; - assign _theResult___sfd__h517220 = - sfd__h516582[53] ? - ((_theResult___fst_exp__h516490 == 11'd2046) ? + sfd__h506932[52:1]) : + sfd__h506932[51:0] ; + assign _theResult___sfd__h517221 = + sfd__h516583[53] ? + ((_theResult___fst_exp__h516491 == 11'd2046) ? 52'd0 : - sfd__h516582[52:1]) : - sfd__h516582[51:0] ; - assign _theResult___sfd__h526004 = - sfd__h525342[53] ? - ((_theResult___fst_exp__h525323 == 11'd2046) ? + sfd__h516583[52:1]) : + sfd__h516583[51:0] ; + assign _theResult___sfd__h526005 = + sfd__h525343[53] ? + ((_theResult___fst_exp__h525324 == 11'd2046) ? 52'd0 : - sfd__h525342[52:1]) : - sfd__h525342[51:0] ; - assign _theResult___sfd__h546422 = - sfd__h545784[53] ? - ((_theResult___fst_exp__h545766 == 11'd2046) ? + sfd__h525343[52:1]) : + sfd__h525343[51:0] ; + assign _theResult___sfd__h546423 = + sfd__h545785[53] ? + ((_theResult___fst_exp__h545767 == 11'd2046) ? 52'd0 : - sfd__h545784[52:1]) : - sfd__h545784[51:0] ; - assign _theResult___sfd__h556073 = - sfd__h555435[53] ? - ((_theResult___fst_exp__h555343 == 11'd2046) ? + sfd__h545785[52:1]) : + sfd__h545785[51:0] ; + assign _theResult___sfd__h556074 = + sfd__h555436[53] ? + ((_theResult___fst_exp__h555344 == 11'd2046) ? 52'd0 : - sfd__h555435[52:1]) : - sfd__h555435[51:0] ; - assign _theResult___sfd__h564857 = - sfd__h564195[53] ? - ((_theResult___fst_exp__h564176 == 11'd2046) ? + sfd__h555436[52:1]) : + sfd__h555436[51:0] ; + assign _theResult___sfd__h564858 = + sfd__h564196[53] ? + ((_theResult___fst_exp__h564177 == 11'd2046) ? 52'd0 : - sfd__h564195[52:1]) : - sfd__h564195[51:0] ; - assign _theResult___sfd__h585726 = - sfd__h585088[53] ? - ((_theResult___fst_exp__h585070 == 11'd2046) ? + sfd__h564196[52:1]) : + sfd__h564196[51:0] ; + assign _theResult___sfd__h585727 = + sfd__h585089[53] ? + ((_theResult___fst_exp__h585071 == 11'd2046) ? 52'd0 : - sfd__h585088[52:1]) : - sfd__h585088[51:0] ; - assign _theResult___sfd__h595377 = - sfd__h594739[53] ? - ((_theResult___fst_exp__h594647 == 11'd2046) ? + sfd__h585089[52:1]) : + sfd__h585089[51:0] ; + assign _theResult___sfd__h595378 = + sfd__h594740[53] ? + ((_theResult___fst_exp__h594648 == 11'd2046) ? 52'd0 : - sfd__h594739[52:1]) : - sfd__h594739[51:0] ; - assign _theResult___sfd__h604161 = - sfd__h603499[53] ? - ((_theResult___fst_exp__h603480 == 11'd2046) ? + sfd__h594740[52:1]) : + sfd__h594740[51:0] ; + assign _theResult___sfd__h604162 = + sfd__h603500[53] ? + ((_theResult___fst_exp__h603481 == 11'd2046) ? 52'd0 : - sfd__h603499[52:1]) : - sfd__h603499[51:0] ; - assign _theResult___snd__h358856 = { _theResult____h350734[55:0], 1'd0 } ; - assign _theResult___snd__h358867 = - (!_theResult____h350734[56] && _theResult____h350734[55]) ? - _theResult___snd__h358869 : - _theResult___snd__h358879 ; - assign _theResult___snd__h358869 = { _theResult____h350734[54:0], 2'd0 } ; - assign _theResult___snd__h358879 = - (!_theResult____h350734[56] && !_theResult____h350734[55] && - !_theResult____h350734[54] && - !_theResult____h350734[53] && - !_theResult____h350734[52] && - !_theResult____h350734[51] && - !_theResult____h350734[50] && - !_theResult____h350734[49] && - !_theResult____h350734[48] && - !_theResult____h350734[47] && - !_theResult____h350734[46] && - !_theResult____h350734[45] && - !_theResult____h350734[44] && - !_theResult____h350734[43] && - !_theResult____h350734[42] && - !_theResult____h350734[41] && - !_theResult____h350734[40] && - !_theResult____h350734[39] && - !_theResult____h350734[38] && - !_theResult____h350734[37] && - !_theResult____h350734[36] && - !_theResult____h350734[35] && - !_theResult____h350734[34] && - !_theResult____h350734[33] && - !_theResult____h350734[32] && - !_theResult____h350734[31] && - !_theResult____h350734[30] && - !_theResult____h350734[29] && - !_theResult____h350734[28] && - !_theResult____h350734[27] && - !_theResult____h350734[26] && - !_theResult____h350734[25] && - !_theResult____h350734[24] && - !_theResult____h350734[23] && - !_theResult____h350734[22] && - !_theResult____h350734[21] && - !_theResult____h350734[20] && - !_theResult____h350734[19] && - !_theResult____h350734[18] && - !_theResult____h350734[17] && - !_theResult____h350734[16] && - !_theResult____h350734[15] && - !_theResult____h350734[14] && - !_theResult____h350734[13] && - !_theResult____h350734[12] && - !_theResult____h350734[11] && - !_theResult____h350734[10] && - !_theResult____h350734[9] && - !_theResult____h350734[8] && - !_theResult____h350734[7] && - !_theResult____h350734[6] && - !_theResult____h350734[5] && - !_theResult____h350734[4] && - !_theResult____h350734[3] && - !_theResult____h350734[2] && - !_theResult____h350734[1] && - !_theResult____h350734[0]) ? - _theResult____h350734 : - _theResult___snd__h358885 ; - assign _theResult___snd__h358885 = + sfd__h603500[52:1]) : + sfd__h603500[51:0] ; + assign _theResult___snd__h358857 = { _theResult____h350735[55:0], 1'd0 } ; + assign _theResult___snd__h358868 = + (!_theResult____h350735[56] && _theResult____h350735[55]) ? + _theResult___snd__h358870 : + _theResult___snd__h358880 ; + assign _theResult___snd__h358870 = { _theResult____h350735[54:0], 2'd0 } ; + assign _theResult___snd__h358880 = + (!_theResult____h350735[56] && !_theResult____h350735[55] && + !_theResult____h350735[54] && + !_theResult____h350735[53] && + !_theResult____h350735[52] && + !_theResult____h350735[51] && + !_theResult____h350735[50] && + !_theResult____h350735[49] && + !_theResult____h350735[48] && + !_theResult____h350735[47] && + !_theResult____h350735[46] && + !_theResult____h350735[45] && + !_theResult____h350735[44] && + !_theResult____h350735[43] && + !_theResult____h350735[42] && + !_theResult____h350735[41] && + !_theResult____h350735[40] && + !_theResult____h350735[39] && + !_theResult____h350735[38] && + !_theResult____h350735[37] && + !_theResult____h350735[36] && + !_theResult____h350735[35] && + !_theResult____h350735[34] && + !_theResult____h350735[33] && + !_theResult____h350735[32] && + !_theResult____h350735[31] && + !_theResult____h350735[30] && + !_theResult____h350735[29] && + !_theResult____h350735[28] && + !_theResult____h350735[27] && + !_theResult____h350735[26] && + !_theResult____h350735[25] && + !_theResult____h350735[24] && + !_theResult____h350735[23] && + !_theResult____h350735[22] && + !_theResult____h350735[21] && + !_theResult____h350735[20] && + !_theResult____h350735[19] && + !_theResult____h350735[18] && + !_theResult____h350735[17] && + !_theResult____h350735[16] && + !_theResult____h350735[15] && + !_theResult____h350735[14] && + !_theResult____h350735[13] && + !_theResult____h350735[12] && + !_theResult____h350735[11] && + !_theResult____h350735[10] && + !_theResult____h350735[9] && + !_theResult____h350735[8] && + !_theResult____h350735[7] && + !_theResult____h350735[6] && + !_theResult____h350735[5] && + !_theResult____h350735[4] && + !_theResult____h350735[3] && + !_theResult____h350735[2] && + !_theResult____h350735[1] && + !_theResult____h350735[0]) ? + _theResult____h350735 : + _theResult___snd__h358886 ; + assign _theResult___snd__h358886 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q21[54:0], 2'd0 } ; - assign _theResult___snd__h358908 = - _theResult____h350734 << + assign _theResult___snd__h358909 = + _theResult____h350735 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4343 ; - assign _theResult___snd__h367452 = + assign _theResult___snd__h367453 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h367461 : - _theResult___snd__h367454 ; - assign _theResult___snd__h367454 = + _theResult___snd__h367462 : + _theResult___snd__h367455 ; + assign _theResult___snd__h367455 = { coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h367461 = + assign _theResult___snd__h367462 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4519) ? - sfd__h343129 : - _theResult___snd__h367467 ; - assign _theResult___snd__h367467 = + sfd__h343130 : + _theResult___snd__h367468 ; + assign _theResult___snd__h367468 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q23[54:0], 2'd0 } ; - assign _theResult___snd__h367490 = - sfd__h343129 << + assign _theResult___snd__h367491 = + sfd__h343130 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4574 ; - assign _theResult___snd__h376622 = { _theResult____h368373[55:0], 1'd0 } ; - assign _theResult___snd__h376633 = - (!_theResult____h368373[56] && _theResult____h368373[55]) ? - _theResult___snd__h376635 : - _theResult___snd__h376645 ; - assign _theResult___snd__h376635 = { _theResult____h368373[54:0], 2'd0 } ; - assign _theResult___snd__h376645 = - (!_theResult____h368373[56] && !_theResult____h368373[55] && - !_theResult____h368373[54] && - !_theResult____h368373[53] && - !_theResult____h368373[52] && - !_theResult____h368373[51] && - !_theResult____h368373[50] && - !_theResult____h368373[49] && - !_theResult____h368373[48] && - !_theResult____h368373[47] && - !_theResult____h368373[46] && - !_theResult____h368373[45] && - !_theResult____h368373[44] && - !_theResult____h368373[43] && - !_theResult____h368373[42] && - !_theResult____h368373[41] && - !_theResult____h368373[40] && - !_theResult____h368373[39] && - !_theResult____h368373[38] && - !_theResult____h368373[37] && - !_theResult____h368373[36] && - !_theResult____h368373[35] && - !_theResult____h368373[34] && - !_theResult____h368373[33] && - !_theResult____h368373[32] && - !_theResult____h368373[31] && - !_theResult____h368373[30] && - !_theResult____h368373[29] && - !_theResult____h368373[28] && - !_theResult____h368373[27] && - !_theResult____h368373[26] && - !_theResult____h368373[25] && - !_theResult____h368373[24] && - !_theResult____h368373[23] && - !_theResult____h368373[22] && - !_theResult____h368373[21] && - !_theResult____h368373[20] && - !_theResult____h368373[19] && - !_theResult____h368373[18] && - !_theResult____h368373[17] && - !_theResult____h368373[16] && - !_theResult____h368373[15] && - !_theResult____h368373[14] && - !_theResult____h368373[13] && - !_theResult____h368373[12] && - !_theResult____h368373[11] && - !_theResult____h368373[10] && - !_theResult____h368373[9] && - !_theResult____h368373[8] && - !_theResult____h368373[7] && - !_theResult____h368373[6] && - !_theResult____h368373[5] && - !_theResult____h368373[4] && - !_theResult____h368373[3] && - !_theResult____h368373[2] && - !_theResult____h368373[1] && - !_theResult____h368373[0]) ? - _theResult____h368373 : - _theResult___snd__h376651 ; - assign _theResult___snd__h376651 = + assign _theResult___snd__h376623 = { _theResult____h368374[55:0], 1'd0 } ; + assign _theResult___snd__h376634 = + (!_theResult____h368374[56] && _theResult____h368374[55]) ? + _theResult___snd__h376636 : + _theResult___snd__h376646 ; + assign _theResult___snd__h376636 = { _theResult____h368374[54:0], 2'd0 } ; + assign _theResult___snd__h376646 = + (!_theResult____h368374[56] && !_theResult____h368374[55] && + !_theResult____h368374[54] && + !_theResult____h368374[53] && + !_theResult____h368374[52] && + !_theResult____h368374[51] && + !_theResult____h368374[50] && + !_theResult____h368374[49] && + !_theResult____h368374[48] && + !_theResult____h368374[47] && + !_theResult____h368374[46] && + !_theResult____h368374[45] && + !_theResult____h368374[44] && + !_theResult____h368374[43] && + !_theResult____h368374[42] && + !_theResult____h368374[41] && + !_theResult____h368374[40] && + !_theResult____h368374[39] && + !_theResult____h368374[38] && + !_theResult____h368374[37] && + !_theResult____h368374[36] && + !_theResult____h368374[35] && + !_theResult____h368374[34] && + !_theResult____h368374[33] && + !_theResult____h368374[32] && + !_theResult____h368374[31] && + !_theResult____h368374[30] && + !_theResult____h368374[29] && + !_theResult____h368374[28] && + !_theResult____h368374[27] && + !_theResult____h368374[26] && + !_theResult____h368374[25] && + !_theResult____h368374[24] && + !_theResult____h368374[23] && + !_theResult____h368374[22] && + !_theResult____h368374[21] && + !_theResult____h368374[20] && + !_theResult____h368374[19] && + !_theResult____h368374[18] && + !_theResult____h368374[17] && + !_theResult____h368374[16] && + !_theResult____h368374[15] && + !_theResult____h368374[14] && + !_theResult____h368374[13] && + !_theResult____h368374[12] && + !_theResult____h368374[11] && + !_theResult____h368374[10] && + !_theResult____h368374[9] && + !_theResult____h368374[8] && + !_theResult____h368374[7] && + !_theResult____h368374[6] && + !_theResult____h368374[5] && + !_theResult____h368374[4] && + !_theResult____h368374[3] && + !_theResult____h368374[2] && + !_theResult____h368374[1] && + !_theResult____h368374[0]) ? + _theResult____h368374 : + _theResult___snd__h376652 ; + assign _theResult___snd__h376652 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q31[54:0], 2'd0 } ; - assign _theResult___snd__h376674 = - _theResult____h368373 << + assign _theResult___snd__h376675 = + _theResult____h368374 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4894 ; - assign _theResult___snd__h385242 = + assign _theResult___snd__h385243 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h385256 : - _theResult___snd__h367454 ; - assign _theResult___snd__h385256 = + _theResult___snd__h385257 : + _theResult___snd__h367455 ; + assign _theResult___snd__h385257 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4519) ? - sfd__h343129 : - _theResult___snd__h385262 ; - assign _theResult___snd__h385262 = + sfd__h343130 : + _theResult___snd__h385263 ; + assign _theResult___snd__h385263 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q36[54:0], 2'd0 } ; - assign _theResult___snd__h385280 = - sfd__h343129 << + assign _theResult___snd__h385281 = + sfd__h343130 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4968[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4968) ; - assign _theResult___snd__h404553 = { _theResult____h396433[55:0], 1'd0 } ; - assign _theResult___snd__h404564 = - (!_theResult____h396433[56] && _theResult____h396433[55]) ? - _theResult___snd__h404566 : - _theResult___snd__h404576 ; - assign _theResult___snd__h404566 = { _theResult____h396433[54:0], 2'd0 } ; - assign _theResult___snd__h404576 = - (!_theResult____h396433[56] && !_theResult____h396433[55] && - !_theResult____h396433[54] && - !_theResult____h396433[53] && - !_theResult____h396433[52] && - !_theResult____h396433[51] && - !_theResult____h396433[50] && - !_theResult____h396433[49] && - !_theResult____h396433[48] && - !_theResult____h396433[47] && - !_theResult____h396433[46] && - !_theResult____h396433[45] && - !_theResult____h396433[44] && - !_theResult____h396433[43] && - !_theResult____h396433[42] && - !_theResult____h396433[41] && - !_theResult____h396433[40] && - !_theResult____h396433[39] && - !_theResult____h396433[38] && - !_theResult____h396433[37] && - !_theResult____h396433[36] && - !_theResult____h396433[35] && - !_theResult____h396433[34] && - !_theResult____h396433[33] && - !_theResult____h396433[32] && - !_theResult____h396433[31] && - !_theResult____h396433[30] && - !_theResult____h396433[29] && - !_theResult____h396433[28] && - !_theResult____h396433[27] && - !_theResult____h396433[26] && - !_theResult____h396433[25] && - !_theResult____h396433[24] && - !_theResult____h396433[23] && - !_theResult____h396433[22] && - !_theResult____h396433[21] && - !_theResult____h396433[20] && - !_theResult____h396433[19] && - !_theResult____h396433[18] && - !_theResult____h396433[17] && - !_theResult____h396433[16] && - !_theResult____h396433[15] && - !_theResult____h396433[14] && - !_theResult____h396433[13] && - !_theResult____h396433[12] && - !_theResult____h396433[11] && - !_theResult____h396433[10] && - !_theResult____h396433[9] && - !_theResult____h396433[8] && - !_theResult____h396433[7] && - !_theResult____h396433[6] && - !_theResult____h396433[5] && - !_theResult____h396433[4] && - !_theResult____h396433[3] && - !_theResult____h396433[2] && - !_theResult____h396433[1] && - !_theResult____h396433[0]) ? - _theResult____h396433 : - _theResult___snd__h404582 ; - assign _theResult___snd__h404582 = + assign _theResult___snd__h404554 = { _theResult____h396434[55:0], 1'd0 } ; + assign _theResult___snd__h404565 = + (!_theResult____h396434[56] && _theResult____h396434[55]) ? + _theResult___snd__h404567 : + _theResult___snd__h404577 ; + assign _theResult___snd__h404567 = { _theResult____h396434[54:0], 2'd0 } ; + assign _theResult___snd__h404577 = + (!_theResult____h396434[56] && !_theResult____h396434[55] && + !_theResult____h396434[54] && + !_theResult____h396434[53] && + !_theResult____h396434[52] && + !_theResult____h396434[51] && + !_theResult____h396434[50] && + !_theResult____h396434[49] && + !_theResult____h396434[48] && + !_theResult____h396434[47] && + !_theResult____h396434[46] && + !_theResult____h396434[45] && + !_theResult____h396434[44] && + !_theResult____h396434[43] && + !_theResult____h396434[42] && + !_theResult____h396434[41] && + !_theResult____h396434[40] && + !_theResult____h396434[39] && + !_theResult____h396434[38] && + !_theResult____h396434[37] && + !_theResult____h396434[36] && + !_theResult____h396434[35] && + !_theResult____h396434[34] && + !_theResult____h396434[33] && + !_theResult____h396434[32] && + !_theResult____h396434[31] && + !_theResult____h396434[30] && + !_theResult____h396434[29] && + !_theResult____h396434[28] && + !_theResult____h396434[27] && + !_theResult____h396434[26] && + !_theResult____h396434[25] && + !_theResult____h396434[24] && + !_theResult____h396434[23] && + !_theResult____h396434[22] && + !_theResult____h396434[21] && + !_theResult____h396434[20] && + !_theResult____h396434[19] && + !_theResult____h396434[18] && + !_theResult____h396434[17] && + !_theResult____h396434[16] && + !_theResult____h396434[15] && + !_theResult____h396434[14] && + !_theResult____h396434[13] && + !_theResult____h396434[12] && + !_theResult____h396434[11] && + !_theResult____h396434[10] && + !_theResult____h396434[9] && + !_theResult____h396434[8] && + !_theResult____h396434[7] && + !_theResult____h396434[6] && + !_theResult____h396434[5] && + !_theResult____h396434[4] && + !_theResult____h396434[3] && + !_theResult____h396434[2] && + !_theResult____h396434[1] && + !_theResult____h396434[0]) ? + _theResult____h396434 : + _theResult___snd__h404583 ; + assign _theResult___snd__h404583 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q56[54:0], 2'd0 } ; - assign _theResult___snd__h404605 = - _theResult____h396433 << + assign _theResult___snd__h404606 = + _theResult____h396434 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5735 ; - assign _theResult___snd__h413149 = + assign _theResult___snd__h413150 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h413158 : - _theResult___snd__h413151 ; - assign _theResult___snd__h413151 = + _theResult___snd__h413159 : + _theResult___snd__h413152 ; + assign _theResult___snd__h413152 = { coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h413158 = + assign _theResult___snd__h413159 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5911) ? - sfd__h388831 : - _theResult___snd__h413164 ; - assign _theResult___snd__h413164 = + sfd__h388832 : + _theResult___snd__h413165 ; + assign _theResult___snd__h413165 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q58[54:0], 2'd0 } ; - assign _theResult___snd__h413187 = - sfd__h388831 << + assign _theResult___snd__h413188 = + sfd__h388832 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5966 ; - assign _theResult___snd__h422319 = { _theResult____h414070[55:0], 1'd0 } ; - assign _theResult___snd__h422330 = - (!_theResult____h414070[56] && _theResult____h414070[55]) ? - _theResult___snd__h422332 : - _theResult___snd__h422342 ; - assign _theResult___snd__h422332 = { _theResult____h414070[54:0], 2'd0 } ; - assign _theResult___snd__h422342 = - (!_theResult____h414070[56] && !_theResult____h414070[55] && - !_theResult____h414070[54] && - !_theResult____h414070[53] && - !_theResult____h414070[52] && - !_theResult____h414070[51] && - !_theResult____h414070[50] && - !_theResult____h414070[49] && - !_theResult____h414070[48] && - !_theResult____h414070[47] && - !_theResult____h414070[46] && - !_theResult____h414070[45] && - !_theResult____h414070[44] && - !_theResult____h414070[43] && - !_theResult____h414070[42] && - !_theResult____h414070[41] && - !_theResult____h414070[40] && - !_theResult____h414070[39] && - !_theResult____h414070[38] && - !_theResult____h414070[37] && - !_theResult____h414070[36] && - !_theResult____h414070[35] && - !_theResult____h414070[34] && - !_theResult____h414070[33] && - !_theResult____h414070[32] && - !_theResult____h414070[31] && - !_theResult____h414070[30] && - !_theResult____h414070[29] && - !_theResult____h414070[28] && - !_theResult____h414070[27] && - !_theResult____h414070[26] && - !_theResult____h414070[25] && - !_theResult____h414070[24] && - !_theResult____h414070[23] && - !_theResult____h414070[22] && - !_theResult____h414070[21] && - !_theResult____h414070[20] && - !_theResult____h414070[19] && - !_theResult____h414070[18] && - !_theResult____h414070[17] && - !_theResult____h414070[16] && - !_theResult____h414070[15] && - !_theResult____h414070[14] && - !_theResult____h414070[13] && - !_theResult____h414070[12] && - !_theResult____h414070[11] && - !_theResult____h414070[10] && - !_theResult____h414070[9] && - !_theResult____h414070[8] && - !_theResult____h414070[7] && - !_theResult____h414070[6] && - !_theResult____h414070[5] && - !_theResult____h414070[4] && - !_theResult____h414070[3] && - !_theResult____h414070[2] && - !_theResult____h414070[1] && - !_theResult____h414070[0]) ? - _theResult____h414070 : - _theResult___snd__h422348 ; - assign _theResult___snd__h422348 = + assign _theResult___snd__h422320 = { _theResult____h414071[55:0], 1'd0 } ; + assign _theResult___snd__h422331 = + (!_theResult____h414071[56] && _theResult____h414071[55]) ? + _theResult___snd__h422333 : + _theResult___snd__h422343 ; + assign _theResult___snd__h422333 = { _theResult____h414071[54:0], 2'd0 } ; + assign _theResult___snd__h422343 = + (!_theResult____h414071[56] && !_theResult____h414071[55] && + !_theResult____h414071[54] && + !_theResult____h414071[53] && + !_theResult____h414071[52] && + !_theResult____h414071[51] && + !_theResult____h414071[50] && + !_theResult____h414071[49] && + !_theResult____h414071[48] && + !_theResult____h414071[47] && + !_theResult____h414071[46] && + !_theResult____h414071[45] && + !_theResult____h414071[44] && + !_theResult____h414071[43] && + !_theResult____h414071[42] && + !_theResult____h414071[41] && + !_theResult____h414071[40] && + !_theResult____h414071[39] && + !_theResult____h414071[38] && + !_theResult____h414071[37] && + !_theResult____h414071[36] && + !_theResult____h414071[35] && + !_theResult____h414071[34] && + !_theResult____h414071[33] && + !_theResult____h414071[32] && + !_theResult____h414071[31] && + !_theResult____h414071[30] && + !_theResult____h414071[29] && + !_theResult____h414071[28] && + !_theResult____h414071[27] && + !_theResult____h414071[26] && + !_theResult____h414071[25] && + !_theResult____h414071[24] && + !_theResult____h414071[23] && + !_theResult____h414071[22] && + !_theResult____h414071[21] && + !_theResult____h414071[20] && + !_theResult____h414071[19] && + !_theResult____h414071[18] && + !_theResult____h414071[17] && + !_theResult____h414071[16] && + !_theResult____h414071[15] && + !_theResult____h414071[14] && + !_theResult____h414071[13] && + !_theResult____h414071[12] && + !_theResult____h414071[11] && + !_theResult____h414071[10] && + !_theResult____h414071[9] && + !_theResult____h414071[8] && + !_theResult____h414071[7] && + !_theResult____h414071[6] && + !_theResult____h414071[5] && + !_theResult____h414071[4] && + !_theResult____h414071[3] && + !_theResult____h414071[2] && + !_theResult____h414071[1] && + !_theResult____h414071[0]) ? + _theResult____h414071 : + _theResult___snd__h422349 ; + assign _theResult___snd__h422349 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q66[54:0], 2'd0 } ; - assign _theResult___snd__h422371 = - _theResult____h414070 << + assign _theResult___snd__h422372 = + _theResult____h414071 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6286 ; - assign _theResult___snd__h430939 = + assign _theResult___snd__h430940 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h430953 : - _theResult___snd__h413151 ; - assign _theResult___snd__h430953 = + _theResult___snd__h430954 : + _theResult___snd__h413152 ; + assign _theResult___snd__h430954 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5911) ? - sfd__h388831 : - _theResult___snd__h430959 ; - assign _theResult___snd__h430959 = + sfd__h388832 : + _theResult___snd__h430960 ; + assign _theResult___snd__h430960 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q71[54:0], 2'd0 } ; - assign _theResult___snd__h430977 = - sfd__h388831 << + assign _theResult___snd__h430978 = + sfd__h388832 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6360[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6360) ; - assign _theResult___snd__h450248 = { _theResult____h442128[55:0], 1'd0 } ; - assign _theResult___snd__h450259 = - (!_theResult____h442128[56] && _theResult____h442128[55]) ? - _theResult___snd__h450261 : - _theResult___snd__h450271 ; - assign _theResult___snd__h450261 = { _theResult____h442128[54:0], 2'd0 } ; - assign _theResult___snd__h450271 = - (!_theResult____h442128[56] && !_theResult____h442128[55] && - !_theResult____h442128[54] && - !_theResult____h442128[53] && - !_theResult____h442128[52] && - !_theResult____h442128[51] && - !_theResult____h442128[50] && - !_theResult____h442128[49] && - !_theResult____h442128[48] && - !_theResult____h442128[47] && - !_theResult____h442128[46] && - !_theResult____h442128[45] && - !_theResult____h442128[44] && - !_theResult____h442128[43] && - !_theResult____h442128[42] && - !_theResult____h442128[41] && - !_theResult____h442128[40] && - !_theResult____h442128[39] && - !_theResult____h442128[38] && - !_theResult____h442128[37] && - !_theResult____h442128[36] && - !_theResult____h442128[35] && - !_theResult____h442128[34] && - !_theResult____h442128[33] && - !_theResult____h442128[32] && - !_theResult____h442128[31] && - !_theResult____h442128[30] && - !_theResult____h442128[29] && - !_theResult____h442128[28] && - !_theResult____h442128[27] && - !_theResult____h442128[26] && - !_theResult____h442128[25] && - !_theResult____h442128[24] && - !_theResult____h442128[23] && - !_theResult____h442128[22] && - !_theResult____h442128[21] && - !_theResult____h442128[20] && - !_theResult____h442128[19] && - !_theResult____h442128[18] && - !_theResult____h442128[17] && - !_theResult____h442128[16] && - !_theResult____h442128[15] && - !_theResult____h442128[14] && - !_theResult____h442128[13] && - !_theResult____h442128[12] && - !_theResult____h442128[11] && - !_theResult____h442128[10] && - !_theResult____h442128[9] && - !_theResult____h442128[8] && - !_theResult____h442128[7] && - !_theResult____h442128[6] && - !_theResult____h442128[5] && - !_theResult____h442128[4] && - !_theResult____h442128[3] && - !_theResult____h442128[2] && - !_theResult____h442128[1] && - !_theResult____h442128[0]) ? - _theResult____h442128 : - _theResult___snd__h450277 ; - assign _theResult___snd__h450277 = + assign _theResult___snd__h450249 = { _theResult____h442129[55:0], 1'd0 } ; + assign _theResult___snd__h450260 = + (!_theResult____h442129[56] && _theResult____h442129[55]) ? + _theResult___snd__h450262 : + _theResult___snd__h450272 ; + assign _theResult___snd__h450262 = { _theResult____h442129[54:0], 2'd0 } ; + assign _theResult___snd__h450272 = + (!_theResult____h442129[56] && !_theResult____h442129[55] && + !_theResult____h442129[54] && + !_theResult____h442129[53] && + !_theResult____h442129[52] && + !_theResult____h442129[51] && + !_theResult____h442129[50] && + !_theResult____h442129[49] && + !_theResult____h442129[48] && + !_theResult____h442129[47] && + !_theResult____h442129[46] && + !_theResult____h442129[45] && + !_theResult____h442129[44] && + !_theResult____h442129[43] && + !_theResult____h442129[42] && + !_theResult____h442129[41] && + !_theResult____h442129[40] && + !_theResult____h442129[39] && + !_theResult____h442129[38] && + !_theResult____h442129[37] && + !_theResult____h442129[36] && + !_theResult____h442129[35] && + !_theResult____h442129[34] && + !_theResult____h442129[33] && + !_theResult____h442129[32] && + !_theResult____h442129[31] && + !_theResult____h442129[30] && + !_theResult____h442129[29] && + !_theResult____h442129[28] && + !_theResult____h442129[27] && + !_theResult____h442129[26] && + !_theResult____h442129[25] && + !_theResult____h442129[24] && + !_theResult____h442129[23] && + !_theResult____h442129[22] && + !_theResult____h442129[21] && + !_theResult____h442129[20] && + !_theResult____h442129[19] && + !_theResult____h442129[18] && + !_theResult____h442129[17] && + !_theResult____h442129[16] && + !_theResult____h442129[15] && + !_theResult____h442129[14] && + !_theResult____h442129[13] && + !_theResult____h442129[12] && + !_theResult____h442129[11] && + !_theResult____h442129[10] && + !_theResult____h442129[9] && + !_theResult____h442129[8] && + !_theResult____h442129[7] && + !_theResult____h442129[6] && + !_theResult____h442129[5] && + !_theResult____h442129[4] && + !_theResult____h442129[3] && + !_theResult____h442129[2] && + !_theResult____h442129[1] && + !_theResult____h442129[0]) ? + _theResult____h442129 : + _theResult___snd__h450278 ; + assign _theResult___snd__h450278 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q91[54:0], 2'd0 } ; - assign _theResult___snd__h450300 = - _theResult____h442128 << + assign _theResult___snd__h450301 = + _theResult____h442129 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7127 ; - assign _theResult___snd__h458844 = + assign _theResult___snd__h458845 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h458853 : - _theResult___snd__h458846 ; - assign _theResult___snd__h458846 = + _theResult___snd__h458854 : + _theResult___snd__h458847 ; + assign _theResult___snd__h458847 = { coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h458853 = + assign _theResult___snd__h458854 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7303) ? - sfd__h434526 : - _theResult___snd__h458859 ; - assign _theResult___snd__h458859 = + sfd__h434527 : + _theResult___snd__h458860 ; + assign _theResult___snd__h458860 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q93[54:0], 2'd0 } ; - assign _theResult___snd__h458882 = - sfd__h434526 << + assign _theResult___snd__h458883 = + sfd__h434527 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7358 ; - assign _theResult___snd__h468014 = { _theResult____h459765[55:0], 1'd0 } ; - assign _theResult___snd__h468025 = - (!_theResult____h459765[56] && _theResult____h459765[55]) ? - _theResult___snd__h468027 : - _theResult___snd__h468037 ; - assign _theResult___snd__h468027 = { _theResult____h459765[54:0], 2'd0 } ; - assign _theResult___snd__h468037 = - (!_theResult____h459765[56] && !_theResult____h459765[55] && - !_theResult____h459765[54] && - !_theResult____h459765[53] && - !_theResult____h459765[52] && - !_theResult____h459765[51] && - !_theResult____h459765[50] && - !_theResult____h459765[49] && - !_theResult____h459765[48] && - !_theResult____h459765[47] && - !_theResult____h459765[46] && - !_theResult____h459765[45] && - !_theResult____h459765[44] && - !_theResult____h459765[43] && - !_theResult____h459765[42] && - !_theResult____h459765[41] && - !_theResult____h459765[40] && - !_theResult____h459765[39] && - !_theResult____h459765[38] && - !_theResult____h459765[37] && - !_theResult____h459765[36] && - !_theResult____h459765[35] && - !_theResult____h459765[34] && - !_theResult____h459765[33] && - !_theResult____h459765[32] && - !_theResult____h459765[31] && - !_theResult____h459765[30] && - !_theResult____h459765[29] && - !_theResult____h459765[28] && - !_theResult____h459765[27] && - !_theResult____h459765[26] && - !_theResult____h459765[25] && - !_theResult____h459765[24] && - !_theResult____h459765[23] && - !_theResult____h459765[22] && - !_theResult____h459765[21] && - !_theResult____h459765[20] && - !_theResult____h459765[19] && - !_theResult____h459765[18] && - !_theResult____h459765[17] && - !_theResult____h459765[16] && - !_theResult____h459765[15] && - !_theResult____h459765[14] && - !_theResult____h459765[13] && - !_theResult____h459765[12] && - !_theResult____h459765[11] && - !_theResult____h459765[10] && - !_theResult____h459765[9] && - !_theResult____h459765[8] && - !_theResult____h459765[7] && - !_theResult____h459765[6] && - !_theResult____h459765[5] && - !_theResult____h459765[4] && - !_theResult____h459765[3] && - !_theResult____h459765[2] && - !_theResult____h459765[1] && - !_theResult____h459765[0]) ? - _theResult____h459765 : - _theResult___snd__h468043 ; - assign _theResult___snd__h468043 = + assign _theResult___snd__h468015 = { _theResult____h459766[55:0], 1'd0 } ; + assign _theResult___snd__h468026 = + (!_theResult____h459766[56] && _theResult____h459766[55]) ? + _theResult___snd__h468028 : + _theResult___snd__h468038 ; + assign _theResult___snd__h468028 = { _theResult____h459766[54:0], 2'd0 } ; + assign _theResult___snd__h468038 = + (!_theResult____h459766[56] && !_theResult____h459766[55] && + !_theResult____h459766[54] && + !_theResult____h459766[53] && + !_theResult____h459766[52] && + !_theResult____h459766[51] && + !_theResult____h459766[50] && + !_theResult____h459766[49] && + !_theResult____h459766[48] && + !_theResult____h459766[47] && + !_theResult____h459766[46] && + !_theResult____h459766[45] && + !_theResult____h459766[44] && + !_theResult____h459766[43] && + !_theResult____h459766[42] && + !_theResult____h459766[41] && + !_theResult____h459766[40] && + !_theResult____h459766[39] && + !_theResult____h459766[38] && + !_theResult____h459766[37] && + !_theResult____h459766[36] && + !_theResult____h459766[35] && + !_theResult____h459766[34] && + !_theResult____h459766[33] && + !_theResult____h459766[32] && + !_theResult____h459766[31] && + !_theResult____h459766[30] && + !_theResult____h459766[29] && + !_theResult____h459766[28] && + !_theResult____h459766[27] && + !_theResult____h459766[26] && + !_theResult____h459766[25] && + !_theResult____h459766[24] && + !_theResult____h459766[23] && + !_theResult____h459766[22] && + !_theResult____h459766[21] && + !_theResult____h459766[20] && + !_theResult____h459766[19] && + !_theResult____h459766[18] && + !_theResult____h459766[17] && + !_theResult____h459766[16] && + !_theResult____h459766[15] && + !_theResult____h459766[14] && + !_theResult____h459766[13] && + !_theResult____h459766[12] && + !_theResult____h459766[11] && + !_theResult____h459766[10] && + !_theResult____h459766[9] && + !_theResult____h459766[8] && + !_theResult____h459766[7] && + !_theResult____h459766[6] && + !_theResult____h459766[5] && + !_theResult____h459766[4] && + !_theResult____h459766[3] && + !_theResult____h459766[2] && + !_theResult____h459766[1] && + !_theResult____h459766[0]) ? + _theResult____h459766 : + _theResult___snd__h468044 ; + assign _theResult___snd__h468044 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q101[54:0], 2'd0 } ; - assign _theResult___snd__h468066 = - _theResult____h459765 << + assign _theResult___snd__h468067 = + _theResult____h459766 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7678 ; - assign _theResult___snd__h476634 = + assign _theResult___snd__h476635 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h476648 : - _theResult___snd__h458846 ; - assign _theResult___snd__h476648 = + _theResult___snd__h476649 : + _theResult___snd__h458847 ; + assign _theResult___snd__h476649 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7303) ? - sfd__h434526 : - _theResult___snd__h476654 ; - assign _theResult___snd__h476654 = + sfd__h434527 : + _theResult___snd__h476655 ; + assign _theResult___snd__h476655 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q106[54:0], 2'd0 } ; - assign _theResult___snd__h476672 = - sfd__h434526 << + assign _theResult___snd__h476673 = + sfd__h434527 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7752[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7752) ; - assign _theResult___snd__h506864 = - (f1_exp__h487525 == 8'd0) ? - _theResult___snd__h506873 : - _theResult___snd__h506866 ; - assign _theResult___snd__h506866 = { f1_sfd__h487526, 34'd0 } ; - assign _theResult___snd__h506873 = - (f1_exp__h487525 == 8'd0 && !f1_sfd__h487526[22] && + assign _theResult___snd__h506865 = + (f1_exp__h487526 == 8'd0) ? + _theResult___snd__h506874 : + _theResult___snd__h506867 ; + assign _theResult___snd__h506867 = { f1_sfd__h487527, 34'd0 } ; + assign _theResult___snd__h506874 = + (f1_exp__h487526 == 8'd0 && !f1_sfd__h487527[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8667) ? - sfd__h487887 : - _theResult___snd__h506879 ; - assign _theResult___snd__h506879 = + sfd__h487888 : + _theResult___snd__h506880 ; + assign _theResult___snd__h506880 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q126[54:0], 2'd0 } ; - assign _theResult___snd__h506902 = - sfd__h487887 << + assign _theResult___snd__h506903 = + sfd__h487888 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8694 ; - assign _theResult___snd__h516501 = { _theResult____h508254[55:0], 1'd0 } ; - assign _theResult___snd__h516512 = - (!_theResult____h508254[56] && _theResult____h508254[55]) ? - _theResult___snd__h516514 : - _theResult___snd__h516524 ; - assign _theResult___snd__h516514 = { _theResult____h508254[54:0], 2'd0 } ; - assign _theResult___snd__h516524 = - (!_theResult____h508254[56] && !_theResult____h508254[55] && - !_theResult____h508254[54] && - !_theResult____h508254[53] && - !_theResult____h508254[52] && - !_theResult____h508254[51] && - !_theResult____h508254[50] && - !_theResult____h508254[49] && - !_theResult____h508254[48] && - !_theResult____h508254[47] && - !_theResult____h508254[46] && - !_theResult____h508254[45] && - !_theResult____h508254[44] && - !_theResult____h508254[43] && - !_theResult____h508254[42] && - !_theResult____h508254[41] && - !_theResult____h508254[40] && - !_theResult____h508254[39] && - !_theResult____h508254[38] && - !_theResult____h508254[37] && - !_theResult____h508254[36] && - !_theResult____h508254[35] && - !_theResult____h508254[34] && - !_theResult____h508254[33] && - !_theResult____h508254[32] && - !_theResult____h508254[31] && - !_theResult____h508254[30] && - !_theResult____h508254[29] && - !_theResult____h508254[28] && - !_theResult____h508254[27] && - !_theResult____h508254[26] && - !_theResult____h508254[25] && - !_theResult____h508254[24] && - !_theResult____h508254[23] && - !_theResult____h508254[22] && - !_theResult____h508254[21] && - !_theResult____h508254[20] && - !_theResult____h508254[19] && - !_theResult____h508254[18] && - !_theResult____h508254[17] && - !_theResult____h508254[16] && - !_theResult____h508254[15] && - !_theResult____h508254[14] && - !_theResult____h508254[13] && - !_theResult____h508254[12] && - !_theResult____h508254[11] && - !_theResult____h508254[10] && - !_theResult____h508254[9] && - !_theResult____h508254[8] && - !_theResult____h508254[7] && - !_theResult____h508254[6] && - !_theResult____h508254[5] && - !_theResult____h508254[4] && - !_theResult____h508254[3] && - !_theResult____h508254[2] && - !_theResult____h508254[1] && - !_theResult____h508254[0]) ? - _theResult____h508254 : - _theResult___snd__h516530 ; - assign _theResult___snd__h516530 = + assign _theResult___snd__h516502 = { _theResult____h508255[55:0], 1'd0 } ; + assign _theResult___snd__h516513 = + (!_theResult____h508255[56] && _theResult____h508255[55]) ? + _theResult___snd__h516515 : + _theResult___snd__h516525 ; + assign _theResult___snd__h516515 = { _theResult____h508255[54:0], 2'd0 } ; + assign _theResult___snd__h516525 = + (!_theResult____h508255[56] && !_theResult____h508255[55] && + !_theResult____h508255[54] && + !_theResult____h508255[53] && + !_theResult____h508255[52] && + !_theResult____h508255[51] && + !_theResult____h508255[50] && + !_theResult____h508255[49] && + !_theResult____h508255[48] && + !_theResult____h508255[47] && + !_theResult____h508255[46] && + !_theResult____h508255[45] && + !_theResult____h508255[44] && + !_theResult____h508255[43] && + !_theResult____h508255[42] && + !_theResult____h508255[41] && + !_theResult____h508255[40] && + !_theResult____h508255[39] && + !_theResult____h508255[38] && + !_theResult____h508255[37] && + !_theResult____h508255[36] && + !_theResult____h508255[35] && + !_theResult____h508255[34] && + !_theResult____h508255[33] && + !_theResult____h508255[32] && + !_theResult____h508255[31] && + !_theResult____h508255[30] && + !_theResult____h508255[29] && + !_theResult____h508255[28] && + !_theResult____h508255[27] && + !_theResult____h508255[26] && + !_theResult____h508255[25] && + !_theResult____h508255[24] && + !_theResult____h508255[23] && + !_theResult____h508255[22] && + !_theResult____h508255[21] && + !_theResult____h508255[20] && + !_theResult____h508255[19] && + !_theResult____h508255[18] && + !_theResult____h508255[17] && + !_theResult____h508255[16] && + !_theResult____h508255[15] && + !_theResult____h508255[14] && + !_theResult____h508255[13] && + !_theResult____h508255[12] && + !_theResult____h508255[11] && + !_theResult____h508255[10] && + !_theResult____h508255[9] && + !_theResult____h508255[8] && + !_theResult____h508255[7] && + !_theResult____h508255[6] && + !_theResult____h508255[5] && + !_theResult____h508255[4] && + !_theResult____h508255[3] && + !_theResult____h508255[2] && + !_theResult____h508255[1] && + !_theResult____h508255[0]) ? + _theResult____h508255 : + _theResult___snd__h516531 ; + assign _theResult___snd__h516531 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q130[54:0], 2'd0 } ; - assign _theResult___snd__h516553 = - _theResult____h508254 << + assign _theResult___snd__h516554 = + _theResult____h508255 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9006 ; - assign _theResult___snd__h525269 = - (f1_exp__h487525 == 8'd0) ? - _theResult___snd__h525283 : - _theResult___snd__h506866 ; - assign _theResult___snd__h525283 = - (f1_exp__h487525 == 8'd0 && !f1_sfd__h487526[22] && + assign _theResult___snd__h525270 = + (f1_exp__h487526 == 8'd0) ? + _theResult___snd__h525284 : + _theResult___snd__h506867 ; + assign _theResult___snd__h525284 = + (f1_exp__h487526 == 8'd0 && !f1_sfd__h487527[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8667) ? - sfd__h487887 : - _theResult___snd__h525289 ; - assign _theResult___snd__h525289 = + sfd__h487888 : + _theResult___snd__h525290 ; + assign _theResult___snd__h525290 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q133[54:0], 2'd0 } ; - assign _theResult___snd__h525307 = - sfd__h487887 << + assign _theResult___snd__h525308 = + sfd__h487888 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9057 ; - assign _theResult___snd__h545717 = - (f2_exp__h526519 == 8'd0) ? - _theResult___snd__h545726 : - _theResult___snd__h545719 ; - assign _theResult___snd__h545719 = { f2_sfd__h526520, 34'd0 } ; - assign _theResult___snd__h545726 = - (f2_exp__h526519 == 8'd0 && !f2_sfd__h526520[22] && + assign _theResult___snd__h545718 = + (f2_exp__h526520 == 8'd0) ? + _theResult___snd__h545727 : + _theResult___snd__h545720 ; + assign _theResult___snd__h545720 = { f2_sfd__h526521, 34'd0 } ; + assign _theResult___snd__h545727 = + (f2_exp__h526520 == 8'd0 && !f2_sfd__h526521[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10167) ? - sfd__h526881 : - _theResult___snd__h545732 ; - assign _theResult___snd__h545732 = + sfd__h526882 : + _theResult___snd__h545733 ; + assign _theResult___snd__h545733 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q166[54:0], 2'd0 } ; - assign _theResult___snd__h545755 = - sfd__h526881 << + assign _theResult___snd__h545756 = + sfd__h526882 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10194 ; - assign _theResult___snd__h555354 = { _theResult____h547107[55:0], 1'd0 } ; - assign _theResult___snd__h555365 = - (!_theResult____h547107[56] && _theResult____h547107[55]) ? - _theResult___snd__h555367 : - _theResult___snd__h555377 ; - assign _theResult___snd__h555367 = { _theResult____h547107[54:0], 2'd0 } ; - assign _theResult___snd__h555377 = - (!_theResult____h547107[56] && !_theResult____h547107[55] && - !_theResult____h547107[54] && - !_theResult____h547107[53] && - !_theResult____h547107[52] && - !_theResult____h547107[51] && - !_theResult____h547107[50] && - !_theResult____h547107[49] && - !_theResult____h547107[48] && - !_theResult____h547107[47] && - !_theResult____h547107[46] && - !_theResult____h547107[45] && - !_theResult____h547107[44] && - !_theResult____h547107[43] && - !_theResult____h547107[42] && - !_theResult____h547107[41] && - !_theResult____h547107[40] && - !_theResult____h547107[39] && - !_theResult____h547107[38] && - !_theResult____h547107[37] && - !_theResult____h547107[36] && - !_theResult____h547107[35] && - !_theResult____h547107[34] && - !_theResult____h547107[33] && - !_theResult____h547107[32] && - !_theResult____h547107[31] && - !_theResult____h547107[30] && - !_theResult____h547107[29] && - !_theResult____h547107[28] && - !_theResult____h547107[27] && - !_theResult____h547107[26] && - !_theResult____h547107[25] && - !_theResult____h547107[24] && - !_theResult____h547107[23] && - !_theResult____h547107[22] && - !_theResult____h547107[21] && - !_theResult____h547107[20] && - !_theResult____h547107[19] && - !_theResult____h547107[18] && - !_theResult____h547107[17] && - !_theResult____h547107[16] && - !_theResult____h547107[15] && - !_theResult____h547107[14] && - !_theResult____h547107[13] && - !_theResult____h547107[12] && - !_theResult____h547107[11] && - !_theResult____h547107[10] && - !_theResult____h547107[9] && - !_theResult____h547107[8] && - !_theResult____h547107[7] && - !_theResult____h547107[6] && - !_theResult____h547107[5] && - !_theResult____h547107[4] && - !_theResult____h547107[3] && - !_theResult____h547107[2] && - !_theResult____h547107[1] && - !_theResult____h547107[0]) ? - _theResult____h547107 : - _theResult___snd__h555383 ; - assign _theResult___snd__h555383 = + assign _theResult___snd__h555355 = { _theResult____h547108[55:0], 1'd0 } ; + assign _theResult___snd__h555366 = + (!_theResult____h547108[56] && _theResult____h547108[55]) ? + _theResult___snd__h555368 : + _theResult___snd__h555378 ; + assign _theResult___snd__h555368 = { _theResult____h547108[54:0], 2'd0 } ; + assign _theResult___snd__h555378 = + (!_theResult____h547108[56] && !_theResult____h547108[55] && + !_theResult____h547108[54] && + !_theResult____h547108[53] && + !_theResult____h547108[52] && + !_theResult____h547108[51] && + !_theResult____h547108[50] && + !_theResult____h547108[49] && + !_theResult____h547108[48] && + !_theResult____h547108[47] && + !_theResult____h547108[46] && + !_theResult____h547108[45] && + !_theResult____h547108[44] && + !_theResult____h547108[43] && + !_theResult____h547108[42] && + !_theResult____h547108[41] && + !_theResult____h547108[40] && + !_theResult____h547108[39] && + !_theResult____h547108[38] && + !_theResult____h547108[37] && + !_theResult____h547108[36] && + !_theResult____h547108[35] && + !_theResult____h547108[34] && + !_theResult____h547108[33] && + !_theResult____h547108[32] && + !_theResult____h547108[31] && + !_theResult____h547108[30] && + !_theResult____h547108[29] && + !_theResult____h547108[28] && + !_theResult____h547108[27] && + !_theResult____h547108[26] && + !_theResult____h547108[25] && + !_theResult____h547108[24] && + !_theResult____h547108[23] && + !_theResult____h547108[22] && + !_theResult____h547108[21] && + !_theResult____h547108[20] && + !_theResult____h547108[19] && + !_theResult____h547108[18] && + !_theResult____h547108[17] && + !_theResult____h547108[16] && + !_theResult____h547108[15] && + !_theResult____h547108[14] && + !_theResult____h547108[13] && + !_theResult____h547108[12] && + !_theResult____h547108[11] && + !_theResult____h547108[10] && + !_theResult____h547108[9] && + !_theResult____h547108[8] && + !_theResult____h547108[7] && + !_theResult____h547108[6] && + !_theResult____h547108[5] && + !_theResult____h547108[4] && + !_theResult____h547108[3] && + !_theResult____h547108[2] && + !_theResult____h547108[1] && + !_theResult____h547108[0]) ? + _theResult____h547108 : + _theResult___snd__h555384 ; + assign _theResult___snd__h555384 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q170[54:0], 2'd0 } ; - assign _theResult___snd__h555406 = - _theResult____h547107 << + assign _theResult___snd__h555407 = + _theResult____h547108 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10491 ; - assign _theResult___snd__h564122 = - (f2_exp__h526519 == 8'd0) ? - _theResult___snd__h564136 : - _theResult___snd__h545719 ; - assign _theResult___snd__h564136 = - (f2_exp__h526519 == 8'd0 && !f2_sfd__h526520[22] && + assign _theResult___snd__h564123 = + (f2_exp__h526520 == 8'd0) ? + _theResult___snd__h564137 : + _theResult___snd__h545720 ; + assign _theResult___snd__h564137 = + (f2_exp__h526520 == 8'd0 && !f2_sfd__h526521[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10167) ? - sfd__h526881 : - _theResult___snd__h564142 ; - assign _theResult___snd__h564142 = + sfd__h526882 : + _theResult___snd__h564143 ; + assign _theResult___snd__h564143 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q173[54:0], 2'd0 } ; - assign _theResult___snd__h564160 = - sfd__h526881 << + assign _theResult___snd__h564161 = + sfd__h526882 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10542 ; - assign _theResult___snd__h585021 = - (f3_exp__h565823 == 8'd0) ? - _theResult___snd__h585030 : - _theResult___snd__h585023 ; - assign _theResult___snd__h585023 = { f3_sfd__h565824, 34'd0 } ; - assign _theResult___snd__h585030 = - (f3_exp__h565823 == 8'd0 && !f3_sfd__h565824[22] && + assign _theResult___snd__h585022 = + (f3_exp__h565824 == 8'd0) ? + _theResult___snd__h585031 : + _theResult___snd__h585024 ; + assign _theResult___snd__h585024 = { f3_sfd__h565825, 34'd0 } ; + assign _theResult___snd__h585031 = + (f3_exp__h565824 == 8'd0 && !f3_sfd__h565825[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9397) ? - sfd__h566185 : - _theResult___snd__h585036 ; - assign _theResult___snd__h585036 = + sfd__h566186 : + _theResult___snd__h585037 ; + assign _theResult___snd__h585037 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q143[54:0], 2'd0 } ; - assign _theResult___snd__h585059 = - sfd__h566185 << + assign _theResult___snd__h585060 = + sfd__h566186 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9424 ; - assign _theResult___snd__h594658 = { _theResult____h586411[55:0], 1'd0 } ; - assign _theResult___snd__h594669 = - (!_theResult____h586411[56] && _theResult____h586411[55]) ? - _theResult___snd__h594671 : - _theResult___snd__h594681 ; - assign _theResult___snd__h594671 = { _theResult____h586411[54:0], 2'd0 } ; - assign _theResult___snd__h594681 = - (!_theResult____h586411[56] && !_theResult____h586411[55] && - !_theResult____h586411[54] && - !_theResult____h586411[53] && - !_theResult____h586411[52] && - !_theResult____h586411[51] && - !_theResult____h586411[50] && - !_theResult____h586411[49] && - !_theResult____h586411[48] && - !_theResult____h586411[47] && - !_theResult____h586411[46] && - !_theResult____h586411[45] && - !_theResult____h586411[44] && - !_theResult____h586411[43] && - !_theResult____h586411[42] && - !_theResult____h586411[41] && - !_theResult____h586411[40] && - !_theResult____h586411[39] && - !_theResult____h586411[38] && - !_theResult____h586411[37] && - !_theResult____h586411[36] && - !_theResult____h586411[35] && - !_theResult____h586411[34] && - !_theResult____h586411[33] && - !_theResult____h586411[32] && - !_theResult____h586411[31] && - !_theResult____h586411[30] && - !_theResult____h586411[29] && - !_theResult____h586411[28] && - !_theResult____h586411[27] && - !_theResult____h586411[26] && - !_theResult____h586411[25] && - !_theResult____h586411[24] && - !_theResult____h586411[23] && - !_theResult____h586411[22] && - !_theResult____h586411[21] && - !_theResult____h586411[20] && - !_theResult____h586411[19] && - !_theResult____h586411[18] && - !_theResult____h586411[17] && - !_theResult____h586411[16] && - !_theResult____h586411[15] && - !_theResult____h586411[14] && - !_theResult____h586411[13] && - !_theResult____h586411[12] && - !_theResult____h586411[11] && - !_theResult____h586411[10] && - !_theResult____h586411[9] && - !_theResult____h586411[8] && - !_theResult____h586411[7] && - !_theResult____h586411[6] && - !_theResult____h586411[5] && - !_theResult____h586411[4] && - !_theResult____h586411[3] && - !_theResult____h586411[2] && - !_theResult____h586411[1] && - !_theResult____h586411[0]) ? - _theResult____h586411 : - _theResult___snd__h594687 ; - assign _theResult___snd__h594687 = + assign _theResult___snd__h594659 = { _theResult____h586412[55:0], 1'd0 } ; + assign _theResult___snd__h594670 = + (!_theResult____h586412[56] && _theResult____h586412[55]) ? + _theResult___snd__h594672 : + _theResult___snd__h594682 ; + assign _theResult___snd__h594672 = { _theResult____h586412[54:0], 2'd0 } ; + assign _theResult___snd__h594682 = + (!_theResult____h586412[56] && !_theResult____h586412[55] && + !_theResult____h586412[54] && + !_theResult____h586412[53] && + !_theResult____h586412[52] && + !_theResult____h586412[51] && + !_theResult____h586412[50] && + !_theResult____h586412[49] && + !_theResult____h586412[48] && + !_theResult____h586412[47] && + !_theResult____h586412[46] && + !_theResult____h586412[45] && + !_theResult____h586412[44] && + !_theResult____h586412[43] && + !_theResult____h586412[42] && + !_theResult____h586412[41] && + !_theResult____h586412[40] && + !_theResult____h586412[39] && + !_theResult____h586412[38] && + !_theResult____h586412[37] && + !_theResult____h586412[36] && + !_theResult____h586412[35] && + !_theResult____h586412[34] && + !_theResult____h586412[33] && + !_theResult____h586412[32] && + !_theResult____h586412[31] && + !_theResult____h586412[30] && + !_theResult____h586412[29] && + !_theResult____h586412[28] && + !_theResult____h586412[27] && + !_theResult____h586412[26] && + !_theResult____h586412[25] && + !_theResult____h586412[24] && + !_theResult____h586412[23] && + !_theResult____h586412[22] && + !_theResult____h586412[21] && + !_theResult____h586412[20] && + !_theResult____h586412[19] && + !_theResult____h586412[18] && + !_theResult____h586412[17] && + !_theResult____h586412[16] && + !_theResult____h586412[15] && + !_theResult____h586412[14] && + !_theResult____h586412[13] && + !_theResult____h586412[12] && + !_theResult____h586412[11] && + !_theResult____h586412[10] && + !_theResult____h586412[9] && + !_theResult____h586412[8] && + !_theResult____h586412[7] && + !_theResult____h586412[6] && + !_theResult____h586412[5] && + !_theResult____h586412[4] && + !_theResult____h586412[3] && + !_theResult____h586412[2] && + !_theResult____h586412[1] && + !_theResult____h586412[0]) ? + _theResult____h586412 : + _theResult___snd__h594688 ; + assign _theResult___snd__h594688 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q147[54:0], 2'd0 } ; - assign _theResult___snd__h594710 = - _theResult____h586411 << + assign _theResult___snd__h594711 = + _theResult____h586412 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9721 ; - assign _theResult___snd__h603426 = - (f3_exp__h565823 == 8'd0) ? - _theResult___snd__h603440 : - _theResult___snd__h585023 ; - assign _theResult___snd__h603440 = - (f3_exp__h565823 == 8'd0 && !f3_sfd__h565824[22] && + assign _theResult___snd__h603427 = + (f3_exp__h565824 == 8'd0) ? + _theResult___snd__h603441 : + _theResult___snd__h585024 ; + assign _theResult___snd__h603441 = + (f3_exp__h565824 == 8'd0 && !f3_sfd__h565825[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9397) ? - sfd__h566185 : - _theResult___snd__h603446 ; - assign _theResult___snd__h603446 = + sfd__h566186 : + _theResult___snd__h603447 ; + assign _theResult___snd__h603447 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q150[54:0], 2'd0 } ; - assign _theResult___snd__h603464 = - sfd__h566185 << + assign _theResult___snd__h603465 = + sfd__h566186 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9772 ; - assign _theResult___snd__h608920 = - b__h608372[63] ? b___1__h608985 : b__h608372 ; - assign _theResult___snd_fst_exp__h368027 = + assign _theResult___snd__h608921 = + b__h608373[63] ? b___1__h608986 : b__h608373 ; + assign _theResult___snd_fst_exp__h368028 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4109 ? - _theResult___fst_exp__h359442 : - _theResult___fst_exp__h368024 ; - assign _theResult___snd_fst_exp__h385847 = + _theResult___fst_exp__h359443 : + _theResult___fst_exp__h368025 ; + assign _theResult___snd_fst_exp__h385848 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? - _theResult___fst_exp__h377208 : - _theResult___fst_exp__h385844 ; - assign _theResult___snd_fst_exp__h413724 = + _theResult___fst_exp__h377209 : + _theResult___fst_exp__h385845 ; + assign _theResult___snd_fst_exp__h413725 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5501 ? - _theResult___fst_exp__h405139 : - _theResult___fst_exp__h413721 ; - assign _theResult___snd_fst_exp__h431544 = + _theResult___fst_exp__h405140 : + _theResult___fst_exp__h413722 ; + assign _theResult___snd_fst_exp__h431545 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? - _theResult___fst_exp__h422905 : - _theResult___fst_exp__h431541 ; - assign _theResult___snd_fst_exp__h459419 = + _theResult___fst_exp__h422906 : + _theResult___fst_exp__h431542 ; + assign _theResult___snd_fst_exp__h459420 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6893 ? - _theResult___fst_exp__h450834 : - _theResult___fst_exp__h459416 ; - assign _theResult___snd_fst_exp__h477239 = + _theResult___fst_exp__h450835 : + _theResult___fst_exp__h459417 ; + assign _theResult___snd_fst_exp__h477240 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? - _theResult___fst_exp__h468600 : - _theResult___fst_exp__h477236 ; - assign _theResult___snd_fst_exp__h507674 = + _theResult___fst_exp__h468601 : + _theResult___fst_exp__h477237 ; + assign _theResult___snd_fst_exp__h507675 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 ? 11'd0 : - _theResult___fst_exp__h507671 ; - assign _theResult___snd_fst_exp__h526109 = + _theResult___fst_exp__h507672 ; + assign _theResult___snd_fst_exp__h526110 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 ? - _theResult___fst_exp__h517322 : - _theResult___fst_exp__h526106 ; - assign _theResult___snd_fst_exp__h546527 = + _theResult___fst_exp__h517323 : + _theResult___fst_exp__h526107 ; + assign _theResult___snd_fst_exp__h546528 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 ? 11'd0 : - _theResult___fst_exp__h546524 ; - assign _theResult___snd_fst_exp__h564962 = + _theResult___fst_exp__h546525 ; + assign _theResult___snd_fst_exp__h564963 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 ? - _theResult___fst_exp__h556175 : - _theResult___fst_exp__h564959 ; - assign _theResult___snd_fst_exp__h585831 = + _theResult___fst_exp__h556176 : + _theResult___fst_exp__h564960 ; + assign _theResult___snd_fst_exp__h585832 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 ? 11'd0 : - _theResult___fst_exp__h585828 ; - assign _theResult___snd_fst_exp__h604266 = + _theResult___fst_exp__h585829 ; + assign _theResult___snd_fst_exp__h604267 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 ? - _theResult___fst_exp__h595479 : - _theResult___fst_exp__h604263 ; - assign _theResult___snd_fst_sfd__h343079 = + _theResult___fst_exp__h595480 : + _theResult___fst_exp__h604264 ; + assign _theResult___snd_fst_sfd__h343080 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h368028 = + assign _theResult___snd_fst_sfd__h368029 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4109 ? - _theResult___fst_sfd__h359443 : - _theResult___fst_sfd__h368025 ; - assign _theResult___snd_fst_sfd__h385848 = + _theResult___fst_sfd__h359444 : + _theResult___fst_sfd__h368026 ; + assign _theResult___snd_fst_sfd__h385849 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4649 ? - _theResult___fst_sfd__h377209 : - _theResult___fst_sfd__h385845 ; - assign _theResult___snd_fst_sfd__h388781 = + _theResult___fst_sfd__h377210 : + _theResult___fst_sfd__h385846 ; + assign _theResult___snd_fst_sfd__h388782 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h413725 = + assign _theResult___snd_fst_sfd__h413726 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5501 ? - _theResult___fst_sfd__h405140 : - _theResult___fst_sfd__h413722 ; - assign _theResult___snd_fst_sfd__h431545 = + _theResult___fst_sfd__h405141 : + _theResult___fst_sfd__h413723 ; + assign _theResult___snd_fst_sfd__h431546 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6041 ? - _theResult___fst_sfd__h422906 : - _theResult___fst_sfd__h431542 ; - assign _theResult___snd_fst_sfd__h434476 = + _theResult___fst_sfd__h422907 : + _theResult___fst_sfd__h431543 ; + assign _theResult___snd_fst_sfd__h434477 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h459420 = + assign _theResult___snd_fst_sfd__h459421 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6893 ? - _theResult___fst_sfd__h450835 : - _theResult___fst_sfd__h459417 ; - assign _theResult___snd_fst_sfd__h477240 = + _theResult___fst_sfd__h450836 : + _theResult___fst_sfd__h459418 ; + assign _theResult___snd_fst_sfd__h477241 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7433 ? - _theResult___fst_sfd__h468601 : - _theResult___fst_sfd__h477237 ; - assign _theResult___snd_fst_sfd__h487841 = - (f1_sfd__h487526 == 23'd0) ? + _theResult___fst_sfd__h468602 : + _theResult___fst_sfd__h477238 ; + assign _theResult___snd_fst_sfd__h487842 = + (f1_sfd__h487527 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h487589 ; - assign _theResult___snd_fst_sfd__h507675 = + out___1_sfd__h487590 ; + assign _theResult___snd_fst_sfd__h507676 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8623 ? 52'd0 : - _theResult___fst_sfd__h507672 ; - assign _theResult___snd_fst_sfd__h526110 = + _theResult___fst_sfd__h507673 ; + assign _theResult___snd_fst_sfd__h526111 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8759 ? - _theResult___fst_sfd__h517323 : - _theResult___fst_sfd__h526107 ; - assign _theResult___snd_fst_sfd__h526835 = - (f2_sfd__h526520 == 23'd0) ? + _theResult___fst_sfd__h517324 : + _theResult___fst_sfd__h526108 ; + assign _theResult___snd_fst_sfd__h526836 = + (f2_sfd__h526521 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h526583 ; - assign _theResult___snd_fst_sfd__h546528 = + out___1_sfd__h526584 ; + assign _theResult___snd_fst_sfd__h546529 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10123 ? 52'd0 : - _theResult___fst_sfd__h546525 ; - assign _theResult___snd_fst_sfd__h564963 = + _theResult___fst_sfd__h546526 ; + assign _theResult___snd_fst_sfd__h564964 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10244 ? - _theResult___fst_sfd__h556176 : - _theResult___fst_sfd__h564960 ; - assign _theResult___snd_fst_sfd__h566139 = - (f3_sfd__h565824 == 23'd0) ? + _theResult___fst_sfd__h556177 : + _theResult___fst_sfd__h564961 ; + assign _theResult___snd_fst_sfd__h566140 = + (f3_sfd__h565825 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h565887 ; - assign _theResult___snd_fst_sfd__h585832 = + out___1_sfd__h565888 ; + assign _theResult___snd_fst_sfd__h585833 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9353 ? 52'd0 : - _theResult___fst_sfd__h585829 ; - assign _theResult___snd_fst_sfd__h604267 = + _theResult___fst_sfd__h585830 ; + assign _theResult___snd_fst_sfd__h604268 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9474 ? - _theResult___fst_sfd__h595480 : - _theResult___fst_sfd__h604264 ; - assign a___1__h608533 = + _theResult___fst_sfd__h595481 : + _theResult___fst_sfd__h604265 ; + assign a___1__h608534 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd1) ? { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[171:140] } : { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q3[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q3 } ; - assign a___1__h608924 = 64'd0 - a__h608371 ; - assign a__h608371 = + assign a___1__h608925 = 64'd0 - a__h608372 ; + assign a__h608372 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - a___1__h608533 : + a___1__h608534 : coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign b___1__h608534 = + assign b___1__h608535 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q4[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q4 } : { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] } ; - assign b___1__h608985 = 64'd0 - b__h608372 ; - assign b__h608372 = + assign b___1__h608986 = 64'd0 - b__h608373 ; + assign b__h608373 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - b___1__h608534 : + b___1__h608535 : coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign b__h608519 = { {64{a__h608371[63]}}, a__h608371 } ; - assign b__h608595 = { {64{b__h608372[63]}}, b__h608372 } ; - assign b__h608696 = { 64'd0, a__h608371 } ; - assign b__h608708 = { 64'd0, b__h608372 } ; - assign base__h710680 = { csrf_stvec_base_hi_reg, 2'b0 } ; - assign base__h710700 = { csrf_mtvec_base_hi_reg, 2'b0 } ; - assign cause_code__h707757 = - commitStage_commitTrap[36] ? i__h707932 : i__h707772 ; + assign b__h608520 = { {64{a__h608372[63]}}, a__h608372 } ; + assign b__h608596 = { {64{b__h608373[63]}}, b__h608373 } ; + assign b__h608697 = { 64'd0, a__h608372 } ; + assign b__h608709 = { 64'd0, b__h608373 } ; + assign base__h710681 = { csrf_stvec_base_hi_reg, 2'b0 } ; + assign base__h710701 = { csrf_mtvec_base_hi_reg, 2'b0 } ; + assign cause_code__h707758 = + commitStage_commitTrap[36] ? i__h707933 : i__h707773 ; assign coreFix_aluExe_0_bypassWire_0_wget__2367_BITS__ETC___d12369 = coreFix_aluExe_0_bypassWire_0$wget[70:64] == coreFix_aluExe_0_dispToRegQ$first[84:78] ; @@ -27759,9 +27759,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10918 | - ((f3_exp__h565823 != 8'd255 || f3_sfd__h565824 == 23'd0) && - (f3_exp__h565823 != 8'd255 || f3_sfd__h565824 != 23'd0) && - (f3_exp__h565823 != 8'd0 || f3_sfd__h565824 != 23'd0) && + ((f3_exp__h565824 != 8'd255 || f3_sfd__h565825 == 23'd0) && + (f3_exp__h565824 != 8'd255 || f3_sfd__h565825 != 23'd0) && + (f3_exp__h565824 != 8'd0 || f3_sfd__h565825 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10958) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__482_BI_ETC___d10999 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -27769,9 +27769,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10987 | - ((f3_exp__h565823 != 8'd255 || f3_sfd__h565824 == 23'd0) && - (f3_exp__h565823 != 8'd255 || f3_sfd__h565824 != 23'd0) && - (f3_exp__h565823 != 8'd0 || f3_sfd__h565824 != 23'd0) && + ((f3_exp__h565824 != 8'd255 || f3_sfd__h565825 == 23'd0) && + (f3_exp__h565824 != 8'd255 || f3_sfd__h565825 != 23'd0) && + (f3_exp__h565824 != 8'd0 || f3_sfd__h565825 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10994) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__482_BI_ETC___d11047 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -27779,9 +27779,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11031 | - ((f3_exp__h565823 != 8'd255 || f3_sfd__h565824 == 23'd0) && - (f3_exp__h565823 != 8'd255 || f3_sfd__h565824 != 23'd0) && - (f3_exp__h565823 != 8'd0 || f3_sfd__h565824 != 23'd0) && + ((f3_exp__h565824 != 8'd255 || f3_sfd__h565825 == 23'd0) && + (f3_exp__h565824 != 8'd255 || f3_sfd__h565825 != 23'd0) && + (f3_exp__h565824 != 8'd0 || f3_sfd__h565825 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11042) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__482_BI_ETC___d11089 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -27789,9 +27789,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11075 | - ((f3_exp__h565823 != 8'd255 || f3_sfd__h565824 == 23'd0) && - (f3_exp__h565823 != 8'd255 || f3_sfd__h565824 != 23'd0) && - (f3_exp__h565823 != 8'd0 || f3_sfd__h565824 != 23'd0) && + ((f3_exp__h565824 != 8'd255 || f3_sfd__h565825 == 23'd0) && + (f3_exp__h565824 != 8'd255 || f3_sfd__h565825 != 23'd0) && + (f3_exp__h565824 != 8'd0 || f3_sfd__h565825 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11084) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__482_BI_ETC___d11131 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -27799,9 +27799,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11117 | - ((f3_exp__h565823 != 8'd255 || f3_sfd__h565824 == 23'd0) && - (f3_exp__h565823 != 8'd255 || f3_sfd__h565824 != 23'd0) && - (f3_exp__h565823 != 8'd0 || f3_sfd__h565824 != 23'd0) && + ((f3_exp__h565824 != 8'd255 || f3_sfd__h565825 == 23'd0) && + (f3_exp__h565824 != 8'd255 || f3_sfd__h565825 != 23'd0) && + (f3_exp__h565824 != 8'd0 || f3_sfd__h565825 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11126) ; assign coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q4 = coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] ; @@ -27847,7 +27847,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[58] && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[57:0] == - y__h258433 ; + y__h258434 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIn_ETC___d3163 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3127 || @@ -28206,7 +28206,7 @@ module mkCore(CLK, fetchStage$iTlbIfc_noPendingReq && coreFix_memExe_dTlb$noPendingReq && NOT_rob_deqPort_0_deq_data__4451_BITS_257_TO_2_ETC___d14773 ; - assign csr_addr__h661834 = + assign csr_addr__h661835 = fetchStage$pipelines_0_first[173] ? IF_fetchStage_pipelines_0_first__2928_BITS_172_ETC___d13125 : 12'hCFF ; @@ -28231,7 +28231,7 @@ module mkCore(CLK, fetchStage$pipelines_0_first[199:195] == 5'd13 && (fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d13190 || csrf_prv_reg_read__2956_ULT_IF_fetchStage_pipe_ETC___d13192 || - csr_addr__h661834 == 12'h8FF) ; + csr_addr__h661835 == 12'h8FF) ; assign csrf_fs_reg_read__1726_EQ_0_3149_AND_fetchStag_ETC___d13605 = csrf_fs_reg == 2'd0 && (fetchStage$pipelines_0_first[95] && @@ -28263,90 +28263,90 @@ module mkCore(CLK, _0b0_CONCAT_csrf_medeleg_15_reg_read__1825_1826_ETC___d14629) ; assign csrf_prv_reg_read__2956_ULE_1___d14592 = csrf_prv_reg <= 2'd1 ; assign csrf_prv_reg_read__2956_ULT_IF_fetchStage_pipe_ETC___d13192 = - csrf_prv_reg < csr_addr__h661834[9:8] ; - assign data79260_BITS_31_TO_0__q2 = data__h479260[31:0] ; - assign data80192_BITS_31_TO_0__q6 = data__h480192[31:0] ; - assign data___1__h479772 = - { {32{data79260_BITS_31_TO_0__q2[31]}}, - data79260_BITS_31_TO_0__q2 } ; - assign data___1__h480704 = - { {32{data80192_BITS_31_TO_0__q6[31]}}, - data80192_BITS_31_TO_0__q6 } ; - assign data__h479260 = + csrf_prv_reg < csr_addr__h661835[9:8] ; + assign data79261_BITS_31_TO_0__q2 = data__h479261[31:0] ; + assign data80193_BITS_31_TO_0__q6 = data__h480193[31:0] ; + assign data___1__h479773 = + { {32{data79261_BITS_31_TO_0__q2[31]}}, + data79261_BITS_31_TO_0__q2 } ; + assign data___1__h480705 = + { {32{data80193_BITS_31_TO_0__q6[31]}}, + data80193_BITS_31_TO_0__q6 } ; + assign data__h479261 = (coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[35:34] == 2'd0) ? coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ$D_OUT[63:0] : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ$D_OUT[127:64] ; - assign data__h480192 = + assign data__h480193 = (coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[35:34] == 2'd2) ? - x_quotient__h479956 : - x_remainder__h479957 ; - assign din_inc___2_exp__h385878 = _theResult___fst_exp__h358845 + 8'd1 ; - assign din_inc___2_exp__h385902 = _theResult___fst_exp__h367501 + 8'd1 ; - assign din_inc___2_exp__h385932 = _theResult___fst_exp__h376611 + 8'd1 ; - assign din_inc___2_exp__h385956 = _theResult___fst_exp__h385296 + 8'd1 ; - assign din_inc___2_exp__h431575 = _theResult___fst_exp__h404542 + 8'd1 ; - assign din_inc___2_exp__h431599 = _theResult___fst_exp__h413198 + 8'd1 ; - assign din_inc___2_exp__h431629 = _theResult___fst_exp__h422308 + 8'd1 ; - assign din_inc___2_exp__h431653 = _theResult___fst_exp__h430993 + 8'd1 ; - assign din_inc___2_exp__h477270 = _theResult___fst_exp__h450237 + 8'd1 ; - assign din_inc___2_exp__h477294 = _theResult___fst_exp__h458893 + 8'd1 ; - assign din_inc___2_exp__h477324 = _theResult___fst_exp__h468003 + 8'd1 ; - assign din_inc___2_exp__h477348 = _theResult___fst_exp__h476688 + 8'd1 ; - assign din_inc___2_exp__h526163 = _theResult___fst_exp__h506913 + 11'd1 ; - assign din_inc___2_exp__h526198 = _theResult___fst_exp__h516490 + 11'd1 ; - assign din_inc___2_exp__h526224 = _theResult___fst_exp__h525323 + 11'd1 ; - assign din_inc___2_exp__h565016 = _theResult___fst_exp__h545766 + 11'd1 ; - assign din_inc___2_exp__h565051 = _theResult___fst_exp__h555343 + 11'd1 ; - assign din_inc___2_exp__h565077 = _theResult___fst_exp__h564176 + 11'd1 ; - assign din_inc___2_exp__h604320 = _theResult___fst_exp__h585070 + 11'd1 ; - assign din_inc___2_exp__h604355 = _theResult___fst_exp__h594647 + 11'd1 ; - assign din_inc___2_exp__h604381 = _theResult___fst_exp__h603480 + 11'd1 ; - assign enabled_ints___1__h658438 = pend_ints__h658023 & y__h658450 ; - assign enabled_ints__h658484 = - pend_ints__h658023 & - { r1__read_BITS_9_TO_0___h658460, csrf_mideleg_1_0_reg } ; - assign f1_exp87525_MINUS_127__q128 = f1_exp__h487525 - 8'd127 ; - assign f1_exp__h487525 = + x_quotient__h479957 : + x_remainder__h479958 ; + assign din_inc___2_exp__h385879 = _theResult___fst_exp__h358846 + 8'd1 ; + assign din_inc___2_exp__h385903 = _theResult___fst_exp__h367502 + 8'd1 ; + assign din_inc___2_exp__h385933 = _theResult___fst_exp__h376612 + 8'd1 ; + assign din_inc___2_exp__h385957 = _theResult___fst_exp__h385297 + 8'd1 ; + assign din_inc___2_exp__h431576 = _theResult___fst_exp__h404543 + 8'd1 ; + assign din_inc___2_exp__h431600 = _theResult___fst_exp__h413199 + 8'd1 ; + assign din_inc___2_exp__h431630 = _theResult___fst_exp__h422309 + 8'd1 ; + assign din_inc___2_exp__h431654 = _theResult___fst_exp__h430994 + 8'd1 ; + assign din_inc___2_exp__h477271 = _theResult___fst_exp__h450238 + 8'd1 ; + assign din_inc___2_exp__h477295 = _theResult___fst_exp__h458894 + 8'd1 ; + assign din_inc___2_exp__h477325 = _theResult___fst_exp__h468004 + 8'd1 ; + assign din_inc___2_exp__h477349 = _theResult___fst_exp__h476689 + 8'd1 ; + assign din_inc___2_exp__h526164 = _theResult___fst_exp__h506914 + 11'd1 ; + assign din_inc___2_exp__h526199 = _theResult___fst_exp__h516491 + 11'd1 ; + assign din_inc___2_exp__h526225 = _theResult___fst_exp__h525324 + 11'd1 ; + assign din_inc___2_exp__h565017 = _theResult___fst_exp__h545767 + 11'd1 ; + assign din_inc___2_exp__h565052 = _theResult___fst_exp__h555344 + 11'd1 ; + assign din_inc___2_exp__h565078 = _theResult___fst_exp__h564177 + 11'd1 ; + assign din_inc___2_exp__h604321 = _theResult___fst_exp__h585071 + 11'd1 ; + assign din_inc___2_exp__h604356 = _theResult___fst_exp__h594648 + 11'd1 ; + assign din_inc___2_exp__h604382 = _theResult___fst_exp__h603481 + 11'd1 ; + assign enabled_ints___1__h658439 = pend_ints__h658024 & y__h658451 ; + assign enabled_ints__h658485 = + pend_ints__h658024 & + { r1__read_BITS_9_TO_0___h658461, csrf_mideleg_1_0_reg } ; + assign f1_exp87526_MINUS_127__q128 = f1_exp__h487526 - 8'd127 ; + assign f1_exp__h487526 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[170:163] : 8'd255 ; - assign f1_sfd__h487526 = + assign f1_sfd__h487527 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[162:140] : 23'd4194304 ; - assign f2_exp26519_MINUS_127__q168 = f2_exp__h526519 - 8'd127 ; - assign f2_exp__h526519 = + assign f2_exp26520_MINUS_127__q168 = f2_exp__h526520 - 8'd127 ; + assign f2_exp__h526520 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[106:99] : 8'd255 ; - assign f2_sfd__h526520 = + assign f2_sfd__h526521 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[98:76] : 23'd4194304 ; - assign f3_exp65823_MINUS_127__q145 = f3_exp__h565823 - 8'd127 ; - assign f3_exp__h565823 = + assign f3_exp65824_MINUS_127__q145 = f3_exp__h565824 - 8'd127 ; + assign f3_exp__h565824 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[42:35] : 8'd255 ; - assign f3_sfd__h565824 = + assign f3_sfd__h565825 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[34:12] : 23'd4194304 ; - assign fallthrough_pc__h670383 = + assign fallthrough_pc__h670384 = (fetchStage$pipelines_0_first[97:96] == 2'b11) ? fetchStage$pipelines_0_first[387:324] + 64'd4 : fetchStage$pipelines_0_first[387:324] + 64'd2 ; - assign fallthrough_pc__h686129 = + assign fallthrough_pc__h686130 = (fetchStage$pipelines_1_first[97:96] == 2'b11) ? fetchStage$pipelines_1_first[387:324] + 64'd4 : fetchStage$pipelines_1_first[387:324] + 64'd2 ; - assign fcsr_csr__read__h616232 = { 56'd0, x__h619372 } ; + assign fcsr_csr__read__h616233 = { 56'd0, x__h619373 } ; assign fetchStage_RDY_pipelines_0_first__2925_AND_NOT_ETC___d13536 = fetchStage$RDY_pipelines_0_first && (fetchStage$pipelines_0_first[194:192] != 3'd1 || @@ -28443,9 +28443,9 @@ module mkCore(CLK, assign fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d13190 = (fetchStage$pipelines_0_first[194:192] == 3'd0 && fetchStage$pipelines_0_first[178:174] == 5'd15 || - rs1__h661835 != 5'd0 || - imm__h661836 != 32'd0) && - csr_addr__h661834[11:10] == 2'b11 ; + rs1__h661836 != 5'd0 || + imm__h661837 != 32'd0) && + csr_addr__h661835[11:10] == 2'b11 ; assign fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d13836 = (fetchStage$pipelines_0_first[194:192] == 3'd0 || fetchStage$pipelines_0_first[194:192] == 3'd1) && @@ -28567,82 +28567,82 @@ module mkCore(CLK, !epochManager$checkEpoch_1_check || fetchStage$pipelines_0_canDeq && fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d14043 ; - assign fflags__h722584 = + assign fflags__h722585 = NOT_rob_deqPort_0_canDeq__4986_4987_OR_rob_deq_ETC___d15178 ? - y_avValue_fst__h722531 : + y_avValue_fst__h722532 : IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15184 ; - assign fflags_csr__read__h616207 = { 59'd0, csrf_fflags_reg } ; - assign frm_csr__read__h616218 = { 61'd0, csrf_frm_reg } ; - assign guard__h350744 = - { IF_sfdin58839_BIT_33_THEN_2_ELSE_0__q22[1], - { sfdin__h358839[32:0], 23'd0 } != 56'd0 } ; - assign guard__h359453 = - { IF_theResult___snd67452_BIT_33_THEN_2_ELSE_0__q24[1], - { _theResult___snd__h367452[32:0], 23'd0 } != 56'd0 } ; - assign guard__h368383 = - { IF_sfdin76605_BIT_33_THEN_2_ELSE_0__q32[1], - { sfdin__h376605[32:0], 23'd0 } != 56'd0 } ; - assign guard__h368981 = x__h369083 != 57'd0 ; - assign guard__h377219 = - { IF_theResult___snd85242_BIT_33_THEN_2_ELSE_0__q37[1], - { _theResult___snd__h385242[32:0], 23'd0 } != 56'd0 } ; - assign guard__h396443 = - { IF_sfdin04536_BIT_33_THEN_2_ELSE_0__q57[1], - { sfdin__h404536[32:0], 23'd0 } != 56'd0 } ; - assign guard__h405150 = - { IF_theResult___snd13149_BIT_33_THEN_2_ELSE_0__q59[1], - { _theResult___snd__h413149[32:0], 23'd0 } != 56'd0 } ; - assign guard__h414080 = - { IF_sfdin22302_BIT_33_THEN_2_ELSE_0__q67[1], - { sfdin__h422302[32:0], 23'd0 } != 56'd0 } ; - assign guard__h414678 = x__h414780 != 57'd0 ; - assign guard__h422916 = - { IF_theResult___snd30939_BIT_33_THEN_2_ELSE_0__q72[1], - { _theResult___snd__h430939[32:0], 23'd0 } != 56'd0 } ; - assign guard__h442138 = - { IF_sfdin50231_BIT_33_THEN_2_ELSE_0__q92[1], - { sfdin__h450231[32:0], 23'd0 } != 56'd0 } ; - assign guard__h450845 = - { IF_theResult___snd58844_BIT_33_THEN_2_ELSE_0__q94[1], - { _theResult___snd__h458844[32:0], 23'd0 } != 56'd0 } ; - assign guard__h459775 = - { IF_sfdin67997_BIT_33_THEN_2_ELSE_0__q102[1], - { sfdin__h467997[32:0], 23'd0 } != 56'd0 } ; - assign guard__h460373 = x__h460475 != 57'd0 ; - assign guard__h468611 = - { IF_theResult___snd76634_BIT_33_THEN_2_ELSE_0__q107[1], - { _theResult___snd__h476634[32:0], 23'd0 } != 56'd0 } ; - assign guard__h498952 = - { IF_theResult___snd06864_BIT_4_THEN_2_ELSE_0__q127[1], - { _theResult___snd__h506864[3:0], 52'd0 } != 56'd0 } ; - assign guard__h508264 = - { IF_sfdin16484_BIT_4_THEN_2_ELSE_0__q131[1], - { sfdin__h516484[3:0], 52'd0 } != 56'd0 } ; - assign guard__h508862 = x__h508962 != 57'd0 ; - assign guard__h517333 = - { IF_theResult___snd25269_BIT_4_THEN_2_ELSE_0__q134[1], - { _theResult___snd__h525269[3:0], 52'd0 } != 56'd0 } ; - assign guard__h537805 = - { IF_theResult___snd45717_BIT_4_THEN_2_ELSE_0__q167[1], - { _theResult___snd__h545717[3:0], 52'd0 } != 56'd0 } ; - assign guard__h547117 = - { IF_sfdin55337_BIT_4_THEN_2_ELSE_0__q171[1], - { sfdin__h555337[3:0], 52'd0 } != 56'd0 } ; - assign guard__h547715 = x__h547815 != 57'd0 ; - assign guard__h556186 = - { IF_theResult___snd64122_BIT_4_THEN_2_ELSE_0__q174[1], - { _theResult___snd__h564122[3:0], 52'd0 } != 56'd0 } ; - assign guard__h577109 = - { IF_theResult___snd85021_BIT_4_THEN_2_ELSE_0__q144[1], - { _theResult___snd__h585021[3:0], 52'd0 } != 56'd0 } ; - assign guard__h586421 = - { IF_sfdin94641_BIT_4_THEN_2_ELSE_0__q148[1], - { sfdin__h594641[3:0], 52'd0 } != 56'd0 } ; - assign guard__h587019 = x__h587119 != 57'd0 ; - assign guard__h595490 = - { IF_theResult___snd03426_BIT_4_THEN_2_ELSE_0__q151[1], - { _theResult___snd__h603426[3:0], 52'd0 } != 56'd0 } ; - assign idx__h689686 = + assign fflags_csr__read__h616208 = { 59'd0, csrf_fflags_reg } ; + assign frm_csr__read__h616219 = { 61'd0, csrf_frm_reg } ; + assign guard__h350745 = + { IF_sfdin58840_BIT_33_THEN_2_ELSE_0__q22[1], + { sfdin__h358840[32:0], 23'd0 } != 56'd0 } ; + assign guard__h359454 = + { IF_theResult___snd67453_BIT_33_THEN_2_ELSE_0__q24[1], + { _theResult___snd__h367453[32:0], 23'd0 } != 56'd0 } ; + assign guard__h368384 = + { IF_sfdin76606_BIT_33_THEN_2_ELSE_0__q32[1], + { sfdin__h376606[32:0], 23'd0 } != 56'd0 } ; + assign guard__h368982 = x__h369084 != 57'd0 ; + assign guard__h377220 = + { IF_theResult___snd85243_BIT_33_THEN_2_ELSE_0__q37[1], + { _theResult___snd__h385243[32:0], 23'd0 } != 56'd0 } ; + assign guard__h396444 = + { IF_sfdin04537_BIT_33_THEN_2_ELSE_0__q57[1], + { sfdin__h404537[32:0], 23'd0 } != 56'd0 } ; + assign guard__h405151 = + { IF_theResult___snd13150_BIT_33_THEN_2_ELSE_0__q59[1], + { _theResult___snd__h413150[32:0], 23'd0 } != 56'd0 } ; + assign guard__h414081 = + { IF_sfdin22303_BIT_33_THEN_2_ELSE_0__q67[1], + { sfdin__h422303[32:0], 23'd0 } != 56'd0 } ; + assign guard__h414679 = x__h414781 != 57'd0 ; + assign guard__h422917 = + { IF_theResult___snd30940_BIT_33_THEN_2_ELSE_0__q72[1], + { _theResult___snd__h430940[32:0], 23'd0 } != 56'd0 } ; + assign guard__h442139 = + { IF_sfdin50232_BIT_33_THEN_2_ELSE_0__q92[1], + { sfdin__h450232[32:0], 23'd0 } != 56'd0 } ; + assign guard__h450846 = + { IF_theResult___snd58845_BIT_33_THEN_2_ELSE_0__q94[1], + { _theResult___snd__h458845[32:0], 23'd0 } != 56'd0 } ; + assign guard__h459776 = + { IF_sfdin67998_BIT_33_THEN_2_ELSE_0__q102[1], + { sfdin__h467998[32:0], 23'd0 } != 56'd0 } ; + assign guard__h460374 = x__h460476 != 57'd0 ; + assign guard__h468612 = + { IF_theResult___snd76635_BIT_33_THEN_2_ELSE_0__q107[1], + { _theResult___snd__h476635[32:0], 23'd0 } != 56'd0 } ; + assign guard__h498953 = + { IF_theResult___snd06865_BIT_4_THEN_2_ELSE_0__q127[1], + { _theResult___snd__h506865[3:0], 52'd0 } != 56'd0 } ; + assign guard__h508265 = + { IF_sfdin16485_BIT_4_THEN_2_ELSE_0__q131[1], + { sfdin__h516485[3:0], 52'd0 } != 56'd0 } ; + assign guard__h508863 = x__h508963 != 57'd0 ; + assign guard__h517334 = + { IF_theResult___snd25270_BIT_4_THEN_2_ELSE_0__q134[1], + { _theResult___snd__h525270[3:0], 52'd0 } != 56'd0 } ; + assign guard__h537806 = + { IF_theResult___snd45718_BIT_4_THEN_2_ELSE_0__q167[1], + { _theResult___snd__h545718[3:0], 52'd0 } != 56'd0 } ; + assign guard__h547118 = + { IF_sfdin55338_BIT_4_THEN_2_ELSE_0__q171[1], + { sfdin__h555338[3:0], 52'd0 } != 56'd0 } ; + assign guard__h547716 = x__h547816 != 57'd0 ; + assign guard__h556187 = + { IF_theResult___snd64123_BIT_4_THEN_2_ELSE_0__q174[1], + { _theResult___snd__h564123[3:0], 52'd0 } != 56'd0 } ; + assign guard__h577110 = + { IF_theResult___snd85022_BIT_4_THEN_2_ELSE_0__q144[1], + { _theResult___snd__h585022[3:0], 52'd0 } != 56'd0 } ; + assign guard__h586422 = + { IF_sfdin94642_BIT_4_THEN_2_ELSE_0__q148[1], + { sfdin__h594642[3:0], 52'd0 } != 56'd0 } ; + assign guard__h587020 = x__h587120 != 57'd0 ; + assign guard__h595491 = + { IF_theResult___snd03427_BIT_4_THEN_2_ELSE_0__q151[1], + { _theResult___snd__h603427[3:0], 52'd0 } != 56'd0 } ; + assign idx__h689687 = fetchStage$pipelines_0_canDeq && NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13837 || !coreFix_aluExe_0_rsAlu$canEnq || @@ -28650,24 +28650,24 @@ module mkCore(CLK, fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d13857) && coreFix_aluExe_1_rsAlu$canEnq && !coreFix_aluExe_0_rsAlu_approximateCount__3547__ETC___d13549 ; - assign imm__h661836 = + assign imm__h661837 = fetchStage$pipelines_0_first[160] ? fetchStage$pipelines_0_first[159:128] : 32'd0 ; - assign k__h674091 = + assign k__h674092 = !coreFix_aluExe_0_rsAlu$canEnq || coreFix_aluExe_1_rsAlu$canEnq && !coreFix_aluExe_0_rsAlu_approximateCount__3547__ETC___d13549 ; - assign mcause_csr__read__h617874 = - { r1__read__h620835, csrf_mcause_code_reg } ; - assign mcounteren_csr__read__h617619 = - { r1__read__h620822, csrf_mcounteren_cy_reg } ; - assign medeleg_csr__read__h617226 = - { r1__read__h620683, csrf_medeleg_9_0_reg } ; - assign mideleg_csr__read__h617321 = - { r1__read__h620700, csrf_mideleg_1_0_reg } ; - assign mie_csr__read__h617445 = { r1__read__h620724, 1'b0 } ; - assign mip_csr__read__h618107 = { r1__read__h620841, 1'b0 } ; + assign mcause_csr__read__h617875 = + { r1__read__h620836, csrf_mcause_code_reg } ; + assign mcounteren_csr__read__h617620 = + { r1__read__h620823, csrf_mcounteren_cy_reg } ; + assign medeleg_csr__read__h617227 = + { r1__read__h620684, csrf_medeleg_9_0_reg } ; + assign mideleg_csr__read__h617322 = + { r1__read__h620701, csrf_mideleg_1_0_reg } ; + assign mie_csr__read__h617446 = { r1__read__h620725, 1'b0 } ; + assign mip_csr__read__h618108 = { r1__read__h620842, 1'b0 } ; assign mmio_cRqQ_enqReq_dummy2_2_read__32_AND_IF_mmio_ETC___d444 = mmio_cRqQ_enqReq_dummy2_2$Q_OUT && IF_mmio_cRqQ_enqReq_lat_1_whas__30_THEN_mmio_c_ETC___d339 || @@ -28743,410 +28743,410 @@ module mkCore(CLK, (!mmio_pRsQ_deqReq_dummy2_2$Q_OUT || !mmio_pRsQ_deqReq_lat_0$whas && !mmio_pRsQ_deqReq_rl) && mmio_pRsQ_full ; - assign msip__h75668 = csrf_software_int_pend_vec_3 ; - assign mstatus_csr__read__h617078 = { r1__read__h620558, csrf_ie_vec_0 } ; - assign mtvec_csr__read__h617527 = - { r1__read__h620817, csrf_mtvec_mode_low_reg } ; - assign n___1__h201748 = + assign msip__h75669 = csrf_software_int_pend_vec_3 ; + assign mstatus_csr__read__h617079 = { r1__read__h620559, csrf_ie_vec_0 } ; + assign mtvec_csr__read__h617528 = + { r1__read__h620818, csrf_mtvec_mode_low_reg } ; + assign n___1__h201749 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[78] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[70:63] : - x__h200345[63:56], + x__h200346[63:56], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[77] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[62:55] : - x__h200345[55:48], + x__h200346[55:48], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[76] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[54:47] : - x__h200345[47:40], + x__h200346[47:40], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[75] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[46:39] : - x__h200345[39:32], + x__h200346[39:32], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[74] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[38:31] : - x__h200345[31:24], + x__h200346[31:24], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[73] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[30:23] : - x__h200345[23:16], + x__h200346[23:16], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[72] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[22:15] : - x__h200345[15:8], + x__h200346[15:8], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[71] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[14:7] : - x__h200345[7:0] } ; - assign n__read__h618211 = + x__h200346[7:0] } ; + assign n__read__h618212 = (csrf_mcycle_ehr_data_dummy2_0$Q_OUT && csrf_mcycle_ehr_data_dummy2_1$Q_OUT) ? csrf_mcycle_ehr_data_rl : 64'd0 ; - assign n__read__h618402 = + assign n__read__h618403 = (csrf_minstret_ehr_data_dummy2_0$Q_OUT && csrf_minstret_ehr_data_dummy2_1$Q_OUT) ? csrf_minstret_ehr_data_rl : 64'd0 ; - assign n__read__h6329 = + assign n__read__h6330 = csrf_mcycle_ehr_data_dummy2_1$Q_OUT ? (csrf_mcycle_ehr_data_lat_0$whas ? rob$deqPort_0_deq_data[95:32] : csrf_mcycle_ehr_data_rl) : 64'd0 ; - assign n__read__h719387 = + assign n__read__h719388 = csrf_minstret_ehr_data_dummy2_1$Q_OUT ? IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 : 64'd0 ; - assign next_deqP___1__h301449 = + assign next_deqP___1__h301450 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP + 3'd1 ; - assign next_deqP___1__h309445 = + assign next_deqP___1__h309446 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP + 1'd1 ; - assign next_deqP___1__h315726 = + assign next_deqP___1__h315727 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP + 1'd1 ; - assign next_deqP___1__h323580 = + assign next_deqP___1__h323581 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP + 1'd1 ; - assign next_deqP___1__h333637 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; - assign next_deqP___1__h336862 = coreFix_memExe_forwardQ_deqP + 1'd1 ; - assign next_pc__h718597 = + assign next_deqP___1__h333638 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; + assign next_deqP___1__h336863 = coreFix_memExe_forwardQ_deqP + 1'd1 ; + assign next_pc__h718598 = (rob$deqPort_0_deq_data[97:96] == 2'd0) ? rob$deqPort_0_deq_data[95:32] : rob_deqPort_0_deq_data__4451_BITS_353_TO_290_4_ETC___d14954 ; - assign out___1_sfd__h487589 = { f1_sfd__h487526, 29'd0 } ; - assign out___1_sfd__h526583 = { f2_sfd__h526520, 29'd0 } ; - assign out___1_sfd__h565887 = { f3_sfd__h565824, 29'd0 } ; - assign out_exp__h359364 = - sfdin__h358839[34] ? - _theResult___exp__h359361 : - _theResult___fst_exp__h358845 ; - assign out_exp__h367946 = - _theResult___snd__h367452[34] ? - _theResult___exp__h367943 : - _theResult___fst_exp__h367501 ; - assign out_exp__h377130 = - sfdin__h376605[34] ? - _theResult___exp__h377127 : - _theResult___fst_exp__h376611 ; - assign out_exp__h385766 = - _theResult___snd__h385242[34] ? - _theResult___exp__h385763 : - _theResult___fst_exp__h385296 ; - assign out_exp__h405061 = - sfdin__h404536[34] ? - _theResult___exp__h405058 : - _theResult___fst_exp__h404542 ; - assign out_exp__h413643 = - _theResult___snd__h413149[34] ? - _theResult___exp__h413640 : - _theResult___fst_exp__h413198 ; - assign out_exp__h422827 = - sfdin__h422302[34] ? - _theResult___exp__h422824 : - _theResult___fst_exp__h422308 ; - assign out_exp__h431463 = - _theResult___snd__h430939[34] ? - _theResult___exp__h431460 : - _theResult___fst_exp__h430993 ; - assign out_exp__h450756 = - sfdin__h450231[34] ? - _theResult___exp__h450753 : - _theResult___fst_exp__h450237 ; - assign out_exp__h459338 = - _theResult___snd__h458844[34] ? - _theResult___exp__h459335 : - _theResult___fst_exp__h458893 ; - assign out_exp__h468522 = - sfdin__h467997[34] ? - _theResult___exp__h468519 : - _theResult___fst_exp__h468003 ; - assign out_exp__h477158 = - _theResult___snd__h476634[34] ? - _theResult___exp__h477155 : - _theResult___fst_exp__h476688 ; - assign out_exp__h507571 = - _theResult___snd__h506864[5] ? - _theResult___exp__h507568 : - _theResult___fst_exp__h506913 ; - assign out_exp__h517222 = - sfdin__h516484[5] ? - _theResult___exp__h517219 : - _theResult___fst_exp__h516490 ; - assign out_exp__h526006 = - _theResult___snd__h525269[5] ? - _theResult___exp__h526003 : - _theResult___fst_exp__h525323 ; - assign out_exp__h546424 = - _theResult___snd__h545717[5] ? - _theResult___exp__h546421 : - _theResult___fst_exp__h545766 ; - assign out_exp__h556075 = - sfdin__h555337[5] ? - _theResult___exp__h556072 : - _theResult___fst_exp__h555343 ; - assign out_exp__h564859 = - _theResult___snd__h564122[5] ? - _theResult___exp__h564856 : - _theResult___fst_exp__h564176 ; - assign out_exp__h585728 = - _theResult___snd__h585021[5] ? - _theResult___exp__h585725 : - _theResult___fst_exp__h585070 ; - assign out_exp__h595379 = - sfdin__h594641[5] ? - _theResult___exp__h595376 : - _theResult___fst_exp__h594647 ; - assign out_exp__h604163 = - _theResult___snd__h603426[5] ? - _theResult___exp__h604160 : - _theResult___fst_exp__h603480 ; - assign out_f_exp__h386142 = - (_theResult___exp__h385865 == 8'd255 && - _theResult___sfd__h385866 != 23'd0 || + assign out___1_sfd__h487590 = { f1_sfd__h487527, 29'd0 } ; + assign out___1_sfd__h526584 = { f2_sfd__h526521, 29'd0 } ; + assign out___1_sfd__h565888 = { f3_sfd__h565825, 29'd0 } ; + assign out_exp__h359365 = + sfdin__h358840[34] ? + _theResult___exp__h359362 : + _theResult___fst_exp__h358846 ; + assign out_exp__h367947 = + _theResult___snd__h367453[34] ? + _theResult___exp__h367944 : + _theResult___fst_exp__h367502 ; + assign out_exp__h377131 = + sfdin__h376606[34] ? + _theResult___exp__h377128 : + _theResult___fst_exp__h376612 ; + assign out_exp__h385767 = + _theResult___snd__h385243[34] ? + _theResult___exp__h385764 : + _theResult___fst_exp__h385297 ; + assign out_exp__h405062 = + sfdin__h404537[34] ? + _theResult___exp__h405059 : + _theResult___fst_exp__h404543 ; + assign out_exp__h413644 = + _theResult___snd__h413150[34] ? + _theResult___exp__h413641 : + _theResult___fst_exp__h413199 ; + assign out_exp__h422828 = + sfdin__h422303[34] ? + _theResult___exp__h422825 : + _theResult___fst_exp__h422309 ; + assign out_exp__h431464 = + _theResult___snd__h430940[34] ? + _theResult___exp__h431461 : + _theResult___fst_exp__h430994 ; + assign out_exp__h450757 = + sfdin__h450232[34] ? + _theResult___exp__h450754 : + _theResult___fst_exp__h450238 ; + assign out_exp__h459339 = + _theResult___snd__h458845[34] ? + _theResult___exp__h459336 : + _theResult___fst_exp__h458894 ; + assign out_exp__h468523 = + sfdin__h467998[34] ? + _theResult___exp__h468520 : + _theResult___fst_exp__h468004 ; + assign out_exp__h477159 = + _theResult___snd__h476635[34] ? + _theResult___exp__h477156 : + _theResult___fst_exp__h476689 ; + assign out_exp__h507572 = + _theResult___snd__h506865[5] ? + _theResult___exp__h507569 : + _theResult___fst_exp__h506914 ; + assign out_exp__h517223 = + sfdin__h516485[5] ? + _theResult___exp__h517220 : + _theResult___fst_exp__h516491 ; + assign out_exp__h526007 = + _theResult___snd__h525270[5] ? + _theResult___exp__h526004 : + _theResult___fst_exp__h525324 ; + assign out_exp__h546425 = + _theResult___snd__h545718[5] ? + _theResult___exp__h546422 : + _theResult___fst_exp__h545767 ; + assign out_exp__h556076 = + sfdin__h555338[5] ? + _theResult___exp__h556073 : + _theResult___fst_exp__h555344 ; + assign out_exp__h564860 = + _theResult___snd__h564123[5] ? + _theResult___exp__h564857 : + _theResult___fst_exp__h564177 ; + assign out_exp__h585729 = + _theResult___snd__h585022[5] ? + _theResult___exp__h585726 : + _theResult___fst_exp__h585071 ; + assign out_exp__h595380 = + sfdin__h594642[5] ? + _theResult___exp__h595377 : + _theResult___fst_exp__h594648 ; + assign out_exp__h604164 = + _theResult___snd__h603427[5] ? + _theResult___exp__h604161 : + _theResult___fst_exp__h603481 ; + assign out_f_exp__h386143 = + (_theResult___exp__h385866 == 8'd255 && + _theResult___sfd__h385867 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h385856 ; - assign out_f_exp__h431839 = - (_theResult___exp__h431562 == 8'd255 && - _theResult___sfd__h431563 != 23'd0 || + _theResult___fst_exp__h385857 ; + assign out_f_exp__h431840 = + (_theResult___exp__h431563 == 8'd255 && + _theResult___sfd__h431564 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h431553 ; - assign out_f_exp__h477534 = - (_theResult___exp__h477257 == 8'd255 && - _theResult___sfd__h477258 != 23'd0 || + _theResult___fst_exp__h431554 ; + assign out_f_exp__h477535 = + (_theResult___exp__h477258 == 8'd255 && + _theResult___sfd__h477259 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h477248 ; - assign out_f_sfd__h386143 = - (_theResult___exp__h385865 == 8'd255 && - _theResult___sfd__h385866 != 23'd0) ? + _theResult___fst_exp__h477249 ; + assign out_f_sfd__h386144 = + (_theResult___exp__h385866 == 8'd255 && + _theResult___sfd__h385867 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h385866 ; - assign out_f_sfd__h431840 = - (_theResult___exp__h431562 == 8'd255 && - _theResult___sfd__h431563 != 23'd0) ? + _theResult___sfd__h385867 ; + assign out_f_sfd__h431841 = + (_theResult___exp__h431563 == 8'd255 && + _theResult___sfd__h431564 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h431563 ; - assign out_f_sfd__h477535 = - (_theResult___exp__h477257 == 8'd255 && - _theResult___sfd__h477258 != 23'd0) ? + _theResult___sfd__h431564 ; + assign out_f_sfd__h477536 = + (_theResult___exp__h477258 == 8'd255 && + _theResult___sfd__h477259 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h477258 ; - assign out_sfd__h359365 = - sfdin__h358839[34] ? - _theResult___sfd__h359362 : - sfdin__h358839[56:34] ; - assign out_sfd__h367947 = - _theResult___snd__h367452[34] ? - _theResult___sfd__h367944 : - _theResult___snd__h367452[56:34] ; - assign out_sfd__h377131 = - sfdin__h376605[34] ? - _theResult___sfd__h377128 : - sfdin__h376605[56:34] ; - assign out_sfd__h385767 = - _theResult___snd__h385242[34] ? - _theResult___sfd__h385764 : - _theResult___snd__h385242[56:34] ; - assign out_sfd__h405062 = - sfdin__h404536[34] ? - _theResult___sfd__h405059 : - sfdin__h404536[56:34] ; - assign out_sfd__h413644 = - _theResult___snd__h413149[34] ? - _theResult___sfd__h413641 : - _theResult___snd__h413149[56:34] ; - assign out_sfd__h422828 = - sfdin__h422302[34] ? - _theResult___sfd__h422825 : - sfdin__h422302[56:34] ; - assign out_sfd__h431464 = - _theResult___snd__h430939[34] ? - _theResult___sfd__h431461 : - _theResult___snd__h430939[56:34] ; - assign out_sfd__h450757 = - sfdin__h450231[34] ? - _theResult___sfd__h450754 : - sfdin__h450231[56:34] ; - assign out_sfd__h459339 = - _theResult___snd__h458844[34] ? - _theResult___sfd__h459336 : - _theResult___snd__h458844[56:34] ; - assign out_sfd__h468523 = - sfdin__h467997[34] ? - _theResult___sfd__h468520 : - sfdin__h467997[56:34] ; - assign out_sfd__h477159 = - _theResult___snd__h476634[34] ? - _theResult___sfd__h477156 : - _theResult___snd__h476634[56:34] ; - assign out_sfd__h507572 = - _theResult___snd__h506864[5] ? - _theResult___sfd__h507569 : - _theResult___snd__h506864[56:5] ; - assign out_sfd__h517223 = - sfdin__h516484[5] ? - _theResult___sfd__h517220 : - sfdin__h516484[56:5] ; - assign out_sfd__h526007 = - _theResult___snd__h525269[5] ? - _theResult___sfd__h526004 : - _theResult___snd__h525269[56:5] ; - assign out_sfd__h546425 = - _theResult___snd__h545717[5] ? - _theResult___sfd__h546422 : - _theResult___snd__h545717[56:5] ; - assign out_sfd__h556076 = - sfdin__h555337[5] ? - _theResult___sfd__h556073 : - sfdin__h555337[56:5] ; - assign out_sfd__h564860 = - _theResult___snd__h564122[5] ? - _theResult___sfd__h564857 : - _theResult___snd__h564122[56:5] ; - assign out_sfd__h585729 = - _theResult___snd__h585021[5] ? - _theResult___sfd__h585726 : - _theResult___snd__h585021[56:5] ; - assign out_sfd__h595380 = - sfdin__h594641[5] ? - _theResult___sfd__h595377 : - sfdin__h594641[56:5] ; - assign out_sfd__h604164 = - _theResult___snd__h603426[5] ? - _theResult___sfd__h604161 : - _theResult___snd__h603426[56:5] ; - assign pend_ints__h658023 = + _theResult___sfd__h477259 ; + assign out_sfd__h359366 = + sfdin__h358840[34] ? + _theResult___sfd__h359363 : + sfdin__h358840[56:34] ; + assign out_sfd__h367948 = + _theResult___snd__h367453[34] ? + _theResult___sfd__h367945 : + _theResult___snd__h367453[56:34] ; + assign out_sfd__h377132 = + sfdin__h376606[34] ? + _theResult___sfd__h377129 : + sfdin__h376606[56:34] ; + assign out_sfd__h385768 = + _theResult___snd__h385243[34] ? + _theResult___sfd__h385765 : + _theResult___snd__h385243[56:34] ; + assign out_sfd__h405063 = + sfdin__h404537[34] ? + _theResult___sfd__h405060 : + sfdin__h404537[56:34] ; + assign out_sfd__h413645 = + _theResult___snd__h413150[34] ? + _theResult___sfd__h413642 : + _theResult___snd__h413150[56:34] ; + assign out_sfd__h422829 = + sfdin__h422303[34] ? + _theResult___sfd__h422826 : + sfdin__h422303[56:34] ; + assign out_sfd__h431465 = + _theResult___snd__h430940[34] ? + _theResult___sfd__h431462 : + _theResult___snd__h430940[56:34] ; + assign out_sfd__h450758 = + sfdin__h450232[34] ? + _theResult___sfd__h450755 : + sfdin__h450232[56:34] ; + assign out_sfd__h459340 = + _theResult___snd__h458845[34] ? + _theResult___sfd__h459337 : + _theResult___snd__h458845[56:34] ; + assign out_sfd__h468524 = + sfdin__h467998[34] ? + _theResult___sfd__h468521 : + sfdin__h467998[56:34] ; + assign out_sfd__h477160 = + _theResult___snd__h476635[34] ? + _theResult___sfd__h477157 : + _theResult___snd__h476635[56:34] ; + assign out_sfd__h507573 = + _theResult___snd__h506865[5] ? + _theResult___sfd__h507570 : + _theResult___snd__h506865[56:5] ; + assign out_sfd__h517224 = + sfdin__h516485[5] ? + _theResult___sfd__h517221 : + sfdin__h516485[56:5] ; + assign out_sfd__h526008 = + _theResult___snd__h525270[5] ? + _theResult___sfd__h526005 : + _theResult___snd__h525270[56:5] ; + assign out_sfd__h546426 = + _theResult___snd__h545718[5] ? + _theResult___sfd__h546423 : + _theResult___snd__h545718[56:5] ; + assign out_sfd__h556077 = + sfdin__h555338[5] ? + _theResult___sfd__h556074 : + sfdin__h555338[56:5] ; + assign out_sfd__h564861 = + _theResult___snd__h564123[5] ? + _theResult___sfd__h564858 : + _theResult___snd__h564123[56:5] ; + assign out_sfd__h585730 = + _theResult___snd__h585022[5] ? + _theResult___sfd__h585727 : + _theResult___snd__h585022[56:5] ; + assign out_sfd__h595381 = + sfdin__h594642[5] ? + _theResult___sfd__h595378 : + sfdin__h594642[56:5] ; + assign out_sfd__h604165 = + _theResult___snd__h603427[5] ? + _theResult___sfd__h604162 : + _theResult___snd__h603427[56:5] ; + assign pend_ints__h658024 = { csrf_external_int_en_vec_3_read__1844_AND_csrf_ETC___d12967, csrf_software_int_en_vec_3 & csrf_software_int_pend_vec_3, 1'd0, csrf_software_int_en_vec_1 & csrf_software_int_pend_vec_1, 1'd0 } ; - assign prv__h724098 = csrf_prv_reg ; - assign prv__h724142 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; - assign q___1__h480779 = + assign prv__h724099 = csrf_prv_reg ; + assign prv__h724143 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; + assign q___1__h480780 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[203:140] ; - assign r1__read_BITS_13_TO_12___h661704 = csrf_fs_reg ; - assign r1__read_BITS_9_TO_0___h658460 = + assign r1__read_BITS_13_TO_12___h661705 = csrf_fs_reg ; + assign r1__read_BITS_9_TO_0___h658461 = { csrf_mideleg_11_reg, 1'b0, csrf_mideleg_9_7_reg, 1'b0, csrf_mideleg_5_3_reg, 1'b0 } ; - assign r1__read_BIT_20___h662368 = csrf_tw_reg ; - assign r1__read__h619387 = { r1__read__h619389, csrf_ie_vec_1 } ; - assign r1__read__h619389 = { r1__read__h619391, 2'b0 } ; - assign r1__read__h619391 = { r1__read__h619393, csrf_prev_ie_vec_0 } ; - assign r1__read__h619393 = { r1__read__h619395, csrf_prev_ie_vec_1 } ; - assign r1__read__h619395 = { r1__read__h619397, 2'b0 } ; - assign r1__read__h619397 = { r1__read__h619399, csrf_spp_reg } ; - assign r1__read__h619399 = { r1__read__h619401, 4'b0 } ; - assign r1__read__h619401 = { r1__read__h619403, csrf_fs_reg } ; - assign r1__read__h619403 = { r1__read__h619405, 2'd0 } ; - assign r1__read__h619405 = { r1__read__h619407, 1'b0 } ; - assign r1__read__h619407 = { r1__read__h619409, csrf_sum_reg } ; - assign r1__read__h619409 = { r1__read__h619411, csrf_mxr_reg } ; - assign r1__read__h619411 = { r1__read__h619413, 12'b0 } ; - assign r1__read__h619413 = { r1__read__h619415, 2'b10 } ; - assign r1__read__h619415 = { r__h619419, 29'b0 } ; - assign r1__read__h619791 = - { r1__read__h619793, csrf_software_int_en_vec_1 } ; - assign r1__read__h619793 = { r1__read__h619795, 2'b0 } ; - assign r1__read__h619795 = { r1__read__h619797, 1'b0 } ; - assign r1__read__h619797 = { r1__read__h619799, csrf_timer_int_en_vec_1 } ; - assign r1__read__h619799 = { r1__read__h619801, 2'b0 } ; - assign r1__read__h619801 = { r1__read__h619803, 1'b0 } ; - assign r1__read__h619803 = { 54'b0, csrf_external_int_en_vec_1 } ; - assign r1__read__h620301 = { csrf_stvec_base_hi_reg, 1'b0 } ; - assign r1__read__h620306 = { r1__read__h620308, csrf_scounteren_tm_reg } ; - assign r1__read__h620308 = { 61'd0, csrf_scounteren_ir_reg } ; - assign r1__read__h620319 = { csrf_scause_interrupt_reg, 59'b0 } ; - assign r1__read__h620325 = - { r1__read__h620327, csrf_software_int_pend_vec_1 } ; - assign r1__read__h620327 = { r1__read__h620329, 2'b0 } ; - assign r1__read__h620329 = { r1__read__h620331, 1'b0 } ; - assign r1__read__h620331 = - { r1__read__h620333, csrf_timer_int_pend_vec_1 } ; - assign r1__read__h620333 = { r1__read__h620335, 2'b0 } ; - assign r1__read__h620335 = { r1__read__h620337, 1'b0 } ; - assign r1__read__h620337 = { 54'b0, csrf_external_int_pend_vec_1 } ; - assign r1__read__h620535 = { vm_mode_reg__read__h620541, 16'd0 } ; - assign r1__read__h620558 = { r1__read__h620560, csrf_ie_vec_1 } ; - assign r1__read__h620560 = { r1__read__h620562, 1'b0 } ; - assign r1__read__h620562 = { r1__read__h620564, csrf_ie_vec_3 } ; - assign r1__read__h620564 = { r1__read__h620566, csrf_prev_ie_vec_0 } ; - assign r1__read__h620566 = { r1__read__h620568, csrf_prev_ie_vec_1 } ; - assign r1__read__h620568 = { r1__read__h620570, 1'b0 } ; - assign r1__read__h620570 = { r1__read__h620572, csrf_prev_ie_vec_3 } ; - assign r1__read__h620572 = { r1__read__h620574, csrf_spp_reg } ; - assign r1__read__h620574 = { r1__read__h620576, 2'b0 } ; - assign r1__read__h620576 = { r1__read__h620578, csrf_mpp_reg } ; - assign r1__read__h620578 = { r1__read__h620580, csrf_fs_reg } ; - assign r1__read__h620580 = { r1__read__h620582, 2'd0 } ; - assign r1__read__h620582 = { r1__read__h620584, csrf_mprv_reg } ; - assign r1__read__h620584 = { r1__read__h620586, csrf_sum_reg } ; - assign r1__read__h620586 = { r1__read__h620588, csrf_mxr_reg } ; - assign r1__read__h620588 = { r1__read__h620590, csrf_tvm_reg } ; - assign r1__read__h620590 = { r1__read__h620592, csrf_tw_reg } ; - assign r1__read__h620592 = { r1__read__h620594, csrf_tsr_reg } ; - assign r1__read__h620594 = { r1__read__h620596, 9'b0 } ; - assign r1__read__h620596 = { r1__read__h620598, 2'b10 } ; - assign r1__read__h620598 = { r1__read__h620600, 2'b10 } ; - assign r1__read__h620600 = { r__h619419, 27'b0 } ; - assign r1__read__h620683 = { r1__read__h620685, 1'b0 } ; - assign r1__read__h620685 = { r1__read__h620687, csrf_medeleg_13_11_reg } ; - assign r1__read__h620687 = { r1__read__h620689, 1'b0 } ; - assign r1__read__h620689 = { 48'b0, csrf_medeleg_15_reg } ; - assign r1__read__h620700 = { r1__read__h620702, 1'b0 } ; - assign r1__read__h620702 = { r1__read__h620704, csrf_mideleg_5_3_reg } ; - assign r1__read__h620704 = { r1__read__h620706, 1'b0 } ; - assign r1__read__h620706 = { r1__read__h620708, csrf_mideleg_9_7_reg } ; - assign r1__read__h620708 = { r1__read__h620710, 1'b0 } ; - assign r1__read__h620710 = { 52'b0, csrf_mideleg_11_reg } ; - assign r1__read__h620724 = - { r1__read__h620726, csrf_software_int_en_vec_1 } ; - assign r1__read__h620726 = { r1__read__h620728, 1'b0 } ; - assign r1__read__h620728 = - { r1__read__h620730, csrf_software_int_en_vec_3 } ; - assign r1__read__h620730 = { r1__read__h620732, 1'b0 } ; - assign r1__read__h620732 = { r1__read__h620734, csrf_timer_int_en_vec_1 } ; - assign r1__read__h620734 = { r1__read__h620736, 1'b0 } ; - assign r1__read__h620736 = { r1__read__h620738, csrf_timer_int_en_vec_3 } ; - assign r1__read__h620738 = { r1__read__h620740, 1'b0 } ; - assign r1__read__h620740 = - { r1__read__h620742, csrf_external_int_en_vec_1 } ; - assign r1__read__h620742 = { r1__read__h620744, 1'b0 } ; - assign r1__read__h620744 = { 52'b0, csrf_external_int_en_vec_3 } ; - assign r1__read__h620817 = { csrf_mtvec_base_hi_reg, 1'b0 } ; - assign r1__read__h620822 = { r1__read__h620824, csrf_mcounteren_tm_reg } ; - assign r1__read__h620824 = { 61'd0, csrf_mcounteren_ir_reg } ; - assign r1__read__h620835 = { csrf_mcause_interrupt_reg, 59'b0 } ; - assign r1__read__h620841 = - { r1__read__h620843, csrf_software_int_pend_vec_1 } ; - assign r1__read__h620843 = { r1__read__h620845, 1'b0 } ; - assign r1__read__h620845 = - { r1__read__h620847, csrf_software_int_pend_vec_3 } ; - assign r1__read__h620847 = { r1__read__h620849, 1'b0 } ; - assign r1__read__h620849 = - { r1__read__h620851, csrf_timer_int_pend_vec_1 } ; - assign r1__read__h620851 = { r1__read__h620853, 1'b0 } ; - assign r1__read__h620853 = - { r1__read__h620855, csrf_timer_int_pend_vec_3 } ; - assign r1__read__h620855 = { r1__read__h620857, 1'b0 } ; - assign r1__read__h620857 = - { r1__read__h620859, csrf_external_int_pend_vec_1 } ; - assign r1__read__h620859 = { r1__read__h620861, 1'b0 } ; - assign r1__read__h620861 = { 52'b0, csrf_external_int_pend_vec_3 } ; - assign r1__read__h620938 = { 4'd0, csrf_rg_tdata1_dmode } ; - assign rVal1__h487141 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign rVal2__h487142 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign r___1__h480806 = + assign r1__read_BIT_20___h662369 = csrf_tw_reg ; + assign r1__read__h619388 = { r1__read__h619390, csrf_ie_vec_1 } ; + assign r1__read__h619390 = { r1__read__h619392, 2'b0 } ; + assign r1__read__h619392 = { r1__read__h619394, csrf_prev_ie_vec_0 } ; + assign r1__read__h619394 = { r1__read__h619396, csrf_prev_ie_vec_1 } ; + assign r1__read__h619396 = { r1__read__h619398, 2'b0 } ; + assign r1__read__h619398 = { r1__read__h619400, csrf_spp_reg } ; + assign r1__read__h619400 = { r1__read__h619402, 4'b0 } ; + assign r1__read__h619402 = { r1__read__h619404, csrf_fs_reg } ; + assign r1__read__h619404 = { r1__read__h619406, 2'd0 } ; + assign r1__read__h619406 = { r1__read__h619408, 1'b0 } ; + assign r1__read__h619408 = { r1__read__h619410, csrf_sum_reg } ; + assign r1__read__h619410 = { r1__read__h619412, csrf_mxr_reg } ; + assign r1__read__h619412 = { r1__read__h619414, 12'b0 } ; + assign r1__read__h619414 = { r1__read__h619416, 2'b10 } ; + assign r1__read__h619416 = { r__h619420, 29'b0 } ; + assign r1__read__h619792 = + { r1__read__h619794, csrf_software_int_en_vec_1 } ; + assign r1__read__h619794 = { r1__read__h619796, 2'b0 } ; + assign r1__read__h619796 = { r1__read__h619798, 1'b0 } ; + assign r1__read__h619798 = { r1__read__h619800, csrf_timer_int_en_vec_1 } ; + assign r1__read__h619800 = { r1__read__h619802, 2'b0 } ; + assign r1__read__h619802 = { r1__read__h619804, 1'b0 } ; + assign r1__read__h619804 = { 54'b0, csrf_external_int_en_vec_1 } ; + assign r1__read__h620302 = { csrf_stvec_base_hi_reg, 1'b0 } ; + assign r1__read__h620307 = { r1__read__h620309, csrf_scounteren_tm_reg } ; + assign r1__read__h620309 = { 61'd0, csrf_scounteren_ir_reg } ; + assign r1__read__h620320 = { csrf_scause_interrupt_reg, 59'b0 } ; + assign r1__read__h620326 = + { r1__read__h620328, csrf_software_int_pend_vec_1 } ; + assign r1__read__h620328 = { r1__read__h620330, 2'b0 } ; + assign r1__read__h620330 = { r1__read__h620332, 1'b0 } ; + assign r1__read__h620332 = + { r1__read__h620334, csrf_timer_int_pend_vec_1 } ; + assign r1__read__h620334 = { r1__read__h620336, 2'b0 } ; + assign r1__read__h620336 = { r1__read__h620338, 1'b0 } ; + assign r1__read__h620338 = { 54'b0, csrf_external_int_pend_vec_1 } ; + assign r1__read__h620536 = { vm_mode_reg__read__h620542, 16'd0 } ; + assign r1__read__h620559 = { r1__read__h620561, csrf_ie_vec_1 } ; + assign r1__read__h620561 = { r1__read__h620563, 1'b0 } ; + assign r1__read__h620563 = { r1__read__h620565, csrf_ie_vec_3 } ; + assign r1__read__h620565 = { r1__read__h620567, csrf_prev_ie_vec_0 } ; + assign r1__read__h620567 = { r1__read__h620569, csrf_prev_ie_vec_1 } ; + assign r1__read__h620569 = { r1__read__h620571, 1'b0 } ; + assign r1__read__h620571 = { r1__read__h620573, csrf_prev_ie_vec_3 } ; + assign r1__read__h620573 = { r1__read__h620575, csrf_spp_reg } ; + assign r1__read__h620575 = { r1__read__h620577, 2'b0 } ; + assign r1__read__h620577 = { r1__read__h620579, csrf_mpp_reg } ; + assign r1__read__h620579 = { r1__read__h620581, csrf_fs_reg } ; + assign r1__read__h620581 = { r1__read__h620583, 2'd0 } ; + assign r1__read__h620583 = { r1__read__h620585, csrf_mprv_reg } ; + assign r1__read__h620585 = { r1__read__h620587, csrf_sum_reg } ; + assign r1__read__h620587 = { r1__read__h620589, csrf_mxr_reg } ; + assign r1__read__h620589 = { r1__read__h620591, csrf_tvm_reg } ; + assign r1__read__h620591 = { r1__read__h620593, csrf_tw_reg } ; + assign r1__read__h620593 = { r1__read__h620595, csrf_tsr_reg } ; + assign r1__read__h620595 = { r1__read__h620597, 9'b0 } ; + assign r1__read__h620597 = { r1__read__h620599, 2'b10 } ; + assign r1__read__h620599 = { r1__read__h620601, 2'b10 } ; + assign r1__read__h620601 = { r__h619420, 27'b0 } ; + assign r1__read__h620684 = { r1__read__h620686, 1'b0 } ; + assign r1__read__h620686 = { r1__read__h620688, csrf_medeleg_13_11_reg } ; + assign r1__read__h620688 = { r1__read__h620690, 1'b0 } ; + assign r1__read__h620690 = { 48'b0, csrf_medeleg_15_reg } ; + assign r1__read__h620701 = { r1__read__h620703, 1'b0 } ; + assign r1__read__h620703 = { r1__read__h620705, csrf_mideleg_5_3_reg } ; + assign r1__read__h620705 = { r1__read__h620707, 1'b0 } ; + assign r1__read__h620707 = { r1__read__h620709, csrf_mideleg_9_7_reg } ; + assign r1__read__h620709 = { r1__read__h620711, 1'b0 } ; + assign r1__read__h620711 = { 52'b0, csrf_mideleg_11_reg } ; + assign r1__read__h620725 = + { r1__read__h620727, csrf_software_int_en_vec_1 } ; + assign r1__read__h620727 = { r1__read__h620729, 1'b0 } ; + assign r1__read__h620729 = + { r1__read__h620731, csrf_software_int_en_vec_3 } ; + assign r1__read__h620731 = { r1__read__h620733, 1'b0 } ; + assign r1__read__h620733 = { r1__read__h620735, csrf_timer_int_en_vec_1 } ; + assign r1__read__h620735 = { r1__read__h620737, 1'b0 } ; + assign r1__read__h620737 = { r1__read__h620739, csrf_timer_int_en_vec_3 } ; + assign r1__read__h620739 = { r1__read__h620741, 1'b0 } ; + assign r1__read__h620741 = + { r1__read__h620743, csrf_external_int_en_vec_1 } ; + assign r1__read__h620743 = { r1__read__h620745, 1'b0 } ; + assign r1__read__h620745 = { 52'b0, csrf_external_int_en_vec_3 } ; + assign r1__read__h620818 = { csrf_mtvec_base_hi_reg, 1'b0 } ; + assign r1__read__h620823 = { r1__read__h620825, csrf_mcounteren_tm_reg } ; + assign r1__read__h620825 = { 61'd0, csrf_mcounteren_ir_reg } ; + assign r1__read__h620836 = { csrf_mcause_interrupt_reg, 59'b0 } ; + assign r1__read__h620842 = + { r1__read__h620844, csrf_software_int_pend_vec_1 } ; + assign r1__read__h620844 = { r1__read__h620846, 1'b0 } ; + assign r1__read__h620846 = + { r1__read__h620848, csrf_software_int_pend_vec_3 } ; + assign r1__read__h620848 = { r1__read__h620850, 1'b0 } ; + assign r1__read__h620850 = + { r1__read__h620852, csrf_timer_int_pend_vec_1 } ; + assign r1__read__h620852 = { r1__read__h620854, 1'b0 } ; + assign r1__read__h620854 = + { r1__read__h620856, csrf_timer_int_pend_vec_3 } ; + assign r1__read__h620856 = { r1__read__h620858, 1'b0 } ; + assign r1__read__h620858 = + { r1__read__h620860, csrf_external_int_pend_vec_1 } ; + assign r1__read__h620860 = { r1__read__h620862, 1'b0 } ; + assign r1__read__h620862 = { 52'b0, csrf_external_int_pend_vec_3 } ; + assign r1__read__h620939 = { 4'd0, csrf_rg_tdata1_dmode } ; + assign rVal1__h487142 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; + assign rVal2__h487143 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; + assign r___1__h480807 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[139:76] ; - assign r__h619419 = csrf_fs_reg == 2'b11 ; + assign r__h619420 = csrf_fs_reg == 2'b11 ; assign regRenamingTable_RDY_rename_0_getRename__3398__ETC___d13407 = regRenamingTable$RDY_rename_0_getRename && regRenamingTable$RDY_rename_0_claimRename && @@ -29297,12 +29297,12 @@ module mkCore(CLK, NOT_fetchStage_pipelines_0_canDeq__2926_2927_O_ETC___d14371 && (fetchStage$pipelines_1_first[199:195] != 5'd14) != fetchStage$pipelines_1_first[160] ; - assign renaming_spec_bits__h689555 = + assign renaming_spec_bits__h689556 = fetchStage$pipelines_0_canDeq ? - y_avValue_snd_fst__h686253 : + y_avValue_snd_fst__h686254 : specTagManager$currentSpecBits ; - assign res_data__h342518 = { 32'hFFFFFFFF, x__h342533 } ; - assign res_data__h342523 = + assign res_data__h342519 = { 32'hFFFFFFFF, x__h342534 } ; + assign res_data__h342524 = { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == @@ -29315,8 +29315,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:5] } ; - assign res_data__h388220 = { 32'hFFFFFFFF, x__h388235 } ; - assign res_data__h388225 = + assign res_data__h388221 = { 32'hFFFFFFFF, x__h388236 } ; + assign res_data__h388226 = { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == @@ -29329,8 +29329,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:5] } ; - assign res_data__h433915 = { 32'hFFFFFFFF, x__h433930 } ; - assign res_data__h433920 = + assign res_data__h433916 = { 32'hFFFFFFFF, x__h433931 } ; + assign res_data__h433921 = { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == @@ -29343,7 +29343,7 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:5] } ; - assign res_fflags__h342519 = + assign res_fflags__h342520 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != @@ -29411,7 +29411,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d5351 } ; - assign res_fflags__h388221 = + assign res_fflags__h388222 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != @@ -29479,7 +29479,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d6743 } ; - assign res_fflags__h433916 = + assign res_fflags__h433917 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != @@ -29547,37 +29547,37 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d8135 } ; - assign resp_addr__h296626 = + assign resp_addr__h296627 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getSlot[52:1], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getRq[95:84] } ; - assign result__h368986 = + assign result__h368987 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4654[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4654[0] | - guard__h368981 } ; - assign result__h414683 = + guard__h368982 } ; + assign result__h414684 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6046[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6046[0] | - guard__h414678 } ; - assign result__h460378 = + guard__h414679 } ; + assign result__h460379 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7438[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7438[0] | - guard__h460373 } ; - assign result__h508867 = + guard__h460374 } ; + assign result__h508868 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8764[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8764[0] | - guard__h508862 } ; - assign result__h547720 = + guard__h508863 } ; + assign result__h547721 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10249[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10249[0] | - guard__h547715 } ; - assign result__h587024 = + guard__h547716 } ; + assign result__h587025 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9479[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9479[0] | - guard__h587019 } ; - assign result__h653732 = w__h653727 & y__h653761 ; - assign result__h653783 = ~x__h653782 ; - assign rg_tdata1__read__h619062 = - { r1__read__h620938, csrf_rg_tdata1_data } ; + guard__h587020 } ; + assign result__h653733 = w__h653728 & y__h653762 ; + assign result__h653784 = ~x__h653783 ; + assign rg_tdata1__read__h619063 = + { r1__read__h620939, csrf_rg_tdata1_data } ; assign rob_deqPort_0_deq_data__4451_BITS_353_TO_290_4_ETC___d14954 = rob$deqPort_0_deq_data[353:290] + 64'd4 ; assign rob_enqPort_1_canEnq__3821_AND_epochManager_ch_ETC___d13826 = @@ -29603,469 +29603,469 @@ module mkCore(CLK, IF_fetchStage_pipelines_0_first__2928_BITS_194_ETC___d13973) ; assign robdeqPort_0_deq_data_BITS_95_TO_32__q262 = rob$deqPort_0_deq_data[95:32] ; - assign rs1__h661835 = + assign rs1__h661836 = (fetchStage$pipelines_0_first[88] && !fetchStage$pipelines_0_first[87]) ? fetchStage$pipelines_0_first[86:82] : 5'd0 ; - assign satp_csr__read__h616935 = { r1__read__h620535, csrf_ppn_reg } ; - assign sbIdx__h158516 = + assign satp_csr__read__h616936 = { r1__read__h620536, csrf_ppn_reg } ; + assign sbIdx__h158517 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[65:64] : coreFix_memExe_reqStQ_data_0_rl[65:64]) : 2'd0 ; - assign scause_csr__read__h616732 = - { r1__read__h620319, csrf_scause_code_reg } ; - assign scounteren_csr__read__h616594 = - { r1__read__h620306, csrf_scounteren_cy_reg } ; - assign sfd__h343129 = { value__h351356, 3'd0 } ; - assign sfd__h358937 = + assign scause_csr__read__h616733 = + { r1__read__h620320, csrf_scause_code_reg } ; + assign scounteren_csr__read__h616595 = + { r1__read__h620307, csrf_scounteren_cy_reg } ; + assign sfd__h343130 = { value__h351357, 3'd0 } ; + assign sfd__h358938 = { 1'b0, - _theResult___fst_exp__h358845 != 8'd0, - sfdin__h358839[56:34] } + + _theResult___fst_exp__h358846 != 8'd0, + sfdin__h358840[56:34] } + 25'd1 ; - assign sfd__h367519 = + assign sfd__h367520 = { 1'b0, - _theResult___fst_exp__h367501 != 8'd0, - _theResult___snd__h367452[56:34] } + + _theResult___fst_exp__h367502 != 8'd0, + _theResult___snd__h367453[56:34] } + 25'd1 ; - assign sfd__h376703 = + assign sfd__h376704 = { 1'b0, - _theResult___fst_exp__h376611 != 8'd0, - sfdin__h376605[56:34] } + + _theResult___fst_exp__h376612 != 8'd0, + sfdin__h376606[56:34] } + 25'd1 ; - assign sfd__h385315 = + assign sfd__h385316 = { 1'b0, - _theResult___fst_exp__h385296 != 8'd0, - _theResult___snd__h385242[56:34] } + + _theResult___fst_exp__h385297 != 8'd0, + _theResult___snd__h385243[56:34] } + 25'd1 ; - assign sfd__h388831 = { value__h397053, 3'd0 } ; - assign sfd__h404634 = + assign sfd__h388832 = { value__h397054, 3'd0 } ; + assign sfd__h404635 = { 1'b0, - _theResult___fst_exp__h404542 != 8'd0, - sfdin__h404536[56:34] } + + _theResult___fst_exp__h404543 != 8'd0, + sfdin__h404537[56:34] } + 25'd1 ; - assign sfd__h413216 = + assign sfd__h413217 = { 1'b0, - _theResult___fst_exp__h413198 != 8'd0, - _theResult___snd__h413149[56:34] } + + _theResult___fst_exp__h413199 != 8'd0, + _theResult___snd__h413150[56:34] } + 25'd1 ; - assign sfd__h422400 = + assign sfd__h422401 = { 1'b0, - _theResult___fst_exp__h422308 != 8'd0, - sfdin__h422302[56:34] } + + _theResult___fst_exp__h422309 != 8'd0, + sfdin__h422303[56:34] } + 25'd1 ; - assign sfd__h431012 = + assign sfd__h431013 = { 1'b0, - _theResult___fst_exp__h430993 != 8'd0, - _theResult___snd__h430939[56:34] } + + _theResult___fst_exp__h430994 != 8'd0, + _theResult___snd__h430940[56:34] } + 25'd1 ; - assign sfd__h434526 = { value__h442748, 3'd0 } ; - assign sfd__h450329 = + assign sfd__h434527 = { value__h442749, 3'd0 } ; + assign sfd__h450330 = { 1'b0, - _theResult___fst_exp__h450237 != 8'd0, - sfdin__h450231[56:34] } + + _theResult___fst_exp__h450238 != 8'd0, + sfdin__h450232[56:34] } + 25'd1 ; - assign sfd__h458911 = + assign sfd__h458912 = { 1'b0, - _theResult___fst_exp__h458893 != 8'd0, - _theResult___snd__h458844[56:34] } + + _theResult___fst_exp__h458894 != 8'd0, + _theResult___snd__h458845[56:34] } + 25'd1 ; - assign sfd__h468095 = + assign sfd__h468096 = { 1'b0, - _theResult___fst_exp__h468003 != 8'd0, - sfdin__h467997[56:34] } + + _theResult___fst_exp__h468004 != 8'd0, + sfdin__h467998[56:34] } + 25'd1 ; - assign sfd__h476707 = + assign sfd__h476708 = { 1'b0, - _theResult___fst_exp__h476688 != 8'd0, - _theResult___snd__h476634[56:34] } + + _theResult___fst_exp__h476689 != 8'd0, + _theResult___snd__h476635[56:34] } + 25'd1 ; - assign sfd__h487887 = { value__h492470, 32'd0 } ; - assign sfd__h506931 = + assign sfd__h487888 = { value__h492471, 32'd0 } ; + assign sfd__h506932 = { 1'b0, - _theResult___fst_exp__h506913 != 11'd0, - _theResult___snd__h506864[56:5] } + + _theResult___fst_exp__h506914 != 11'd0, + _theResult___snd__h506865[56:5] } + 54'd1 ; - assign sfd__h516582 = + assign sfd__h516583 = { 1'b0, - _theResult___fst_exp__h516490 != 11'd0, - sfdin__h516484[56:5] } + + _theResult___fst_exp__h516491 != 11'd0, + sfdin__h516485[56:5] } + 54'd1 ; - assign sfd__h525342 = + assign sfd__h525343 = { 1'b0, - _theResult___fst_exp__h525323 != 11'd0, - _theResult___snd__h525269[56:5] } + + _theResult___fst_exp__h525324 != 11'd0, + _theResult___snd__h525270[56:5] } + 54'd1 ; - assign sfd__h526881 = { value__h531323, 32'd0 } ; - assign sfd__h545784 = + assign sfd__h526882 = { value__h531324, 32'd0 } ; + assign sfd__h545785 = { 1'b0, - _theResult___fst_exp__h545766 != 11'd0, - _theResult___snd__h545717[56:5] } + + _theResult___fst_exp__h545767 != 11'd0, + _theResult___snd__h545718[56:5] } + 54'd1 ; - assign sfd__h555435 = + assign sfd__h555436 = { 1'b0, - _theResult___fst_exp__h555343 != 11'd0, - sfdin__h555337[56:5] } + + _theResult___fst_exp__h555344 != 11'd0, + sfdin__h555338[56:5] } + 54'd1 ; - assign sfd__h564195 = + assign sfd__h564196 = { 1'b0, - _theResult___fst_exp__h564176 != 11'd0, - _theResult___snd__h564122[56:5] } + + _theResult___fst_exp__h564177 != 11'd0, + _theResult___snd__h564123[56:5] } + 54'd1 ; - assign sfd__h566185 = { value__h570627, 32'd0 } ; - assign sfd__h585088 = + assign sfd__h566186 = { value__h570628, 32'd0 } ; + assign sfd__h585089 = { 1'b0, - _theResult___fst_exp__h585070 != 11'd0, - _theResult___snd__h585021[56:5] } + + _theResult___fst_exp__h585071 != 11'd0, + _theResult___snd__h585022[56:5] } + 54'd1 ; - assign sfd__h594739 = + assign sfd__h594740 = { 1'b0, - _theResult___fst_exp__h594647 != 11'd0, - sfdin__h594641[56:5] } + + _theResult___fst_exp__h594648 != 11'd0, + sfdin__h594642[56:5] } + 54'd1 ; - assign sfd__h603499 = + assign sfd__h603500 = { 1'b0, - _theResult___fst_exp__h603480 != 11'd0, - _theResult___snd__h603426[56:5] } + + _theResult___fst_exp__h603481 != 11'd0, + _theResult___snd__h603427[56:5] } + 54'd1 ; - assign sfdin__h358839 = - _theResult____h350734[56] ? - _theResult___snd__h358856 : - _theResult___snd__h358867 ; - assign sfdin__h376605 = - _theResult____h368373[56] ? - _theResult___snd__h376622 : - _theResult___snd__h376633 ; - assign sfdin__h404536 = - _theResult____h396433[56] ? - _theResult___snd__h404553 : - _theResult___snd__h404564 ; - assign sfdin__h422302 = - _theResult____h414070[56] ? - _theResult___snd__h422319 : - _theResult___snd__h422330 ; - assign sfdin__h450231 = - _theResult____h442128[56] ? - _theResult___snd__h450248 : - _theResult___snd__h450259 ; - assign sfdin__h467997 = - _theResult____h459765[56] ? - _theResult___snd__h468014 : - _theResult___snd__h468025 ; - assign sfdin__h516484 = - _theResult____h508254[56] ? - _theResult___snd__h516501 : - _theResult___snd__h516512 ; - assign sfdin__h555337 = - _theResult____h547107[56] ? - _theResult___snd__h555354 : - _theResult___snd__h555365 ; - assign sfdin__h594641 = - _theResult____h586411[56] ? - _theResult___snd__h594658 : - _theResult___snd__h594669 ; - assign shiftData__h184741 = - coreFix_memExe_regToExeQ$first[75:12] << x__h184870 ; - assign sie_csr__read__h616498 = { r1__read__h619791, 1'b0 } ; - assign sip_csr__read__h616872 = { r1__read__h620325, 1'b0 } ; - assign spec_bits__h692682 = specTagManager$currentSpecBits | y__h692695 ; - assign sstatus_csr__read__h616428 = { r1__read__h619387, csrf_ie_vec_0 } ; - assign stvec_csr__read__h616541 = - { r1__read__h620301, csrf_stvec_mode_low_reg } ; - assign upd__h3680 = + assign sfdin__h358840 = + _theResult____h350735[56] ? + _theResult___snd__h358857 : + _theResult___snd__h358868 ; + assign sfdin__h376606 = + _theResult____h368374[56] ? + _theResult___snd__h376623 : + _theResult___snd__h376634 ; + assign sfdin__h404537 = + _theResult____h396434[56] ? + _theResult___snd__h404554 : + _theResult___snd__h404565 ; + assign sfdin__h422303 = + _theResult____h414071[56] ? + _theResult___snd__h422320 : + _theResult___snd__h422331 ; + assign sfdin__h450232 = + _theResult____h442129[56] ? + _theResult___snd__h450249 : + _theResult___snd__h450260 ; + assign sfdin__h467998 = + _theResult____h459766[56] ? + _theResult___snd__h468015 : + _theResult___snd__h468026 ; + assign sfdin__h516485 = + _theResult____h508255[56] ? + _theResult___snd__h516502 : + _theResult___snd__h516513 ; + assign sfdin__h555338 = + _theResult____h547108[56] ? + _theResult___snd__h555355 : + _theResult___snd__h555366 ; + assign sfdin__h594642 = + _theResult____h586412[56] ? + _theResult___snd__h594659 : + _theResult___snd__h594670 ; + assign shiftData__h184742 = + coreFix_memExe_regToExeQ$first[75:12] << x__h184871 ; + assign sie_csr__read__h616499 = { r1__read__h619792, 1'b0 } ; + assign sip_csr__read__h616873 = { r1__read__h620326, 1'b0 } ; + assign spec_bits__h692683 = specTagManager$currentSpecBits | y__h692696 ; + assign sstatus_csr__read__h616429 = { r1__read__h619388, csrf_ie_vec_0 } ; + assign stvec_csr__read__h616542 = + { r1__read__h620302, csrf_stvec_mode_low_reg } ; + assign upd__h3681 = WILL_FIRE_RL_commitStage_doCommitSystemInst ? MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 : MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 ; - assign upd__h4997 = n__read__h6329 + 64'd1 ; - assign v__h300590 = + assign upd__h4998 = n__read__h6330 + 64'd1 ; + assign v__h300591 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3127) ? - v__h300821 : + v__h300822 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP ; - assign v__h300821 = + assign v__h300822 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP + 3'd1 ; - assign v__h303935 = + assign v__h303936 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3234) ? - v__h304453 : + v__h304454 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP ; - assign v__h304453 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; - assign v__h314449 = + assign v__h304454 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; + assign v__h314450 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3405) ? - v__h314680 : + v__h314681 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP ; - assign v__h314680 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; - assign v__h318325 = + assign v__h314681 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; + assign v__h318326 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3501) ? - v__h318556 : + v__h318557 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP ; - assign v__h318556 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; - assign v__h332926 = + assign v__h318557 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; + assign v__h332927 = (coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3730) ? - v__h333157 : + v__h333158 : coreFix_memExe_memRespLdQ_enqP ; - assign v__h333157 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; - assign v__h336151 = + assign v__h333158 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; + assign v__h336152 = (coreFix_memExe_forwardQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_enqReq_lat_1_whas___ETC___d3824) ? - v__h336382 : + v__h336383 : coreFix_memExe_forwardQ_enqP ; - assign v__h336382 = coreFix_memExe_forwardQ_enqP + 1'd1 ; - assign v__h609618 = + assign v__h336383 = coreFix_memExe_forwardQ_enqP + 1'd1 ; + assign v__h609619 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_deqEn$whas ? - v__h609628 : + v__h609629 : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit ; - assign v__h609628 = + assign v__h609629 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit + 2'd1 ; - assign v__h610686 = v__h609618 - 2'd1 ; - assign v__h614702 = - sbCons$lazyLookup_1_get[3] ? rf$read_1_rd1 : y_avValue__h615873 ; - assign v__h639700 = - sbCons$lazyLookup_0_get[3] ? rf$read_0_rd1 : y_avValue__h640719 ; - assign vaddr__h184736 = + assign v__h610687 = v__h609619 - 2'd1 ; + assign v__h614703 = + sbCons$lazyLookup_1_get[3] ? rf$read_1_rd1 : y_avValue__h615874 ; + assign v__h639701 = + sbCons$lazyLookup_0_get[3] ? rf$read_0_rd1 : y_avValue__h640720 ; + assign vaddr__h184737 = coreFix_memExe_regToExeQ$first[139:76] + { {32{coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q5[31]}}, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q5 } ; - assign value__h351356 = + assign value__h351357 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] } ; - assign value__h397053 = + assign value__h397054 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] } ; - assign value__h442748 = + assign value__h442749 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] } ; - assign value__h492470 = { 1'b0, f1_exp__h487525 != 8'd0, f1_sfd__h487526 } ; - assign value__h531323 = { 1'b0, f2_exp__h526519 != 8'd0, f2_sfd__h526520 } ; - assign value__h570627 = { 1'b0, f3_exp__h565823 != 8'd0, f3_sfd__h565824 } ; - assign vm_mode_reg__read__h620541 = { csrf_vm_mode_sv39_reg, 3'b0 } ; - assign w__h653727 = + assign value__h492471 = { 1'b0, f1_exp__h487526 != 8'd0, f1_sfd__h487527 } ; + assign value__h531324 = { 1'b0, f2_exp__h526520 != 8'd0, f2_sfd__h526521 } ; + assign value__h570628 = { 1'b0, f3_exp__h565824 != 8'd0, f3_sfd__h565825 } ; + assign vm_mode_reg__read__h620542 = { csrf_vm_mode_sv39_reg, 3'b0 } ; + assign w__h653728 = coreFix_globalSpecUpdate_correctSpecTag_0$whas ? - result__h653783 : + result__h653784 : 12'd4095 ; - assign x__h155090 = + assign x__h155091 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[68:64] : coreFix_memExe_reqLdQ_data_0_rl[68:64]) : 5'd0 ; - assign x__h155096 = + assign x__h155097 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqLdQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h158637 = { 3'd0, sbIdx__h158516 } ; - assign x__h158643 = + assign x__h158638 = { 3'd0, sbIdx__h158517 } ; + assign x__h158644 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqStQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h161453 = + assign x__h161454 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[152:148] : coreFix_memExe_reqLrScAmoQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h161457 = + assign x__h161458 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[147:84] : coreFix_memExe_reqLrScAmoQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h163305 = + assign x__h163306 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[70:7] : coreFix_memExe_reqLrScAmoQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h17931 = + assign x__h17932 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[141:78] : mmio_dataReqQ_enqReq_rl[141:78] ; - assign x__h184648 = - sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h183776 ; assign x__h184649 = - sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h184495 ; - assign x__h184870 = { vaddr__h184736[2:0], 3'b0 } ; - assign x__h196065 = + sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h183777 ; + assign x__h184650 = + sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h184496 ; + assign x__h184871 = { vaddr__h184737[2:0], 3'b0 } ; + assign x__h196066 = coreFix_memExe_dMem_cache_m_banks_0_processAmo[90] ? - curData__h195302[63:32] : - curData__h195302[31:0] ; - assign x__h20469 = + curData__h195303[63:32] : + curData__h195303[31:0] ; + assign x__h20470 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[63:0] : mmio_dataReqQ_enqReq_rl[63:0] ; - assign x__h291823 = + assign x__h291824 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[152:148] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h291835 = + assign x__h291836 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[147:84] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h293689 = + assign x__h293690 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[70:7] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h306800 = + assign x__h306801 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[2:0] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[2:0] ; - assign x__h342533 = - { (_theResult___exp__h385865 != 8'd255 || - _theResult___sfd__h385866 == 23'd0) && + assign x__h342534 = + { (_theResult___exp__h385866 != 8'd255 || + _theResult___sfd__h385867 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5236, - out_f_exp__h386142, - out_f_sfd__h386143 } ; - assign x__h369083 = - sfd__h343129 << (x__h369116[11] ? 12'hAAA : x__h369116) ; - assign x__h369116 = + out_f_exp__h386143, + out_f_sfd__h386144 } ; + assign x__h369084 = + sfd__h343130 << (x__h369117[11] ? 12'hAAA : x__h369117) ; + assign x__h369117 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4650 ; - assign x__h388235 = - { (_theResult___exp__h431562 != 8'd255 || - _theResult___sfd__h431563 == 23'd0) && + assign x__h388236 = + { (_theResult___exp__h431563 != 8'd255 || + _theResult___sfd__h431564 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6628, - out_f_exp__h431839, - out_f_sfd__h431840 } ; - assign x__h414780 = - sfd__h388831 << (x__h414813[11] ? 12'hAAA : x__h414813) ; - assign x__h414813 = + out_f_exp__h431840, + out_f_sfd__h431841 } ; + assign x__h414781 = + sfd__h388832 << (x__h414814[11] ? 12'hAAA : x__h414814) ; + assign x__h414814 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6042 ; - assign x__h433930 = - { (_theResult___exp__h477257 != 8'd255 || - _theResult___sfd__h477258 == 23'd0) && + assign x__h433931 = + { (_theResult___exp__h477258 != 8'd255 || + _theResult___sfd__h477259 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8020, - out_f_exp__h477534, - out_f_sfd__h477535 } ; - assign x__h45838 = + out_f_exp__h477535, + out_f_sfd__h477536 } ; + assign x__h45839 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[141:78] : mmio_cRqQ_enqReq_rl[141:78] ; - assign x__h460475 = - sfd__h434526 << (x__h460508[11] ? 12'hAAA : x__h460508) ; - assign x__h460508 = + assign x__h460476 = + sfd__h434527 << (x__h460509[11] ? 12'hAAA : x__h460509) ; + assign x__h460509 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7434 ; - assign x__h48374 = + assign x__h48375 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[63:0] : mmio_cRqQ_enqReq_rl[63:0] ; - assign x__h487047 = - sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h484110 ; assign x__h487048 = - sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h484831 ; + sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h484111 ; assign x__h487049 = - sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h485546 ; - assign x__h508962 = sfd__h487887 << x__h508995 ; - assign x__h508995 = + sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h484832 ; + assign x__h487050 = + sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h485547 ; + assign x__h508963 = sfd__h487888 << x__h508996 ; + assign x__h508996 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8760 ; - assign x__h547815 = sfd__h526881 << x__h547848 ; - assign x__h547848 = + assign x__h547816 = sfd__h526882 << x__h547849 ; + assign x__h547849 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10245 ; - assign x__h587119 = sfd__h566185 << x__h587152 ; - assign x__h587152 = + assign x__h587120 = sfd__h566186 << x__h587153 ; + assign x__h587153 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9475 ; - assign x__h608908 = + assign x__h608909 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___fst__h608919 : - a__h608371 ; - assign x__h608934 = a__h608371[63] ^ b__h608372[63] ; - assign x__h609548 = + _theResult___fst__h608920 : + a__h608372 ; + assign x__h608935 = a__h608372[63] ^ b__h608373[63] ; + assign x__h609549 = (coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$D_OUT == 64'd0) ? { 64'hFFFFFFFFFFFFFFFF, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$D_OUT[139:76] } : { coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11256, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11257 } ; - assign x__h619372 = { csrf_frm_reg, csrf_fflags_reg } ; - assign x__h623641 = - coreFix_aluExe_1_dispToRegQ$first[131] ? - rVal1__h615930 : - v__h614702 ; + assign x__h619373 = { csrf_frm_reg, csrf_fflags_reg } ; assign x__h623642 = - sbCons$lazyLookup_1_get[2] ? rf$read_1_rd2 : y_avValue__h621651 ; - assign x__h646270 = - coreFix_aluExe_0_dispToRegQ$first[131] ? - rVal1__h640774 : - v__h639700 ; + coreFix_aluExe_1_dispToRegQ$first[131] ? + rVal1__h615931 : + v__h614703 ; + assign x__h623643 = + sbCons$lazyLookup_1_get[2] ? rf$read_1_rd2 : y_avValue__h621652 ; assign x__h646271 = - sbCons$lazyLookup_0_get[2] ? rf$read_0_rd2 : y_avValue__h644290 ; - assign x__h653731 = 12'd1 << coreFix_aluExe_1_exeToFinQ$first[15:12] ; - assign x__h653782 = 12'd1 << coreFix_aluExe_0_exeToFinQ$first[15:12] ; - assign x__h704086 = + coreFix_aluExe_0_dispToRegQ$first[131] ? + rVal1__h640775 : + v__h639701 ; + assign x__h646272 = + sbCons$lazyLookup_0_get[2] ? rf$read_0_rd2 : y_avValue__h644291 ; + assign x__h653732 = 12'd1 << coreFix_aluExe_1_exeToFinQ$first[15:12] ; + assign x__h653783 = 12'd1 << coreFix_aluExe_0_exeToFinQ$first[15:12] ; + assign x__h704087 = (!rob$deqPort_0_deq_data[166] && (rob$deqPort_0_deq_data[165:162] == 4'd1 || rob$deqPort_0_deq_data[165:162] == 4'd12)) ? rob$deqPort_0_deq_data[161:98] : rob$deqPort_0_deq_data[95:32] ; - assign x__h710695 = { cause_code__h707757, 2'b0 } ; - assign x__h718766 = { 1'b0, csrf_spp_reg } ; - assign x__h722831 = + assign x__h710696 = { cause_code__h707758, 2'b0 } ; + assign x__h718767 = { 1'b0, csrf_spp_reg } ; + assign x__h722832 = NOT_rob_deqPort_0_canDeq__4986_4987_OR_rob_deq_ETC___d15178 ? - y_avValue_snd_snd_snd_fst__h722654 : + y_avValue_snd_snd_snd_fst__h722655 : IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15205 ; - assign x__h75783 = mmio_pRqQ_data_0[31:0] ; - assign x_addr__h318723 = + assign x__h75784 = mmio_pRqQ_data_0[31:0] ; + assign x_addr__h318724 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[578:515] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[578:515] ; - assign x_data__h65632 = + assign x_data__h65633 = EN_mmioToPlatform_pRq_enq ? mmio_pRqQ_enqReq_lat_0$wget[31:0] : mmio_pRqQ_enqReq_rl[31:0] ; - assign x_data_imm__h681436 = fetchStage$pipelines_0_first[159:128] ; - assign x_data_imm__h697340 = fetchStage$pipelines_1_first[159:128] ; - assign x_decodeInfo_frm__h661519 = csrf_frm_reg ; - assign x_quotient__h479956 = + assign x_data_imm__h681437 = fetchStage$pipelines_0_first[159:128] ; + assign x_data_imm__h697341 = fetchStage$pipelines_1_first[159:128] ; + assign x_decodeInfo_frm__h661520 = csrf_frm_reg ; + assign x_quotient__h479957 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[75] ? 64'hFFFFFFFFFFFFFFFF : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[9]) ? - q___1__h480779 : + q___1__h480780 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[203:140]) ; - assign x_reg_ifc__read__h616337 = { 63'd0, csrf_stats_module_doStats } ; - assign x_remainder__h479957 = + assign x_reg_ifc__read__h616338 = { 63'd0, csrf_stats_module_doStats } ; + assign x_remainder__h479958 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[75] ? coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[74:11] : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[8]) ? - r___1__h480806 : + r___1__h480807 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[139:76]) ; - assign y__h258433 = + assign y__h258434 = { coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[569:518], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[95:90] } ; - assign y__h626443 = coreFix_aluExe_1_regToExeQ$first[176:113] + 64'd4 ; - assign y__h648779 = coreFix_aluExe_0_regToExeQ$first[176:113] + 64'd4 ; - assign y__h653761 = ~x__h653731 ; - assign y__h658450 = + assign y__h626444 = coreFix_aluExe_1_regToExeQ$first[176:113] + 64'd4 ; + assign y__h648780 = coreFix_aluExe_0_regToExeQ$first[176:113] + 64'd4 ; + assign y__h653762 = ~x__h653732 ; + assign y__h658451 = { ~csrf_mideleg_11_reg, 1'd1, ~csrf_mideleg_9_7_reg, @@ -30073,52 +30073,52 @@ module mkCore(CLK, ~csrf_mideleg_5_3_reg, 1'd1, ~csrf_mideleg_1_0_reg } ; - assign y__h692695 = 12'd1 << specTagManager$nextSpecTag ; - assign y__h722607 = + assign y__h692696 = 12'd1 << specTagManager$nextSpecTag ; + assign y__h722608 = NOT_rob_deqPort_0_canDeq__4986_4987_OR_rob_deq_ETC___d15178 ? - y_avValue_snd_snd_snd_snd_snd__h722660 : + y_avValue_snd_snd_snd_snd_snd__h722661 : IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15095 ; - assign y_avValue__h183776 = + assign y_avValue__h183777 = NOT_coreFix_memExe_bypassWire_0_whas__584_590__ETC___d1611 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__584_5_ETC___d1679 ; - assign y_avValue__h184495 = + assign y_avValue__h184496 = NOT_coreFix_memExe_bypassWire_0_whas__584_590__ETC___d1640 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__584_5_ETC___d1687 ; - assign y_avValue__h484110 = + assign y_avValue__h484111 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8327 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8454 ; - assign y_avValue__h484831 = + assign y_avValue__h484832 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8356 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8462 ; - assign y_avValue__h485546 = + assign y_avValue__h485547 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8382 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8470 ; - assign y_avValue__h615873 = + assign y_avValue__h615874 = NOT_coreFix_aluExe_1_bypassWire_0_whas__1510_1_ETC___d11537 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_aluExe_1_bypassWire_0_whas__151_ETC___d11943 ; - assign y_avValue__h621651 = + assign y_avValue__h621652 = NOT_coreFix_aluExe_1_bypassWire_0_whas__1510_1_ETC___d11567 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_aluExe_1_bypassWire_0_whas__151_ETC___d11952 ; - assign y_avValue__h640719 = + assign y_avValue__h640720 = NOT_coreFix_aluExe_0_bypassWire_0_whas__2366_2_ETC___d12393 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_aluExe_0_bypassWire_0_whas__236_ETC___d12617 ; - assign y_avValue__h644290 = + assign y_avValue__h644291 = NOT_coreFix_aluExe_0_bypassWire_0_whas__2366_2_ETC___d12423 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_aluExe_0_bypassWire_0_whas__236_ETC___d12626 ; - assign y_avValue_fst__h685979 = + assign y_avValue_fst__h685980 = (fetchStage$pipelines_0_first[194:192] == 3'd1) ? - spec_bits__h692682 : + spec_bits__h692683 : specTagManager$currentSpecBits ; - assign y_avValue_fst__h721561 = + assign y_avValue_fst__h721562 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[257:253] == 5'd0 || @@ -30132,10 +30132,10 @@ module mkCore(CLK, rob$deqPort_0_deq_data[257:253] == 5'd20) ? 5'd0 : rob$deqPort_0_deq_data[31:27] ; - assign y_avValue_fst__h722503 = + assign y_avValue_fst__h722504 = IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15184 | rob$deqPort_1_deq_data[31:27] ; - assign y_avValue_fst__h722531 = + assign y_avValue_fst__h722532 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[257:253] == 5'd0 || @@ -30148,27 +30148,27 @@ module mkCore(CLK, rob$deqPort_1_deq_data[257:253] == 5'd19 || rob$deqPort_1_deq_data[257:253] == 5'd20) ? IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15184 : - y_avValue_fst__h722503 ; - assign y_avValue_new_pc__h710461 = + y_avValue_fst__h722504 ; + assign y_avValue_new_pc__h710462 = (csrf_stvec_mode_low_reg && commitStage_commitTrap[36]) ? - base__h710680 + { 58'd0, x__h710695 } : - base__h710680 ; - assign y_avValue_new_pc__h710647 = + base__h710681 + { 58'd0, x__h710696 } : + base__h710681 ; + assign y_avValue_new_pc__h710648 = (csrf_mtvec_mode_low_reg && commitStage_commitTrap[36]) ? - base__h710700 + { 58'd0, x__h710695 } : - base__h710700 ; - assign y_avValue_snd_fst__h686253 = + base__h710701 + { 58'd0, x__h710696 } : + base__h710701 ; + assign y_avValue_snd_fst__h686254 = ((fetchStage$pipelines_0_first[194:192] != 3'd1 || specTagManager$canClaim) && regRenamingTable$rename_0_canRename && NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13533) ? - y_avValue_snd_fst__h686288 : + y_avValue_snd_fst__h686289 : specTagManager$currentSpecBits ; - assign y_avValue_snd_fst__h686288 = + assign y_avValue_snd_fst__h686289 = IF_fetchStage_pipelines_0_first__2928_BITS_194_ETC___d13593 ? - y_avValue_fst__h685979 : + y_avValue_fst__h685980 : specTagManager$currentSpecBits ; - assign y_avValue_snd_snd_snd_fst__h721995 = + assign y_avValue_snd_snd_snd_fst__h721996 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[257:253] == 5'd0 || @@ -30182,7 +30182,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[257:253] == 5'd20) ? 2'd0 : 2'd1 ; - assign y_avValue_snd_snd_snd_fst__h722654 = + assign y_avValue_snd_snd_snd_fst__h722655 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[257:253] == 5'd0 || @@ -30195,11 +30195,11 @@ module mkCore(CLK, rob$deqPort_1_deq_data[257:253] == 5'd19 || rob$deqPort_1_deq_data[257:253] == 5'd20) ? IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15205 : - y_avValue_snd_snd_snd_fst__h722683 ; - assign y_avValue_snd_snd_snd_fst__h722683 = + y_avValue_snd_snd_snd_fst__h722684 ; + assign y_avValue_snd_snd_snd_fst__h722684 = IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15205 + 2'd1 ; - assign y_avValue_snd_snd_snd_snd_snd__h722001 = + assign y_avValue_snd_snd_snd_snd_snd__h722002 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[257:253] == 5'd0 || @@ -30213,7 +30213,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[257:253] == 5'd20) ? 64'd0 : 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd__h722660 = + assign y_avValue_snd_snd_snd_snd_snd__h722661 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[257:253] == 5'd0 || @@ -30226,8 +30226,8 @@ module mkCore(CLK, rob$deqPort_1_deq_data[257:253] == 5'd19 || rob$deqPort_1_deq_data[257:253] == 5'd20) ? IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15095 : - y_avValue_snd_snd_snd_snd_snd__h722689 ; - assign y_avValue_snd_snd_snd_snd_snd__h722689 = + y_avValue_snd_snd_snd_snd_snd__h722690 ; + assign y_avValue_snd_snd_snd_snd_snd__h722690 = IF_rob_deqPort_0_canDeq__4986_THEN_IF_NOT_rob__ETC___d15095 + 64'd1 ; always@(mmio_cRqQ_data_0) @@ -30246,28 +30246,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87]) 3'd0: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - x__h200345 = + x__h200346 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -30283,28 +30283,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP) 3'd0: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_0; 3'd1: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_1; 3'd2: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_2; 3'd3: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_3; 3'd4: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_4; 3'd5: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_5; 3'd6: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_6; 3'd7: - x__h290390 = + x__h290391 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_7; endcase end @@ -30314,10 +30314,10 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - addr__h294611 = + addr__h294612 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[581:518]; 1'd1: - addr__h294611 = + addr__h294612 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[581:518]; endcase end @@ -30326,37 +30326,37 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91]) 3'd0: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - curData__h195302 = + curData__h195303 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end always@(commitStage_commitTrap) begin case (commitStage_commitTrap[35:32]) - 4'd0, 4'd3: trap_val__h708780 = commitStage_commitTrap[164:101]; - 4'd2: trap_val__h708780 = { 32'd0, commitStage_commitTrap[31:0] }; - default: trap_val__h708780 = + 4'd0, 4'd3: trap_val__h708781 = commitStage_commitTrap[164:101]; + 4'd2: trap_val__h708781 = { 32'd0, commitStage_commitTrap[31:0] }; + default: trap_val__h708781 = (commitStage_commitTrap[35:32] != 4'd8 && commitStage_commitTrap[35:32] != 4'd9 && commitStage_commitTrap[35:32] != 4'd11) ? @@ -30370,265 +30370,265 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - x__h296160 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; + x__h296161 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; 1'd1: - x__h296160 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; + x__h296161 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; endcase end always@(coreFix_aluExe_1_dispToRegQ$first or - fflags_csr__read__h616207 or - frm_csr__read__h616218 or - fcsr_csr__read__h616232 or - sstatus_csr__read__h616428 or - sie_csr__read__h616498 or - stvec_csr__read__h616541 or - scounteren_csr__read__h616594 or + fflags_csr__read__h616208 or + frm_csr__read__h616219 or + fcsr_csr__read__h616233 or + sstatus_csr__read__h616429 or + sie_csr__read__h616499 or + stvec_csr__read__h616542 or + scounteren_csr__read__h616595 or csrf_sscratch_csr or csrf_sepc_csr or - scause_csr__read__h616732 or + scause_csr__read__h616733 or csrf_stval_csr or - sip_csr__read__h616872 or - satp_csr__read__h616935 or - mstatus_csr__read__h617078 or - medeleg_csr__read__h617226 or - mideleg_csr__read__h617321 or - mie_csr__read__h617445 or - mtvec_csr__read__h617527 or - mcounteren_csr__read__h617619 or + sip_csr__read__h616873 or + satp_csr__read__h616936 or + mstatus_csr__read__h617079 or + medeleg_csr__read__h617227 or + mideleg_csr__read__h617322 or + mie_csr__read__h617446 or + mtvec_csr__read__h617528 or + mcounteren_csr__read__h617620 or csrf_mscratch_csr or csrf_mepc_csr or - mcause_csr__read__h617874 or + mcause_csr__read__h617875 or csrf_mtval_csr or - mip_csr__read__h618107 or + mip_csr__read__h618108 or csrf_rg_tselect or - rg_tdata1__read__h619062 or + rg_tdata1__read__h619063 or csrf_rg_tdata2 or csrf_rg_tdata3 or - x_reg_ifc__read__h616337 or - n__read__h618211 or n__read__h618402 or csrf_time_reg) + x_reg_ifc__read__h616338 or + n__read__h618212 or n__read__h618403 or csrf_time_reg) begin case (coreFix_aluExe_1_dispToRegQ$first[130:119]) - 12'd1: rVal1__h615930 = fflags_csr__read__h616207; - 12'd2: rVal1__h615930 = frm_csr__read__h616218; - 12'd3: rVal1__h615930 = fcsr_csr__read__h616232; - 12'd256: rVal1__h615930 = sstatus_csr__read__h616428; - 12'd260: rVal1__h615930 = sie_csr__read__h616498; - 12'd261: rVal1__h615930 = stvec_csr__read__h616541; - 12'd262: rVal1__h615930 = scounteren_csr__read__h616594; - 12'd320: rVal1__h615930 = csrf_sscratch_csr; - 12'd321: rVal1__h615930 = csrf_sepc_csr; - 12'd322: rVal1__h615930 = scause_csr__read__h616732; - 12'd323: rVal1__h615930 = csrf_stval_csr; - 12'd324: rVal1__h615930 = sip_csr__read__h616872; - 12'd384: rVal1__h615930 = satp_csr__read__h616935; - 12'd768: rVal1__h615930 = mstatus_csr__read__h617078; - 12'd769: rVal1__h615930 = 64'h800000000014112D; - 12'd770: rVal1__h615930 = medeleg_csr__read__h617226; - 12'd771: rVal1__h615930 = mideleg_csr__read__h617321; - 12'd772: rVal1__h615930 = mie_csr__read__h617445; - 12'd773: rVal1__h615930 = mtvec_csr__read__h617527; - 12'd774: rVal1__h615930 = mcounteren_csr__read__h617619; - 12'd832: rVal1__h615930 = csrf_mscratch_csr; - 12'd833: rVal1__h615930 = csrf_mepc_csr; - 12'd834: rVal1__h615930 = mcause_csr__read__h617874; - 12'd835: rVal1__h615930 = csrf_mtval_csr; - 12'd836: rVal1__h615930 = mip_csr__read__h618107; - 12'd1952: rVal1__h615930 = csrf_rg_tselect; - 12'd1953: rVal1__h615930 = rg_tdata1__read__h619062; - 12'd1954: rVal1__h615930 = csrf_rg_tdata2; - 12'd1955: rVal1__h615930 = csrf_rg_tdata3; + 12'd1: rVal1__h615931 = fflags_csr__read__h616208; + 12'd2: rVal1__h615931 = frm_csr__read__h616219; + 12'd3: rVal1__h615931 = fcsr_csr__read__h616233; + 12'd256: rVal1__h615931 = sstatus_csr__read__h616429; + 12'd260: rVal1__h615931 = sie_csr__read__h616499; + 12'd261: rVal1__h615931 = stvec_csr__read__h616542; + 12'd262: rVal1__h615931 = scounteren_csr__read__h616595; + 12'd320: rVal1__h615931 = csrf_sscratch_csr; + 12'd321: rVal1__h615931 = csrf_sepc_csr; + 12'd322: rVal1__h615931 = scause_csr__read__h616733; + 12'd323: rVal1__h615931 = csrf_stval_csr; + 12'd324: rVal1__h615931 = sip_csr__read__h616873; + 12'd384: rVal1__h615931 = satp_csr__read__h616936; + 12'd768: rVal1__h615931 = mstatus_csr__read__h617079; + 12'd769: rVal1__h615931 = 64'h800000000014112D; + 12'd770: rVal1__h615931 = medeleg_csr__read__h617227; + 12'd771: rVal1__h615931 = mideleg_csr__read__h617322; + 12'd772: rVal1__h615931 = mie_csr__read__h617446; + 12'd773: rVal1__h615931 = mtvec_csr__read__h617528; + 12'd774: rVal1__h615931 = mcounteren_csr__read__h617620; + 12'd832: rVal1__h615931 = csrf_mscratch_csr; + 12'd833: rVal1__h615931 = csrf_mepc_csr; + 12'd834: rVal1__h615931 = mcause_csr__read__h617875; + 12'd835: rVal1__h615931 = csrf_mtval_csr; + 12'd836: rVal1__h615931 = mip_csr__read__h618108; + 12'd1952: rVal1__h615931 = csrf_rg_tselect; + 12'd1953: rVal1__h615931 = rg_tdata1__read__h619063; + 12'd1954: rVal1__h615931 = csrf_rg_tdata2; + 12'd1955: rVal1__h615931 = csrf_rg_tdata3; 12'd2048, 12'd3857, 12'd3858, 12'd3859, 12'd3860: - rVal1__h615930 = 64'd0; - 12'd2049: rVal1__h615930 = x_reg_ifc__read__h616337; - 12'd2816, 12'd3072: rVal1__h615930 = n__read__h618211; - 12'd2818, 12'd3074: rVal1__h615930 = n__read__h618402; - 12'd3073: rVal1__h615930 = csrf_time_reg; - default: rVal1__h615930 = 64'b0; + rVal1__h615931 = 64'd0; + 12'd2049: rVal1__h615931 = x_reg_ifc__read__h616338; + 12'd2816, 12'd3072: rVal1__h615931 = n__read__h618212; + 12'd2818, 12'd3074: rVal1__h615931 = n__read__h618403; + 12'd3073: rVal1__h615931 = csrf_time_reg; + default: rVal1__h615931 = 64'b0; endcase end always@(coreFix_aluExe_0_dispToRegQ$first or - fflags_csr__read__h616207 or - frm_csr__read__h616218 or - fcsr_csr__read__h616232 or - sstatus_csr__read__h616428 or - sie_csr__read__h616498 or - stvec_csr__read__h616541 or - scounteren_csr__read__h616594 or + fflags_csr__read__h616208 or + frm_csr__read__h616219 or + fcsr_csr__read__h616233 or + sstatus_csr__read__h616429 or + sie_csr__read__h616499 or + stvec_csr__read__h616542 or + scounteren_csr__read__h616595 or csrf_sscratch_csr or csrf_sepc_csr or - scause_csr__read__h616732 or + scause_csr__read__h616733 or csrf_stval_csr or - sip_csr__read__h616872 or - satp_csr__read__h616935 or - mstatus_csr__read__h617078 or - medeleg_csr__read__h617226 or - mideleg_csr__read__h617321 or - mie_csr__read__h617445 or - mtvec_csr__read__h617527 or - mcounteren_csr__read__h617619 or + sip_csr__read__h616873 or + satp_csr__read__h616936 or + mstatus_csr__read__h617079 or + medeleg_csr__read__h617227 or + mideleg_csr__read__h617322 or + mie_csr__read__h617446 or + mtvec_csr__read__h617528 or + mcounteren_csr__read__h617620 or csrf_mscratch_csr or csrf_mepc_csr or - mcause_csr__read__h617874 or + mcause_csr__read__h617875 or csrf_mtval_csr or - mip_csr__read__h618107 or + mip_csr__read__h618108 or csrf_rg_tselect or - rg_tdata1__read__h619062 or + rg_tdata1__read__h619063 or csrf_rg_tdata2 or csrf_rg_tdata3 or - x_reg_ifc__read__h616337 or - n__read__h618211 or n__read__h618402 or csrf_time_reg) + x_reg_ifc__read__h616338 or + n__read__h618212 or n__read__h618403 or csrf_time_reg) begin case (coreFix_aluExe_0_dispToRegQ$first[130:119]) - 12'd1: rVal1__h640774 = fflags_csr__read__h616207; - 12'd2: rVal1__h640774 = frm_csr__read__h616218; - 12'd3: rVal1__h640774 = fcsr_csr__read__h616232; - 12'd256: rVal1__h640774 = sstatus_csr__read__h616428; - 12'd260: rVal1__h640774 = sie_csr__read__h616498; - 12'd261: rVal1__h640774 = stvec_csr__read__h616541; - 12'd262: rVal1__h640774 = scounteren_csr__read__h616594; - 12'd320: rVal1__h640774 = csrf_sscratch_csr; - 12'd321: rVal1__h640774 = csrf_sepc_csr; - 12'd322: rVal1__h640774 = scause_csr__read__h616732; - 12'd323: rVal1__h640774 = csrf_stval_csr; - 12'd324: rVal1__h640774 = sip_csr__read__h616872; - 12'd384: rVal1__h640774 = satp_csr__read__h616935; - 12'd768: rVal1__h640774 = mstatus_csr__read__h617078; - 12'd769: rVal1__h640774 = 64'h800000000014112D; - 12'd770: rVal1__h640774 = medeleg_csr__read__h617226; - 12'd771: rVal1__h640774 = mideleg_csr__read__h617321; - 12'd772: rVal1__h640774 = mie_csr__read__h617445; - 12'd773: rVal1__h640774 = mtvec_csr__read__h617527; - 12'd774: rVal1__h640774 = mcounteren_csr__read__h617619; - 12'd832: rVal1__h640774 = csrf_mscratch_csr; - 12'd833: rVal1__h640774 = csrf_mepc_csr; - 12'd834: rVal1__h640774 = mcause_csr__read__h617874; - 12'd835: rVal1__h640774 = csrf_mtval_csr; - 12'd836: rVal1__h640774 = mip_csr__read__h618107; - 12'd1952: rVal1__h640774 = csrf_rg_tselect; - 12'd1953: rVal1__h640774 = rg_tdata1__read__h619062; - 12'd1954: rVal1__h640774 = csrf_rg_tdata2; - 12'd1955: rVal1__h640774 = csrf_rg_tdata3; + 12'd1: rVal1__h640775 = fflags_csr__read__h616208; + 12'd2: rVal1__h640775 = frm_csr__read__h616219; + 12'd3: rVal1__h640775 = fcsr_csr__read__h616233; + 12'd256: rVal1__h640775 = sstatus_csr__read__h616429; + 12'd260: rVal1__h640775 = sie_csr__read__h616499; + 12'd261: rVal1__h640775 = stvec_csr__read__h616542; + 12'd262: rVal1__h640775 = scounteren_csr__read__h616595; + 12'd320: rVal1__h640775 = csrf_sscratch_csr; + 12'd321: rVal1__h640775 = csrf_sepc_csr; + 12'd322: rVal1__h640775 = scause_csr__read__h616733; + 12'd323: rVal1__h640775 = csrf_stval_csr; + 12'd324: rVal1__h640775 = sip_csr__read__h616873; + 12'd384: rVal1__h640775 = satp_csr__read__h616936; + 12'd768: rVal1__h640775 = mstatus_csr__read__h617079; + 12'd769: rVal1__h640775 = 64'h800000000014112D; + 12'd770: rVal1__h640775 = medeleg_csr__read__h617227; + 12'd771: rVal1__h640775 = mideleg_csr__read__h617322; + 12'd772: rVal1__h640775 = mie_csr__read__h617446; + 12'd773: rVal1__h640775 = mtvec_csr__read__h617528; + 12'd774: rVal1__h640775 = mcounteren_csr__read__h617620; + 12'd832: rVal1__h640775 = csrf_mscratch_csr; + 12'd833: rVal1__h640775 = csrf_mepc_csr; + 12'd834: rVal1__h640775 = mcause_csr__read__h617875; + 12'd835: rVal1__h640775 = csrf_mtval_csr; + 12'd836: rVal1__h640775 = mip_csr__read__h618108; + 12'd1952: rVal1__h640775 = csrf_rg_tselect; + 12'd1953: rVal1__h640775 = rg_tdata1__read__h619063; + 12'd1954: rVal1__h640775 = csrf_rg_tdata2; + 12'd1955: rVal1__h640775 = csrf_rg_tdata3; 12'd2048, 12'd3857, 12'd3858, 12'd3859, 12'd3860: - rVal1__h640774 = 64'd0; - 12'd2049: rVal1__h640774 = x_reg_ifc__read__h616337; - 12'd2816, 12'd3072: rVal1__h640774 = n__read__h618211; - 12'd2818, 12'd3074: rVal1__h640774 = n__read__h618402; - 12'd3073: rVal1__h640774 = csrf_time_reg; - default: rVal1__h640774 = 64'b0; + rVal1__h640775 = 64'd0; + 12'd2049: rVal1__h640775 = x_reg_ifc__read__h616338; + 12'd2816, 12'd3072: rVal1__h640775 = n__read__h618212; + 12'd2818, 12'd3074: rVal1__h640775 = n__read__h618403; + 12'd3073: rVal1__h640775 = csrf_time_reg; + default: rVal1__h640775 = 64'b0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h442110 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h442111 = 8'd255; 3'd2: - _theResult___fst_exp__h442110 = + _theResult___fst_exp__h442111 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h442110 = + _theResult___fst_exp__h442111 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h442110 = 8'd254; - default: _theResult___fst_exp__h442110 = 8'd0; + 3'd4: _theResult___fst_exp__h442111 = 8'd254; + default: _theResult___fst_exp__h442111 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h350716 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h350717 = 8'd255; 3'd2: - _theResult___fst_exp__h350716 = + _theResult___fst_exp__h350717 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h350716 = + _theResult___fst_exp__h350717 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h350716 = 8'd254; - default: _theResult___fst_exp__h350716 = 8'd0; + 3'd4: _theResult___fst_exp__h350717 = 8'd254; + default: _theResult___fst_exp__h350717 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h350717 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h350718 = 23'd0; 3'd2: - _theResult___fst_sfd__h350717 = + _theResult___fst_sfd__h350718 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h350717 = + _theResult___fst_sfd__h350718 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h350717 = 23'd8388607; - default: _theResult___fst_sfd__h350717 = 23'd0; + 3'd4: _theResult___fst_sfd__h350718 = 23'd8388607; + default: _theResult___fst_sfd__h350718 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h396415 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h396416 = 8'd255; 3'd2: - _theResult___fst_exp__h396415 = + _theResult___fst_exp__h396416 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h396415 = + _theResult___fst_exp__h396416 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h396415 = 8'd254; - default: _theResult___fst_exp__h396415 = 8'd0; + 3'd4: _theResult___fst_exp__h396416 = 8'd254; + default: _theResult___fst_exp__h396416 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h396416 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h396417 = 23'd0; 3'd2: - _theResult___fst_sfd__h396416 = + _theResult___fst_sfd__h396417 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h396416 = + _theResult___fst_sfd__h396417 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h396416 = 23'd8388607; - default: _theResult___fst_sfd__h396416 = 23'd0; + 3'd4: _theResult___fst_sfd__h396417 = 23'd8388607; + default: _theResult___fst_sfd__h396417 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h442111 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h442112 = 23'd0; 3'd2: - _theResult___fst_sfd__h442111 = + _theResult___fst_sfd__h442112 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h442111 = + _theResult___fst_sfd__h442112 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h442111 = 23'd8388607; - default: _theResult___fst_sfd__h442111 = 23'd0; + 3'd4: _theResult___fst_sfd__h442112 = 23'd8388607; + default: _theResult___fst_sfd__h442112 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first) @@ -30779,16 +30779,16 @@ module mkCore(CLK, 4'd11, 4'd12, 4'd13: - i__h707772 = commitStage_commitTrap[35:32]; - default: i__h707772 = 4'd15; + i__h707773 = commitStage_commitTrap[35:32]; + default: i__h707773 = 4'd15; endcase end always@(commitStage_commitTrap) begin case (commitStage_commitTrap[35:32]) 4'd0, 4'd1, 4'd3, 4'd4, 4'd5, 4'd7, 4'd8, 4'd9: - i__h707932 = commitStage_commitTrap[35:32]; - default: i__h707932 = 4'd11; + i__h707933 = commitStage_commitTrap[35:32]; + default: i__h707933 = 4'd11; endcase end always@(coreFix_memExe_lsq$firstLd or coreFix_memExe_respLrScAmoQ_data_0) @@ -31029,446 +31029,446 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h359453 or - _theResult___fst_exp__h367501 or - out_exp__h367946 or _theResult___exp__h367943) + always@(guard__h359454 or + _theResult___fst_exp__h367502 or + out_exp__h367947 or _theResult___exp__h367944) begin - case (guard__h359453) + case (guard__h359454) 2'b0, 2'b01: - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25 = - _theResult___fst_exp__h367501; + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25 = + _theResult___fst_exp__h367502; 2'b10: - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25 = - out_exp__h367946; + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25 = + out_exp__h367947; 2'b11: - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25 = - _theResult___exp__h367943; + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25 = + _theResult___exp__h367944; endcase end - always@(guard__h359453 or - _theResult___fst_exp__h367501 or _theResult___exp__h367943) + always@(guard__h359454 or + _theResult___fst_exp__h367502 or _theResult___exp__h367944) begin - case (guard__h359453) + case (guard__h359454) 2'b0: - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q26 = - _theResult___fst_exp__h367501; + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q26 = + _theResult___fst_exp__h367502; 2'b01, 2'b10, 2'b11: - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q26 = - _theResult___exp__h367943; + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q26 = + _theResult___exp__h367944; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25 or - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q26 or + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25 or + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q26 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4628 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4630 or - _theResult___fst_exp__h367501) + _theResult___fst_exp__h367502) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h368021 = - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q25; + _theResult___fst_exp__h368022 = + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q25; 3'd1: - _theResult___fst_exp__h368021 = - CASE_guard59453_0b0_theResult___fst_exp67501_0_ETC__q26; + _theResult___fst_exp__h368022 = + CASE_guard59454_0b0_theResult___fst_exp67502_0_ETC__q26; 3'd2: - _theResult___fst_exp__h368021 = + _theResult___fst_exp__h368022 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4628; 3'd3: - _theResult___fst_exp__h368021 = + _theResult___fst_exp__h368022 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4630; - 3'd4: _theResult___fst_exp__h368021 = _theResult___fst_exp__h367501; - default: _theResult___fst_exp__h368021 = 8'd0; + 3'd4: _theResult___fst_exp__h368022 = _theResult___fst_exp__h367502; + default: _theResult___fst_exp__h368022 = 8'd0; endcase end - always@(guard__h350744 or - _theResult___fst_exp__h358845 or - out_exp__h359364 or _theResult___exp__h359361) + always@(guard__h350745 or + _theResult___fst_exp__h358846 or + out_exp__h359365 or _theResult___exp__h359362) begin - case (guard__h350744) + case (guard__h350745) 2'b0, 2'b01: - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27 = - _theResult___fst_exp__h358845; + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27 = + _theResult___fst_exp__h358846; 2'b10: - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27 = - out_exp__h359364; + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27 = + out_exp__h359365; 2'b11: - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27 = - _theResult___exp__h359361; + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27 = + _theResult___exp__h359362; endcase end - always@(guard__h350744 or - _theResult___fst_exp__h358845 or _theResult___exp__h359361) + always@(guard__h350745 or + _theResult___fst_exp__h358846 or _theResult___exp__h359362) begin - case (guard__h350744) + case (guard__h350745) 2'b0: - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q28 = - _theResult___fst_exp__h358845; + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q28 = + _theResult___fst_exp__h358846; 2'b01, 2'b10, 2'b11: - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q28 = - _theResult___exp__h359361; + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q28 = + _theResult___exp__h359362; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27 or - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q28 or + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27 or + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q28 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4406 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4409 or - _theResult___fst_exp__h358845) + _theResult___fst_exp__h358846) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h359439 = - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q27; + _theResult___fst_exp__h359440 = + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q27; 3'd1: - _theResult___fst_exp__h359439 = - CASE_guard50744_0b0_theResult___fst_exp58845_0_ETC__q28; + _theResult___fst_exp__h359440 = + CASE_guard50745_0b0_theResult___fst_exp58846_0_ETC__q28; 3'd2: - _theResult___fst_exp__h359439 = + _theResult___fst_exp__h359440 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4406; 3'd3: - _theResult___fst_exp__h359439 = + _theResult___fst_exp__h359440 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4409; - 3'd4: _theResult___fst_exp__h359439 = _theResult___fst_exp__h358845; - default: _theResult___fst_exp__h359439 = 8'd0; + 3'd4: _theResult___fst_exp__h359440 = _theResult___fst_exp__h358846; + default: _theResult___fst_exp__h359440 = 8'd0; endcase end - always@(guard__h368383 or - _theResult___fst_exp__h376611 or - out_exp__h377130 or _theResult___exp__h377127) + always@(guard__h368384 or + _theResult___fst_exp__h376612 or + out_exp__h377131 or _theResult___exp__h377128) begin - case (guard__h368383) + case (guard__h368384) 2'b0, 2'b01: - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33 = - _theResult___fst_exp__h376611; + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33 = + _theResult___fst_exp__h376612; 2'b10: - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33 = - out_exp__h377130; + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33 = + out_exp__h377131; 2'b11: - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33 = - _theResult___exp__h377127; + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33 = + _theResult___exp__h377128; endcase end - always@(guard__h368383 or - _theResult___fst_exp__h376611 or _theResult___exp__h377127) + always@(guard__h368384 or + _theResult___fst_exp__h376612 or _theResult___exp__h377128) begin - case (guard__h368383) + case (guard__h368384) 2'b0: - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q34 = - _theResult___fst_exp__h376611; + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q34 = + _theResult___fst_exp__h376612; 2'b01, 2'b10, 2'b11: - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q34 = - _theResult___exp__h377127; + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q34 = + _theResult___exp__h377128; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33 or - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q34 or + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33 or + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q34 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4953 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4955 or - _theResult___fst_exp__h376611) + _theResult___fst_exp__h376612) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h377205 = - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q33; + _theResult___fst_exp__h377206 = + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q33; 3'd1: - _theResult___fst_exp__h377205 = - CASE_guard68383_0b0_theResult___fst_exp76611_0_ETC__q34; + _theResult___fst_exp__h377206 = + CASE_guard68384_0b0_theResult___fst_exp76612_0_ETC__q34; 3'd2: - _theResult___fst_exp__h377205 = + _theResult___fst_exp__h377206 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4953; 3'd3: - _theResult___fst_exp__h377205 = + _theResult___fst_exp__h377206 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4955; - 3'd4: _theResult___fst_exp__h377205 = _theResult___fst_exp__h376611; - default: _theResult___fst_exp__h377205 = 8'd0; + 3'd4: _theResult___fst_exp__h377206 = _theResult___fst_exp__h376612; + default: _theResult___fst_exp__h377206 = 8'd0; endcase end - always@(guard__h377219 or - _theResult___fst_exp__h385296 or - out_exp__h385766 or _theResult___exp__h385763) + always@(guard__h377220 or + _theResult___fst_exp__h385297 or + out_exp__h385767 or _theResult___exp__h385764) begin - case (guard__h377219) + case (guard__h377220) 2'b0, 2'b01: - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38 = - _theResult___fst_exp__h385296; + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38 = + _theResult___fst_exp__h385297; 2'b10: - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38 = - out_exp__h385766; + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38 = + out_exp__h385767; 2'b11: - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38 = - _theResult___exp__h385763; + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38 = + _theResult___exp__h385764; endcase end - always@(guard__h377219 or - _theResult___fst_exp__h385296 or _theResult___exp__h385763) + always@(guard__h377220 or + _theResult___fst_exp__h385297 or _theResult___exp__h385764) begin - case (guard__h377219) + case (guard__h377220) 2'b0: - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q39 = - _theResult___fst_exp__h385296; + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q39 = + _theResult___fst_exp__h385297; 2'b01, 2'b10, 2'b11: - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q39 = - _theResult___exp__h385763; + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q39 = + _theResult___exp__h385764; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38 or - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q39 or + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38 or + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q39 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 or - _theResult___fst_exp__h385296) + _theResult___fst_exp__h385297) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h385841 = - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q38; + _theResult___fst_exp__h385842 = + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q38; 3'd1: - _theResult___fst_exp__h385841 = - CASE_guard77219_0b0_theResult___fst_exp85296_0_ETC__q39; + _theResult___fst_exp__h385842 = + CASE_guard77220_0b0_theResult___fst_exp85297_0_ETC__q39; 3'd2: - _theResult___fst_exp__h385841 = + _theResult___fst_exp__h385842 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022; 3'd3: - _theResult___fst_exp__h385841 = + _theResult___fst_exp__h385842 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024; - 3'd4: _theResult___fst_exp__h385841 = _theResult___fst_exp__h385296; - default: _theResult___fst_exp__h385841 = 8'd0; + 3'd4: _theResult___fst_exp__h385842 = _theResult___fst_exp__h385297; + default: _theResult___fst_exp__h385842 = 8'd0; endcase end - always@(guard__h359453 or - _theResult___snd__h367452 or - out_sfd__h367947 or _theResult___sfd__h367944) + always@(guard__h359454 or + _theResult___snd__h367453 or + out_sfd__h367948 or _theResult___sfd__h367945) begin - case (guard__h359453) + case (guard__h359454) 2'b0, 2'b01: - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40 = - _theResult___snd__h367452[56:34]; + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40 = + _theResult___snd__h367453[56:34]; 2'b10: - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40 = - out_sfd__h367947; + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40 = + out_sfd__h367948; 2'b11: - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40 = - _theResult___sfd__h367944; + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40 = + _theResult___sfd__h367945; endcase end - always@(guard__h359453 or - _theResult___snd__h367452 or _theResult___sfd__h367944) + always@(guard__h359454 or + _theResult___snd__h367453 or _theResult___sfd__h367945) begin - case (guard__h359453) + case (guard__h359454) 2'b0: - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q41 = - _theResult___snd__h367452[56:34]; + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q41 = + _theResult___snd__h367453[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q41 = - _theResult___sfd__h367944; + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q41 = + _theResult___sfd__h367945; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40 or - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q41 or + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40 or + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q41 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5072 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5074 or - _theResult___snd__h367452) + _theResult___snd__h367453) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h368022 = - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q40; + _theResult___fst_sfd__h368023 = + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q40; 3'd1: - _theResult___fst_sfd__h368022 = - CASE_guard59453_0b0_theResult___snd67452_BITS__ETC__q41; + _theResult___fst_sfd__h368023 = + CASE_guard59454_0b0_theResult___snd67453_BITS__ETC__q41; 3'd2: - _theResult___fst_sfd__h368022 = + _theResult___fst_sfd__h368023 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5072; 3'd3: - _theResult___fst_sfd__h368022 = + _theResult___fst_sfd__h368023 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5074; - 3'd4: _theResult___fst_sfd__h368022 = _theResult___snd__h367452[56:34]; - default: _theResult___fst_sfd__h368022 = 23'd0; + 3'd4: _theResult___fst_sfd__h368023 = _theResult___snd__h367453[56:34]; + default: _theResult___fst_sfd__h368023 = 23'd0; endcase end - always@(guard__h350744 or - sfdin__h358839 or out_sfd__h359365 or _theResult___sfd__h359362) + always@(guard__h350745 or + sfdin__h358840 or out_sfd__h359366 or _theResult___sfd__h359363) begin - case (guard__h350744) + case (guard__h350745) 2'b0, 2'b01: - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42 = - sfdin__h358839[56:34]; + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42 = + sfdin__h358840[56:34]; 2'b10: - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42 = - out_sfd__h359365; + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42 = + out_sfd__h359366; 2'b11: - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42 = - _theResult___sfd__h359362; + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42 = + _theResult___sfd__h359363; endcase end - always@(guard__h350744 or sfdin__h358839 or _theResult___sfd__h359362) + always@(guard__h350745 or sfdin__h358840 or _theResult___sfd__h359363) begin - case (guard__h350744) + case (guard__h350745) 2'b0: - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q43 = - sfdin__h358839[56:34]; + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q43 = + sfdin__h358840[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q43 = - _theResult___sfd__h359362; + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q43 = + _theResult___sfd__h359363; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42 or - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q43 or + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42 or + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q43 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5053 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5055 or - sfdin__h358839) + sfdin__h358840) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h359440 = - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q42; + _theResult___fst_sfd__h359441 = + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q42; 3'd1: - _theResult___fst_sfd__h359440 = - CASE_guard50744_0b0_sfdin58839_BITS_56_TO_34_0_ETC__q43; + _theResult___fst_sfd__h359441 = + CASE_guard50745_0b0_sfdin58840_BITS_56_TO_34_0_ETC__q43; 3'd2: - _theResult___fst_sfd__h359440 = + _theResult___fst_sfd__h359441 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5053; 3'd3: - _theResult___fst_sfd__h359440 = + _theResult___fst_sfd__h359441 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5055; - 3'd4: _theResult___fst_sfd__h359440 = sfdin__h358839[56:34]; - default: _theResult___fst_sfd__h359440 = 23'd0; + 3'd4: _theResult___fst_sfd__h359441 = sfdin__h358840[56:34]; + default: _theResult___fst_sfd__h359441 = 23'd0; endcase end - always@(guard__h368383 or - sfdin__h376605 or out_sfd__h377131 or _theResult___sfd__h377128) + always@(guard__h368384 or + sfdin__h376606 or out_sfd__h377132 or _theResult___sfd__h377129) begin - case (guard__h368383) + case (guard__h368384) 2'b0, 2'b01: - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44 = - sfdin__h376605[56:34]; + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44 = + sfdin__h376606[56:34]; 2'b10: - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44 = - out_sfd__h377131; + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44 = + out_sfd__h377132; 2'b11: - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44 = - _theResult___sfd__h377128; + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44 = + _theResult___sfd__h377129; endcase end - always@(guard__h368383 or sfdin__h376605 or _theResult___sfd__h377128) + always@(guard__h368384 or sfdin__h376606 or _theResult___sfd__h377129) begin - case (guard__h368383) + case (guard__h368384) 2'b0: - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q45 = - sfdin__h376605[56:34]; + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q45 = + sfdin__h376606[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q45 = - _theResult___sfd__h377128; + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q45 = + _theResult___sfd__h377129; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44 or - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q45 or + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44 or + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q45 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5099 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5101 or - sfdin__h376605) + sfdin__h376606) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h377206 = - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q44; + _theResult___fst_sfd__h377207 = + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q44; 3'd1: - _theResult___fst_sfd__h377206 = - CASE_guard68383_0b0_sfdin76605_BITS_56_TO_34_0_ETC__q45; + _theResult___fst_sfd__h377207 = + CASE_guard68384_0b0_sfdin76606_BITS_56_TO_34_0_ETC__q45; 3'd2: - _theResult___fst_sfd__h377206 = + _theResult___fst_sfd__h377207 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5099; 3'd3: - _theResult___fst_sfd__h377206 = + _theResult___fst_sfd__h377207 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5101; - 3'd4: _theResult___fst_sfd__h377206 = sfdin__h376605[56:34]; - default: _theResult___fst_sfd__h377206 = 23'd0; + 3'd4: _theResult___fst_sfd__h377207 = sfdin__h376606[56:34]; + default: _theResult___fst_sfd__h377207 = 23'd0; endcase end - always@(guard__h377219 or - _theResult___snd__h385242 or - out_sfd__h385767 or _theResult___sfd__h385764) + always@(guard__h377220 or + _theResult___snd__h385243 or + out_sfd__h385768 or _theResult___sfd__h385765) begin - case (guard__h377219) + case (guard__h377220) 2'b0, 2'b01: - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46 = - _theResult___snd__h385242[56:34]; + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46 = + _theResult___snd__h385243[56:34]; 2'b10: - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46 = - out_sfd__h385767; + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46 = + out_sfd__h385768; 2'b11: - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46 = - _theResult___sfd__h385764; + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46 = + _theResult___sfd__h385765; endcase end - always@(guard__h377219 or - _theResult___snd__h385242 or _theResult___sfd__h385764) + always@(guard__h377220 or + _theResult___snd__h385243 or _theResult___sfd__h385765) begin - case (guard__h377219) + case (guard__h377220) 2'b0: - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q47 = - _theResult___snd__h385242[56:34]; + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q47 = + _theResult___snd__h385243[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q47 = - _theResult___sfd__h385764; + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q47 = + _theResult___sfd__h385765; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46 or - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q47 or + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46 or + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q47 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5118 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5120 or - _theResult___snd__h385242) + _theResult___snd__h385243) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h385842 = - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q46; + _theResult___fst_sfd__h385843 = + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q46; 3'd1: - _theResult___fst_sfd__h385842 = - CASE_guard77219_0b0_theResult___snd85242_BITS__ETC__q47; + _theResult___fst_sfd__h385843 = + CASE_guard77220_0b0_theResult___snd85243_BITS__ETC__q47; 3'd2: - _theResult___fst_sfd__h385842 = + _theResult___fst_sfd__h385843 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5118; 3'd3: - _theResult___fst_sfd__h385842 = + _theResult___fst_sfd__h385843 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5120; - 3'd4: _theResult___fst_sfd__h385842 = _theResult___snd__h385242[56:34]; - default: _theResult___fst_sfd__h385842 = 23'd0; + 3'd4: _theResult___fst_sfd__h385843 = _theResult___snd__h385243[56:34]; + default: _theResult___fst_sfd__h385843 = 23'd0; endcase end - always@(guard__h350744 or + always@(guard__h350745 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h350744) + case (guard__h350745) 2'b0, 2'b01, 2'b10: - CASE_guard50744_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 = + CASE_guard50745_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard50744_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 = - guard__h350744 == 2'b11 && + CASE_guard50745_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 = + guard__h350745 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard50744_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 or - guard__h350744) + CASE_guard50745_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48 or + guard__h350745) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5206 = - CASE_guard50744_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48; + CASE_guard50745_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q48; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5206 = - (guard__h350744 == 2'b0) ? + (guard__h350745 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h350744 == 2'b01 || guard__h350744 == 2'b10 || - guard__h350744 == 2'b11) && + (guard__h350745 == 2'b01 || guard__h350745 == 2'b10 || + guard__h350745 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5206 = @@ -31479,34 +31479,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h350744 or + always@(guard__h350745 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h350744) + case (guard__h350745) 2'b0, 2'b01, 2'b10: - CASE_guard50744_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 = + CASE_guard50745_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard50744_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 = - guard__h350744 != 2'b11 || + CASE_guard50745_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 = + guard__h350745 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard50744_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 or - guard__h350744) + CASE_guard50745_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49 or + guard__h350745) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5150 = - CASE_guard50744_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49; + CASE_guard50745_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q49; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5150 = - (guard__h350744 == 2'b0) ? + (guard__h350745 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h350744 != 2'b01 && guard__h350744 != 2'b10 && - guard__h350744 != 2'b11 || + guard__h350745 != 2'b01 && guard__h350745 != 2'b10 && + guard__h350745 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5150 = @@ -31517,34 +31517,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h359453 or + always@(guard__h359454 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h359453) + case (guard__h359454) 2'b0, 2'b01, 2'b10: - CASE_guard59453_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 = + CASE_guard59454_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard59453_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 = - guard__h359453 == 2'b11 && + CASE_guard59454_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 = + guard__h359454 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard59453_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 or - guard__h359453) + CASE_guard59454_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50 or + guard__h359454) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5213 = - CASE_guard59453_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50; + CASE_guard59454_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q50; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5213 = - (guard__h359453 == 2'b0) ? + (guard__h359454 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h359453 == 2'b01 || guard__h359453 == 2'b10 || - guard__h359453 == 2'b11) && + (guard__h359454 == 2'b01 || guard__h359454 == 2'b10 || + guard__h359454 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5213 = @@ -31555,34 +31555,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h359453 or + always@(guard__h359454 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h359453) + case (guard__h359454) 2'b0, 2'b01, 2'b10: - CASE_guard59453_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 = + CASE_guard59454_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard59453_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 = - guard__h359453 != 2'b11 || + CASE_guard59454_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 = + guard__h359454 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard59453_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 or - guard__h359453) + CASE_guard59454_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51 or + guard__h359454) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5163 = - CASE_guard59453_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51; + CASE_guard59454_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q51; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5163 = - (guard__h359453 == 2'b0) ? + (guard__h359454 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h359453 != 2'b01 && guard__h359453 != 2'b10 && - guard__h359453 != 2'b11 || + guard__h359454 != 2'b01 && guard__h359454 != 2'b10 && + guard__h359454 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5163 = @@ -31593,34 +31593,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h368383 or + always@(guard__h368384 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h368383) + case (guard__h368384) 2'b0, 2'b01, 2'b10: - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 = + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 = - guard__h368383 == 2'b11 && + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 = + guard__h368384 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 or - guard__h368383) + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52 or + guard__h368384) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5223 = - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52; + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q52; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5223 = - (guard__h368383 == 2'b0) ? + (guard__h368384 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h368383 == 2'b01 || guard__h368383 == 2'b10 || - guard__h368383 == 2'b11) && + (guard__h368384 == 2'b01 || guard__h368384 == 2'b10 || + guard__h368384 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5223 = @@ -31631,34 +31631,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h368383 or + always@(guard__h368384 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h368383) + case (guard__h368384) 2'b0, 2'b01, 2'b10: - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 = + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 = - guard__h368383 != 2'b11 || + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 = + guard__h368384 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 or - guard__h368383) + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53 or + guard__h368384) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5180 = - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53; + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q53; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5180 = - (guard__h368383 == 2'b0) ? + (guard__h368384 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h368383 != 2'b01 && guard__h368383 != 2'b10 && - guard__h368383 != 2'b11 || + guard__h368384 != 2'b01 && guard__h368384 != 2'b10 && + guard__h368384 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5180 = @@ -31669,34 +31669,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h377219 or + always@(guard__h377220 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h377219) + case (guard__h377220) 2'b0, 2'b01, 2'b10: - CASE_guard77219_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 = + CASE_guard77220_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard77219_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 = - guard__h377219 == 2'b11 && + CASE_guard77220_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 = + guard__h377220 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard77219_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 or - guard__h377219) + CASE_guard77220_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54 or + guard__h377220) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5230 = - CASE_guard77219_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54; + CASE_guard77220_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q54; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5230 = - (guard__h377219 == 2'b0) ? + (guard__h377220 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h377219 == 2'b01 || guard__h377219 == 2'b10 || - guard__h377219 == 2'b11) && + (guard__h377220 == 2'b01 || guard__h377220 == 2'b10 || + guard__h377220 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5230 = @@ -31707,34 +31707,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h377219 or + always@(guard__h377220 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h377219) + case (guard__h377220) 2'b0, 2'b01, 2'b10: - CASE_guard77219_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 = + CASE_guard77220_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard77219_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 = - guard__h377219 != 2'b11 || + CASE_guard77220_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 = + guard__h377220 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard77219_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 or - guard__h377219) + CASE_guard77220_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55 or + guard__h377220) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5193 = - CASE_guard77219_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55; + CASE_guard77220_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q55; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5193 = - (guard__h377219 == 2'b0) ? + (guard__h377220 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h377219 != 2'b01 && guard__h377219 != 2'b10 && - guard__h377219 != 2'b11 || + guard__h377220 != 2'b01 && guard__h377220 != 2'b10 && + guard__h377220 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5193 = @@ -31758,446 +31758,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h405150 or - _theResult___fst_exp__h413198 or - out_exp__h413643 or _theResult___exp__h413640) + always@(guard__h405151 or + _theResult___fst_exp__h413199 or + out_exp__h413644 or _theResult___exp__h413641) begin - case (guard__h405150) + case (guard__h405151) 2'b0, 2'b01: - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60 = - _theResult___fst_exp__h413198; + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60 = + _theResult___fst_exp__h413199; 2'b10: - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60 = - out_exp__h413643; + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60 = + out_exp__h413644; 2'b11: - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60 = - _theResult___exp__h413640; + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60 = + _theResult___exp__h413641; endcase end - always@(guard__h405150 or - _theResult___fst_exp__h413198 or _theResult___exp__h413640) + always@(guard__h405151 or + _theResult___fst_exp__h413199 or _theResult___exp__h413641) begin - case (guard__h405150) + case (guard__h405151) 2'b0: - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q61 = - _theResult___fst_exp__h413198; + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q61 = + _theResult___fst_exp__h413199; 2'b01, 2'b10, 2'b11: - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q61 = - _theResult___exp__h413640; + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q61 = + _theResult___exp__h413641; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60 or - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q61 or + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60 or + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q61 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6020 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6022 or - _theResult___fst_exp__h413198) + _theResult___fst_exp__h413199) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h413718 = - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q60; + _theResult___fst_exp__h413719 = + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q60; 3'd1: - _theResult___fst_exp__h413718 = - CASE_guard05150_0b0_theResult___fst_exp13198_0_ETC__q61; + _theResult___fst_exp__h413719 = + CASE_guard05151_0b0_theResult___fst_exp13199_0_ETC__q61; 3'd2: - _theResult___fst_exp__h413718 = + _theResult___fst_exp__h413719 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6020; 3'd3: - _theResult___fst_exp__h413718 = + _theResult___fst_exp__h413719 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6022; - 3'd4: _theResult___fst_exp__h413718 = _theResult___fst_exp__h413198; - default: _theResult___fst_exp__h413718 = 8'd0; + 3'd4: _theResult___fst_exp__h413719 = _theResult___fst_exp__h413199; + default: _theResult___fst_exp__h413719 = 8'd0; endcase end - always@(guard__h396443 or - _theResult___fst_exp__h404542 or - out_exp__h405061 or _theResult___exp__h405058) + always@(guard__h396444 or + _theResult___fst_exp__h404543 or + out_exp__h405062 or _theResult___exp__h405059) begin - case (guard__h396443) + case (guard__h396444) 2'b0, 2'b01: - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62 = - _theResult___fst_exp__h404542; + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62 = + _theResult___fst_exp__h404543; 2'b10: - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62 = - out_exp__h405061; + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62 = + out_exp__h405062; 2'b11: - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62 = - _theResult___exp__h405058; + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62 = + _theResult___exp__h405059; endcase end - always@(guard__h396443 or - _theResult___fst_exp__h404542 or _theResult___exp__h405058) + always@(guard__h396444 or + _theResult___fst_exp__h404543 or _theResult___exp__h405059) begin - case (guard__h396443) + case (guard__h396444) 2'b0: - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q63 = - _theResult___fst_exp__h404542; + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q63 = + _theResult___fst_exp__h404543; 2'b01, 2'b10, 2'b11: - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q63 = - _theResult___exp__h405058; + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q63 = + _theResult___exp__h405059; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62 or - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q63 or + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62 or + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q63 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5798 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5801 or - _theResult___fst_exp__h404542) + _theResult___fst_exp__h404543) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h405136 = - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q62; + _theResult___fst_exp__h405137 = + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q62; 3'd1: - _theResult___fst_exp__h405136 = - CASE_guard96443_0b0_theResult___fst_exp04542_0_ETC__q63; + _theResult___fst_exp__h405137 = + CASE_guard96444_0b0_theResult___fst_exp04543_0_ETC__q63; 3'd2: - _theResult___fst_exp__h405136 = + _theResult___fst_exp__h405137 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5798; 3'd3: - _theResult___fst_exp__h405136 = + _theResult___fst_exp__h405137 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5801; - 3'd4: _theResult___fst_exp__h405136 = _theResult___fst_exp__h404542; - default: _theResult___fst_exp__h405136 = 8'd0; + 3'd4: _theResult___fst_exp__h405137 = _theResult___fst_exp__h404543; + default: _theResult___fst_exp__h405137 = 8'd0; endcase end - always@(guard__h414080 or - _theResult___fst_exp__h422308 or - out_exp__h422827 or _theResult___exp__h422824) + always@(guard__h414081 or + _theResult___fst_exp__h422309 or + out_exp__h422828 or _theResult___exp__h422825) begin - case (guard__h414080) + case (guard__h414081) 2'b0, 2'b01: - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68 = - _theResult___fst_exp__h422308; + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68 = + _theResult___fst_exp__h422309; 2'b10: - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68 = - out_exp__h422827; + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68 = + out_exp__h422828; 2'b11: - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68 = - _theResult___exp__h422824; + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68 = + _theResult___exp__h422825; endcase end - always@(guard__h414080 or - _theResult___fst_exp__h422308 or _theResult___exp__h422824) + always@(guard__h414081 or + _theResult___fst_exp__h422309 or _theResult___exp__h422825) begin - case (guard__h414080) + case (guard__h414081) 2'b0: - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q69 = - _theResult___fst_exp__h422308; + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q69 = + _theResult___fst_exp__h422309; 2'b01, 2'b10, 2'b11: - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q69 = - _theResult___exp__h422824; + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q69 = + _theResult___exp__h422825; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68 or - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q69 or + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68 or + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q69 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6345 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6347 or - _theResult___fst_exp__h422308) + _theResult___fst_exp__h422309) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h422902 = - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q68; + _theResult___fst_exp__h422903 = + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q68; 3'd1: - _theResult___fst_exp__h422902 = - CASE_guard14080_0b0_theResult___fst_exp22308_0_ETC__q69; + _theResult___fst_exp__h422903 = + CASE_guard14081_0b0_theResult___fst_exp22309_0_ETC__q69; 3'd2: - _theResult___fst_exp__h422902 = + _theResult___fst_exp__h422903 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6345; 3'd3: - _theResult___fst_exp__h422902 = + _theResult___fst_exp__h422903 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6347; - 3'd4: _theResult___fst_exp__h422902 = _theResult___fst_exp__h422308; - default: _theResult___fst_exp__h422902 = 8'd0; + 3'd4: _theResult___fst_exp__h422903 = _theResult___fst_exp__h422309; + default: _theResult___fst_exp__h422903 = 8'd0; endcase end - always@(guard__h422916 or - _theResult___fst_exp__h430993 or - out_exp__h431463 or _theResult___exp__h431460) + always@(guard__h422917 or + _theResult___fst_exp__h430994 or + out_exp__h431464 or _theResult___exp__h431461) begin - case (guard__h422916) + case (guard__h422917) 2'b0, 2'b01: - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73 = - _theResult___fst_exp__h430993; + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73 = + _theResult___fst_exp__h430994; 2'b10: - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73 = - out_exp__h431463; + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73 = + out_exp__h431464; 2'b11: - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73 = - _theResult___exp__h431460; + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73 = + _theResult___exp__h431461; endcase end - always@(guard__h422916 or - _theResult___fst_exp__h430993 or _theResult___exp__h431460) + always@(guard__h422917 or + _theResult___fst_exp__h430994 or _theResult___exp__h431461) begin - case (guard__h422916) + case (guard__h422917) 2'b0: - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q74 = - _theResult___fst_exp__h430993; + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q74 = + _theResult___fst_exp__h430994; 2'b01, 2'b10, 2'b11: - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q74 = - _theResult___exp__h431460; + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q74 = + _theResult___exp__h431461; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73 or - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q74 or + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73 or + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q74 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 or - _theResult___fst_exp__h430993) + _theResult___fst_exp__h430994) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h431538 = - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q73; + _theResult___fst_exp__h431539 = + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q73; 3'd1: - _theResult___fst_exp__h431538 = - CASE_guard22916_0b0_theResult___fst_exp30993_0_ETC__q74; + _theResult___fst_exp__h431539 = + CASE_guard22917_0b0_theResult___fst_exp30994_0_ETC__q74; 3'd2: - _theResult___fst_exp__h431538 = + _theResult___fst_exp__h431539 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414; 3'd3: - _theResult___fst_exp__h431538 = + _theResult___fst_exp__h431539 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416; - 3'd4: _theResult___fst_exp__h431538 = _theResult___fst_exp__h430993; - default: _theResult___fst_exp__h431538 = 8'd0; + 3'd4: _theResult___fst_exp__h431539 = _theResult___fst_exp__h430994; + default: _theResult___fst_exp__h431539 = 8'd0; endcase end - always@(guard__h405150 or - _theResult___snd__h413149 or - out_sfd__h413644 or _theResult___sfd__h413641) + always@(guard__h405151 or + _theResult___snd__h413150 or + out_sfd__h413645 or _theResult___sfd__h413642) begin - case (guard__h405150) + case (guard__h405151) 2'b0, 2'b01: - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75 = - _theResult___snd__h413149[56:34]; + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75 = + _theResult___snd__h413150[56:34]; 2'b10: - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75 = - out_sfd__h413644; + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75 = + out_sfd__h413645; 2'b11: - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75 = - _theResult___sfd__h413641; + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75 = + _theResult___sfd__h413642; endcase end - always@(guard__h405150 or - _theResult___snd__h413149 or _theResult___sfd__h413641) + always@(guard__h405151 or + _theResult___snd__h413150 or _theResult___sfd__h413642) begin - case (guard__h405150) + case (guard__h405151) 2'b0: - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q76 = - _theResult___snd__h413149[56:34]; + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q76 = + _theResult___snd__h413150[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q76 = - _theResult___sfd__h413641; + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q76 = + _theResult___sfd__h413642; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75 or - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q76 or + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75 or + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q76 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6464 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6466 or - _theResult___snd__h413149) + _theResult___snd__h413150) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h413719 = - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q75; + _theResult___fst_sfd__h413720 = + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q75; 3'd1: - _theResult___fst_sfd__h413719 = - CASE_guard05150_0b0_theResult___snd13149_BITS__ETC__q76; + _theResult___fst_sfd__h413720 = + CASE_guard05151_0b0_theResult___snd13150_BITS__ETC__q76; 3'd2: - _theResult___fst_sfd__h413719 = + _theResult___fst_sfd__h413720 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6464; 3'd3: - _theResult___fst_sfd__h413719 = + _theResult___fst_sfd__h413720 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6466; - 3'd4: _theResult___fst_sfd__h413719 = _theResult___snd__h413149[56:34]; - default: _theResult___fst_sfd__h413719 = 23'd0; + 3'd4: _theResult___fst_sfd__h413720 = _theResult___snd__h413150[56:34]; + default: _theResult___fst_sfd__h413720 = 23'd0; endcase end - always@(guard__h396443 or - sfdin__h404536 or out_sfd__h405062 or _theResult___sfd__h405059) + always@(guard__h396444 or + sfdin__h404537 or out_sfd__h405063 or _theResult___sfd__h405060) begin - case (guard__h396443) + case (guard__h396444) 2'b0, 2'b01: - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77 = - sfdin__h404536[56:34]; + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77 = + sfdin__h404537[56:34]; 2'b10: - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77 = - out_sfd__h405062; + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77 = + out_sfd__h405063; 2'b11: - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77 = - _theResult___sfd__h405059; + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77 = + _theResult___sfd__h405060; endcase end - always@(guard__h396443 or sfdin__h404536 or _theResult___sfd__h405059) + always@(guard__h396444 or sfdin__h404537 or _theResult___sfd__h405060) begin - case (guard__h396443) + case (guard__h396444) 2'b0: - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q78 = - sfdin__h404536[56:34]; + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q78 = + sfdin__h404537[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q78 = - _theResult___sfd__h405059; + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q78 = + _theResult___sfd__h405060; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77 or - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q78 or + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77 or + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q78 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6445 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6447 or - sfdin__h404536) + sfdin__h404537) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h405137 = - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q77; + _theResult___fst_sfd__h405138 = + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q77; 3'd1: - _theResult___fst_sfd__h405137 = - CASE_guard96443_0b0_sfdin04536_BITS_56_TO_34_0_ETC__q78; + _theResult___fst_sfd__h405138 = + CASE_guard96444_0b0_sfdin04537_BITS_56_TO_34_0_ETC__q78; 3'd2: - _theResult___fst_sfd__h405137 = + _theResult___fst_sfd__h405138 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6445; 3'd3: - _theResult___fst_sfd__h405137 = + _theResult___fst_sfd__h405138 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6447; - 3'd4: _theResult___fst_sfd__h405137 = sfdin__h404536[56:34]; - default: _theResult___fst_sfd__h405137 = 23'd0; + 3'd4: _theResult___fst_sfd__h405138 = sfdin__h404537[56:34]; + default: _theResult___fst_sfd__h405138 = 23'd0; endcase end - always@(guard__h414080 or - sfdin__h422302 or out_sfd__h422828 or _theResult___sfd__h422825) + always@(guard__h414081 or + sfdin__h422303 or out_sfd__h422829 or _theResult___sfd__h422826) begin - case (guard__h414080) + case (guard__h414081) 2'b0, 2'b01: - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79 = - sfdin__h422302[56:34]; + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79 = + sfdin__h422303[56:34]; 2'b10: - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79 = - out_sfd__h422828; + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79 = + out_sfd__h422829; 2'b11: - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79 = - _theResult___sfd__h422825; + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79 = + _theResult___sfd__h422826; endcase end - always@(guard__h414080 or sfdin__h422302 or _theResult___sfd__h422825) + always@(guard__h414081 or sfdin__h422303 or _theResult___sfd__h422826) begin - case (guard__h414080) + case (guard__h414081) 2'b0: - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q80 = - sfdin__h422302[56:34]; + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q80 = + sfdin__h422303[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q80 = - _theResult___sfd__h422825; + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q80 = + _theResult___sfd__h422826; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79 or - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q80 or + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79 or + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q80 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6491 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6493 or - sfdin__h422302) + sfdin__h422303) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h422903 = - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q79; + _theResult___fst_sfd__h422904 = + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q79; 3'd1: - _theResult___fst_sfd__h422903 = - CASE_guard14080_0b0_sfdin22302_BITS_56_TO_34_0_ETC__q80; + _theResult___fst_sfd__h422904 = + CASE_guard14081_0b0_sfdin22303_BITS_56_TO_34_0_ETC__q80; 3'd2: - _theResult___fst_sfd__h422903 = + _theResult___fst_sfd__h422904 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6491; 3'd3: - _theResult___fst_sfd__h422903 = + _theResult___fst_sfd__h422904 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6493; - 3'd4: _theResult___fst_sfd__h422903 = sfdin__h422302[56:34]; - default: _theResult___fst_sfd__h422903 = 23'd0; + 3'd4: _theResult___fst_sfd__h422904 = sfdin__h422303[56:34]; + default: _theResult___fst_sfd__h422904 = 23'd0; endcase end - always@(guard__h422916 or - _theResult___snd__h430939 or - out_sfd__h431464 or _theResult___sfd__h431461) + always@(guard__h422917 or + _theResult___snd__h430940 or + out_sfd__h431465 or _theResult___sfd__h431462) begin - case (guard__h422916) + case (guard__h422917) 2'b0, 2'b01: - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81 = - _theResult___snd__h430939[56:34]; + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81 = + _theResult___snd__h430940[56:34]; 2'b10: - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81 = - out_sfd__h431464; + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81 = + out_sfd__h431465; 2'b11: - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81 = - _theResult___sfd__h431461; + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81 = + _theResult___sfd__h431462; endcase end - always@(guard__h422916 or - _theResult___snd__h430939 or _theResult___sfd__h431461) + always@(guard__h422917 or + _theResult___snd__h430940 or _theResult___sfd__h431462) begin - case (guard__h422916) + case (guard__h422917) 2'b0: - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q82 = - _theResult___snd__h430939[56:34]; + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q82 = + _theResult___snd__h430940[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q82 = - _theResult___sfd__h431461; + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q82 = + _theResult___sfd__h431462; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81 or - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q82 or + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81 or + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q82 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6510 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6512 or - _theResult___snd__h430939) + _theResult___snd__h430940) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h431539 = - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q81; + _theResult___fst_sfd__h431540 = + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q81; 3'd1: - _theResult___fst_sfd__h431539 = - CASE_guard22916_0b0_theResult___snd30939_BITS__ETC__q82; + _theResult___fst_sfd__h431540 = + CASE_guard22917_0b0_theResult___snd30940_BITS__ETC__q82; 3'd2: - _theResult___fst_sfd__h431539 = + _theResult___fst_sfd__h431540 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6510; 3'd3: - _theResult___fst_sfd__h431539 = + _theResult___fst_sfd__h431540 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6512; - 3'd4: _theResult___fst_sfd__h431539 = _theResult___snd__h430939[56:34]; - default: _theResult___fst_sfd__h431539 = 23'd0; + 3'd4: _theResult___fst_sfd__h431540 = _theResult___snd__h430940[56:34]; + default: _theResult___fst_sfd__h431540 = 23'd0; endcase end - always@(guard__h396443 or + always@(guard__h396444 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h396443) + case (guard__h396444) 2'b0, 2'b01, 2'b10: - CASE_guard96443_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 = + CASE_guard96444_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard96443_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 = - guard__h396443 == 2'b11 && + CASE_guard96444_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 = + guard__h396444 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard96443_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 or - guard__h396443) + CASE_guard96444_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83 or + guard__h396444) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6598 = - CASE_guard96443_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83; + CASE_guard96444_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q83; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6598 = - (guard__h396443 == 2'b0) ? + (guard__h396444 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h396443 == 2'b01 || guard__h396443 == 2'b10 || - guard__h396443 == 2'b11) && + (guard__h396444 == 2'b01 || guard__h396444 == 2'b10 || + guard__h396444 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6598 = @@ -32208,34 +32208,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h396443 or + always@(guard__h396444 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h396443) + case (guard__h396444) 2'b0, 2'b01, 2'b10: - CASE_guard96443_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 = + CASE_guard96444_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard96443_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 = - guard__h396443 != 2'b11 || + CASE_guard96444_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 = + guard__h396444 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard96443_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 or - guard__h396443) + CASE_guard96444_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84 or + guard__h396444) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6542 = - CASE_guard96443_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84; + CASE_guard96444_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q84; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6542 = - (guard__h396443 == 2'b0) ? + (guard__h396444 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h396443 != 2'b01 && guard__h396443 != 2'b10 && - guard__h396443 != 2'b11 || + guard__h396444 != 2'b01 && guard__h396444 != 2'b10 && + guard__h396444 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6542 = @@ -32246,34 +32246,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h405150 or + always@(guard__h405151 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h405150) + case (guard__h405151) 2'b0, 2'b01, 2'b10: - CASE_guard05150_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 = + CASE_guard05151_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard05150_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 = - guard__h405150 == 2'b11 && + CASE_guard05151_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 = + guard__h405151 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard05150_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 or - guard__h405150) + CASE_guard05151_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85 or + guard__h405151) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6605 = - CASE_guard05150_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85; + CASE_guard05151_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q85; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6605 = - (guard__h405150 == 2'b0) ? + (guard__h405151 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h405150 == 2'b01 || guard__h405150 == 2'b10 || - guard__h405150 == 2'b11) && + (guard__h405151 == 2'b01 || guard__h405151 == 2'b10 || + guard__h405151 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6605 = @@ -32284,34 +32284,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h405150 or + always@(guard__h405151 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h405150) + case (guard__h405151) 2'b0, 2'b01, 2'b10: - CASE_guard05150_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 = + CASE_guard05151_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard05150_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 = - guard__h405150 != 2'b11 || + CASE_guard05151_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 = + guard__h405151 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard05150_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 or - guard__h405150) + CASE_guard05151_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86 or + guard__h405151) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6555 = - CASE_guard05150_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86; + CASE_guard05151_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q86; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6555 = - (guard__h405150 == 2'b0) ? + (guard__h405151 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h405150 != 2'b01 && guard__h405150 != 2'b10 && - guard__h405150 != 2'b11 || + guard__h405151 != 2'b01 && guard__h405151 != 2'b10 && + guard__h405151 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6555 = @@ -32322,34 +32322,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h414080 or + always@(guard__h414081 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h414080) + case (guard__h414081) 2'b0, 2'b01, 2'b10: - CASE_guard14080_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 = + CASE_guard14081_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard14080_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 = - guard__h414080 == 2'b11 && + CASE_guard14081_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 = + guard__h414081 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard14080_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 or - guard__h414080) + CASE_guard14081_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87 or + guard__h414081) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6615 = - CASE_guard14080_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87; + CASE_guard14081_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q87; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6615 = - (guard__h414080 == 2'b0) ? + (guard__h414081 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h414080 == 2'b01 || guard__h414080 == 2'b10 || - guard__h414080 == 2'b11) && + (guard__h414081 == 2'b01 || guard__h414081 == 2'b10 || + guard__h414081 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6615 = @@ -32360,34 +32360,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h414080 or + always@(guard__h414081 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h414080) + case (guard__h414081) 2'b0, 2'b01, 2'b10: - CASE_guard14080_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 = + CASE_guard14081_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard14080_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 = - guard__h414080 != 2'b11 || + CASE_guard14081_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 = + guard__h414081 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard14080_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 or - guard__h414080) + CASE_guard14081_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88 or + guard__h414081) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6572 = - CASE_guard14080_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88; + CASE_guard14081_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q88; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6572 = - (guard__h414080 == 2'b0) ? + (guard__h414081 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h414080 != 2'b01 && guard__h414080 != 2'b10 && - guard__h414080 != 2'b11 || + guard__h414081 != 2'b01 && guard__h414081 != 2'b10 && + guard__h414081 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6572 = @@ -32398,34 +32398,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h422916 or + always@(guard__h422917 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h422916) + case (guard__h422917) 2'b0, 2'b01, 2'b10: - CASE_guard22916_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 = + CASE_guard22917_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard22916_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 = - guard__h422916 == 2'b11 && + CASE_guard22917_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 = + guard__h422917 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard22916_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 or - guard__h422916) + CASE_guard22917_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89 or + guard__h422917) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6622 = - CASE_guard22916_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89; + CASE_guard22917_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q89; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6622 = - (guard__h422916 == 2'b0) ? + (guard__h422917 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h422916 == 2'b01 || guard__h422916 == 2'b10 || - guard__h422916 == 2'b11) && + (guard__h422917 == 2'b01 || guard__h422917 == 2'b10 || + guard__h422917 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6622 = @@ -32436,34 +32436,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h422916 or + always@(guard__h422917 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h422916) + case (guard__h422917) 2'b0, 2'b01, 2'b10: - CASE_guard22916_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 = + CASE_guard22917_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard22916_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 = - guard__h422916 != 2'b11 || + CASE_guard22917_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 = + guard__h422917 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard22916_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 or - guard__h422916) + CASE_guard22917_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90 or + guard__h422917) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6585 = - CASE_guard22916_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90; + CASE_guard22917_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q90; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6585 = - (guard__h422916 == 2'b0) ? + (guard__h422917 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h422916 != 2'b01 && guard__h422916 != 2'b10 && - guard__h422916 != 2'b11 || + guard__h422917 != 2'b01 && guard__h422917 != 2'b10 && + guard__h422917 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6585 = @@ -32500,446 +32500,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h450845 or - _theResult___fst_exp__h458893 or - out_exp__h459338 or _theResult___exp__h459335) + always@(guard__h450846 or + _theResult___fst_exp__h458894 or + out_exp__h459339 or _theResult___exp__h459336) begin - case (guard__h450845) + case (guard__h450846) 2'b0, 2'b01: - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95 = - _theResult___fst_exp__h458893; + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95 = + _theResult___fst_exp__h458894; 2'b10: - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95 = - out_exp__h459338; + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95 = + out_exp__h459339; 2'b11: - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95 = - _theResult___exp__h459335; + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95 = + _theResult___exp__h459336; endcase end - always@(guard__h450845 or - _theResult___fst_exp__h458893 or _theResult___exp__h459335) + always@(guard__h450846 or + _theResult___fst_exp__h458894 or _theResult___exp__h459336) begin - case (guard__h450845) + case (guard__h450846) 2'b0: - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q96 = - _theResult___fst_exp__h458893; + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q96 = + _theResult___fst_exp__h458894; 2'b01, 2'b10, 2'b11: - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q96 = - _theResult___exp__h459335; + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q96 = + _theResult___exp__h459336; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95 or - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q96 or + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95 or + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q96 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7412 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7414 or - _theResult___fst_exp__h458893) + _theResult___fst_exp__h458894) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h459413 = - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q95; + _theResult___fst_exp__h459414 = + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q95; 3'd1: - _theResult___fst_exp__h459413 = - CASE_guard50845_0b0_theResult___fst_exp58893_0_ETC__q96; + _theResult___fst_exp__h459414 = + CASE_guard50846_0b0_theResult___fst_exp58894_0_ETC__q96; 3'd2: - _theResult___fst_exp__h459413 = + _theResult___fst_exp__h459414 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7412; 3'd3: - _theResult___fst_exp__h459413 = + _theResult___fst_exp__h459414 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7414; - 3'd4: _theResult___fst_exp__h459413 = _theResult___fst_exp__h458893; - default: _theResult___fst_exp__h459413 = 8'd0; + 3'd4: _theResult___fst_exp__h459414 = _theResult___fst_exp__h458894; + default: _theResult___fst_exp__h459414 = 8'd0; endcase end - always@(guard__h442138 or - _theResult___fst_exp__h450237 or - out_exp__h450756 or _theResult___exp__h450753) + always@(guard__h442139 or + _theResult___fst_exp__h450238 or + out_exp__h450757 or _theResult___exp__h450754) begin - case (guard__h442138) + case (guard__h442139) 2'b0, 2'b01: - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97 = - _theResult___fst_exp__h450237; + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97 = + _theResult___fst_exp__h450238; 2'b10: - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97 = - out_exp__h450756; + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97 = + out_exp__h450757; 2'b11: - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97 = - _theResult___exp__h450753; + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97 = + _theResult___exp__h450754; endcase end - always@(guard__h442138 or - _theResult___fst_exp__h450237 or _theResult___exp__h450753) + always@(guard__h442139 or + _theResult___fst_exp__h450238 or _theResult___exp__h450754) begin - case (guard__h442138) + case (guard__h442139) 2'b0: - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q98 = - _theResult___fst_exp__h450237; + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q98 = + _theResult___fst_exp__h450238; 2'b01, 2'b10, 2'b11: - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q98 = - _theResult___exp__h450753; + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q98 = + _theResult___exp__h450754; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97 or - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q98 or + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97 or + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q98 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7190 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7193 or - _theResult___fst_exp__h450237) + _theResult___fst_exp__h450238) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h450831 = - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q97; + _theResult___fst_exp__h450832 = + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q97; 3'd1: - _theResult___fst_exp__h450831 = - CASE_guard42138_0b0_theResult___fst_exp50237_0_ETC__q98; + _theResult___fst_exp__h450832 = + CASE_guard42139_0b0_theResult___fst_exp50238_0_ETC__q98; 3'd2: - _theResult___fst_exp__h450831 = + _theResult___fst_exp__h450832 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7190; 3'd3: - _theResult___fst_exp__h450831 = + _theResult___fst_exp__h450832 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7193; - 3'd4: _theResult___fst_exp__h450831 = _theResult___fst_exp__h450237; - default: _theResult___fst_exp__h450831 = 8'd0; + 3'd4: _theResult___fst_exp__h450832 = _theResult___fst_exp__h450238; + default: _theResult___fst_exp__h450832 = 8'd0; endcase end - always@(guard__h459775 or - _theResult___fst_exp__h468003 or - out_exp__h468522 or _theResult___exp__h468519) + always@(guard__h459776 or + _theResult___fst_exp__h468004 or + out_exp__h468523 or _theResult___exp__h468520) begin - case (guard__h459775) + case (guard__h459776) 2'b0, 2'b01: - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103 = - _theResult___fst_exp__h468003; + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103 = + _theResult___fst_exp__h468004; 2'b10: - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103 = - out_exp__h468522; + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103 = + out_exp__h468523; 2'b11: - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103 = - _theResult___exp__h468519; + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103 = + _theResult___exp__h468520; endcase end - always@(guard__h459775 or - _theResult___fst_exp__h468003 or _theResult___exp__h468519) + always@(guard__h459776 or + _theResult___fst_exp__h468004 or _theResult___exp__h468520) begin - case (guard__h459775) + case (guard__h459776) 2'b0: - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q104 = - _theResult___fst_exp__h468003; + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q104 = + _theResult___fst_exp__h468004; 2'b01, 2'b10, 2'b11: - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q104 = - _theResult___exp__h468519; + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q104 = + _theResult___exp__h468520; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103 or - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q104 or + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103 or + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q104 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7737 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7739 or - _theResult___fst_exp__h468003) + _theResult___fst_exp__h468004) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h468597 = - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q103; + _theResult___fst_exp__h468598 = + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q103; 3'd1: - _theResult___fst_exp__h468597 = - CASE_guard59775_0b0_theResult___fst_exp68003_0_ETC__q104; + _theResult___fst_exp__h468598 = + CASE_guard59776_0b0_theResult___fst_exp68004_0_ETC__q104; 3'd2: - _theResult___fst_exp__h468597 = + _theResult___fst_exp__h468598 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7737; 3'd3: - _theResult___fst_exp__h468597 = + _theResult___fst_exp__h468598 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7739; - 3'd4: _theResult___fst_exp__h468597 = _theResult___fst_exp__h468003; - default: _theResult___fst_exp__h468597 = 8'd0; + 3'd4: _theResult___fst_exp__h468598 = _theResult___fst_exp__h468004; + default: _theResult___fst_exp__h468598 = 8'd0; endcase end - always@(guard__h468611 or - _theResult___fst_exp__h476688 or - out_exp__h477158 or _theResult___exp__h477155) + always@(guard__h468612 or + _theResult___fst_exp__h476689 or + out_exp__h477159 or _theResult___exp__h477156) begin - case (guard__h468611) + case (guard__h468612) 2'b0, 2'b01: - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108 = - _theResult___fst_exp__h476688; + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108 = + _theResult___fst_exp__h476689; 2'b10: - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108 = - out_exp__h477158; + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108 = + out_exp__h477159; 2'b11: - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108 = - _theResult___exp__h477155; + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108 = + _theResult___exp__h477156; endcase end - always@(guard__h468611 or - _theResult___fst_exp__h476688 or _theResult___exp__h477155) + always@(guard__h468612 or + _theResult___fst_exp__h476689 or _theResult___exp__h477156) begin - case (guard__h468611) + case (guard__h468612) 2'b0: - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q109 = - _theResult___fst_exp__h476688; + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q109 = + _theResult___fst_exp__h476689; 2'b01, 2'b10, 2'b11: - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q109 = - _theResult___exp__h477155; + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q109 = + _theResult___exp__h477156; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108 or - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q109 or + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108 or + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q109 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 or - _theResult___fst_exp__h476688) + _theResult___fst_exp__h476689) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h477233 = - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q108; + _theResult___fst_exp__h477234 = + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q108; 3'd1: - _theResult___fst_exp__h477233 = - CASE_guard68611_0b0_theResult___fst_exp76688_0_ETC__q109; + _theResult___fst_exp__h477234 = + CASE_guard68612_0b0_theResult___fst_exp76689_0_ETC__q109; 3'd2: - _theResult___fst_exp__h477233 = + _theResult___fst_exp__h477234 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806; 3'd3: - _theResult___fst_exp__h477233 = + _theResult___fst_exp__h477234 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808; - 3'd4: _theResult___fst_exp__h477233 = _theResult___fst_exp__h476688; - default: _theResult___fst_exp__h477233 = 8'd0; + 3'd4: _theResult___fst_exp__h477234 = _theResult___fst_exp__h476689; + default: _theResult___fst_exp__h477234 = 8'd0; endcase end - always@(guard__h450845 or - _theResult___snd__h458844 or - out_sfd__h459339 or _theResult___sfd__h459336) + always@(guard__h450846 or + _theResult___snd__h458845 or + out_sfd__h459340 or _theResult___sfd__h459337) begin - case (guard__h450845) + case (guard__h450846) 2'b0, 2'b01: - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110 = - _theResult___snd__h458844[56:34]; + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110 = + _theResult___snd__h458845[56:34]; 2'b10: - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110 = - out_sfd__h459339; + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110 = + out_sfd__h459340; 2'b11: - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110 = - _theResult___sfd__h459336; + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110 = + _theResult___sfd__h459337; endcase end - always@(guard__h450845 or - _theResult___snd__h458844 or _theResult___sfd__h459336) + always@(guard__h450846 or + _theResult___snd__h458845 or _theResult___sfd__h459337) begin - case (guard__h450845) + case (guard__h450846) 2'b0: - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q111 = - _theResult___snd__h458844[56:34]; + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q111 = + _theResult___snd__h458845[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q111 = - _theResult___sfd__h459336; + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q111 = + _theResult___sfd__h459337; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110 or - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q111 or + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110 or + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q111 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7856 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7858 or - _theResult___snd__h458844) + _theResult___snd__h458845) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h459414 = - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q110; + _theResult___fst_sfd__h459415 = + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q110; 3'd1: - _theResult___fst_sfd__h459414 = - CASE_guard50845_0b0_theResult___snd58844_BITS__ETC__q111; + _theResult___fst_sfd__h459415 = + CASE_guard50846_0b0_theResult___snd58845_BITS__ETC__q111; 3'd2: - _theResult___fst_sfd__h459414 = + _theResult___fst_sfd__h459415 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7856; 3'd3: - _theResult___fst_sfd__h459414 = + _theResult___fst_sfd__h459415 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7858; - 3'd4: _theResult___fst_sfd__h459414 = _theResult___snd__h458844[56:34]; - default: _theResult___fst_sfd__h459414 = 23'd0; + 3'd4: _theResult___fst_sfd__h459415 = _theResult___snd__h458845[56:34]; + default: _theResult___fst_sfd__h459415 = 23'd0; endcase end - always@(guard__h442138 or - sfdin__h450231 or out_sfd__h450757 or _theResult___sfd__h450754) + always@(guard__h442139 or + sfdin__h450232 or out_sfd__h450758 or _theResult___sfd__h450755) begin - case (guard__h442138) + case (guard__h442139) 2'b0, 2'b01: - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112 = - sfdin__h450231[56:34]; + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112 = + sfdin__h450232[56:34]; 2'b10: - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112 = - out_sfd__h450757; + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112 = + out_sfd__h450758; 2'b11: - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112 = - _theResult___sfd__h450754; + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112 = + _theResult___sfd__h450755; endcase end - always@(guard__h442138 or sfdin__h450231 or _theResult___sfd__h450754) + always@(guard__h442139 or sfdin__h450232 or _theResult___sfd__h450755) begin - case (guard__h442138) + case (guard__h442139) 2'b0: - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q113 = - sfdin__h450231[56:34]; + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q113 = + sfdin__h450232[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q113 = - _theResult___sfd__h450754; + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q113 = + _theResult___sfd__h450755; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112 or - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q113 or + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112 or + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q113 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7837 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7839 or - sfdin__h450231) + sfdin__h450232) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h450832 = - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q112; + _theResult___fst_sfd__h450833 = + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q112; 3'd1: - _theResult___fst_sfd__h450832 = - CASE_guard42138_0b0_sfdin50231_BITS_56_TO_34_0_ETC__q113; + _theResult___fst_sfd__h450833 = + CASE_guard42139_0b0_sfdin50232_BITS_56_TO_34_0_ETC__q113; 3'd2: - _theResult___fst_sfd__h450832 = + _theResult___fst_sfd__h450833 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7837; 3'd3: - _theResult___fst_sfd__h450832 = + _theResult___fst_sfd__h450833 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7839; - 3'd4: _theResult___fst_sfd__h450832 = sfdin__h450231[56:34]; - default: _theResult___fst_sfd__h450832 = 23'd0; + 3'd4: _theResult___fst_sfd__h450833 = sfdin__h450232[56:34]; + default: _theResult___fst_sfd__h450833 = 23'd0; endcase end - always@(guard__h459775 or - sfdin__h467997 or out_sfd__h468523 or _theResult___sfd__h468520) + always@(guard__h459776 or + sfdin__h467998 or out_sfd__h468524 or _theResult___sfd__h468521) begin - case (guard__h459775) + case (guard__h459776) 2'b0, 2'b01: - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114 = - sfdin__h467997[56:34]; + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114 = + sfdin__h467998[56:34]; 2'b10: - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114 = - out_sfd__h468523; + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114 = + out_sfd__h468524; 2'b11: - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114 = - _theResult___sfd__h468520; + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114 = + _theResult___sfd__h468521; endcase end - always@(guard__h459775 or sfdin__h467997 or _theResult___sfd__h468520) + always@(guard__h459776 or sfdin__h467998 or _theResult___sfd__h468521) begin - case (guard__h459775) + case (guard__h459776) 2'b0: - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q115 = - sfdin__h467997[56:34]; + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q115 = + sfdin__h467998[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q115 = - _theResult___sfd__h468520; + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q115 = + _theResult___sfd__h468521; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114 or - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q115 or + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114 or + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q115 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7883 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7885 or - sfdin__h467997) + sfdin__h467998) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h468598 = - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q114; + _theResult___fst_sfd__h468599 = + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q114; 3'd1: - _theResult___fst_sfd__h468598 = - CASE_guard59775_0b0_sfdin67997_BITS_56_TO_34_0_ETC__q115; + _theResult___fst_sfd__h468599 = + CASE_guard59776_0b0_sfdin67998_BITS_56_TO_34_0_ETC__q115; 3'd2: - _theResult___fst_sfd__h468598 = + _theResult___fst_sfd__h468599 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7883; 3'd3: - _theResult___fst_sfd__h468598 = + _theResult___fst_sfd__h468599 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7885; - 3'd4: _theResult___fst_sfd__h468598 = sfdin__h467997[56:34]; - default: _theResult___fst_sfd__h468598 = 23'd0; + 3'd4: _theResult___fst_sfd__h468599 = sfdin__h467998[56:34]; + default: _theResult___fst_sfd__h468599 = 23'd0; endcase end - always@(guard__h468611 or - _theResult___snd__h476634 or - out_sfd__h477159 or _theResult___sfd__h477156) + always@(guard__h468612 or + _theResult___snd__h476635 or + out_sfd__h477160 or _theResult___sfd__h477157) begin - case (guard__h468611) + case (guard__h468612) 2'b0, 2'b01: - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116 = - _theResult___snd__h476634[56:34]; + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116 = + _theResult___snd__h476635[56:34]; 2'b10: - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116 = - out_sfd__h477159; + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116 = + out_sfd__h477160; 2'b11: - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116 = - _theResult___sfd__h477156; + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116 = + _theResult___sfd__h477157; endcase end - always@(guard__h468611 or - _theResult___snd__h476634 or _theResult___sfd__h477156) + always@(guard__h468612 or + _theResult___snd__h476635 or _theResult___sfd__h477157) begin - case (guard__h468611) + case (guard__h468612) 2'b0: - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q117 = - _theResult___snd__h476634[56:34]; + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q117 = + _theResult___snd__h476635[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q117 = - _theResult___sfd__h477156; + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q117 = + _theResult___sfd__h477157; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116 or - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q117 or + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116 or + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q117 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7902 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7904 or - _theResult___snd__h476634) + _theResult___snd__h476635) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h477234 = - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q116; + _theResult___fst_sfd__h477235 = + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q116; 3'd1: - _theResult___fst_sfd__h477234 = - CASE_guard68611_0b0_theResult___snd76634_BITS__ETC__q117; + _theResult___fst_sfd__h477235 = + CASE_guard68612_0b0_theResult___snd76635_BITS__ETC__q117; 3'd2: - _theResult___fst_sfd__h477234 = + _theResult___fst_sfd__h477235 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7902; 3'd3: - _theResult___fst_sfd__h477234 = + _theResult___fst_sfd__h477235 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7904; - 3'd4: _theResult___fst_sfd__h477234 = _theResult___snd__h476634[56:34]; - default: _theResult___fst_sfd__h477234 = 23'd0; + 3'd4: _theResult___fst_sfd__h477235 = _theResult___snd__h476635[56:34]; + default: _theResult___fst_sfd__h477235 = 23'd0; endcase end - always@(guard__h442138 or + always@(guard__h442139 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h442138) + case (guard__h442139) 2'b0, 2'b01, 2'b10: - CASE_guard42138_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 = + CASE_guard42139_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard42138_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 = - guard__h442138 == 2'b11 && + CASE_guard42139_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 = + guard__h442139 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard42138_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 or - guard__h442138) + CASE_guard42139_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118 or + guard__h442139) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7990 = - CASE_guard42138_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118; + CASE_guard42139_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q118; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7990 = - (guard__h442138 == 2'b0) ? + (guard__h442139 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h442138 == 2'b01 || guard__h442138 == 2'b10 || - guard__h442138 == 2'b11) && + (guard__h442139 == 2'b01 || guard__h442139 == 2'b10 || + guard__h442139 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7990 = @@ -32950,34 +32950,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h450845 or + always@(guard__h450846 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h450845) + case (guard__h450846) 2'b0, 2'b01, 2'b10: - CASE_guard50845_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 = + CASE_guard50846_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard50845_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 = - guard__h450845 == 2'b11 && + CASE_guard50846_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 = + guard__h450846 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard50845_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 or - guard__h450845) + CASE_guard50846_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119 or + guard__h450846) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7997 = - CASE_guard50845_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119; + CASE_guard50846_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q119; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7997 = - (guard__h450845 == 2'b0) ? + (guard__h450846 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h450845 == 2'b01 || guard__h450845 == 2'b10 || - guard__h450845 == 2'b11) && + (guard__h450846 == 2'b01 || guard__h450846 == 2'b10 || + guard__h450846 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7997 = @@ -32988,34 +32988,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h442138 or + always@(guard__h442139 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h442138) + case (guard__h442139) 2'b0, 2'b01, 2'b10: - CASE_guard42138_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 = + CASE_guard42139_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard42138_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 = - guard__h442138 != 2'b11 || + CASE_guard42139_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 = + guard__h442139 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard42138_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 or - guard__h442138) + CASE_guard42139_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120 or + guard__h442139) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7934 = - CASE_guard42138_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120; + CASE_guard42139_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q120; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7934 = - (guard__h442138 == 2'b0) ? + (guard__h442139 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h442138 != 2'b01 && guard__h442138 != 2'b10 && - guard__h442138 != 2'b11 || + guard__h442139 != 2'b01 && guard__h442139 != 2'b10 && + guard__h442139 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7934 = @@ -33026,34 +33026,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h450845 or + always@(guard__h450846 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h450845) + case (guard__h450846) 2'b0, 2'b01, 2'b10: - CASE_guard50845_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 = + CASE_guard50846_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard50845_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 = - guard__h450845 != 2'b11 || + CASE_guard50846_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 = + guard__h450846 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard50845_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 or - guard__h450845) + CASE_guard50846_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121 or + guard__h450846) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7947 = - CASE_guard50845_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121; + CASE_guard50846_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q121; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7947 = - (guard__h450845 == 2'b0) ? + (guard__h450846 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h450845 != 2'b01 && guard__h450845 != 2'b10 && - guard__h450845 != 2'b11 || + guard__h450846 != 2'b01 && guard__h450846 != 2'b10 && + guard__h450846 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7947 = @@ -33064,34 +33064,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h459775 or + always@(guard__h459776 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h459775) + case (guard__h459776) 2'b0, 2'b01, 2'b10: - CASE_guard59775_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 = + CASE_guard59776_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard59775_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 = - guard__h459775 == 2'b11 && + CASE_guard59776_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 = + guard__h459776 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard59775_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 or - guard__h459775) + CASE_guard59776_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122 or + guard__h459776) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8007 = - CASE_guard59775_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122; + CASE_guard59776_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q122; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8007 = - (guard__h459775 == 2'b0) ? + (guard__h459776 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h459775 == 2'b01 || guard__h459775 == 2'b10 || - guard__h459775 == 2'b11) && + (guard__h459776 == 2'b01 || guard__h459776 == 2'b10 || + guard__h459776 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8007 = @@ -33102,34 +33102,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h459775 or + always@(guard__h459776 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h459775) + case (guard__h459776) 2'b0, 2'b01, 2'b10: - CASE_guard59775_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 = + CASE_guard59776_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard59775_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 = - guard__h459775 != 2'b11 || + CASE_guard59776_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 = + guard__h459776 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard59775_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 or - guard__h459775) + CASE_guard59776_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123 or + guard__h459776) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7964 = - CASE_guard59775_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123; + CASE_guard59776_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q123; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7964 = - (guard__h459775 == 2'b0) ? + (guard__h459776 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h459775 != 2'b01 && guard__h459775 != 2'b10 && - guard__h459775 != 2'b11 || + guard__h459776 != 2'b01 && guard__h459776 != 2'b10 && + guard__h459776 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7964 = @@ -33140,34 +33140,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h468611 or + always@(guard__h468612 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h468611) + case (guard__h468612) 2'b0, 2'b01, 2'b10: - CASE_guard68611_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 = + CASE_guard68612_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard68611_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 = - guard__h468611 == 2'b11 && + CASE_guard68612_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 = + guard__h468612 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard68611_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 or - guard__h468611) + CASE_guard68612_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124 or + guard__h468612) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8014 = - CASE_guard68611_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124; + CASE_guard68612_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q124; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8014 = - (guard__h468611 == 2'b0) ? + (guard__h468612 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h468611 == 2'b01 || guard__h468611 == 2'b10 || - guard__h468611 == 2'b11) && + (guard__h468612 == 2'b01 || guard__h468612 == 2'b10 || + guard__h468612 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8014 = @@ -33178,34 +33178,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h468611 or + always@(guard__h468612 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h468611) + case (guard__h468612) 2'b0, 2'b01, 2'b10: - CASE_guard68611_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 = + CASE_guard68612_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard68611_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 = - guard__h468611 != 2'b11 || + CASE_guard68612_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 = + guard__h468612 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard68611_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 or - guard__h468611) + CASE_guard68612_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125 or + guard__h468612) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7977 = - CASE_guard68611_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125; + CASE_guard68612_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q125; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7977 = - (guard__h468611 == 2'b0) ? + (guard__h468612 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h468611 != 2'b01 && guard__h468611 != 2'b10 && - guard__h468611 != 2'b11 || + guard__h468612 != 2'b01 && guard__h468612 != 2'b10 && + guard__h468612 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7977 = @@ -33262,28 +33262,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$RDY_request_put; endcase end - always@(guard__h498952 or - _theResult___fst_exp__h506913 or _theResult___exp__h507568) + always@(guard__h498953 or + _theResult___fst_exp__h506914 or _theResult___exp__h507569) begin - case (guard__h498952) + case (guard__h498953) 2'b0: - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q135 = - _theResult___fst_exp__h506913; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q135 = + _theResult___fst_exp__h506914; 2'b01, 2'b10, 2'b11: - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q135 = - _theResult___exp__h507568; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q135 = + _theResult___exp__h507569; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h506913 or + _theResult___fst_exp__h506914 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9126 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9124 or - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q135) + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q135) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9130 = - _theResult___fst_exp__h506913; + _theResult___fst_exp__h506914; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9130 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9126; @@ -33292,44 +33292,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9124; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9130 = - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q135; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q135; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9130 = 11'd0; endcase end - always@(guard__h498952 or - _theResult___fst_exp__h506913 or - out_exp__h507571 or _theResult___exp__h507568) + always@(guard__h498953 or + _theResult___fst_exp__h506914 or + out_exp__h507572 or _theResult___exp__h507569) begin - case (guard__h498952) + case (guard__h498953) 2'b0, 2'b01: - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q136 = - _theResult___fst_exp__h506913; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q136 = + _theResult___fst_exp__h506914; 2'b10: - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q136 = - out_exp__h507571; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q136 = + out_exp__h507572; 2'b11: - CASE_guard98952_0b0_theResult___fst_exp06913_0_ETC__q136 = - _theResult___exp__h507568; + CASE_guard98953_0b0_theResult___fst_exp06914_0_ETC__q136 = + _theResult___exp__h507569; endcase end - always@(guard__h498952 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h498953 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h498952) + case (guard__h498953) 2'b0, 2'b01, 2'b10: - CASE_guard98952_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 = + CASE_guard98953_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard98952_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 = - guard__h498952 == 2'b11 && + CASE_guard98953_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q137 = + guard__h498953 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h498952) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h498953) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33339,12 +33339,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q138 = - (guard__h498952 == 2'b0) ? + (guard__h498953 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h498952 == 2'b01 || guard__h498952 == 2'b10 || - guard__h498952 == 2'b11) && + (guard__h498953 == 2'b01 || guard__h498953 == 2'b10 || + guard__h498953 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -33355,23 +33355,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h508264 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h508265 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h508264) + case (guard__h508265) 2'b0, 2'b01, 2'b10: - CASE_guard08264_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 = + CASE_guard08265_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard08264_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 = - guard__h508264 == 2'b11 && + CASE_guard08265_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q139 = + guard__h508265 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h508264) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h508265) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33381,12 +33381,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q140 = - (guard__h508264 == 2'b0) ? + (guard__h508265 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h508264 == 2'b01 || guard__h508264 == 2'b10 || - guard__h508264 == 2'b11) && + (guard__h508265 == 2'b01 || guard__h508265 == 2'b10 || + guard__h508265 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -33397,23 +33397,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h517333 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h517334 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h517333) + case (guard__h517334) 2'b0, 2'b01, 2'b10: - CASE_guard17333_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 = + CASE_guard17334_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard17333_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 = - guard__h517333 == 2'b11 && + CASE_guard17334_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q141 = + guard__h517334 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h517333) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h517334) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33423,12 +33423,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q142 = - (guard__h517333 == 2'b0) ? + (guard__h517334 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h517333 == 2'b01 || guard__h517333 == 2'b10 || - guard__h517333 == 2'b11) && + (guard__h517334 == 2'b01 || guard__h517334 == 2'b10 || + guard__h517334 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -33439,28 +33439,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h577109 or - _theResult___fst_exp__h585070 or _theResult___exp__h585725) + always@(guard__h577110 or + _theResult___fst_exp__h585071 or _theResult___exp__h585726) begin - case (guard__h577109) + case (guard__h577110) 2'b0: - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q152 = - _theResult___fst_exp__h585070; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q152 = + _theResult___fst_exp__h585071; 2'b01, 2'b10, 2'b11: - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q152 = - _theResult___exp__h585725; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q152 = + _theResult___exp__h585726; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h585070 or + _theResult___fst_exp__h585071 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9841 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9839 or - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q152) + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q152) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845 = - _theResult___fst_exp__h585070; + _theResult___fst_exp__h585071; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9841; @@ -33469,42 +33469,42 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9839; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845 = - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q152; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q152; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9845 = 11'd0; endcase end - always@(guard__h577109 or - _theResult___fst_exp__h585070 or - out_exp__h585728 or _theResult___exp__h585725) + always@(guard__h577110 or + _theResult___fst_exp__h585071 or + out_exp__h585729 or _theResult___exp__h585726) begin - case (guard__h577109) + case (guard__h577110) 2'b0, 2'b01: - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q153 = - _theResult___fst_exp__h585070; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q153 = + _theResult___fst_exp__h585071; 2'b10: - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q153 = - out_exp__h585728; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q153 = + out_exp__h585729; 2'b11: - CASE_guard77109_0b0_theResult___fst_exp85070_0_ETC__q153 = - _theResult___exp__h585725; + CASE_guard77110_0b0_theResult___fst_exp85071_0_ETC__q153 = + _theResult___exp__h585726; endcase end - always@(guard__h577109 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h577110 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h577109) + case (guard__h577110) 2'b0, 2'b01, 2'b10: - CASE_guard77109_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 = + CASE_guard77110_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard77109_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 = - guard__h577109 == 2'b11 && + CASE_guard77110_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q154 = + guard__h577110 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h577109) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h577110) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33513,12 +33513,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q155 = - (guard__h577109 == 2'b0) ? + (guard__h577110 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h577109 == 2'b01 || guard__h577109 == 2'b10 || - guard__h577109 == 2'b11) && + (guard__h577110 == 2'b01 || guard__h577110 == 2'b10 || + guard__h577110 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33529,21 +33529,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h586421 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h586422 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h586421) + case (guard__h586422) 2'b0, 2'b01, 2'b10: - CASE_guard86421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 = + CASE_guard86422_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard86421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 = - guard__h586421 == 2'b11 && + CASE_guard86422_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q156 = + guard__h586422 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h586421) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h586422) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33552,12 +33552,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q157 = - (guard__h586421 == 2'b0) ? + (guard__h586422 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h586421 == 2'b01 || guard__h586421 == 2'b10 || - guard__h586421 == 2'b11) && + (guard__h586422 == 2'b01 || guard__h586422 == 2'b10 || + guard__h586422 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33568,21 +33568,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h595490 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h595491 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h595490) + case (guard__h595491) 2'b0, 2'b01, 2'b10: - CASE_guard95490_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 = + CASE_guard95491_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard95490_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 = - guard__h595490 == 2'b11 && + CASE_guard95491_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q158 = + guard__h595491 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595490) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595491) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33591,12 +33591,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q159 = - (guard__h595490 == 2'b0) ? + (guard__h595491 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h595490 == 2'b01 || guard__h595490 == 2'b10 || - guard__h595490 == 2'b11) && + (guard__h595491 == 2'b01 || guard__h595491 == 2'b10 || + guard__h595491 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33607,21 +33607,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h586421 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h586422 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h586421) + case (guard__h586422) 2'b0, 2'b01, 2'b10: - CASE_guard86421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 = + CASE_guard86422_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard86421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 = - guard__h586421 != 2'b11 || + CASE_guard86422_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q160 = + guard__h586422 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h586421) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h586422) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33630,12 +33630,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q161 = - (guard__h586421 == 2'b0) ? + (guard__h586422 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h586421 != 2'b01 && guard__h586421 != 2'b10 && - guard__h586421 != 2'b11 || + guard__h586422 != 2'b01 && guard__h586422 != 2'b10 && + guard__h586422 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33646,21 +33646,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h595490 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h595491 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h595490) + case (guard__h595491) 2'b0, 2'b01, 2'b10: - CASE_guard95490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 = + CASE_guard95491_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard95490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 = - guard__h595490 != 2'b11 || + CASE_guard95491_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q162 = + guard__h595491 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595490) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595491) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33669,12 +33669,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163 = - (guard__h595490 == 2'b0) ? + (guard__h595491 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h595490 != 2'b01 && guard__h595490 != 2'b10 && - guard__h595490 != 2'b11 || + guard__h595491 != 2'b01 && guard__h595491 != 2'b10 && + guard__h595491 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33685,21 +33685,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h577109 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h577110 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h577109) + case (guard__h577110) 2'b0, 2'b01, 2'b10: - CASE_guard77109_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 = + CASE_guard77110_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard77109_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 = - guard__h577109 != 2'b11 || + CASE_guard77110_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q164 = + guard__h577110 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h577109) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h577110) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -33708,12 +33708,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165 = - (guard__h577109 == 2'b0) ? + (guard__h577110 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h577109 != 2'b01 && guard__h577109 != 2'b10 && - guard__h577109 != 2'b11 || + guard__h577110 != 2'b01 && guard__h577110 != 2'b10 && + guard__h577110 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -33724,28 +33724,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h537805 or - _theResult___fst_exp__h545766 or _theResult___exp__h546421) + always@(guard__h537806 or + _theResult___fst_exp__h545767 or _theResult___exp__h546422) begin - case (guard__h537805) + case (guard__h537806) 2'b0: - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q175 = - _theResult___fst_exp__h545766; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q175 = + _theResult___fst_exp__h545767; 2'b01, 2'b10, 2'b11: - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q175 = - _theResult___exp__h546421; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q175 = + _theResult___exp__h546422; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h545766 or + _theResult___fst_exp__h545767 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10611 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10609 or - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q175) + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q175) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615 = - _theResult___fst_exp__h545766; + _theResult___fst_exp__h545767; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10611; @@ -33754,49 +33754,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10609; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615 = - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q175; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q175; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10615 = 11'd0; endcase end - always@(guard__h537805 or - _theResult___fst_exp__h545766 or - out_exp__h546424 or _theResult___exp__h546421) + always@(guard__h537806 or + _theResult___fst_exp__h545767 or + out_exp__h546425 or _theResult___exp__h546422) begin - case (guard__h537805) + case (guard__h537806) 2'b0, 2'b01: - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q176 = - _theResult___fst_exp__h545766; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q176 = + _theResult___fst_exp__h545767; 2'b10: - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q176 = - out_exp__h546424; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q176 = + out_exp__h546425; 2'b11: - CASE_guard37805_0b0_theResult___fst_exp45766_0_ETC__q176 = - _theResult___exp__h546421; + CASE_guard37806_0b0_theResult___fst_exp45767_0_ETC__q176 = + _theResult___exp__h546422; endcase end - always@(guard__h547117 or - _theResult___fst_exp__h555343 or _theResult___exp__h556072) + always@(guard__h547118 or + _theResult___fst_exp__h555344 or _theResult___exp__h556073) begin - case (guard__h547117) + case (guard__h547118) 2'b0: - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q177 = - _theResult___fst_exp__h555343; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q177 = + _theResult___fst_exp__h555344; 2'b01, 2'b10, 2'b11: - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q177 = - _theResult___exp__h556072; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q177 = + _theResult___exp__h556073; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h555343 or + _theResult___fst_exp__h555344 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10649 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10647 or - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q177) + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q177) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653 = - _theResult___fst_exp__h555343; + _theResult___fst_exp__h555344; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10649; @@ -33805,49 +33805,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10647; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653 = - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q177; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q177; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10653 = 11'd0; endcase end - always@(guard__h547117 or - _theResult___fst_exp__h555343 or - out_exp__h556075 or _theResult___exp__h556072) + always@(guard__h547118 or + _theResult___fst_exp__h555344 or + out_exp__h556076 or _theResult___exp__h556073) begin - case (guard__h547117) + case (guard__h547118) 2'b0, 2'b01: - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q178 = - _theResult___fst_exp__h555343; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q178 = + _theResult___fst_exp__h555344; 2'b10: - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q178 = - out_exp__h556075; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q178 = + out_exp__h556076; 2'b11: - CASE_guard47117_0b0_theResult___fst_exp55343_0_ETC__q178 = - _theResult___exp__h556072; + CASE_guard47118_0b0_theResult___fst_exp55344_0_ETC__q178 = + _theResult___exp__h556073; endcase end - always@(guard__h556186 or - _theResult___fst_exp__h564176 or _theResult___exp__h564856) + always@(guard__h556187 or + _theResult___fst_exp__h564177 or _theResult___exp__h564857) begin - case (guard__h556186) + case (guard__h556187) 2'b0: - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q179 = - _theResult___fst_exp__h564176; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q179 = + _theResult___fst_exp__h564177; 2'b01, 2'b10, 2'b11: - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q179 = - _theResult___exp__h564856; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q179 = + _theResult___exp__h564857; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h564176 or + _theResult___fst_exp__h564177 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10680 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10678 or - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q179) + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q179) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684 = - _theResult___fst_exp__h564176; + _theResult___fst_exp__h564177; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10680; @@ -33856,49 +33856,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10678; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684 = - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q179; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q179; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10684 = 11'd0; endcase end - always@(guard__h556186 or - _theResult___fst_exp__h564176 or - out_exp__h564859 or _theResult___exp__h564856) + always@(guard__h556187 or + _theResult___fst_exp__h564177 or + out_exp__h564860 or _theResult___exp__h564857) begin - case (guard__h556186) + case (guard__h556187) 2'b0, 2'b01: - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q180 = - _theResult___fst_exp__h564176; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q180 = + _theResult___fst_exp__h564177; 2'b10: - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q180 = - out_exp__h564859; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q180 = + out_exp__h564860; 2'b11: - CASE_guard56186_0b0_theResult___fst_exp64176_0_ETC__q180 = - _theResult___exp__h564856; + CASE_guard56187_0b0_theResult___fst_exp64177_0_ETC__q180 = + _theResult___exp__h564857; endcase end - always@(guard__h595490 or - _theResult___fst_exp__h603480 or _theResult___exp__h604160) + always@(guard__h595491 or + _theResult___fst_exp__h603481 or _theResult___exp__h604161) begin - case (guard__h595490) + case (guard__h595491) 2'b0: - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q181 = - _theResult___fst_exp__h603480; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q181 = + _theResult___fst_exp__h603481; 2'b01, 2'b10, 2'b11: - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q181 = - _theResult___exp__h604160; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q181 = + _theResult___exp__h604161; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h603480 or + _theResult___fst_exp__h603481 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9910 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9908 or - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q181) + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q181) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914 = - _theResult___fst_exp__h603480; + _theResult___fst_exp__h603481; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9910; @@ -33907,49 +33907,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9908; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914 = - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q181; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q181; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9914 = 11'd0; endcase end - always@(guard__h595490 or - _theResult___fst_exp__h603480 or - out_exp__h604163 or _theResult___exp__h604160) + always@(guard__h595491 or + _theResult___fst_exp__h603481 or + out_exp__h604164 or _theResult___exp__h604161) begin - case (guard__h595490) + case (guard__h595491) 2'b0, 2'b01: - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q182 = - _theResult___fst_exp__h603480; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q182 = + _theResult___fst_exp__h603481; 2'b10: - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q182 = - out_exp__h604163; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q182 = + out_exp__h604164; 2'b11: - CASE_guard95490_0b0_theResult___fst_exp03480_0_ETC__q182 = - _theResult___exp__h604160; + CASE_guard95491_0b0_theResult___fst_exp03481_0_ETC__q182 = + _theResult___exp__h604161; endcase end - always@(guard__h586421 or - _theResult___fst_exp__h594647 or _theResult___exp__h595376) + always@(guard__h586422 or + _theResult___fst_exp__h594648 or _theResult___exp__h595377) begin - case (guard__h586421) + case (guard__h586422) 2'b0: - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q183 = - _theResult___fst_exp__h594647; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q183 = + _theResult___fst_exp__h594648; 2'b01, 2'b10, 2'b11: - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q183 = - _theResult___exp__h595376; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q183 = + _theResult___exp__h595377; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h594647 or + _theResult___fst_exp__h594648 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9879 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9877 or - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q183) + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q183) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883 = - _theResult___fst_exp__h594647; + _theResult___fst_exp__h594648; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9879; @@ -33958,44 +33958,44 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9877; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883 = - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q183; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q183; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9883 = 11'd0; endcase end - always@(guard__h586421 or - _theResult___fst_exp__h594647 or - out_exp__h595379 or _theResult___exp__h595376) + always@(guard__h586422 or + _theResult___fst_exp__h594648 or + out_exp__h595380 or _theResult___exp__h595377) begin - case (guard__h586421) + case (guard__h586422) 2'b0, 2'b01: - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q184 = - _theResult___fst_exp__h594647; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q184 = + _theResult___fst_exp__h594648; 2'b10: - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q184 = - out_exp__h595379; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q184 = + out_exp__h595380; 2'b11: - CASE_guard86421_0b0_theResult___fst_exp94647_0_ETC__q184 = - _theResult___exp__h595376; + CASE_guard86422_0b0_theResult___fst_exp94648_0_ETC__q184 = + _theResult___exp__h595377; endcase end - always@(guard__h537805 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h537806 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h537805) + case (guard__h537806) 2'b0, 2'b01, 2'b10: - CASE_guard37805_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 = + CASE_guard37806_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard37805_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 = - guard__h537805 == 2'b11 && + CASE_guard37806_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q185 = + guard__h537806 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537805) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537806) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34005,12 +34005,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q186 = - (guard__h537805 == 2'b0) ? + (guard__h537806 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h537805 == 2'b01 || guard__h537805 == 2'b10 || - guard__h537805 == 2'b11) && + (guard__h537806 == 2'b01 || guard__h537806 == 2'b10 || + guard__h537806 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34021,23 +34021,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h547117 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h547118 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h547117) + case (guard__h547118) 2'b0, 2'b01, 2'b10: - CASE_guard47117_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 = + CASE_guard47118_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard47117_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 = - guard__h547117 == 2'b11 && + CASE_guard47118_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q187 = + guard__h547118 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h547117) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h547118) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34047,12 +34047,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q188 = - (guard__h547117 == 2'b0) ? + (guard__h547118 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h547117 == 2'b01 || guard__h547117 == 2'b10 || - guard__h547117 == 2'b11) && + (guard__h547118 == 2'b01 || guard__h547118 == 2'b10 || + guard__h547118 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34063,23 +34063,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h556186 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h556187 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h556186) + case (guard__h556187) 2'b0, 2'b01, 2'b10: - CASE_guard56186_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 = + CASE_guard56187_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard56186_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 = - guard__h556186 == 2'b11 && + CASE_guard56187_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q189 = + guard__h556187 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h556186) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h556187) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34089,12 +34089,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q190 = - (guard__h556186 == 2'b0) ? + (guard__h556187 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h556186 == 2'b01 || guard__h556186 == 2'b10 || - guard__h556186 == 2'b11) && + (guard__h556187 == 2'b01 || guard__h556187 == 2'b10 || + guard__h556187 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34105,23 +34105,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h547117 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h547118 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h547117) + case (guard__h547118) 2'b0, 2'b01, 2'b10: - CASE_guard47117_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 = + CASE_guard47118_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard47117_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 = - guard__h547117 != 2'b11 || + CASE_guard47118_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q191 = + guard__h547118 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h547117) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h547118) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34131,12 +34131,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q192 = - (guard__h547117 == 2'b0) ? + (guard__h547118 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h547117 != 2'b01 && guard__h547117 != 2'b10 && - guard__h547117 != 2'b11 || + guard__h547118 != 2'b01 && guard__h547118 != 2'b10 && + guard__h547118 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34147,23 +34147,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h556186 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h556187 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h556186) + case (guard__h556187) 2'b0, 2'b01, 2'b10: - CASE_guard56186_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 = + CASE_guard56187_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard56186_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 = - guard__h556186 != 2'b11 || + CASE_guard56187_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q193 = + guard__h556187 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h556186) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h556187) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34173,12 +34173,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194 = - (guard__h556186 == 2'b0) ? + (guard__h556187 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h556186 != 2'b01 && guard__h556186 != 2'b10 && - guard__h556186 != 2'b11 || + guard__h556187 != 2'b01 && guard__h556187 != 2'b10 && + guard__h556187 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34189,23 +34189,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h537805 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h537806 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h537805) + case (guard__h537806) 2'b0, 2'b01, 2'b10: - CASE_guard37805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 = + CASE_guard37806_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard37805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 = - guard__h537805 != 2'b11 || + CASE_guard37806_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q195 = + guard__h537806 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537805) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537806) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -34215,12 +34215,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196 = - (guard__h537805 == 2'b0) ? + (guard__h537806 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h537805 != 2'b01 && guard__h537805 != 2'b10 && - guard__h537805 != 2'b11 || + guard__h537806 != 2'b01 && guard__h537806 != 2'b10 && + guard__h537806 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -34231,28 +34231,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h537805 or - _theResult___snd__h545717 or _theResult___sfd__h546422) + always@(guard__h537806 or + _theResult___snd__h545718 or _theResult___sfd__h546423) begin - case (guard__h537805) + case (guard__h537806) 2'b0: - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q197 = - _theResult___snd__h545717[56:5]; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q197 = + _theResult___snd__h545718[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q197 = - _theResult___sfd__h546422; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q197 = + _theResult___sfd__h546423; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h545717 or + _theResult___snd__h545718 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10706 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10704 or - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q197) + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q197) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710 = - _theResult___snd__h545717[56:5]; + _theResult___snd__h545718[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10706; @@ -34261,48 +34261,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10704; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710 = - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q197; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q197; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10710 = 52'd0; endcase end - always@(guard__h537805 or - _theResult___snd__h545717 or - out_sfd__h546425 or _theResult___sfd__h546422) + always@(guard__h537806 or + _theResult___snd__h545718 or + out_sfd__h546426 or _theResult___sfd__h546423) begin - case (guard__h537805) + case (guard__h537806) 2'b0, 2'b01: - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q198 = - _theResult___snd__h545717[56:5]; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q198 = + _theResult___snd__h545718[56:5]; 2'b10: - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q198 = - out_sfd__h546425; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q198 = + out_sfd__h546426; 2'b11: - CASE_guard37805_0b0_theResult___snd45717_BITS__ETC__q198 = - _theResult___sfd__h546422; + CASE_guard37806_0b0_theResult___snd45718_BITS__ETC__q198 = + _theResult___sfd__h546423; endcase end - always@(guard__h547117 or sfdin__h555337 or _theResult___sfd__h556073) + always@(guard__h547118 or sfdin__h555338 or _theResult___sfd__h556074) begin - case (guard__h547117) + case (guard__h547118) 2'b0: - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q199 = - sfdin__h555337[56:5]; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q199 = + sfdin__h555338[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q199 = - _theResult___sfd__h556073; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q199 = + _theResult___sfd__h556074; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h555337 or + sfdin__h555338 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10732 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10730 or - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q199) + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q199) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736 = - sfdin__h555337[56:5]; + sfdin__h555338[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10732; @@ -34311,48 +34311,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10730; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736 = - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q199; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q199; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10736 = 52'd0; endcase end - always@(guard__h547117 or - sfdin__h555337 or out_sfd__h556076 or _theResult___sfd__h556073) + always@(guard__h547118 or + sfdin__h555338 or out_sfd__h556077 or _theResult___sfd__h556074) begin - case (guard__h547117) + case (guard__h547118) 2'b0, 2'b01: - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q200 = - sfdin__h555337[56:5]; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q200 = + sfdin__h555338[56:5]; 2'b10: - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q200 = - out_sfd__h556076; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q200 = + out_sfd__h556077; 2'b11: - CASE_guard47117_0b0_sfdin55337_BITS_56_TO_5_0b_ETC__q200 = - _theResult___sfd__h556073; + CASE_guard47118_0b0_sfdin55338_BITS_56_TO_5_0b_ETC__q200 = + _theResult___sfd__h556074; endcase end - always@(guard__h556186 or - _theResult___snd__h564122 or _theResult___sfd__h564857) + always@(guard__h556187 or + _theResult___snd__h564123 or _theResult___sfd__h564858) begin - case (guard__h556186) + case (guard__h556187) 2'b0: - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q201 = - _theResult___snd__h564122[56:5]; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q201 = + _theResult___snd__h564123[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q201 = - _theResult___sfd__h564857; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q201 = + _theResult___sfd__h564858; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h564122 or + _theResult___snd__h564123 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10751 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10749 or - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q201) + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q201) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755 = - _theResult___snd__h564122[56:5]; + _theResult___snd__h564123[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10751; @@ -34361,49 +34361,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10749; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755 = - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q201; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q201; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d10755 = 52'd0; endcase end - always@(guard__h556186 or - _theResult___snd__h564122 or - out_sfd__h564860 or _theResult___sfd__h564857) + always@(guard__h556187 or + _theResult___snd__h564123 or + out_sfd__h564861 or _theResult___sfd__h564858) begin - case (guard__h556186) + case (guard__h556187) 2'b0, 2'b01: - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q202 = - _theResult___snd__h564122[56:5]; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q202 = + _theResult___snd__h564123[56:5]; 2'b10: - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q202 = - out_sfd__h564860; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q202 = + out_sfd__h564861; 2'b11: - CASE_guard56186_0b0_theResult___snd64122_BITS__ETC__q202 = - _theResult___sfd__h564857; + CASE_guard56187_0b0_theResult___snd64123_BITS__ETC__q202 = + _theResult___sfd__h564858; endcase end - always@(guard__h508264 or - _theResult___fst_exp__h516490 or _theResult___exp__h517219) + always@(guard__h508265 or + _theResult___fst_exp__h516491 or _theResult___exp__h517220) begin - case (guard__h508264) + case (guard__h508265) 2'b0: - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q203 = - _theResult___fst_exp__h516490; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q203 = + _theResult___fst_exp__h516491; 2'b01, 2'b10, 2'b11: - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q203 = - _theResult___exp__h517219; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q203 = + _theResult___exp__h517220; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h516490 or + _theResult___fst_exp__h516491 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9169 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9167 or - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q203) + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q203) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9173 = - _theResult___fst_exp__h516490; + _theResult___fst_exp__h516491; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9173 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9169; @@ -34412,49 +34412,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9167; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9173 = - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q203; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q203; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9173 = 11'd0; endcase end - always@(guard__h508264 or - _theResult___fst_exp__h516490 or - out_exp__h517222 or _theResult___exp__h517219) + always@(guard__h508265 or + _theResult___fst_exp__h516491 or + out_exp__h517223 or _theResult___exp__h517220) begin - case (guard__h508264) + case (guard__h508265) 2'b0, 2'b01: - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q204 = - _theResult___fst_exp__h516490; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q204 = + _theResult___fst_exp__h516491; 2'b10: - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q204 = - out_exp__h517222; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q204 = + out_exp__h517223; 2'b11: - CASE_guard08264_0b0_theResult___fst_exp16490_0_ETC__q204 = - _theResult___exp__h517219; + CASE_guard08265_0b0_theResult___fst_exp16491_0_ETC__q204 = + _theResult___exp__h517220; endcase end - always@(guard__h517333 or - _theResult___fst_exp__h525323 or _theResult___exp__h526003) + always@(guard__h517334 or + _theResult___fst_exp__h525324 or _theResult___exp__h526004) begin - case (guard__h517333) + case (guard__h517334) 2'b0: - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q205 = - _theResult___fst_exp__h525323; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q205 = + _theResult___fst_exp__h525324; 2'b01, 2'b10, 2'b11: - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q205 = - _theResult___exp__h526003; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q205 = + _theResult___exp__h526004; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h525323 or + _theResult___fst_exp__h525324 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9200 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9198 or - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q205) + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q205) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9204 = - _theResult___fst_exp__h525323; + _theResult___fst_exp__h525324; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9204 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9200; @@ -34463,49 +34463,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9198; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9204 = - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q205; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q205; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9204 = 11'd0; endcase end - always@(guard__h517333 or - _theResult___fst_exp__h525323 or - out_exp__h526006 or _theResult___exp__h526003) + always@(guard__h517334 or + _theResult___fst_exp__h525324 or + out_exp__h526007 or _theResult___exp__h526004) begin - case (guard__h517333) + case (guard__h517334) 2'b0, 2'b01: - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q206 = - _theResult___fst_exp__h525323; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q206 = + _theResult___fst_exp__h525324; 2'b10: - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q206 = - out_exp__h526006; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q206 = + out_exp__h526007; 2'b11: - CASE_guard17333_0b0_theResult___fst_exp25323_0_ETC__q206 = - _theResult___exp__h526003; + CASE_guard17334_0b0_theResult___fst_exp25324_0_ETC__q206 = + _theResult___exp__h526004; endcase end - always@(guard__h498952 or - _theResult___snd__h506864 or _theResult___sfd__h507569) + always@(guard__h498953 or + _theResult___snd__h506865 or _theResult___sfd__h507570) begin - case (guard__h498952) + case (guard__h498953) 2'b0: - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q207 = - _theResult___snd__h506864[56:5]; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q207 = + _theResult___snd__h506865[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q207 = - _theResult___sfd__h507569; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q207 = + _theResult___sfd__h507570; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h506864 or + _theResult___snd__h506865 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9226 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9224 or - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q207) + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q207) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9230 = - _theResult___snd__h506864[56:5]; + _theResult___snd__h506865[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9230 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9226; @@ -34514,48 +34514,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9224; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9230 = - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q207; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q207; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9230 = 52'd0; endcase end - always@(guard__h498952 or - _theResult___snd__h506864 or - out_sfd__h507572 or _theResult___sfd__h507569) + always@(guard__h498953 or + _theResult___snd__h506865 or + out_sfd__h507573 or _theResult___sfd__h507570) begin - case (guard__h498952) + case (guard__h498953) 2'b0, 2'b01: - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q208 = - _theResult___snd__h506864[56:5]; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q208 = + _theResult___snd__h506865[56:5]; 2'b10: - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q208 = - out_sfd__h507572; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q208 = + out_sfd__h507573; 2'b11: - CASE_guard98952_0b0_theResult___snd06864_BITS__ETC__q208 = - _theResult___sfd__h507569; + CASE_guard98953_0b0_theResult___snd06865_BITS__ETC__q208 = + _theResult___sfd__h507570; endcase end - always@(guard__h508264 or sfdin__h516484 or _theResult___sfd__h517220) + always@(guard__h508265 or sfdin__h516485 or _theResult___sfd__h517221) begin - case (guard__h508264) + case (guard__h508265) 2'b0: - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q209 = - sfdin__h516484[56:5]; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q209 = + sfdin__h516485[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q209 = - _theResult___sfd__h517220; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q209 = + _theResult___sfd__h517221; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h516484 or + sfdin__h516485 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9253 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9251 or - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q209) + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q209) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9257 = - sfdin__h516484[56:5]; + sfdin__h516485[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9257 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9253; @@ -34564,48 +34564,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9251; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9257 = - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q209; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q209; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9257 = 52'd0; endcase end - always@(guard__h508264 or - sfdin__h516484 or out_sfd__h517223 or _theResult___sfd__h517220) + always@(guard__h508265 or + sfdin__h516485 or out_sfd__h517224 or _theResult___sfd__h517221) begin - case (guard__h508264) + case (guard__h508265) 2'b0, 2'b01: - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q210 = - sfdin__h516484[56:5]; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q210 = + sfdin__h516485[56:5]; 2'b10: - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q210 = - out_sfd__h517223; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q210 = + out_sfd__h517224; 2'b11: - CASE_guard08264_0b0_sfdin16484_BITS_56_TO_5_0b_ETC__q210 = - _theResult___sfd__h517220; + CASE_guard08265_0b0_sfdin16485_BITS_56_TO_5_0b_ETC__q210 = + _theResult___sfd__h517221; endcase end - always@(guard__h517333 or - _theResult___snd__h525269 or _theResult___sfd__h526004) + always@(guard__h517334 or + _theResult___snd__h525270 or _theResult___sfd__h526005) begin - case (guard__h517333) + case (guard__h517334) 2'b0: - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q211 = - _theResult___snd__h525269[56:5]; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q211 = + _theResult___snd__h525270[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q211 = - _theResult___sfd__h526004; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q211 = + _theResult___sfd__h526005; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h525269 or + _theResult___snd__h525270 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9272 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9270 or - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q211) + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q211) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9276 = - _theResult___snd__h525269[56:5]; + _theResult___snd__h525270[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9276 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9272; @@ -34614,49 +34614,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9270; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9276 = - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q211; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q211; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9276 = 52'd0; endcase end - always@(guard__h517333 or - _theResult___snd__h525269 or - out_sfd__h526007 or _theResult___sfd__h526004) + always@(guard__h517334 or + _theResult___snd__h525270 or + out_sfd__h526008 or _theResult___sfd__h526005) begin - case (guard__h517333) + case (guard__h517334) 2'b0, 2'b01: - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q212 = - _theResult___snd__h525269[56:5]; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q212 = + _theResult___snd__h525270[56:5]; 2'b10: - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q212 = - out_sfd__h526007; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q212 = + out_sfd__h526008; 2'b11: - CASE_guard17333_0b0_theResult___snd25269_BITS__ETC__q212 = - _theResult___sfd__h526004; + CASE_guard17334_0b0_theResult___snd25270_BITS__ETC__q212 = + _theResult___sfd__h526005; endcase end - always@(guard__h577109 or - _theResult___snd__h585021 or _theResult___sfd__h585726) + always@(guard__h577110 or + _theResult___snd__h585022 or _theResult___sfd__h585727) begin - case (guard__h577109) + case (guard__h577110) 2'b0: - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q213 = - _theResult___snd__h585021[56:5]; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q213 = + _theResult___snd__h585022[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q213 = - _theResult___sfd__h585726; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q213 = + _theResult___sfd__h585727; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h585021 or + _theResult___snd__h585022 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9936 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9934 or - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q213) + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q213) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9940 = - _theResult___snd__h585021[56:5]; + _theResult___snd__h585022[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9940 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9936; @@ -34665,48 +34665,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9934; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9940 = - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q213; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q213; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9940 = 52'd0; endcase end - always@(guard__h577109 or - _theResult___snd__h585021 or - out_sfd__h585729 or _theResult___sfd__h585726) + always@(guard__h577110 or + _theResult___snd__h585022 or + out_sfd__h585730 or _theResult___sfd__h585727) begin - case (guard__h577109) + case (guard__h577110) 2'b0, 2'b01: - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q214 = - _theResult___snd__h585021[56:5]; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q214 = + _theResult___snd__h585022[56:5]; 2'b10: - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q214 = - out_sfd__h585729; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q214 = + out_sfd__h585730; 2'b11: - CASE_guard77109_0b0_theResult___snd85021_BITS__ETC__q214 = - _theResult___sfd__h585726; + CASE_guard77110_0b0_theResult___snd85022_BITS__ETC__q214 = + _theResult___sfd__h585727; endcase end - always@(guard__h586421 or sfdin__h594641 or _theResult___sfd__h595377) + always@(guard__h586422 or sfdin__h594642 or _theResult___sfd__h595378) begin - case (guard__h586421) + case (guard__h586422) 2'b0: - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q215 = - sfdin__h594641[56:5]; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q215 = + sfdin__h594642[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q215 = - _theResult___sfd__h595377; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q215 = + _theResult___sfd__h595378; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h594641 or + sfdin__h594642 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9962 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9960 or - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q215) + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q215) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9966 = - sfdin__h594641[56:5]; + sfdin__h594642[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9966 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9962; @@ -34715,24 +34715,24 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9960; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9966 = - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q215; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q215; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9966 = 52'd0; endcase end - always@(guard__h586421 or - sfdin__h594641 or out_sfd__h595380 or _theResult___sfd__h595377) + always@(guard__h586422 or + sfdin__h594642 or out_sfd__h595381 or _theResult___sfd__h595378) begin - case (guard__h586421) + case (guard__h586422) 2'b0, 2'b01: - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q216 = - sfdin__h594641[56:5]; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q216 = + sfdin__h594642[56:5]; 2'b10: - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q216 = - out_sfd__h595380; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q216 = + out_sfd__h595381; 2'b11: - CASE_guard86421_0b0_sfdin94641_BITS_56_TO_5_0b_ETC__q216 = - _theResult___sfd__h595377; + CASE_guard86422_0b0_sfdin94642_BITS_56_TO_5_0b_ETC__q216 = + _theResult___sfd__h595378; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -34767,28 +34767,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ_first__482_BI_ETC___d10963; endcase end - always@(guard__h595490 or - _theResult___snd__h603426 or _theResult___sfd__h604161) + always@(guard__h595491 or + _theResult___snd__h603427 or _theResult___sfd__h604162) begin - case (guard__h595490) + case (guard__h595491) 2'b0: - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q217 = - _theResult___snd__h603426[56:5]; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q217 = + _theResult___snd__h603427[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q217 = - _theResult___sfd__h604161; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q217 = + _theResult___sfd__h604162; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h603426 or + _theResult___snd__h603427 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9981 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9979 or - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q217) + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q217) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985 = - _theResult___snd__h603426[56:5]; + _theResult___snd__h603427[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9981; @@ -34797,25 +34797,25 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9979; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985 = - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q217; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q217; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__482_ETC___d9985 = 52'd0; endcase end - always@(guard__h595490 or - _theResult___snd__h603426 or - out_sfd__h604164 or _theResult___sfd__h604161) + always@(guard__h595491 or + _theResult___snd__h603427 or + out_sfd__h604165 or _theResult___sfd__h604162) begin - case (guard__h595490) + case (guard__h595491) 2'b0, 2'b01: - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q218 = - _theResult___snd__h603426[56:5]; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q218 = + _theResult___snd__h603427[56:5]; 2'b10: - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q218 = - out_sfd__h604164; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q218 = + out_sfd__h604165; 2'b11: - CASE_guard95490_0b0_theResult___snd03426_BITS__ETC__q218 = - _theResult___sfd__h604161; + CASE_guard95491_0b0_theResult___snd03427_BITS__ETC__q218 = + _theResult___sfd__h604162; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -35139,10 +35139,10 @@ module mkCore(CLK, 4'd11; endcase end - always@(k__h674091 or + always@(k__h674092 or coreFix_aluExe_0_rsAlu$canEnq or coreFix_aluExe_1_rsAlu$canEnq) begin - case (k__h674091) + case (k__h674092) 1'd0: SEL_ARR_coreFix_aluExe_0_rsAlu_canEnq__3543_co_ETC___d13553 = coreFix_aluExe_0_rsAlu$canEnq; @@ -35181,10 +35181,10 @@ module mkCore(CLK, IF_fetchStage_pipelines_0_first__2928_BITS_191_ETC___d13565; endcase end - always@(k__h674091 or + always@(k__h674092 or coreFix_aluExe_0_rsAlu$canEnq or coreFix_aluExe_1_rsAlu$canEnq) begin - case (k__h674091) + case (k__h674092) 1'd0: SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__354_ETC___d13586 = !coreFix_aluExe_0_rsAlu$canEnq; @@ -35330,14 +35330,14 @@ module mkCore(CLK, 12'd2303; endcase end - always@(idx__h689686 or + always@(idx__h689687 or fetchStage$pipelines_0_canDeq or NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13837 or coreFix_aluExe_0_rsAlu$canEnq or NOT_fetchStage_pipelines_0_first__2928_BITS_19_ETC___d13843 or coreFix_aluExe_1_rsAlu$canEnq) begin - case (idx__h689686) + case (idx__h689687) 1'd0: SEL_ARR_fetchStage_pipelines_0_canDeq__2926_AN_ETC___d13862 = fetchStage$pipelines_0_canDeq && @@ -35470,15 +35470,15 @@ module mkCore(CLK, NOT_fetchStage_pipelines_1_first__2937_BITS_19_ETC___d13828; endcase end - always@(k__h674091 or + always@(k__h674092 or coreFix_aluExe_0_rsAlu$RDY_enq or coreFix_aluExe_1_rsAlu$RDY_enq) begin - case (k__h674091) + case (k__h674092) 1'd0: - CASE_k74091_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 = + CASE_k74092_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 = coreFix_aluExe_0_rsAlu$RDY_enq; 1'd1: - CASE_k74091_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 = + CASE_k74092_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q232 = coreFix_aluExe_1_rsAlu$RDY_enq; endcase end @@ -35581,14 +35581,14 @@ module mkCore(CLK, IF_fetchStage_pipelines_0_first__2928_BITS_191_ETC___d13565; endcase end - always@(idx__h689686 or + always@(idx__h689687 or fetchStage$pipelines_0_canDeq or fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d14065 or coreFix_aluExe_0_rsAlu$canEnq or fetchStage_pipelines_0_first__2928_BITS_194_TO_ETC___d14072 or coreFix_aluExe_1_rsAlu$canEnq) begin - case (idx__h689686) + case (idx__h689687) 1'd0: SEL_ARR_NOT_fetchStage_pipelines_0_canDeq__292_ETC___d14076 = (!fetchStage$pipelines_0_canDeq || @@ -39060,21 +39060,21 @@ module mkCore(CLK, coreFix_aluExe_1_regToExeQ$first[395] && (basicExec___d12101[65:2] != coreFix_aluExe_1_regToExeQ$first[112:49] || - coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626443)) + coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626444)) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_1_doExeAlu && coreFix_aluExe_1_regToExeQ$first[395] && (basicExec___d12101[65:2] != coreFix_aluExe_1_regToExeQ$first[112:49] || - coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626443)) + coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626444)) $display("Dynamic assertion failed: \"../../src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv\", line 283, column 84\nCsr inst ppc = pc+4"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_1_doExeAlu && coreFix_aluExe_1_regToExeQ$first[395] && (basicExec___d12101[65:2] != coreFix_aluExe_1_regToExeQ$first[112:49] || - coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626443)) + coreFix_aluExe_1_regToExeQ$first[112:49] != y__h626444)) $finish(32'd0); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_0_doExeAlu && @@ -39111,21 +39111,21 @@ module mkCore(CLK, coreFix_aluExe_0_regToExeQ$first[395] && (basicExec___d12775[65:2] != coreFix_aluExe_0_regToExeQ$first[112:49] || - coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648779)) + coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648780)) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_0_doExeAlu && coreFix_aluExe_0_regToExeQ$first[395] && (basicExec___d12775[65:2] != coreFix_aluExe_0_regToExeQ$first[112:49] || - coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648779)) + coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648780)) $display("Dynamic assertion failed: \"../../src_Core/RISCY_OOO/procs/RV64G_OOO/AluExePipeline.bsv\", line 283, column 84\nCsr inst ppc = pc+4"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_0_doExeAlu && coreFix_aluExe_0_regToExeQ$first[395] && (basicExec___d12775[65:2] != coreFix_aluExe_0_regToExeQ$first[112:49] || - coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648779)) + coreFix_aluExe_0_regToExeQ$first[112:49] != y__h648780)) $finish(32'd0); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_coreFix_aluExe_1_doRegReadAlu && @@ -39921,15 +39921,15 @@ module mkCore(CLK, $finish(32'd0); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h609618 == 2'd0) + v__h609619 == 2'd0) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h609618 == 2'd0) + v__h609619 == 2'd0) $display("Dynamic assertion failed: \"../../src_Core/RISCY_OOO/fpgautils/lib/XilinxIntMul.bsv\", line 172, column 38\ncredit underflow"); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h609618 == 2'd0) + v__h609619 == 2'd0) $finish(32'd0); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_renameStage_doRenaming_SystemInst && diff --git a/src_Core/CPU/CsrFile.bsv b/src_Core/CPU/CsrFile.bsv index 6a3db30..f6f18a9 100644 --- a/src_Core/CPU/CsrFile.bsv +++ b/src_Core/CPU/CsrFile.bsv @@ -474,6 +474,11 @@ module mkCsrFile #(Data hartid)(CsrFile); software_int_pend_vec[prvM], readOnlyReg(1'b0), software_int_pend_vec[prvS], readOnlyReg(1'b0) // only if misa.N: software_int_pend_vec[prvU] ); + // MIP and MIE fields are WARL (Write Any Read Legal) + // We support M-privilege and S-privilege bits only; + // this mask allows only those bits through. + Data mip_mie_warl_mask = zeroExtend (12'h_aaa); + // minstret Ehr#(2, Data) minstret_ehr <- mkCsrEhr(0); Reg#(Data) minstret_csr = minstret_ehr[0]; @@ -810,8 +815,8 @@ module mkCsrFile #(Data hartid)(CsrFile); CSRmtvec: { x[63:2], 1'b0, x[0]}; CSRmedeleg: { 48'b0, x[15], 1'b0, x[13:12], x[11], 1'b0, x[9:0]}; CSRmideleg: { 52'b0, x[11], 1'b0, x[9:8], x[7], 1'b0, x[5:4], x[3], 1'b0, x[1:0]}; - CSRmip: { 52'b0, x[11], 1'b0, x[9:8], x[7], 1'b0, x[5:4], x[3], 1'b0, x[1:0]}; - CSRmie: { 52'b0, x[11], 1'b0, x[9:8], x[7], 1'b0, x[5:4], x[3], 1'b0, x[1:0]}; + CSRmip: (x & mip_mie_warl_mask); + CSRmie: (x & mip_mie_warl_mask); CSRmcounteren: { 61'b0, x[2:0]}; CSRmcause: { x[63], 59'b0, x[3:0] }; diff --git a/src_SSITH_P3/Verilog_RTL/mkCore.v b/src_SSITH_P3/Verilog_RTL/mkCore.v index 4a78ad7..1768535 100644 --- a/src_SSITH_P3/Verilog_RTL/mkCore.v +++ b/src_SSITH_P3/Verilog_RTL/mkCore.v @@ -4514,36 +4514,36 @@ module mkCore(CLK, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9944, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2875, - addr__h290067, - curData__h192916, - data_out__h737644, + addr__h290068, + curData__h192917, + data_out__h737401, data_warl_xformed__h722429, rVal1__h609051, rVal1__h633779, trap_val__h710482, - x__h197126, + x__h197127, x__h723033; reg [51 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19, - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217, - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218, - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219, - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220, - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205, - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206, - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207, - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208, - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209, - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210, - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221, - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222, - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223, - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224, - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225, - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226, - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215, - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216, + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217, + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218, + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219, + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220, + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205, + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206, + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207, + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208, + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209, + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210, + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221, + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222, + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223, + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224, + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225, + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226, + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215, + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644, @@ -4555,45 +4555,45 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874; reg [31 : 0] SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_071_ETC___d1348, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_31_TO_0_ETC___d1398; - reg [22 : 0] CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82, - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83, - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86, - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87, - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88, - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89, - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119, - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120, - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49, - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50, - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117, - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118, - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47, - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48, - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121, - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122, - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51, - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52, - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123, - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124, - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53, - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54, - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84, - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85, - _theResult___fst_sfd__h346068, - _theResult___fst_sfd__h354791, - _theResult___fst_sfd__h363373, - _theResult___fst_sfd__h372557, - _theResult___fst_sfd__h381193, - _theResult___fst_sfd__h391767, - _theResult___fst_sfd__h400488, - _theResult___fst_sfd__h409070, - _theResult___fst_sfd__h418254, - _theResult___fst_sfd__h426890, - _theResult___fst_sfd__h437462, - _theResult___fst_sfd__h446183, - _theResult___fst_sfd__h454765, - _theResult___fst_sfd__h463949, - _theResult___fst_sfd__h472585; + reg [22 : 0] CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82, + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83, + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86, + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87, + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88, + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89, + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119, + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120, + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49, + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50, + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117, + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118, + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47, + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48, + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121, + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122, + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51, + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52, + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123, + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124, + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53, + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54, + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84, + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85, + _theResult___fst_sfd__h346069, + _theResult___fst_sfd__h354792, + _theResult___fst_sfd__h363374, + _theResult___fst_sfd__h372558, + _theResult___fst_sfd__h381194, + _theResult___fst_sfd__h391768, + _theResult___fst_sfd__h400489, + _theResult___fst_sfd__h409071, + _theResult___fst_sfd__h418255, + _theResult___fst_sfd__h426891, + _theResult___fst_sfd__h437463, + _theResult___fst_sfd__h446184, + _theResult___fst_sfd__h454766, + _theResult___fst_sfd__h463950, + _theResult___fst_sfd__h472586; reg [20 : 0] CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_15_ETC__q285, CASE_coreFix_aluExe_0_regToExeQfirst_BITS_416_ETC__q231, CASE_coreFix_aluExe_0_rsAludispatchData_BITS__ETC__q282, @@ -4622,24 +4622,24 @@ module mkCore(CLK, reg [10 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q14, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18, - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211, - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212, - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213, - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214, - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183, - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184, - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185, - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186, - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187, - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188, - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160, - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161, - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189, - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190, - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191, - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192, - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143, - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144, + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211, + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212, + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213, + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214, + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183, + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184, + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185, + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186, + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187, + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188, + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160, + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161, + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189, + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190, + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191, + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192, + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143, + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573, @@ -4649,47 +4649,47 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803; - reg [7 : 0] CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67, - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68, - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75, - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76, - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80, - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81, - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104, - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105, - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34, - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35, - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102, - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103, - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32, - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33, - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110, - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111, - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40, - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41, - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115, - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116, - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45, - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46, - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69, - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70, + reg [7 : 0] CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67, + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68, + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75, + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76, + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80, + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81, + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104, + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105, + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34, + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35, + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102, + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103, + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32, + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33, + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110, + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111, + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40, + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41, + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115, + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116, + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45, + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46, + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69, + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70, SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_071_ETC___d1373, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_7_TO_0__ETC___d1420, - _theResult___fst_exp__h346067, - _theResult___fst_exp__h354790, - _theResult___fst_exp__h363372, - _theResult___fst_exp__h372556, - _theResult___fst_exp__h381192, - _theResult___fst_exp__h391766, - _theResult___fst_exp__h400487, - _theResult___fst_exp__h409069, - _theResult___fst_exp__h418253, - _theResult___fst_exp__h426889, - _theResult___fst_exp__h437461, - _theResult___fst_exp__h446182, - _theResult___fst_exp__h454764, - _theResult___fst_exp__h463948, - _theResult___fst_exp__h472584; + _theResult___fst_exp__h346068, + _theResult___fst_exp__h354791, + _theResult___fst_exp__h363373, + _theResult___fst_exp__h372557, + _theResult___fst_exp__h381193, + _theResult___fst_exp__h391767, + _theResult___fst_exp__h400488, + _theResult___fst_exp__h409070, + _theResult___fst_exp__h418254, + _theResult___fst_exp__h426890, + _theResult___fst_exp__h437462, + _theResult___fst_exp__h446183, + _theResult___fst_exp__h454765, + _theResult___fst_exp__h463949, + _theResult___fst_exp__h472585; reg [5 : 0] CASE_mmioToPlatform_pRq_enq_x_BITS_37_TO_36_0__ETC__q280, CASE_mmio_cRqQ_data_0_BITS_77_TO_76_0_mmio_cRq_ETC__q9, CASE_mmio_dataReqQ_data_0_BITS_77_TO_76_0_mmio_ETC__q276, @@ -4727,8 +4727,8 @@ module mkCore(CLK, CASE_fetchStagepipelines_0_first_BITS_177_TO__ETC__q233, CASE_fetchStagepipelines_1_first_BITS_177_TO__ETC__q236, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10717, - x__h285846, - x__h291616; + x__h285847, + x__h291617; reg [1 : 0] CASE_commitStage_f_rob_dataD_OUT_BITS_97_TO_9_ETC__q249, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q299, @@ -4766,45 +4766,45 @@ module mkCore(CLK, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q237, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q238, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q242, - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93, - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92, - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95, - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94, - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97, - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96, - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125, - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56, - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55, - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128, - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58, - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57, - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130, - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129, - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60, - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59, - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132, - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131, - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62, - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61, - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91, - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90, - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93, + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92, + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95, + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94, + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97, + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96, + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125, + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56, + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55, + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128, + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58, + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57, + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130, + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129, + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60, + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59, + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132, + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131, + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62, + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61, + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91, + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90, + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, CASE_k69625_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q239, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459, @@ -4877,19 +4877,19 @@ module mkCore(CLK, wire [517 : 0] SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2945; wire [511 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2208, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2938, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076; wire [463 : 0] commitStage_f_rob_data_first__4755_BIT_167_485_ETC___d14927; - wire [457 : 0] rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292; + wire [457 : 0] rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298; wire [447 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008; wire [393 : 0] IF_commitStage_f_rob_data_first__4755_BITS_97__ETC___d14926; wire [383 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2929, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067; wire [321 : 0] basicExec___d11943, basicExec___d12617; wire [319 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003; wire [255 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2920, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058; wire [191 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998; wire [144 : 0] coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1706; wire [68 : 0] execFpuSimple___d11056; @@ -4927,21 +4927,21 @@ module mkCore(CLK, IF_coreFix_memExe_lsq_firstLd__277_BIT_96_342__ETC___d1425, IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8, IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15191, - _theResult___fst__h603370, - _theResult___snd__h603371, - a___1__h603089, - a___1__h603375, - a__h602948, + _theResult___fst__h603371, + _theResult___snd__h603372, + a___1__h603090, + a___1__h603376, + a__h602949, amoExec___d880, - b___1__h603090, - b___1__h603420, - b__h602949, + b___1__h603091, + b___1__h603421, + b__h602950, base__h712403, base__h712423, - commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, - data___1__h475008, - data___1__h475816, - data__h475282, + commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, + data___1__h475009, + data___1__h475817, + data__h475283, fcsr_csr__read__h609377, fflags_csr__read__h609352, frm_csr__read__h609363, @@ -4953,58 +4953,58 @@ module mkCore(CLK, mip_csr__read__h611252, mstatus_csr__read__h610223, mtvec_csr__read__h610672, - n___1__h198529, - n__h194454, + n___1__h198530, + n__h194455, n__read__h611356, n__read__h611547, - n__read__h6759, - n__read__h726937, + n__read__h6760, + n__read__h726694, next_pc__h722452, pc__h712387, - q___1__h475881, - rVal1__h481761, - rVal2__h481762, - r___1__h475907, - res_data__h337869, - res_data__h337874, - res_data__h383571, - res_data__h383576, - res_data__h429266, - res_data__h429271, - resp_addr__h291971, + q___1__h475882, + rVal1__h481762, + rVal2__h481763, + r___1__h475908, + res_data__h337870, + res_data__h337875, + res_data__h383572, + res_data__h383577, + res_data__h429267, + res_data__h429272, + resp_addr__h291972, rg_tdata1__read__h612207, robdeqPort_0_deq_data_BITS_95_TO_32__q245, satp_csr__read__h610080, scause_csr__read__h609877, scounteren_csr__read__h609739, - shiftData__h181567, + shiftData__h181568, sie_csr__read__h609643, sip_csr__read__h610017, sstatus_csr__read__h609573, stvec_csr__read__h609686, trap_val__h709444, - upd__h3993, - upd__h5310, - upd__h6873, - upd__h727048, + upd__h3994, + upd__h5311, + upd__h6874, + upd__h726805, v__h607935, v__h632818, - x__h153731, - x__h157278, - x__h160092, - x__h161940, - x__h181476, + x__h153732, + x__h157279, + x__h160093, + x__h161941, x__h181477, - x__h18385, - x__h183902, - x__h20923, - x__h287291, - x__h289145, - x__h46292, - x__h481670, + x__h181478, + x__h18386, + x__h183903, + x__h20924, + x__h287292, + x__h289146, + x__h46293, x__h481671, x__h481672, - x__h48828, + x__h481673, + x__h48829, x__h617232, x__h617233, x__h639741, @@ -5012,30 +5012,30 @@ module mkCore(CLK, x__h702377, x__h714645, x__h714837, - x__h726431, - x__h729900, - x__h733045, - x_addr__h314074, - x_quotient__h475196, + x__h726188, + x__h729657, + x__h732802, + x_addr__h314075, + x_quotient__h475197, x_reg_ifc__read__h609482, - x_remainder__h475197, - y__h730732, - y__h733553, - y_avValue__h180564, - y_avValue__h181170, - y_avValue__h478806, - y_avValue__h479414, - y_avValue__h480016, + x_remainder__h475198, + y__h730489, + y__h733310, + y_avValue__h180565, + y_avValue__h181171, + y_avValue__h478807, + y_avValue__h479415, + y_avValue__h480017, y_avValue__h608841, y_avValue__h615057, y_avValue__h633571, y_avValue__h637576, y_avValue_new_pc__h712179, y_avValue_new_pc__h712365, - y_avValue_snd_snd_snd_snd_snd_fst__h730755, - y_avValue_snd_snd_snd_snd_snd_fst__h733614, - y_avValue_snd_snd_snd_snd_snd_fst__h733650, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027; + y_avValue_snd_snd_snd_snd_snd_fst__h730512, + y_avValue_snd_snd_snd_snd_snd_fst__h733371, + y_avValue_snd_snd_snd_snd_snd_fst__h733407, + y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784; wire [62 : 0] IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10652, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9882, IF_csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_c_ETC___d14920, @@ -5086,7 +5086,7 @@ module mkCore(CLK, r1__read__h614367, r1__read__h614397, r1__read__h614514, - y__h254803; + y__h254804; wire [56 : 0] IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98, @@ -5114,154 +5114,154 @@ module mkCore(CLK, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342, - _theResult____h346085, - _theResult____h363724, - _theResult____h391784, - _theResult____h409421, - _theResult____h437479, - _theResult____h455116, - _theResult____h502869, - _theResult____h541722, - _theResult____h581026, - _theResult___snd__h354207, - _theResult___snd__h354218, - _theResult___snd__h354220, - _theResult___snd__h354230, - _theResult___snd__h354236, - _theResult___snd__h354259, - _theResult___snd__h362803, - _theResult___snd__h362805, - _theResult___snd__h362812, - _theResult___snd__h362818, - _theResult___snd__h362841, - _theResult___snd__h371973, - _theResult___snd__h371984, - _theResult___snd__h371986, - _theResult___snd__h371996, - _theResult___snd__h372002, - _theResult___snd__h372025, - _theResult___snd__h380593, - _theResult___snd__h380607, - _theResult___snd__h380613, - _theResult___snd__h380631, - _theResult___snd__h399904, - _theResult___snd__h399915, - _theResult___snd__h399917, - _theResult___snd__h399927, - _theResult___snd__h399933, - _theResult___snd__h399956, - _theResult___snd__h408500, - _theResult___snd__h408502, - _theResult___snd__h408509, - _theResult___snd__h408515, - _theResult___snd__h408538, - _theResult___snd__h417670, - _theResult___snd__h417681, - _theResult___snd__h417683, - _theResult___snd__h417693, - _theResult___snd__h417699, - _theResult___snd__h417722, - _theResult___snd__h426290, - _theResult___snd__h426304, - _theResult___snd__h426310, - _theResult___snd__h426328, - _theResult___snd__h445599, - _theResult___snd__h445610, - _theResult___snd__h445612, - _theResult___snd__h445622, - _theResult___snd__h445628, - _theResult___snd__h445651, - _theResult___snd__h454195, - _theResult___snd__h454197, - _theResult___snd__h454204, - _theResult___snd__h454210, - _theResult___snd__h454233, - _theResult___snd__h463365, - _theResult___snd__h463376, - _theResult___snd__h463378, - _theResult___snd__h463388, - _theResult___snd__h463394, - _theResult___snd__h463417, - _theResult___snd__h471985, - _theResult___snd__h471999, - _theResult___snd__h472005, - _theResult___snd__h472023, - _theResult___snd__h501479, - _theResult___snd__h501481, - _theResult___snd__h501488, - _theResult___snd__h501494, - _theResult___snd__h501517, - _theResult___snd__h511116, - _theResult___snd__h511127, - _theResult___snd__h511129, - _theResult___snd__h511139, - _theResult___snd__h511145, - _theResult___snd__h511168, - _theResult___snd__h519884, - _theResult___snd__h519898, - _theResult___snd__h519904, - _theResult___snd__h519922, - _theResult___snd__h540332, - _theResult___snd__h540334, - _theResult___snd__h540341, - _theResult___snd__h540347, - _theResult___snd__h540370, - _theResult___snd__h549969, - _theResult___snd__h549980, - _theResult___snd__h549982, - _theResult___snd__h549992, - _theResult___snd__h549998, - _theResult___snd__h550021, - _theResult___snd__h558737, - _theResult___snd__h558751, - _theResult___snd__h558757, - _theResult___snd__h558775, - _theResult___snd__h579636, - _theResult___snd__h579638, - _theResult___snd__h579645, - _theResult___snd__h579651, - _theResult___snd__h579674, - _theResult___snd__h589273, - _theResult___snd__h589284, - _theResult___snd__h589286, - _theResult___snd__h589296, - _theResult___snd__h589302, - _theResult___snd__h589325, - _theResult___snd__h598041, - _theResult___snd__h598055, - _theResult___snd__h598061, - _theResult___snd__h598079, + _theResult____h346086, + _theResult____h363725, + _theResult____h391785, + _theResult____h409422, + _theResult____h437480, + _theResult____h455117, + _theResult____h502870, + _theResult____h541723, + _theResult____h581027, + _theResult___snd__h354208, + _theResult___snd__h354219, + _theResult___snd__h354221, + _theResult___snd__h354231, + _theResult___snd__h354237, + _theResult___snd__h354260, + _theResult___snd__h362804, + _theResult___snd__h362806, + _theResult___snd__h362813, + _theResult___snd__h362819, + _theResult___snd__h362842, + _theResult___snd__h371974, + _theResult___snd__h371985, + _theResult___snd__h371987, + _theResult___snd__h371997, + _theResult___snd__h372003, + _theResult___snd__h372026, + _theResult___snd__h380594, + _theResult___snd__h380608, + _theResult___snd__h380614, + _theResult___snd__h380632, + _theResult___snd__h399905, + _theResult___snd__h399916, + _theResult___snd__h399918, + _theResult___snd__h399928, + _theResult___snd__h399934, + _theResult___snd__h399957, + _theResult___snd__h408501, + _theResult___snd__h408503, + _theResult___snd__h408510, + _theResult___snd__h408516, + _theResult___snd__h408539, + _theResult___snd__h417671, + _theResult___snd__h417682, + _theResult___snd__h417684, + _theResult___snd__h417694, + _theResult___snd__h417700, + _theResult___snd__h417723, + _theResult___snd__h426291, + _theResult___snd__h426305, + _theResult___snd__h426311, + _theResult___snd__h426329, + _theResult___snd__h445600, + _theResult___snd__h445611, + _theResult___snd__h445613, + _theResult___snd__h445623, + _theResult___snd__h445629, + _theResult___snd__h445652, + _theResult___snd__h454196, + _theResult___snd__h454198, + _theResult___snd__h454205, + _theResult___snd__h454211, + _theResult___snd__h454234, + _theResult___snd__h463366, + _theResult___snd__h463377, + _theResult___snd__h463379, + _theResult___snd__h463389, + _theResult___snd__h463395, + _theResult___snd__h463418, + _theResult___snd__h471986, + _theResult___snd__h472000, + _theResult___snd__h472006, + _theResult___snd__h472024, + _theResult___snd__h501480, + _theResult___snd__h501482, + _theResult___snd__h501489, + _theResult___snd__h501495, + _theResult___snd__h501518, + _theResult___snd__h511117, + _theResult___snd__h511128, + _theResult___snd__h511130, + _theResult___snd__h511140, + _theResult___snd__h511146, + _theResult___snd__h511169, + _theResult___snd__h519885, + _theResult___snd__h519899, + _theResult___snd__h519905, + _theResult___snd__h519923, + _theResult___snd__h540333, + _theResult___snd__h540335, + _theResult___snd__h540342, + _theResult___snd__h540348, + _theResult___snd__h540371, + _theResult___snd__h549970, + _theResult___snd__h549981, + _theResult___snd__h549983, + _theResult___snd__h549993, + _theResult___snd__h549999, + _theResult___snd__h550022, + _theResult___snd__h558738, + _theResult___snd__h558752, + _theResult___snd__h558758, + _theResult___snd__h558776, + _theResult___snd__h579637, + _theResult___snd__h579639, + _theResult___snd__h579646, + _theResult___snd__h579652, + _theResult___snd__h579675, + _theResult___snd__h589274, + _theResult___snd__h589285, + _theResult___snd__h589287, + _theResult___snd__h589297, + _theResult___snd__h589303, + _theResult___snd__h589326, + _theResult___snd__h598042, + _theResult___snd__h598056, + _theResult___snd__h598062, + _theResult___snd__h598080, r1__read__h614233, r1__read__h614369, r1__read__h614399, r1__read__h614516, - result__h364337, - result__h410034, - result__h455729, - result__h503482, - result__h542335, - result__h581639, - sfd__h338480, - sfd__h384182, - sfd__h429877, - sfd__h482502, - sfd__h521496, - sfd__h560800, - sfdin__h354190, - sfdin__h371956, - sfdin__h399887, - sfdin__h417653, - sfdin__h445582, - sfdin__h463348, - sfdin__h511099, - sfdin__h549952, - sfdin__h589256, - x__h364434, - x__h410131, - x__h455826, - x__h503577, - x__h542430, - x__h581734; + result__h364338, + result__h410035, + result__h455730, + result__h503483, + result__h542336, + result__h581640, + sfd__h338481, + sfd__h384183, + sfd__h429878, + sfd__h482503, + sfd__h521497, + sfd__h560801, + sfdin__h354191, + sfdin__h371957, + sfdin__h399888, + sfdin__h417654, + sfdin__h445583, + sfdin__h463349, + sfdin__h511100, + sfdin__h549953, + sfdin__h589257, + x__h364435, + x__h410132, + x__h455827, + x__h503578, + x__h542431, + x__h581735; wire [55 : 0] r1__read__h613060, r1__read__h613464, r1__read__h613998, @@ -5278,18 +5278,18 @@ module mkCore(CLK, r1__read__h614371, r1__read__h614405, r1__read__h614522, - sfd__h501546, - sfd__h511197, - sfd__h519957, - sfd__h540399, - sfd__h550050, - sfd__h558810, - sfd__h579703, - sfd__h589354, - sfd__h598114, - value__h346707, - value__h392404, - value__h438099; + sfd__h501547, + sfd__h511198, + sfd__h519958, + sfd__h540400, + sfd__h550051, + sfd__h558811, + sfd__h579704, + sfd__h589355, + sfd__h598115, + value__h346708, + value__h392405, + value__h438100; wire [52 : 0] r1__read__h614239, r1__read__h614348, r1__read__h614373, @@ -5316,66 +5316,66 @@ module mkCore(CLK, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881, - _theResult___fst_sfd__h486456, - _theResult___fst_sfd__h502284, - _theResult___fst_sfd__h502287, - _theResult___fst_sfd__h511935, - _theResult___fst_sfd__h511938, - _theResult___fst_sfd__h520719, - _theResult___fst_sfd__h520722, - _theResult___fst_sfd__h520731, - _theResult___fst_sfd__h520737, - _theResult___fst_sfd__h525309, - _theResult___fst_sfd__h541137, - _theResult___fst_sfd__h541140, - _theResult___fst_sfd__h550788, - _theResult___fst_sfd__h550791, - _theResult___fst_sfd__h559572, - _theResult___fst_sfd__h559575, - _theResult___fst_sfd__h559584, - _theResult___fst_sfd__h559590, - _theResult___fst_sfd__h564613, - _theResult___fst_sfd__h580441, - _theResult___fst_sfd__h580444, - _theResult___fst_sfd__h590092, - _theResult___fst_sfd__h590095, - _theResult___fst_sfd__h598876, - _theResult___fst_sfd__h598879, - _theResult___fst_sfd__h598888, - _theResult___fst_sfd__h598894, - _theResult___sfd__h502184, - _theResult___sfd__h511835, - _theResult___sfd__h520619, - _theResult___sfd__h541037, - _theResult___sfd__h550688, - _theResult___sfd__h559472, - _theResult___sfd__h580341, - _theResult___sfd__h589992, - _theResult___sfd__h598776, - _theResult___snd_fst_sfd__h482456, - _theResult___snd_fst_sfd__h502290, - _theResult___snd_fst_sfd__h520725, - _theResult___snd_fst_sfd__h521450, - _theResult___snd_fst_sfd__h541143, - _theResult___snd_fst_sfd__h559578, - _theResult___snd_fst_sfd__h560754, - _theResult___snd_fst_sfd__h580447, - _theResult___snd_fst_sfd__h598882, - out___1_sfd__h482204, - out___1_sfd__h521198, - out___1_sfd__h560502, - out_sfd__h502187, - out_sfd__h511838, - out_sfd__h520622, - out_sfd__h541040, - out_sfd__h550691, - out_sfd__h559475, - out_sfd__h580344, - out_sfd__h589995, - out_sfd__h598779; + _theResult___fst_sfd__h486457, + _theResult___fst_sfd__h502285, + _theResult___fst_sfd__h502288, + _theResult___fst_sfd__h511936, + _theResult___fst_sfd__h511939, + _theResult___fst_sfd__h520720, + _theResult___fst_sfd__h520723, + _theResult___fst_sfd__h520732, + _theResult___fst_sfd__h520738, + _theResult___fst_sfd__h525310, + _theResult___fst_sfd__h541138, + _theResult___fst_sfd__h541141, + _theResult___fst_sfd__h550789, + _theResult___fst_sfd__h550792, + _theResult___fst_sfd__h559573, + _theResult___fst_sfd__h559576, + _theResult___fst_sfd__h559585, + _theResult___fst_sfd__h559591, + _theResult___fst_sfd__h564614, + _theResult___fst_sfd__h580442, + _theResult___fst_sfd__h580445, + _theResult___fst_sfd__h590093, + _theResult___fst_sfd__h590096, + _theResult___fst_sfd__h598877, + _theResult___fst_sfd__h598880, + _theResult___fst_sfd__h598889, + _theResult___fst_sfd__h598895, + _theResult___sfd__h502185, + _theResult___sfd__h511836, + _theResult___sfd__h520620, + _theResult___sfd__h541038, + _theResult___sfd__h550689, + _theResult___sfd__h559473, + _theResult___sfd__h580342, + _theResult___sfd__h589993, + _theResult___sfd__h598777, + _theResult___snd_fst_sfd__h482457, + _theResult___snd_fst_sfd__h502291, + _theResult___snd_fst_sfd__h520726, + _theResult___snd_fst_sfd__h521451, + _theResult___snd_fst_sfd__h541144, + _theResult___snd_fst_sfd__h559579, + _theResult___snd_fst_sfd__h560755, + _theResult___snd_fst_sfd__h580448, + _theResult___snd_fst_sfd__h598883, + out___1_sfd__h482205, + out___1_sfd__h521199, + out___1_sfd__h560503, + out_sfd__h502188, + out_sfd__h511839, + out_sfd__h520623, + out_sfd__h541041, + out_sfd__h550692, + out_sfd__h559476, + out_sfd__h580345, + out_sfd__h589996, + out_sfd__h598780; wire [50 : 0] r1__read__h613064, r1__read__h614241; wire [49 : 0] r1__read__h614350; - wire [48 : 0] r1__read_BITS_62_TO_14___h729920, + wire [48 : 0] r1__read_BITS_62_TO_14___h729677, r1__read__h613066, r1__read__h614352; wire [46 : 0] r1__read__h613068, r1__read__h614245; @@ -5391,36 +5391,36 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10, - data75282_BITS_31_TO_0__q13, + data75283_BITS_31_TO_0__q13, imm__h655329, r1__read__h613076, r1__read__h614259, - x__h193679, - x__h337884, - x__h383586, - x__h429281, - x__h76237, - x_data__h66086, + x__h193680, + x__h337885, + x__h383587, + x__h429282, + x__h76238, + x_data__h66087, x_data_imm__h676657, x_data_imm__h692711; wire [29 : 0] r1__read__h613078, r1__read__h614261; wire [27 : 0] r1__read__h614263; wire [24 : 0] NOT_fetchStage_pipelines_0_first__2757_BITS_19_ETC___d14166, - sfd__h354288, - sfd__h362870, - sfd__h372054, - sfd__h380666, - sfd__h399985, - sfd__h408567, - sfd__h417751, - sfd__h426363, - sfd__h445680, - sfd__h454262, - sfd__h463446, - sfd__h472058, - value__h487085, - value__h525938, - value__h565242; + sfd__h354289, + sfd__h362871, + sfd__h372055, + sfd__h380667, + sfd__h399986, + sfd__h408568, + sfd__h417752, + sfd__h426364, + sfd__h445681, + sfd__h454263, + sfd__h463447, + sfd__h472059, + value__h487086, + value__h525939, + value__h565243; wire [22 : 0] IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349, @@ -5445,66 +5445,66 @@ module mkCore(CLK, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808, - _theResult___fst_sfd__h354794, - _theResult___fst_sfd__h363376, - _theResult___fst_sfd__h372560, - _theResult___fst_sfd__h381196, - _theResult___fst_sfd__h381205, - _theResult___fst_sfd__h381211, - _theResult___fst_sfd__h400491, - _theResult___fst_sfd__h409073, - _theResult___fst_sfd__h418257, - _theResult___fst_sfd__h426893, - _theResult___fst_sfd__h426902, - _theResult___fst_sfd__h426908, - _theResult___fst_sfd__h446186, - _theResult___fst_sfd__h454768, - _theResult___fst_sfd__h463952, - _theResult___fst_sfd__h472588, - _theResult___fst_sfd__h472597, - _theResult___fst_sfd__h472603, - _theResult___sfd__h354713, - _theResult___sfd__h363295, - _theResult___sfd__h372479, - _theResult___sfd__h381115, - _theResult___sfd__h381217, - _theResult___sfd__h400410, - _theResult___sfd__h408992, - _theResult___sfd__h418176, - _theResult___sfd__h426812, - _theResult___sfd__h426914, - _theResult___sfd__h446105, - _theResult___sfd__h454687, - _theResult___sfd__h463871, - _theResult___sfd__h472507, - _theResult___sfd__h472609, - _theResult___snd_fst_sfd__h338430, - _theResult___snd_fst_sfd__h363379, - _theResult___snd_fst_sfd__h381199, - _theResult___snd_fst_sfd__h384132, - _theResult___snd_fst_sfd__h409076, - _theResult___snd_fst_sfd__h426896, - _theResult___snd_fst_sfd__h429827, - _theResult___snd_fst_sfd__h454771, - _theResult___snd_fst_sfd__h472591, - f1_sfd__h482141, - f2_sfd__h521135, - f3_sfd__h560439, - out_f_sfd__h381494, - out_f_sfd__h427191, - out_f_sfd__h472886, - out_sfd__h354716, - out_sfd__h363298, - out_sfd__h372482, - out_sfd__h381118, - out_sfd__h400413, - out_sfd__h408995, - out_sfd__h418179, - out_sfd__h426815, - out_sfd__h446108, - out_sfd__h454690, - out_sfd__h463874, - out_sfd__h472510; + _theResult___fst_sfd__h354795, + _theResult___fst_sfd__h363377, + _theResult___fst_sfd__h372561, + _theResult___fst_sfd__h381197, + _theResult___fst_sfd__h381206, + _theResult___fst_sfd__h381212, + _theResult___fst_sfd__h400492, + _theResult___fst_sfd__h409074, + _theResult___fst_sfd__h418258, + _theResult___fst_sfd__h426894, + _theResult___fst_sfd__h426903, + _theResult___fst_sfd__h426909, + _theResult___fst_sfd__h446187, + _theResult___fst_sfd__h454769, + _theResult___fst_sfd__h463953, + _theResult___fst_sfd__h472589, + _theResult___fst_sfd__h472598, + _theResult___fst_sfd__h472604, + _theResult___sfd__h354714, + _theResult___sfd__h363296, + _theResult___sfd__h372480, + _theResult___sfd__h381116, + _theResult___sfd__h381218, + _theResult___sfd__h400411, + _theResult___sfd__h408993, + _theResult___sfd__h418177, + _theResult___sfd__h426813, + _theResult___sfd__h426915, + _theResult___sfd__h446106, + _theResult___sfd__h454688, + _theResult___sfd__h463872, + _theResult___sfd__h472508, + _theResult___sfd__h472610, + _theResult___snd_fst_sfd__h338431, + _theResult___snd_fst_sfd__h363380, + _theResult___snd_fst_sfd__h381200, + _theResult___snd_fst_sfd__h384133, + _theResult___snd_fst_sfd__h409077, + _theResult___snd_fst_sfd__h426897, + _theResult___snd_fst_sfd__h429828, + _theResult___snd_fst_sfd__h454772, + _theResult___snd_fst_sfd__h472592, + f1_sfd__h482142, + f2_sfd__h521136, + f3_sfd__h560440, + out_f_sfd__h381495, + out_f_sfd__h427192, + out_f_sfd__h472887, + out_sfd__h354717, + out_sfd__h363299, + out_sfd__h372483, + out_sfd__h381119, + out_sfd__h400414, + out_sfd__h408996, + out_sfd__h418180, + out_sfd__h426816, + out_sfd__h446109, + out_sfd__h454691, + out_sfd__h463875, + out_sfd__h472511; wire [19 : 0] r1__read__h614198; wire [15 : 0] IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824, _theResult____h651118, @@ -5513,7 +5513,7 @@ module mkCore(CLK, pend_ints__h651116, y__h651655; wire [13 : 0] r1__read_BITS_13_TO_0___h651665; - wire [12 : 0] IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282, + wire [12 : 0] IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288, fetchStage_pipelines_1_first__2766_BIT_173_358_ETC___d13676, rob_deqPort_0_deq_data__4339_BIT_181_4414_CONC_ETC___d14505; wire [11 : 0] IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10431, @@ -5551,12 +5551,12 @@ module mkCore(CLK, result__h646746, spec_bits__h688398, w__h646690, - x__h364467, - x__h410164, - x__h455859, - x__h503610, - x__h542463, - x__h581767, + x__h364468, + x__h410165, + x__h455860, + x__h503611, + x__h542464, + x__h581768, x__h646694, x__h646745, y__h646724, @@ -5585,102 +5585,102 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q140, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q157, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q180, - _theResult___exp__h502183, - _theResult___exp__h511834, - _theResult___exp__h520618, - _theResult___exp__h541036, - _theResult___exp__h550687, - _theResult___exp__h559471, - _theResult___exp__h580340, - _theResult___exp__h589991, - _theResult___exp__h598775, - _theResult___fst_exp__h486455, - _theResult___fst_exp__h501519, - _theResult___fst_exp__h501525, - _theResult___fst_exp__h501528, - _theResult___fst_exp__h502283, - _theResult___fst_exp__h502286, - _theResult___fst_exp__h511105, - _theResult___fst_exp__h511170, - _theResult___fst_exp__h511176, - _theResult___fst_exp__h511179, - _theResult___fst_exp__h511934, - _theResult___fst_exp__h511937, - _theResult___fst_exp__h519890, - _theResult___fst_exp__h519929, - _theResult___fst_exp__h519935, - _theResult___fst_exp__h519938, - _theResult___fst_exp__h520718, - _theResult___fst_exp__h520721, - _theResult___fst_exp__h520730, - _theResult___fst_exp__h520733, - _theResult___fst_exp__h525308, - _theResult___fst_exp__h540372, - _theResult___fst_exp__h540378, - _theResult___fst_exp__h540381, - _theResult___fst_exp__h541136, - _theResult___fst_exp__h541139, - _theResult___fst_exp__h549958, - _theResult___fst_exp__h550023, - _theResult___fst_exp__h550029, - _theResult___fst_exp__h550032, - _theResult___fst_exp__h550787, - _theResult___fst_exp__h550790, - _theResult___fst_exp__h558743, - _theResult___fst_exp__h558782, - _theResult___fst_exp__h558788, - _theResult___fst_exp__h558791, - _theResult___fst_exp__h559571, - _theResult___fst_exp__h559574, - _theResult___fst_exp__h559583, - _theResult___fst_exp__h559586, - _theResult___fst_exp__h564612, - _theResult___fst_exp__h579676, - _theResult___fst_exp__h579682, - _theResult___fst_exp__h579685, - _theResult___fst_exp__h580440, - _theResult___fst_exp__h580443, - _theResult___fst_exp__h589262, - _theResult___fst_exp__h589327, - _theResult___fst_exp__h589333, - _theResult___fst_exp__h589336, - _theResult___fst_exp__h590091, - _theResult___fst_exp__h590094, - _theResult___fst_exp__h598047, - _theResult___fst_exp__h598086, - _theResult___fst_exp__h598092, - _theResult___fst_exp__h598095, - _theResult___fst_exp__h598875, - _theResult___fst_exp__h598878, - _theResult___fst_exp__h598887, - _theResult___fst_exp__h598890, - _theResult___snd_fst_exp__h502289, - _theResult___snd_fst_exp__h520724, - _theResult___snd_fst_exp__h541142, - _theResult___snd_fst_exp__h559577, - _theResult___snd_fst_exp__h580446, - _theResult___snd_fst_exp__h598881, + _theResult___exp__h502184, + _theResult___exp__h511835, + _theResult___exp__h520619, + _theResult___exp__h541037, + _theResult___exp__h550688, + _theResult___exp__h559472, + _theResult___exp__h580341, + _theResult___exp__h589992, + _theResult___exp__h598776, + _theResult___fst_exp__h486456, + _theResult___fst_exp__h501520, + _theResult___fst_exp__h501526, + _theResult___fst_exp__h501529, + _theResult___fst_exp__h502284, + _theResult___fst_exp__h502287, + _theResult___fst_exp__h511106, + _theResult___fst_exp__h511171, + _theResult___fst_exp__h511177, + _theResult___fst_exp__h511180, + _theResult___fst_exp__h511935, + _theResult___fst_exp__h511938, + _theResult___fst_exp__h519891, + _theResult___fst_exp__h519930, + _theResult___fst_exp__h519936, + _theResult___fst_exp__h519939, + _theResult___fst_exp__h520719, + _theResult___fst_exp__h520722, + _theResult___fst_exp__h520731, + _theResult___fst_exp__h520734, + _theResult___fst_exp__h525309, + _theResult___fst_exp__h540373, + _theResult___fst_exp__h540379, + _theResult___fst_exp__h540382, + _theResult___fst_exp__h541137, + _theResult___fst_exp__h541140, + _theResult___fst_exp__h549959, + _theResult___fst_exp__h550024, + _theResult___fst_exp__h550030, + _theResult___fst_exp__h550033, + _theResult___fst_exp__h550788, + _theResult___fst_exp__h550791, + _theResult___fst_exp__h558744, + _theResult___fst_exp__h558783, + _theResult___fst_exp__h558789, + _theResult___fst_exp__h558792, + _theResult___fst_exp__h559572, + _theResult___fst_exp__h559575, + _theResult___fst_exp__h559584, + _theResult___fst_exp__h559587, + _theResult___fst_exp__h564613, + _theResult___fst_exp__h579677, + _theResult___fst_exp__h579683, + _theResult___fst_exp__h579686, + _theResult___fst_exp__h580441, + _theResult___fst_exp__h580444, + _theResult___fst_exp__h589263, + _theResult___fst_exp__h589328, + _theResult___fst_exp__h589334, + _theResult___fst_exp__h589337, + _theResult___fst_exp__h590092, + _theResult___fst_exp__h590095, + _theResult___fst_exp__h598048, + _theResult___fst_exp__h598087, + _theResult___fst_exp__h598093, + _theResult___fst_exp__h598096, + _theResult___fst_exp__h598876, + _theResult___fst_exp__h598879, + _theResult___fst_exp__h598888, + _theResult___fst_exp__h598891, + _theResult___snd_fst_exp__h502290, + _theResult___snd_fst_exp__h520725, + _theResult___snd_fst_exp__h541143, + _theResult___snd_fst_exp__h559578, + _theResult___snd_fst_exp__h580447, + _theResult___snd_fst_exp__h598882, coreFix_fpuMulDivExe_0_fpuExec_double_divresp_ETC__q71, coreFix_fpuMulDivExe_0_fpuExec_double_fmaresp_ETC__q36, coreFix_fpuMulDivExe_0_fpuExec_double_sqrtres_ETC__q106, - din_inc___2_exp__h520778, - din_inc___2_exp__h520813, - din_inc___2_exp__h520839, - din_inc___2_exp__h559631, - din_inc___2_exp__h559666, - din_inc___2_exp__h559692, - din_inc___2_exp__h598935, - din_inc___2_exp__h598970, - din_inc___2_exp__h598996, - out_exp__h502186, - out_exp__h511837, - out_exp__h520621, - out_exp__h541039, - out_exp__h550690, - out_exp__h559474, - out_exp__h580343, - out_exp__h589994, - out_exp__h598778; + din_inc___2_exp__h520779, + din_inc___2_exp__h520814, + din_inc___2_exp__h520840, + din_inc___2_exp__h559632, + din_inc___2_exp__h559667, + din_inc___2_exp__h559693, + din_inc___2_exp__h598936, + din_inc___2_exp__h598971, + din_inc___2_exp__h598997, + out_exp__h502187, + out_exp__h511838, + out_exp__h520622, + out_exp__h541040, + out_exp__h550691, + out_exp__h559475, + out_exp__h580344, + out_exp__h589995, + out_exp__h598779; wire [8 : 0] IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656; @@ -5711,123 +5711,123 @@ module mkCore(CLK, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q77, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q42, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q112, - _theResult___exp__h354712, - _theResult___exp__h363294, - _theResult___exp__h372478, - _theResult___exp__h381114, - _theResult___exp__h381216, - _theResult___exp__h400409, - _theResult___exp__h408991, - _theResult___exp__h418175, - _theResult___exp__h426811, - _theResult___exp__h426913, - _theResult___exp__h446104, - _theResult___exp__h454686, - _theResult___exp__h463870, - _theResult___exp__h472506, - _theResult___exp__h472608, - _theResult___fst_exp__h354196, - _theResult___fst_exp__h354261, - _theResult___fst_exp__h354267, - _theResult___fst_exp__h354270, - _theResult___fst_exp__h354793, - _theResult___fst_exp__h362843, - _theResult___fst_exp__h362849, - _theResult___fst_exp__h362852, - _theResult___fst_exp__h363375, - _theResult___fst_exp__h371962, - _theResult___fst_exp__h372027, - _theResult___fst_exp__h372033, - _theResult___fst_exp__h372036, - _theResult___fst_exp__h372559, - _theResult___fst_exp__h380599, - _theResult___fst_exp__h380638, - _theResult___fst_exp__h380644, - _theResult___fst_exp__h380647, - _theResult___fst_exp__h381195, - _theResult___fst_exp__h381204, - _theResult___fst_exp__h381207, - _theResult___fst_exp__h399893, - _theResult___fst_exp__h399958, - _theResult___fst_exp__h399964, - _theResult___fst_exp__h399967, - _theResult___fst_exp__h400490, - _theResult___fst_exp__h408540, - _theResult___fst_exp__h408546, - _theResult___fst_exp__h408549, - _theResult___fst_exp__h409072, - _theResult___fst_exp__h417659, - _theResult___fst_exp__h417724, - _theResult___fst_exp__h417730, - _theResult___fst_exp__h417733, - _theResult___fst_exp__h418256, - _theResult___fst_exp__h426296, - _theResult___fst_exp__h426335, - _theResult___fst_exp__h426341, - _theResult___fst_exp__h426344, - _theResult___fst_exp__h426892, - _theResult___fst_exp__h426901, - _theResult___fst_exp__h426904, - _theResult___fst_exp__h445588, - _theResult___fst_exp__h445653, - _theResult___fst_exp__h445659, - _theResult___fst_exp__h445662, - _theResult___fst_exp__h446185, - _theResult___fst_exp__h454235, - _theResult___fst_exp__h454241, - _theResult___fst_exp__h454244, - _theResult___fst_exp__h454767, - _theResult___fst_exp__h463354, - _theResult___fst_exp__h463419, - _theResult___fst_exp__h463425, - _theResult___fst_exp__h463428, - _theResult___fst_exp__h463951, - _theResult___fst_exp__h471991, - _theResult___fst_exp__h472030, - _theResult___fst_exp__h472036, - _theResult___fst_exp__h472039, - _theResult___fst_exp__h472587, - _theResult___fst_exp__h472596, - _theResult___fst_exp__h472599, - _theResult___snd_fst_exp__h363378, - _theResult___snd_fst_exp__h381198, - _theResult___snd_fst_exp__h409075, - _theResult___snd_fst_exp__h426895, - _theResult___snd_fst_exp__h454770, - _theResult___snd_fst_exp__h472590, - din_inc___2_exp__h381229, - din_inc___2_exp__h381253, - din_inc___2_exp__h381283, - din_inc___2_exp__h381307, - din_inc___2_exp__h426926, - din_inc___2_exp__h426950, - din_inc___2_exp__h426980, - din_inc___2_exp__h427004, - din_inc___2_exp__h472621, - din_inc___2_exp__h472645, - din_inc___2_exp__h472675, - din_inc___2_exp__h472699, - f1_exp82140_MINUS_127__q136, - f1_exp__h482140, - f2_exp21134_MINUS_127__q176, - f2_exp__h521134, - f3_exp60438_MINUS_127__q153, - f3_exp__h560438, - out_exp__h354715, - out_exp__h363297, - out_exp__h372481, - out_exp__h381117, - out_exp__h400412, - out_exp__h408994, - out_exp__h418178, - out_exp__h426814, - out_exp__h446107, - out_exp__h454689, - out_exp__h463873, - out_exp__h472509, - out_f_exp__h381493, - out_f_exp__h427190, - out_f_exp__h472885, + _theResult___exp__h354713, + _theResult___exp__h363295, + _theResult___exp__h372479, + _theResult___exp__h381115, + _theResult___exp__h381217, + _theResult___exp__h400410, + _theResult___exp__h408992, + _theResult___exp__h418176, + _theResult___exp__h426812, + _theResult___exp__h426914, + _theResult___exp__h446105, + _theResult___exp__h454687, + _theResult___exp__h463871, + _theResult___exp__h472507, + _theResult___exp__h472609, + _theResult___fst_exp__h354197, + _theResult___fst_exp__h354262, + _theResult___fst_exp__h354268, + _theResult___fst_exp__h354271, + _theResult___fst_exp__h354794, + _theResult___fst_exp__h362844, + _theResult___fst_exp__h362850, + _theResult___fst_exp__h362853, + _theResult___fst_exp__h363376, + _theResult___fst_exp__h371963, + _theResult___fst_exp__h372028, + _theResult___fst_exp__h372034, + _theResult___fst_exp__h372037, + _theResult___fst_exp__h372560, + _theResult___fst_exp__h380600, + _theResult___fst_exp__h380639, + _theResult___fst_exp__h380645, + _theResult___fst_exp__h380648, + _theResult___fst_exp__h381196, + _theResult___fst_exp__h381205, + _theResult___fst_exp__h381208, + _theResult___fst_exp__h399894, + _theResult___fst_exp__h399959, + _theResult___fst_exp__h399965, + _theResult___fst_exp__h399968, + _theResult___fst_exp__h400491, + _theResult___fst_exp__h408541, + _theResult___fst_exp__h408547, + _theResult___fst_exp__h408550, + _theResult___fst_exp__h409073, + _theResult___fst_exp__h417660, + _theResult___fst_exp__h417725, + _theResult___fst_exp__h417731, + _theResult___fst_exp__h417734, + _theResult___fst_exp__h418257, + _theResult___fst_exp__h426297, + _theResult___fst_exp__h426336, + _theResult___fst_exp__h426342, + _theResult___fst_exp__h426345, + _theResult___fst_exp__h426893, + _theResult___fst_exp__h426902, + _theResult___fst_exp__h426905, + _theResult___fst_exp__h445589, + _theResult___fst_exp__h445654, + _theResult___fst_exp__h445660, + _theResult___fst_exp__h445663, + _theResult___fst_exp__h446186, + _theResult___fst_exp__h454236, + _theResult___fst_exp__h454242, + _theResult___fst_exp__h454245, + _theResult___fst_exp__h454768, + _theResult___fst_exp__h463355, + _theResult___fst_exp__h463420, + _theResult___fst_exp__h463426, + _theResult___fst_exp__h463429, + _theResult___fst_exp__h463952, + _theResult___fst_exp__h471992, + _theResult___fst_exp__h472031, + _theResult___fst_exp__h472037, + _theResult___fst_exp__h472040, + _theResult___fst_exp__h472588, + _theResult___fst_exp__h472597, + _theResult___fst_exp__h472600, + _theResult___snd_fst_exp__h363379, + _theResult___snd_fst_exp__h381199, + _theResult___snd_fst_exp__h409076, + _theResult___snd_fst_exp__h426896, + _theResult___snd_fst_exp__h454771, + _theResult___snd_fst_exp__h472591, + din_inc___2_exp__h381230, + din_inc___2_exp__h381254, + din_inc___2_exp__h381284, + din_inc___2_exp__h381308, + din_inc___2_exp__h426927, + din_inc___2_exp__h426951, + din_inc___2_exp__h426981, + din_inc___2_exp__h427005, + din_inc___2_exp__h472622, + din_inc___2_exp__h472646, + din_inc___2_exp__h472676, + din_inc___2_exp__h472700, + f1_exp82141_MINUS_127__q136, + f1_exp__h482141, + f2_exp21135_MINUS_127__q176, + f2_exp__h521135, + f3_exp60439_MINUS_127__q153, + f3_exp__h560439, + out_exp__h354716, + out_exp__h363298, + out_exp__h372482, + out_exp__h381118, + out_exp__h400413, + out_exp__h408995, + out_exp__h418179, + out_exp__h426815, + out_exp__h446108, + out_exp__h454690, + out_exp__h463874, + out_exp__h472510, + out_f_exp__h381494, + out_f_exp__h427191, + out_f_exp__h472886, x__h613035; wire [5 : 0] IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639, @@ -5848,11 +5848,11 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262, IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2144, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096, - x__h181699, + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102, + x__h181700, x__h712418; wire [4 : 0] IF_fetchStage_pipelines_1_first__2766_BITS_194_ETC___d14306, - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664, + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5169, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6561, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7953, @@ -5870,25 +5870,25 @@ module mkCore(CLK, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7965, checkForException___d13008, checkForException___d13698, - fflags__h728257, - fflags__h730910, - fflags__h733530, - old_fflags__h733017, - po_fflags__h728242, - po_fflags__h730895, + fflags__h728014, + fflags__h730667, + fflags__h733287, + old_fflags__h732774, + po_fflags__h727999, + po_fflags__h730652, r1__read__h614601, - res_fflags__h337870, - res_fflags__h383572, - res_fflags__h429267, + res_fflags__h337871, + res_fflags__h383573, + res_fflags__h429268, rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, rs1__h655328, - x__h153725, - x__h157272, - x__h160088, - x__h287279, - y_avValue_fst__h730270, - y_avValue_fst__h733435, - y_avValue_fst__h733467; + x__h153726, + x__h157273, + x__h160089, + x__h287280, + y_avValue_fst__h730027, + y_avValue_fst__h733192, + y_avValue_fst__h733224; wire [3 : 0] IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1851, IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1853, IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1855, @@ -5920,72 +5920,72 @@ module mkCore(CLK, wire [2 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2539, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2793, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1212, - _theResult_____2__h296521, + _theResult_____2__h296522, dcsr_cause__h708962, - next_deqP___1__h296800, - v__h295941, - v__h296172, - x__h302151, + next_deqP___1__h296801, + v__h295942, + v__h296173, + x__h302152, x_decodeInfo_frm__h655012; wire [1 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1208, - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683, - IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139, - IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74, - IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99, - IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179, - IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29, - IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109, - IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39, - IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156, - IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64, - IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135, - IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66, - IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142, - IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79, - IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175, - IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101, - IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182, - IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31, - IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114, - IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152, - IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44, - IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159, - guard__h346095, - guard__h354804, - guard__h363734, - guard__h372570, - guard__h391794, - guard__h400501, - guard__h409431, - guard__h418267, - guard__h437489, - guard__h446196, - guard__h455126, - guard__h463962, - guard__h493567, - guard__h502879, - guard__h511948, - guard__h532420, - guard__h541732, - guard__h550801, - guard__h571724, - guard__h581036, - guard__h590105, - prv__h735199, - prv__h735243, + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689, + IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139, + IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74, + IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99, + IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179, + IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29, + IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109, + IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39, + IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156, + IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64, + IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135, + IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66, + IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142, + IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79, + IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175, + IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101, + IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182, + IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31, + IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114, + IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152, + IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44, + IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159, + guard__h346096, + guard__h354805, + guard__h363735, + guard__h372571, + guard__h391795, + guard__h400502, + guard__h409432, + guard__h418268, + guard__h437490, + guard__h446197, + guard__h455127, + guard__h463963, + guard__h493568, + guard__h502880, + guard__h511949, + guard__h532421, + guard__h541733, + guard__h550802, + guard__h571725, + guard__h581037, + guard__h590106, + prv__h734956, + prv__h735000, r1__read_BITS_13_TO_12___h655197, - sbIdx__h157151, - v__h603883, - v__h603893, - v__h604528, + sbIdx__h157152, + v__h603884, + v__h603894, + v__h604529, x__h722556, - x__h733794, + x__h733551, x_prv__h712487, x_prv__h723013, - y_avValue_snd_snd_snd_fst__h730745, - y_avValue_snd_snd_snd_fst__h733604, - y_avValue_snd_snd_snd_fst__h733640; + y_avValue_snd_snd_snd_fst__h730502, + y_avValue_snd_snd_snd_fst__h733361, + y_avValue_snd_snd_snd_fst__h733397; wire IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5069, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5119, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6461, @@ -6065,7 +6065,7 @@ module mkCore(CLK, IF_NOT_fetchStage_pipelines_0_canDeq__2755_275_ETC___d13916, IF_NOT_fetchStage_pipelines_1_first__2766_BITS_ETC___d13831, IF_NOT_fetchStage_pipelines_1_first__2766_BITS_ETC___d13915, - IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674, + IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10472, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10705, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900, @@ -6188,7 +6188,7 @@ module mkCore(CLK, IF_mmio_dataRespQ_enqReq_lat_1_whas__92_THEN_m_ETC___d201, IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmio_p_ETC___d642, IF_mmio_pRsQ_enqReq_lat_1_whas__82_THEN_mmio_p_ETC___d491, - IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675, + IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5221, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5249, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d6613, @@ -6198,7 +6198,7 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13344, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13422, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13725, - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680, + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807, @@ -6218,7 +6218,7 @@ module mkCore(CLK, NOT_commitStage_commitTrap_4347_BIT_36_4589_45_ETC___d14695, NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15005, NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15016, - NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368, + NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374, NOT_coreFix_aluExe_0_bypassWire_0_whas__2202_2_ETC___d12229, NOT_coreFix_aluExe_0_bypassWire_0_whas__2202_2_ETC___d12257, NOT_coreFix_aluExe_1_bypassWire_0_whas__1342_1_ETC___d11369, @@ -6326,10 +6326,10 @@ module mkCore(CLK, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13736, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13878, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13896, - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356, - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658, + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362, + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664, NOT_rob_deqPort_0_deq_data__4339_BITS_329_TO_3_ETC___d14993, - NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353, + NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359, NOT_specTagManager_canClaim__3401_3492_OR_NOT__ETC___d14007, NOT_specTagManager_canClaim__3401_3492_OR_NOT__ETC___d14074, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132, @@ -6425,11 +6425,11 @@ module mkCore(CLK, _dor1sbAggr$EN_setReady_3_put, _dor1sbCons$EN_setReady_0_put, _dor1sbCons$EN_setReady_1_put, - _theResult_____2__h304517, - _theResult_____2__h310511, - _theResult_____2__h318365, - _theResult_____2__h328709, - _theResult_____2__h331934, + _theResult_____2__h304518, + _theResult_____2__h310512, + _theResult_____2__h318366, + _theResult_____2__h328710, + _theResult_____2__h331935, commitStage_commitTrap_4347_BIT_36_4589_AND_co_ETC___d14654, coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12205, coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12244, @@ -6540,7 +6540,7 @@ module mkCore(CLK, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13734, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13876, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13894, - f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893, + f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899, fetchStage_RDY_pipelines_1_deq__2769_AND_NOT_f_ETC___d14078, fetchStage_pipelines_0_canDeq__2755_AND_NOT_fe_ETC___d14018, fetchStage_pipelines_0_canDeq__2755_AND_NOT_fe_ETC___d14100, @@ -6565,12 +6565,12 @@ module mkCore(CLK, fetchStage_pipelines_0_first__2757_BIT_68_2786_ETC___d13835, fetchStage_pipelines_1_first__2766_BITS_194_TO_ETC___d13973, fetchStage_pipelines_1_first__2766_BITS_199_TO_ETC___d13985, - guard__h364332, - guard__h410029, - guard__h455724, - guard__h503477, - guard__h542330, - guard__h581634, + guard__h364333, + guard__h410030, + guard__h455725, + guard__h503478, + guard__h542331, + guard__h581635, idx__h685370, k__h669625, mmio_cRqQ_enqReq_dummy2_2_read__32_AND_IF_mmio_ETC___d444, @@ -6585,12 +6585,12 @@ module mkCore(CLK, mmio_pRqQ_empty_53_AND_epochManager_checkEpoch_ETC___d14094, mmio_pRqQ_enqReq_dummy2_2_read__35_AND_IF_mmio_ETC___d747, mmio_pRsQ_enqReq_dummy2_2_read__94_AND_IF_mmio_ETC___d606, - msip__h76122, - next_deqP___1__h304796, - next_deqP___1__h311077, - next_deqP___1__h318931, - next_deqP___1__h328988, - next_deqP___1__h332213, + msip__h76123, + next_deqP___1__h304797, + next_deqP___1__h311078, + next_deqP___1__h318932, + next_deqP___1__h328989, + next_deqP___1__h332214, r1__read_BIT_20___h655893, regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13309, regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13941, @@ -6616,24 +6616,24 @@ module mkCore(CLK, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13799, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13840, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13920, - rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729, + rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735, rob_RDY_deqPort_0_deq__4336_AND_rob_RDY_deqPor_ETC___d14998, sbCons_lazyLookup_2_get_coreFix_fpuMulDivExe_0_ETC___d8294, sbCons_lazyLookup_2_get_coreFix_fpuMulDivExe_0_ETC___d8295, sbCons_lazyLookup_3_get_coreFix_memExe_dispToR_ETC___d1632, - tsr_val__h726551, - tvm_val__h726553, - v__h299286, - v__h299804, - v__h309800, - v__h310031, - v__h313676, - v__h313907, - v__h328277, - v__h328508, - v__h331502, - v__h331733, - x__h603384; + tsr_val__h726308, + tvm_val__h726310, + v__h299287, + v__h299805, + v__h309801, + v__h310032, + v__h313677, + v__h313908, + v__h328278, + v__h328509, + v__h331503, + v__h331734, + x__h603385; // action method coreReq_start assign RDY_coreReq_start = 1'd1 ; @@ -6674,7 +6674,7 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q265, !CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q266, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076 } ; assign RDY_dCacheToParent_rsToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_empty ; @@ -6694,7 +6694,7 @@ module mkCore(CLK, assign dCacheToParent_rqToP_first = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q272, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q273, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102 } ; assign RDY_dCacheToParent_rqToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_empty ; @@ -9895,7 +9895,7 @@ module mkCore(CLK, // rule RL_readyToFetch assign CAN_FIRE_RL_readyToFetch = fetchStage$RDY_done_flushing && - rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729 && + rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735 && !flush_brpred && fetchStage$iMemIfc_flush_done && fetchStage$flush_predictors_done ; @@ -9992,7 +9992,7 @@ module mkCore(CLK, // rule RL_rl_debug_csr_write assign CAN_FIRE_RL_rl_debug_csr_write = f_csr_reqs$EMPTY_N && - f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893 && + f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899 && rg_core_run_state == 2'd1 && f_csr_reqs$D_OUT[76] ; assign WILL_FIRE_RL_rl_debug_csr_write = CAN_FIRE_RL_rl_debug_csr_write ; @@ -10446,8 +10446,8 @@ module mkCore(CLK, // rule RL_commitStage_doCommitNormalInst assign CAN_FIRE_RL_commitStage_doCommitNormalInst = rob$RDY_deqPort_0_deq_data && - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356 && - NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368 ; + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362 && + NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374 ; assign WILL_FIRE_RL_commitStage_doCommitNormalInst = CAN_FIRE_RL_commitStage_doCommitNormalInst && !WILL_FIRE_RL_commitStage_rl_send_tv_reset ; @@ -11743,7 +11743,7 @@ module mkCore(CLK, f_csr_reqs$D_OUT[75:64] == 12'd836 ; assign MUX_csrf_fflags_reg$write_1__SEL_1 = WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 ; + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 ; assign MUX_csrf_fflags_reg$write_1__SEL_2 = WILL_FIRE_RL_commitStage_doCommitSystemInst && rob$deqPort_0_deq_data[329:325] == 5'd13 && @@ -12033,7 +12033,7 @@ module mkCore(CLK, assign MUX_commitStage_rg_serial_num$write_1__VAL_1 = commitStage_rg_serial_num + 64'd1 ; assign MUX_commitStage_rg_serial_num$write_1__VAL_3 = - commitStage_rg_serial_num + y__h733553 ; + commitStage_rg_serial_num + y__h733310 ; assign MUX_coreFix_aluExe_0_rsAlu$enq_1__VAL_1 = { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2757_BITS_194_ETC___d12883, @@ -12159,7 +12159,7 @@ module mkCore(CLK, IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd0) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$deqWrite_2__VAL_4 = { IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2713, @@ -12173,10 +12173,10 @@ module mkCore(CLK, assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_1 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq[147:84], - x__h285846 } ; + x__h285847 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_2 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, - x__h287291, + x__h287292, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_3 = { 518'h1AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, @@ -12184,7 +12184,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_4 = { 2'd2, - addr__h290067, + addr__h290068, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2945 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_processAmo$write_1__VAL_1 = { 1'd1, @@ -12197,12 +12197,12 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getSucc } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_1 = - { x__h153725, x__h153731, 84'h82AAAAAAAAAAAAAAAAAAA } ; + { x__h153726, x__h153732, 84'h82AAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_2 = - { x__h157272, x__h157278, 84'hCAAAAAAAAAAAAAAAAAAAA } ; + { x__h157273, x__h157279, 84'hCAAAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_3 = - { x__h160088, - x__h160092, + { x__h160089, + x__h160093, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1208, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1212, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1216, @@ -12213,7 +12213,7 @@ module mkCore(CLK, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1238, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1242, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1247, - x__h161940, + x__h161941, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1255, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1259, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1263, @@ -12226,7 +12226,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[576:574] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, - resp_addr__h291971, + resp_addr__h291972, 2'd0, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getData } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_2 = @@ -12234,8 +12234,8 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getRq, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getData } ; assign MUX_coreFix_memExe_dTlb$updateVMInfo_1__VAL_1 = - { prv__h735243, - prv__h735243 != 2'd3 && csrf_vm_mode_sv39_reg, + { prv__h735000, + prv__h735000 != 2'd3 && csrf_vm_mode_sv39_reg, csrf_mxr_reg, csrf_sum_reg, csrf_ppn_reg } ; @@ -12312,7 +12312,7 @@ module mkCore(CLK, assign MUX_coreFix_memExe_memRespLdQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[152:148], - x__h197126 } ; + x__h197127 } ; assign MUX_coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wset_1__VAL_1 = { 5'd0, coreFix_memExe_lsq$firstSt[141:78], @@ -12347,8 +12347,8 @@ module mkCore(CLK, assign MUX_coreFix_memExe_respLrScAmoQ_enqReq_lat_0$wset_1__VAL_3 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_processAmo[6] ? - curData__h192916 : - { {32{x__h193679[31]}}, x__h193679 } } ; + curData__h192917 : + { {32{x__h193680[31]}}, x__h193680 } } ; assign MUX_coreFix_trainBPQ_0$enq_1__VAL_1 = { coreFix_aluExe_0_exeToFinQ$first[146:19], coreFix_aluExe_0_exeToFinQ$first[326:322], @@ -12381,7 +12381,7 @@ module mkCore(CLK, MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_1 || MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_2 ; assign MUX_csrf_fflags_reg$write_1__VAL_1 = - csrf_fflags_reg | fflags__h733530 ; + csrf_fflags_reg | fflags__h733287 ; assign MUX_csrf_frm_reg$write_1__VAL_1 = (IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == 6'd1) ? @@ -12424,9 +12424,9 @@ module mkCore(CLK, assign MUX_csrf_minstret_ehr_data_lat_0$wset_1__VAL_2 = rob$deqPort_0_deq_data[95:32] ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 = - n__read__h726937 + 64'd1 ; + n__read__h726694 + 64'd1 ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 = - n__read__h726937 + { 62'd0, x__h733794 } ; + n__read__h726694 + { 62'd0, x__h733551 } ; assign MUX_csrf_mpp_reg$write_1__VAL_1 = (rob$deqPort_0_deq_data[329:325] == 5'd13 && IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == @@ -12473,7 +12473,7 @@ module mkCore(CLK, 6'd18) && MUX_csrf_sepc_csr$write_1__VAL_1[8] ; assign MUX_csrf_stval_csr$write_1__VAL_1 = rob$deqPort_0_deq_data[95:32] ; - assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h737644 } ; + assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h737401 } ; assign MUX_f_fpr_rsps$enq_1__VAL_3 = { 1'd1, rf$read_4_rd1 } ; assign MUX_fetchStage$iTlbIfc_updateVMInfo_1__VAL_1 = { csrf_prv_reg, @@ -12522,24 +12522,24 @@ module mkCore(CLK, 56'hAAAAAAAAAAAAAA } ; assign MUX_rf$write_2_wr_2__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? - res_data__h337874 : - res_data__h337869 ; + res_data__h337875 : + res_data__h337870 ; assign MUX_rf$write_2_wr_2__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? - res_data__h383576 : - res_data__h383571 ; + res_data__h383577 : + res_data__h383572 ; assign MUX_rf$write_2_wr_2__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? - res_data__h429271 : - res_data__h429266 ; + res_data__h429272 : + res_data__h429267 ; assign MUX_rf$write_2_wr_2__VAL_5 = coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[33] ? - data___1__h475008 : + data___1__h475009 : IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC___d8070 ; assign MUX_rf$write_2_wr_2__VAL_6 = coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[33] ? - data___1__h475816 : - data__h475282 ; + data___1__h475817 : + data__h475283 ; assign MUX_rf$write_3_wr_2__VAL_3 = coreFix_memExe_lsq$firstLd[100] ? coreFix_memExe_respLrScAmoQ_data_0 : @@ -12608,15 +12608,15 @@ module mkCore(CLK, assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] : - res_fflags__h337870 ; + res_fflags__h337871 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] : - res_fflags__h383572 ; + res_fflags__h383573 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] : - res_fflags__h429267 ; + res_fflags__h429268 ; assign MUX_v_f_to_TV_0$enq_1__VAL_1 = { commitStage_rg_serial_num, 77'h0AAAAAAAAAAAAAAAAAAA, @@ -12632,9 +12632,9 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, rob$deqPort_0_deq_data[161:98], IF_rob_deqPort_0_deq_data__4339_BITS_97_TO_96__ETC___d14512, - fflags__h728257, + fflags__h728014, rob$deqPort_0_deq_data[26], - x__h729900, + x__h729657, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign MUX_v_f_to_TV_0$enq_1__VAL_4 = { commitStage_rg_serial_num, @@ -12649,7 +12649,7 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4339_BIT_181_4414_CONC_ETC___d14505, rob$deqPort_0_deq_data[167], rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, - rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292 } ; + rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298 } ; // inlined wires assign csrf_minstret_ehr_data_lat_0$whas = @@ -13003,8 +13003,8 @@ module mkCore(CLK, // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$D_IN = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas ? - v__h604528 : - v__h603883 ; + v__h604529 : + v__h603884 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$EN = 1'd1 ; // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_pipe_0 @@ -13111,7 +13111,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - _theResult_____2__h296521 ; + _theResult_____2__h296522 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl @@ -13133,7 +13133,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - v__h295941 ; + v__h295942 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_rl @@ -13179,7 +13179,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3127 && - _theResult_____2__h304517 ; + _theResult_____2__h304518 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl @@ -13197,7 +13197,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3127 && - v__h299286 ; + v__h299287 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl @@ -13297,7 +13297,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3298 && - _theResult_____2__h310511 ; + _theResult_____2__h310512 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl @@ -13315,7 +13315,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3298 && - v__h309800 ; + v__h309801 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_rl @@ -13336,7 +13336,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0 assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0$D_IN = - { x_addr__h314074, + { x_addr__h314075, coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[514:513] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[514:513], @@ -13366,7 +13366,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3394 && - _theResult_____2__h318365 ; + _theResult_____2__h318366 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl @@ -13384,7 +13384,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3394 && - v__h313676 ; + v__h313677 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl @@ -13461,7 +13461,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_deqP assign coreFix_memExe_forwardQ_deqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3717 && - _theResult_____2__h331934 ; + _theResult_____2__h331935 ; assign coreFix_memExe_forwardQ_deqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_deqReq_rl @@ -13479,7 +13479,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_enqP assign coreFix_memExe_forwardQ_enqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3717 && - v__h331502 ; + v__h331503 ; assign coreFix_memExe_forwardQ_enqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_enqReq_rl @@ -13522,7 +13522,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_deqP assign coreFix_memExe_memRespLdQ_deqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3623 && - _theResult_____2__h328709 ; + _theResult_____2__h328710 ; assign coreFix_memExe_memRespLdQ_deqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_deqReq_rl @@ -13540,7 +13540,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_enqP assign coreFix_memExe_memRespLdQ_enqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3623 && - v__h328277 ; + v__h328278 ; assign coreFix_memExe_memRespLdQ_enqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_enqReq_rl @@ -13796,7 +13796,7 @@ module mkCore(CLK, IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == 6'd2) || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd3) ; @@ -13833,7 +13833,7 @@ module mkCore(CLK, assign csrf_fs_reg$EN = MUX_csrf_fs_reg$write_1__SEL_2 || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd2 || @@ -13988,7 +13988,7 @@ module mkCore(CLK, 6'd24 ; // register csrf_mcycle_ehr_data_rl - assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5310 ; + assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5311 ; assign csrf_mcycle_ehr_data_rl$EN = 1'd1 ; // register csrf_medeleg_13_11_reg @@ -14112,7 +14112,7 @@ module mkCore(CLK, // register csrf_minstret_ehr_data_rl assign csrf_minstret_ehr_data_rl$D_IN = csrf_minstret_ehr_data_lat_1$whas ? - upd__h3993 : + upd__h3994 : IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 ; assign csrf_minstret_ehr_data_rl$EN = 1'd1 ; @@ -14896,7 +14896,7 @@ module mkCore(CLK, // register mmio_cRqQ_data_0 assign mmio_cRqQ_data_0$D_IN = - { x__h46292, + { x__h46293, (mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_cRqQ_enqReq_rl[77:76] == 2'd0) ? @@ -14908,7 +14908,7 @@ module mkCore(CLK, mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[71:64] : mmio_cRqQ_enqReq_rl[71:64], - x__h48828 } ; + x__h48829 } ; assign mmio_cRqQ_data_0$EN = NOT_mmio_cRqQ_clearReq_dummy2_1_read__26_27_OR_ETC___d431 && mmio_cRqQ_enqReq_dummy2_2$Q_OUT && @@ -15001,7 +15001,7 @@ module mkCore(CLK, // register mmio_dataReqQ_data_0 assign mmio_dataReqQ_data_0$D_IN = - { x__h18385, + { x__h18386, (mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_dataReqQ_enqReq_rl[77:76] == 2'd0) ? @@ -15013,7 +15013,7 @@ module mkCore(CLK, mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[71:64] : mmio_dataReqQ_enqReq_rl[71:64], - x__h20923 } ; + x__h20924 } ; assign mmio_dataReqQ_data_0$EN = NOT_mmio_dataReqQ_clearReq_dummy2_1_read__35_3_ETC___d140 && mmio_dataReqQ_enqReq_dummy2_2$Q_OUT && @@ -15097,7 +15097,7 @@ module mkCore(CLK, mmio_pRqQ_enqReq_lat_0$wget[32] : mmio_pRqQ_enqReq_rl[32] } : IF_IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmi_ETC___d766, - x_data__h66086 } ; + x_data__h66087 } ; assign mmio_pRqQ_data_0$EN = NOT_mmio_pRqQ_clearReq_dummy2_1_read__29_30_OR_ETC___d734 && mmio_pRqQ_enqReq_dummy2_2$Q_OUT && @@ -16174,19 +16174,19 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tdata = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___fst__h603370 : - a__h602948 ; + _theResult___fst__h603371 : + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tuser = - { b__h602949 == 64'd0, - a__h602948, + { b__h602950 == 64'd0, + a__h602949, coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0, - x__h603384, - a__h602948[63], + x__h603385, + a__h602949[63], 8'd0 } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_divisor_tdata = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___snd__h603371 : - b__h602949 ; + _theResult___snd__h603372 : + b__h602950 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tvalid = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && coreFix_fpuMulDivExe_0_regToExeQ$first[245:243] == 3'd3 && @@ -16247,20 +16247,20 @@ module mkCore(CLK, 1'd1 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned - assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$A = a__h602948 ; - assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$B = b__h602949 ; + assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$A = a__h602949 ; + assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$B = b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned$A = - a__h602948 ; + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned$B = - b__h602949 ; + b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned$A = - a__h602948 ; + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned$B = - b__h602949 ; + b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ always@(coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_pipe_1 or @@ -16289,9 +16289,9 @@ module mkCore(CLK, assign coreFix_fpuMulDivExe_0_regToExeQ$enq_x = { CASE_coreFix_fpuMulDivExe_0_dispToRegQfirst_B_ETC__q298, coreFix_fpuMulDivExe_0_dispToRegQ$first[32:12], - x__h481670, x__h481671, x__h481672, + x__h481673, coreFix_fpuMulDivExe_0_dispToRegQ$first[11:0] } ; assign coreFix_fpuMulDivExe_0_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12698 ; @@ -16497,8 +16497,8 @@ module mkCore(CLK, // submodule coreFix_memExe_dMem_cache_m_banks_0_cRqMshr assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit_r = - { x__h287279, - x__h287291, + { x__h287280, + x__h287292, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2793, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2797, @@ -16509,13 +16509,13 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2819, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2823, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2828, - x__h289145, + x__h289146, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2836, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2840, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2844, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2848 } ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq_n = - x__h285846 ; + x__h285847 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq_n = (coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[578:577] == 2'd0) ? @@ -17409,7 +17409,7 @@ module mkCore(CLK, assign coreFix_memExe_lsq$updateData_d = (coreFix_memExe_regToExeQ$first[192:190] == 3'd4) ? coreFix_memExe_regToExeQ$first[75:12] : - shiftData__h181567 ; + shiftData__h181568 ; assign coreFix_memExe_lsq$updateData_t = coreFix_memExe_regToExeQ$first[143:140] ; assign coreFix_memExe_lsq$wakeupLdStalledBySB_sbIdx = @@ -17509,8 +17509,8 @@ module mkCore(CLK, assign coreFix_memExe_regToExeQ$enq_x = { coreFix_memExe_dispToRegQ$first[97:63], coreFix_memExe_dispToRegQ$first[29:12], - x__h181476, x__h181477, + x__h181478, coreFix_memExe_dispToRegQ$first[11:0] } ; assign coreFix_memExe_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12698 ; @@ -19580,7 +19580,7 @@ module mkCore(CLK, // submodule v_f_to_TV_1 assign v_f_to_TV_1$D_IN = - { commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, + { commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, 77'h0AAAAAAAAAAAAAAAAAAA, rob$deqPort_1_deq_data[425:181], CASE_robdeqPort_1_deq_data_BITS_180_TO_169_1__ETC__q300, @@ -19588,9 +19588,9 @@ module mkCore(CLK, rob$deqPort_1_deq_data[161:98], CASE_robdeqPort_1_deq_data_BITS_97_TO_96_0_ro_ETC__q301, rob$deqPort_1_deq_data[95:32], - fflags__h730910, + fflags__h730667, rob$deqPort_1_deq_data[26], - x__h733045, + x__h732802, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign v_f_to_TV_1$ENQ = WILL_FIRE_RL_commitStage_doCommitNormalInst && @@ -19612,15 +19612,15 @@ module mkCore(CLK, // remaining internal signals module_amoExec instance_amoExec_2(.amoExec_amo_inst(coreFix_memExe_dMem_cache_m_banks_0_processAmo[10:4]), - .amoExec_current_data(curData__h192916), + .amoExec_current_data(curData__h192917), .amoExec_in_data(coreFix_memExe_dMem_cache_m_banks_0_processAmo[74:11]), .amoExec_upper_32_bits(coreFix_memExe_dMem_cache_m_banks_0_processAmo[90]), - .amoExec(n__h194454)); + .amoExec(n__h194455)); module_amoExec instance_amoExec_3(.amoExec_amo_inst({ mmio_pRqQ_data_0[35:32], 3'd0 }), .amoExec_current_data({ 63'd0, - msip__h76122 }), - .amoExec_in_data({ 32'd0, x__h76237 }), + msip__h76123 }), + .amoExec_in_data({ 32'd0, x__h76238 }), .amoExec_upper_32_bits(1'd0), .amoExec(amoExec___d880)); module_basicExec instance_basicExec_6(.basicExec_dInst({ coreFix_aluExe_1_regToExeQ$first[421:417], @@ -19664,10 +19664,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h655012, r1__read_BITS_13_TO_12___h655197 != 2'd0, - { prv__h735199, - tvm_val__h726553, + { prv__h734956, + tvm_val__h726310, { r1__read_BIT_20___h655893, - tsr_val__h726551, + tsr_val__h726308, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19694,10 +19694,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h655012, r1__read_BITS_13_TO_12___h655197 != 2'd0, - { prv__h735199, - tvm_val__h726553, + { prv__h734956, + tvm_val__h726310, { r1__read_BIT_20___h655893, - tsr_val__h726551, + tsr_val__h726308, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19711,1196 +19711,1196 @@ module mkCore(CLK, module_execFpuSimple instance_execFpuSimple_4(.execFpuSimple_fpu_inst({ coreFix_fpuMulDivExe_0_regToExeQ$first[233:229], CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q259, coreFix_fpuMulDivExe_0_regToExeQ$first[225] }), - .execFpuSimple_rVal1(rVal1__h481761), - .execFpuSimple_rVal2(rVal2__h481762), + .execFpuSimple_rVal1(rVal1__h481762), + .execFpuSimple_rVal2(rVal2__h481763), .execFpuSimple(execFpuSimple___d11056)); assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4249 ? - _theResult___snd__h354259 : - _theResult____h346085 ; + _theResult___snd__h354260 : + _theResult____h346086 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641 ? - _theResult___snd__h399956 : - _theResult____h391784 ; + _theResult___snd__h399957 : + _theResult____h391785 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033 ? - _theResult___snd__h445651 : - _theResult____h437479 ; + _theResult___snd__h445652 : + _theResult____h437480 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897 ? - _theResult___snd__h511168 : - _theResult____h502869 ; + _theResult___snd__h511169 : + _theResult____h502870 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9612 ? - _theResult___snd__h589325 : - _theResult____h581026 ; + _theResult___snd__h589326 : + _theResult____h581027 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382 ? - _theResult___snd__h550021 : - _theResult____h541722 ; + _theResult___snd__h550022 : + _theResult____h541723 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q108 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584 ? - _theResult___snd__h463417 : - _theResult____h455116 ; + _theResult___snd__h463418 : + _theResult____h455117 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q38 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4800 ? - _theResult___snd__h372025 : - _theResult____h363724 ; + _theResult___snd__h372026 : + _theResult____h363725 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q73 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192 ? - _theResult___snd__h417722 : - _theResult____h409421 ; + _theResult___snd__h417723 : + _theResult____h409422 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585 ? - _theResult___snd__h501517 : + _theResult___snd__h501518 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8947 ? - _theResult___snd__h501517 : - _theResult___snd__h519922 ; + _theResult___snd__h501518 : + _theResult___snd__h519923 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9315 ? - _theResult___snd__h579674 : + _theResult___snd__h579675 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9662 ? - _theResult___snd__h579674 : - _theResult___snd__h598079 ; + _theResult___snd__h579675 : + _theResult___snd__h598080 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085 ? - _theResult___snd__h540370 : + _theResult___snd__h540371 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10432 ? - _theResult___snd__h540370 : - _theResult___snd__h558775 ; + _theResult___snd__h540371 : + _theResult___snd__h558776 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q100 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264 ? - _theResult___snd__h454233 : + _theResult___snd__h454234 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q113 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7657 ? - _theResult___snd__h454233 : - _theResult___snd__h472023 ; + _theResult___snd__h454234 : + _theResult___snd__h472024 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q30 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4480 ? - _theResult___snd__h362841 : + _theResult___snd__h362842 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q43 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4873 ? - _theResult___snd__h362841 : - _theResult___snd__h380631 ; + _theResult___snd__h362842 : + _theResult___snd__h380632 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q65 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872 ? - _theResult___snd__h408538 : + _theResult___snd__h408539 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q78 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6265 ? - _theResult___snd__h408538 : - _theResult___snd__h426328 ; + _theResult___snd__h408539 : + _theResult___snd__h426329 ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5069 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - ((_theResult___fst_exp__h354196 == 8'd255) ? + ((_theResult___fst_exp__h354197 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054) : - ((_theResult___fst_exp__h362852 == 8'd255) ? + ((_theResult___fst_exp__h362853 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5119 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - ((_theResult___fst_exp__h354196 == 8'd255) ? + ((_theResult___fst_exp__h354197 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110) : - ((_theResult___fst_exp__h362852 == 8'd255) ? + ((_theResult___fst_exp__h362853 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6461 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - ((_theResult___fst_exp__h399893 == 8'd255) ? + ((_theResult___fst_exp__h399894 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446) : - ((_theResult___fst_exp__h408549 == 8'd255) ? + ((_theResult___fst_exp__h408550 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6511 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - ((_theResult___fst_exp__h399893 == 8'd255) ? + ((_theResult___fst_exp__h399894 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502) : - ((_theResult___fst_exp__h408549 == 8'd255) ? + ((_theResult___fst_exp__h408550 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7853 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - ((_theResult___fst_exp__h445588 == 8'd255) ? + ((_theResult___fst_exp__h445589 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838) : - ((_theResult___fst_exp__h454244 == 8'd255) ? + ((_theResult___fst_exp__h454245 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7903 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - ((_theResult___fst_exp__h445588 == 8'd255) ? + ((_theResult___fst_exp__h445589 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894) : - ((_theResult___fst_exp__h454244 == 8'd255) ? + ((_theResult___fst_exp__h454245 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901) ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 = - (_theResult____h346085[56] ? + (_theResult____h346086[56] ? 6'd0 : - (_theResult____h346085[55] ? + (_theResult____h346086[55] ? 6'd1 : - (_theResult____h346085[54] ? + (_theResult____h346086[54] ? 6'd2 : - (_theResult____h346085[53] ? + (_theResult____h346086[53] ? 6'd3 : - (_theResult____h346085[52] ? + (_theResult____h346086[52] ? 6'd4 : - (_theResult____h346085[51] ? + (_theResult____h346086[51] ? 6'd5 : - (_theResult____h346085[50] ? + (_theResult____h346086[50] ? 6'd6 : - (_theResult____h346085[49] ? + (_theResult____h346086[49] ? 6'd7 : - (_theResult____h346085[48] ? + (_theResult____h346086[48] ? 6'd8 : - (_theResult____h346085[47] ? + (_theResult____h346086[47] ? 6'd9 : - (_theResult____h346085[46] ? + (_theResult____h346086[46] ? 6'd10 : - (_theResult____h346085[45] ? + (_theResult____h346086[45] ? 6'd11 : - (_theResult____h346085[44] ? + (_theResult____h346086[44] ? 6'd12 : - (_theResult____h346085[43] ? + (_theResult____h346086[43] ? 6'd13 : - (_theResult____h346085[42] ? + (_theResult____h346086[42] ? 6'd14 : - (_theResult____h346085[41] ? + (_theResult____h346086[41] ? 6'd15 : - (_theResult____h346085[40] ? + (_theResult____h346086[40] ? 6'd16 : - (_theResult____h346085[39] ? + (_theResult____h346086[39] ? 6'd17 : - (_theResult____h346085[38] ? + (_theResult____h346086[38] ? 6'd18 : - (_theResult____h346085[37] ? + (_theResult____h346086[37] ? 6'd19 : - (_theResult____h346085[36] ? + (_theResult____h346086[36] ? 6'd20 : - (_theResult____h346085[35] ? + (_theResult____h346086[35] ? 6'd21 : - (_theResult____h346085[34] ? + (_theResult____h346086[34] ? 6'd22 : - (_theResult____h346085[33] ? + (_theResult____h346086[33] ? 6'd23 : - (_theResult____h346085[32] ? + (_theResult____h346086[32] ? 6'd24 : - (_theResult____h346085[31] ? + (_theResult____h346086[31] ? 6'd25 : - (_theResult____h346085[30] ? + (_theResult____h346086[30] ? 6'd26 : - (_theResult____h346085[29] ? + (_theResult____h346086[29] ? 6'd27 : - (_theResult____h346085[28] ? + (_theResult____h346086[28] ? 6'd28 : - (_theResult____h346085[27] ? + (_theResult____h346086[27] ? 6'd29 : - (_theResult____h346085[26] ? + (_theResult____h346086[26] ? 6'd30 : - (_theResult____h346085[25] ? + (_theResult____h346086[25] ? 6'd31 : - (_theResult____h346085[24] ? + (_theResult____h346086[24] ? 6'd32 : - (_theResult____h346085[23] ? + (_theResult____h346086[23] ? 6'd33 : - (_theResult____h346085[22] ? + (_theResult____h346086[22] ? 6'd34 : - (_theResult____h346085[21] ? + (_theResult____h346086[21] ? 6'd35 : - (_theResult____h346085[20] ? + (_theResult____h346086[20] ? 6'd36 : - (_theResult____h346085[19] ? + (_theResult____h346086[19] ? 6'd37 : - (_theResult____h346085[18] ? + (_theResult____h346086[18] ? 6'd38 : - (_theResult____h346085[17] ? + (_theResult____h346086[17] ? 6'd39 : - (_theResult____h346085[16] ? + (_theResult____h346086[16] ? 6'd40 : - (_theResult____h346085[15] ? + (_theResult____h346086[15] ? 6'd41 : - (_theResult____h346085[14] ? + (_theResult____h346086[14] ? 6'd42 : - (_theResult____h346085[13] ? + (_theResult____h346086[13] ? 6'd43 : - (_theResult____h346085[12] ? + (_theResult____h346086[12] ? 6'd44 : - (_theResult____h346085[11] ? + (_theResult____h346086[11] ? 6'd45 : - (_theResult____h346085[10] ? + (_theResult____h346086[10] ? 6'd46 : - (_theResult____h346085[9] ? + (_theResult____h346086[9] ? 6'd47 : - (_theResult____h346085[8] ? + (_theResult____h346086[8] ? 6'd48 : - (_theResult____h346085[7] ? + (_theResult____h346086[7] ? 6'd49 : - (_theResult____h346085[6] ? + (_theResult____h346086[6] ? 6'd50 : - (_theResult____h346085[5] ? + (_theResult____h346086[5] ? 6'd51 : - (_theResult____h346085[4] ? + (_theResult____h346086[4] ? 6'd52 : - (_theResult____h346085[3] ? + (_theResult____h346086[3] ? 6'd53 : - (_theResult____h346085[2] ? + (_theResult____h346086[2] ? 6'd54 : - (_theResult____h346085[1] ? + (_theResult____h346086[1] ? 6'd55 : - (_theResult____h346085[0] ? + (_theResult____h346086[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 = - (_theResult____h391784[56] ? + (_theResult____h391785[56] ? 6'd0 : - (_theResult____h391784[55] ? + (_theResult____h391785[55] ? 6'd1 : - (_theResult____h391784[54] ? + (_theResult____h391785[54] ? 6'd2 : - (_theResult____h391784[53] ? + (_theResult____h391785[53] ? 6'd3 : - (_theResult____h391784[52] ? + (_theResult____h391785[52] ? 6'd4 : - (_theResult____h391784[51] ? + (_theResult____h391785[51] ? 6'd5 : - (_theResult____h391784[50] ? + (_theResult____h391785[50] ? 6'd6 : - (_theResult____h391784[49] ? + (_theResult____h391785[49] ? 6'd7 : - (_theResult____h391784[48] ? + (_theResult____h391785[48] ? 6'd8 : - (_theResult____h391784[47] ? + (_theResult____h391785[47] ? 6'd9 : - (_theResult____h391784[46] ? + (_theResult____h391785[46] ? 6'd10 : - (_theResult____h391784[45] ? + (_theResult____h391785[45] ? 6'd11 : - (_theResult____h391784[44] ? + (_theResult____h391785[44] ? 6'd12 : - (_theResult____h391784[43] ? + (_theResult____h391785[43] ? 6'd13 : - (_theResult____h391784[42] ? + (_theResult____h391785[42] ? 6'd14 : - (_theResult____h391784[41] ? + (_theResult____h391785[41] ? 6'd15 : - (_theResult____h391784[40] ? + (_theResult____h391785[40] ? 6'd16 : - (_theResult____h391784[39] ? + (_theResult____h391785[39] ? 6'd17 : - (_theResult____h391784[38] ? + (_theResult____h391785[38] ? 6'd18 : - (_theResult____h391784[37] ? + (_theResult____h391785[37] ? 6'd19 : - (_theResult____h391784[36] ? + (_theResult____h391785[36] ? 6'd20 : - (_theResult____h391784[35] ? + (_theResult____h391785[35] ? 6'd21 : - (_theResult____h391784[34] ? + (_theResult____h391785[34] ? 6'd22 : - (_theResult____h391784[33] ? + (_theResult____h391785[33] ? 6'd23 : - (_theResult____h391784[32] ? + (_theResult____h391785[32] ? 6'd24 : - (_theResult____h391784[31] ? + (_theResult____h391785[31] ? 6'd25 : - (_theResult____h391784[30] ? + (_theResult____h391785[30] ? 6'd26 : - (_theResult____h391784[29] ? + (_theResult____h391785[29] ? 6'd27 : - (_theResult____h391784[28] ? + (_theResult____h391785[28] ? 6'd28 : - (_theResult____h391784[27] ? + (_theResult____h391785[27] ? 6'd29 : - (_theResult____h391784[26] ? + (_theResult____h391785[26] ? 6'd30 : - (_theResult____h391784[25] ? + (_theResult____h391785[25] ? 6'd31 : - (_theResult____h391784[24] ? + (_theResult____h391785[24] ? 6'd32 : - (_theResult____h391784[23] ? + (_theResult____h391785[23] ? 6'd33 : - (_theResult____h391784[22] ? + (_theResult____h391785[22] ? 6'd34 : - (_theResult____h391784[21] ? + (_theResult____h391785[21] ? 6'd35 : - (_theResult____h391784[20] ? + (_theResult____h391785[20] ? 6'd36 : - (_theResult____h391784[19] ? + (_theResult____h391785[19] ? 6'd37 : - (_theResult____h391784[18] ? + (_theResult____h391785[18] ? 6'd38 : - (_theResult____h391784[17] ? + (_theResult____h391785[17] ? 6'd39 : - (_theResult____h391784[16] ? + (_theResult____h391785[16] ? 6'd40 : - (_theResult____h391784[15] ? + (_theResult____h391785[15] ? 6'd41 : - (_theResult____h391784[14] ? + (_theResult____h391785[14] ? 6'd42 : - (_theResult____h391784[13] ? + (_theResult____h391785[13] ? 6'd43 : - (_theResult____h391784[12] ? + (_theResult____h391785[12] ? 6'd44 : - (_theResult____h391784[11] ? + (_theResult____h391785[11] ? 6'd45 : - (_theResult____h391784[10] ? + (_theResult____h391785[10] ? 6'd46 : - (_theResult____h391784[9] ? + (_theResult____h391785[9] ? 6'd47 : - (_theResult____h391784[8] ? + (_theResult____h391785[8] ? 6'd48 : - (_theResult____h391784[7] ? + (_theResult____h391785[7] ? 6'd49 : - (_theResult____h391784[6] ? + (_theResult____h391785[6] ? 6'd50 : - (_theResult____h391784[5] ? + (_theResult____h391785[5] ? 6'd51 : - (_theResult____h391784[4] ? + (_theResult____h391785[4] ? 6'd52 : - (_theResult____h391784[3] ? + (_theResult____h391785[3] ? 6'd53 : - (_theResult____h391784[2] ? + (_theResult____h391785[2] ? 6'd54 : - (_theResult____h391784[1] ? + (_theResult____h391785[1] ? 6'd55 : - (_theResult____h391784[0] ? + (_theResult____h391785[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 = - (_theResult____h437479[56] ? + (_theResult____h437480[56] ? 6'd0 : - (_theResult____h437479[55] ? + (_theResult____h437480[55] ? 6'd1 : - (_theResult____h437479[54] ? + (_theResult____h437480[54] ? 6'd2 : - (_theResult____h437479[53] ? + (_theResult____h437480[53] ? 6'd3 : - (_theResult____h437479[52] ? + (_theResult____h437480[52] ? 6'd4 : - (_theResult____h437479[51] ? + (_theResult____h437480[51] ? 6'd5 : - (_theResult____h437479[50] ? + (_theResult____h437480[50] ? 6'd6 : - (_theResult____h437479[49] ? + (_theResult____h437480[49] ? 6'd7 : - (_theResult____h437479[48] ? + (_theResult____h437480[48] ? 6'd8 : - (_theResult____h437479[47] ? + (_theResult____h437480[47] ? 6'd9 : - (_theResult____h437479[46] ? + (_theResult____h437480[46] ? 6'd10 : - (_theResult____h437479[45] ? + (_theResult____h437480[45] ? 6'd11 : - (_theResult____h437479[44] ? + (_theResult____h437480[44] ? 6'd12 : - (_theResult____h437479[43] ? + (_theResult____h437480[43] ? 6'd13 : - (_theResult____h437479[42] ? + (_theResult____h437480[42] ? 6'd14 : - (_theResult____h437479[41] ? + (_theResult____h437480[41] ? 6'd15 : - (_theResult____h437479[40] ? + (_theResult____h437480[40] ? 6'd16 : - (_theResult____h437479[39] ? + (_theResult____h437480[39] ? 6'd17 : - (_theResult____h437479[38] ? + (_theResult____h437480[38] ? 6'd18 : - (_theResult____h437479[37] ? + (_theResult____h437480[37] ? 6'd19 : - (_theResult____h437479[36] ? + (_theResult____h437480[36] ? 6'd20 : - (_theResult____h437479[35] ? + (_theResult____h437480[35] ? 6'd21 : - (_theResult____h437479[34] ? + (_theResult____h437480[34] ? 6'd22 : - (_theResult____h437479[33] ? + (_theResult____h437480[33] ? 6'd23 : - (_theResult____h437479[32] ? + (_theResult____h437480[32] ? 6'd24 : - (_theResult____h437479[31] ? + (_theResult____h437480[31] ? 6'd25 : - (_theResult____h437479[30] ? + (_theResult____h437480[30] ? 6'd26 : - (_theResult____h437479[29] ? + (_theResult____h437480[29] ? 6'd27 : - (_theResult____h437479[28] ? + (_theResult____h437480[28] ? 6'd28 : - (_theResult____h437479[27] ? + (_theResult____h437480[27] ? 6'd29 : - (_theResult____h437479[26] ? + (_theResult____h437480[26] ? 6'd30 : - (_theResult____h437479[25] ? + (_theResult____h437480[25] ? 6'd31 : - (_theResult____h437479[24] ? + (_theResult____h437480[24] ? 6'd32 : - (_theResult____h437479[23] ? + (_theResult____h437480[23] ? 6'd33 : - (_theResult____h437479[22] ? + (_theResult____h437480[22] ? 6'd34 : - (_theResult____h437479[21] ? + (_theResult____h437480[21] ? 6'd35 : - (_theResult____h437479[20] ? + (_theResult____h437480[20] ? 6'd36 : - (_theResult____h437479[19] ? + (_theResult____h437480[19] ? 6'd37 : - (_theResult____h437479[18] ? + (_theResult____h437480[18] ? 6'd38 : - (_theResult____h437479[17] ? + (_theResult____h437480[17] ? 6'd39 : - (_theResult____h437479[16] ? + (_theResult____h437480[16] ? 6'd40 : - (_theResult____h437479[15] ? + (_theResult____h437480[15] ? 6'd41 : - (_theResult____h437479[14] ? + (_theResult____h437480[14] ? 6'd42 : - (_theResult____h437479[13] ? + (_theResult____h437480[13] ? 6'd43 : - (_theResult____h437479[12] ? + (_theResult____h437480[12] ? 6'd44 : - (_theResult____h437479[11] ? + (_theResult____h437480[11] ? 6'd45 : - (_theResult____h437479[10] ? + (_theResult____h437480[10] ? 6'd46 : - (_theResult____h437479[9] ? + (_theResult____h437480[9] ? 6'd47 : - (_theResult____h437479[8] ? + (_theResult____h437480[8] ? 6'd48 : - (_theResult____h437479[7] ? + (_theResult____h437480[7] ? 6'd49 : - (_theResult____h437479[6] ? + (_theResult____h437480[6] ? 6'd50 : - (_theResult____h437479[5] ? + (_theResult____h437480[5] ? 6'd51 : - (_theResult____h437479[4] ? + (_theResult____h437480[4] ? 6'd52 : - (_theResult____h437479[3] ? + (_theResult____h437480[3] ? 6'd53 : - (_theResult____h437479[2] ? + (_theResult____h437480[2] ? 6'd54 : - (_theResult____h437479[1] ? + (_theResult____h437480[1] ? 6'd55 : - (_theResult____h437479[0] ? + (_theResult____h437480[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 = - (_theResult____h541722[56] ? + (_theResult____h541723[56] ? 6'd0 : - (_theResult____h541722[55] ? + (_theResult____h541723[55] ? 6'd1 : - (_theResult____h541722[54] ? + (_theResult____h541723[54] ? 6'd2 : - (_theResult____h541722[53] ? + (_theResult____h541723[53] ? 6'd3 : - (_theResult____h541722[52] ? + (_theResult____h541723[52] ? 6'd4 : - (_theResult____h541722[51] ? + (_theResult____h541723[51] ? 6'd5 : - (_theResult____h541722[50] ? + (_theResult____h541723[50] ? 6'd6 : - (_theResult____h541722[49] ? + (_theResult____h541723[49] ? 6'd7 : - (_theResult____h541722[48] ? + (_theResult____h541723[48] ? 6'd8 : - (_theResult____h541722[47] ? + (_theResult____h541723[47] ? 6'd9 : - (_theResult____h541722[46] ? + (_theResult____h541723[46] ? 6'd10 : - (_theResult____h541722[45] ? + (_theResult____h541723[45] ? 6'd11 : - (_theResult____h541722[44] ? + (_theResult____h541723[44] ? 6'd12 : - (_theResult____h541722[43] ? + (_theResult____h541723[43] ? 6'd13 : - (_theResult____h541722[42] ? + (_theResult____h541723[42] ? 6'd14 : - (_theResult____h541722[41] ? + (_theResult____h541723[41] ? 6'd15 : - (_theResult____h541722[40] ? + (_theResult____h541723[40] ? 6'd16 : - (_theResult____h541722[39] ? + (_theResult____h541723[39] ? 6'd17 : - (_theResult____h541722[38] ? + (_theResult____h541723[38] ? 6'd18 : - (_theResult____h541722[37] ? + (_theResult____h541723[37] ? 6'd19 : - (_theResult____h541722[36] ? + (_theResult____h541723[36] ? 6'd20 : - (_theResult____h541722[35] ? + (_theResult____h541723[35] ? 6'd21 : - (_theResult____h541722[34] ? + (_theResult____h541723[34] ? 6'd22 : - (_theResult____h541722[33] ? + (_theResult____h541723[33] ? 6'd23 : - (_theResult____h541722[32] ? + (_theResult____h541723[32] ? 6'd24 : - (_theResult____h541722[31] ? + (_theResult____h541723[31] ? 6'd25 : - (_theResult____h541722[30] ? + (_theResult____h541723[30] ? 6'd26 : - (_theResult____h541722[29] ? + (_theResult____h541723[29] ? 6'd27 : - (_theResult____h541722[28] ? + (_theResult____h541723[28] ? 6'd28 : - (_theResult____h541722[27] ? + (_theResult____h541723[27] ? 6'd29 : - (_theResult____h541722[26] ? + (_theResult____h541723[26] ? 6'd30 : - (_theResult____h541722[25] ? + (_theResult____h541723[25] ? 6'd31 : - (_theResult____h541722[24] ? + (_theResult____h541723[24] ? 6'd32 : - (_theResult____h541722[23] ? + (_theResult____h541723[23] ? 6'd33 : - (_theResult____h541722[22] ? + (_theResult____h541723[22] ? 6'd34 : - (_theResult____h541722[21] ? + (_theResult____h541723[21] ? 6'd35 : - (_theResult____h541722[20] ? + (_theResult____h541723[20] ? 6'd36 : - (_theResult____h541722[19] ? + (_theResult____h541723[19] ? 6'd37 : - (_theResult____h541722[18] ? + (_theResult____h541723[18] ? 6'd38 : - (_theResult____h541722[17] ? + (_theResult____h541723[17] ? 6'd39 : - (_theResult____h541722[16] ? + (_theResult____h541723[16] ? 6'd40 : - (_theResult____h541722[15] ? + (_theResult____h541723[15] ? 6'd41 : - (_theResult____h541722[14] ? + (_theResult____h541723[14] ? 6'd42 : - (_theResult____h541722[13] ? + (_theResult____h541723[13] ? 6'd43 : - (_theResult____h541722[12] ? + (_theResult____h541723[12] ? 6'd44 : - (_theResult____h541722[11] ? + (_theResult____h541723[11] ? 6'd45 : - (_theResult____h541722[10] ? + (_theResult____h541723[10] ? 6'd46 : - (_theResult____h541722[9] ? + (_theResult____h541723[9] ? 6'd47 : - (_theResult____h541722[8] ? + (_theResult____h541723[8] ? 6'd48 : - (_theResult____h541722[7] ? + (_theResult____h541723[7] ? 6'd49 : - (_theResult____h541722[6] ? + (_theResult____h541723[6] ? 6'd50 : - (_theResult____h541722[5] ? + (_theResult____h541723[5] ? 6'd51 : - (_theResult____h541722[4] ? + (_theResult____h541723[4] ? 6'd52 : - (_theResult____h541722[3] ? + (_theResult____h541723[3] ? 6'd53 : - (_theResult____h541722[2] ? + (_theResult____h541723[2] ? 6'd54 : - (_theResult____h541722[1] ? + (_theResult____h541723[1] ? 6'd55 : - (_theResult____h541722[0] ? + (_theResult____h541723[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 = - (_theResult____h502869[56] ? + (_theResult____h502870[56] ? 6'd0 : - (_theResult____h502869[55] ? + (_theResult____h502870[55] ? 6'd1 : - (_theResult____h502869[54] ? + (_theResult____h502870[54] ? 6'd2 : - (_theResult____h502869[53] ? + (_theResult____h502870[53] ? 6'd3 : - (_theResult____h502869[52] ? + (_theResult____h502870[52] ? 6'd4 : - (_theResult____h502869[51] ? + (_theResult____h502870[51] ? 6'd5 : - (_theResult____h502869[50] ? + (_theResult____h502870[50] ? 6'd6 : - (_theResult____h502869[49] ? + (_theResult____h502870[49] ? 6'd7 : - (_theResult____h502869[48] ? + (_theResult____h502870[48] ? 6'd8 : - (_theResult____h502869[47] ? + (_theResult____h502870[47] ? 6'd9 : - (_theResult____h502869[46] ? + (_theResult____h502870[46] ? 6'd10 : - (_theResult____h502869[45] ? + (_theResult____h502870[45] ? 6'd11 : - (_theResult____h502869[44] ? + (_theResult____h502870[44] ? 6'd12 : - (_theResult____h502869[43] ? + (_theResult____h502870[43] ? 6'd13 : - (_theResult____h502869[42] ? + (_theResult____h502870[42] ? 6'd14 : - (_theResult____h502869[41] ? + (_theResult____h502870[41] ? 6'd15 : - (_theResult____h502869[40] ? + (_theResult____h502870[40] ? 6'd16 : - (_theResult____h502869[39] ? + (_theResult____h502870[39] ? 6'd17 : - (_theResult____h502869[38] ? + (_theResult____h502870[38] ? 6'd18 : - (_theResult____h502869[37] ? + (_theResult____h502870[37] ? 6'd19 : - (_theResult____h502869[36] ? + (_theResult____h502870[36] ? 6'd20 : - (_theResult____h502869[35] ? + (_theResult____h502870[35] ? 6'd21 : - (_theResult____h502869[34] ? + (_theResult____h502870[34] ? 6'd22 : - (_theResult____h502869[33] ? + (_theResult____h502870[33] ? 6'd23 : - (_theResult____h502869[32] ? + (_theResult____h502870[32] ? 6'd24 : - (_theResult____h502869[31] ? + (_theResult____h502870[31] ? 6'd25 : - (_theResult____h502869[30] ? + (_theResult____h502870[30] ? 6'd26 : - (_theResult____h502869[29] ? + (_theResult____h502870[29] ? 6'd27 : - (_theResult____h502869[28] ? + (_theResult____h502870[28] ? 6'd28 : - (_theResult____h502869[27] ? + (_theResult____h502870[27] ? 6'd29 : - (_theResult____h502869[26] ? + (_theResult____h502870[26] ? 6'd30 : - (_theResult____h502869[25] ? + (_theResult____h502870[25] ? 6'd31 : - (_theResult____h502869[24] ? + (_theResult____h502870[24] ? 6'd32 : - (_theResult____h502869[23] ? + (_theResult____h502870[23] ? 6'd33 : - (_theResult____h502869[22] ? + (_theResult____h502870[22] ? 6'd34 : - (_theResult____h502869[21] ? + (_theResult____h502870[21] ? 6'd35 : - (_theResult____h502869[20] ? + (_theResult____h502870[20] ? 6'd36 : - (_theResult____h502869[19] ? + (_theResult____h502870[19] ? 6'd37 : - (_theResult____h502869[18] ? + (_theResult____h502870[18] ? 6'd38 : - (_theResult____h502869[17] ? + (_theResult____h502870[17] ? 6'd39 : - (_theResult____h502869[16] ? + (_theResult____h502870[16] ? 6'd40 : - (_theResult____h502869[15] ? + (_theResult____h502870[15] ? 6'd41 : - (_theResult____h502869[14] ? + (_theResult____h502870[14] ? 6'd42 : - (_theResult____h502869[13] ? + (_theResult____h502870[13] ? 6'd43 : - (_theResult____h502869[12] ? + (_theResult____h502870[12] ? 6'd44 : - (_theResult____h502869[11] ? + (_theResult____h502870[11] ? 6'd45 : - (_theResult____h502869[10] ? + (_theResult____h502870[10] ? 6'd46 : - (_theResult____h502869[9] ? + (_theResult____h502870[9] ? 6'd47 : - (_theResult____h502869[8] ? + (_theResult____h502870[8] ? 6'd48 : - (_theResult____h502869[7] ? + (_theResult____h502870[7] ? 6'd49 : - (_theResult____h502869[6] ? + (_theResult____h502870[6] ? 6'd50 : - (_theResult____h502869[5] ? + (_theResult____h502870[5] ? 6'd51 : - (_theResult____h502869[4] ? + (_theResult____h502870[4] ? 6'd52 : - (_theResult____h502869[3] ? + (_theResult____h502870[3] ? 6'd53 : - (_theResult____h502869[2] ? + (_theResult____h502870[2] ? 6'd54 : - (_theResult____h502869[1] ? + (_theResult____h502870[1] ? 6'd55 : - (_theResult____h502869[0] ? + (_theResult____h502870[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 = - (_theResult____h581026[56] ? + (_theResult____h581027[56] ? 6'd0 : - (_theResult____h581026[55] ? + (_theResult____h581027[55] ? 6'd1 : - (_theResult____h581026[54] ? + (_theResult____h581027[54] ? 6'd2 : - (_theResult____h581026[53] ? + (_theResult____h581027[53] ? 6'd3 : - (_theResult____h581026[52] ? + (_theResult____h581027[52] ? 6'd4 : - (_theResult____h581026[51] ? + (_theResult____h581027[51] ? 6'd5 : - (_theResult____h581026[50] ? + (_theResult____h581027[50] ? 6'd6 : - (_theResult____h581026[49] ? + (_theResult____h581027[49] ? 6'd7 : - (_theResult____h581026[48] ? + (_theResult____h581027[48] ? 6'd8 : - (_theResult____h581026[47] ? + (_theResult____h581027[47] ? 6'd9 : - (_theResult____h581026[46] ? + (_theResult____h581027[46] ? 6'd10 : - (_theResult____h581026[45] ? + (_theResult____h581027[45] ? 6'd11 : - (_theResult____h581026[44] ? + (_theResult____h581027[44] ? 6'd12 : - (_theResult____h581026[43] ? + (_theResult____h581027[43] ? 6'd13 : - (_theResult____h581026[42] ? + (_theResult____h581027[42] ? 6'd14 : - (_theResult____h581026[41] ? + (_theResult____h581027[41] ? 6'd15 : - (_theResult____h581026[40] ? + (_theResult____h581027[40] ? 6'd16 : - (_theResult____h581026[39] ? + (_theResult____h581027[39] ? 6'd17 : - (_theResult____h581026[38] ? + (_theResult____h581027[38] ? 6'd18 : - (_theResult____h581026[37] ? + (_theResult____h581027[37] ? 6'd19 : - (_theResult____h581026[36] ? + (_theResult____h581027[36] ? 6'd20 : - (_theResult____h581026[35] ? + (_theResult____h581027[35] ? 6'd21 : - (_theResult____h581026[34] ? + (_theResult____h581027[34] ? 6'd22 : - (_theResult____h581026[33] ? + (_theResult____h581027[33] ? 6'd23 : - (_theResult____h581026[32] ? + (_theResult____h581027[32] ? 6'd24 : - (_theResult____h581026[31] ? + (_theResult____h581027[31] ? 6'd25 : - (_theResult____h581026[30] ? + (_theResult____h581027[30] ? 6'd26 : - (_theResult____h581026[29] ? + (_theResult____h581027[29] ? 6'd27 : - (_theResult____h581026[28] ? + (_theResult____h581027[28] ? 6'd28 : - (_theResult____h581026[27] ? + (_theResult____h581027[27] ? 6'd29 : - (_theResult____h581026[26] ? + (_theResult____h581027[26] ? 6'd30 : - (_theResult____h581026[25] ? + (_theResult____h581027[25] ? 6'd31 : - (_theResult____h581026[24] ? + (_theResult____h581027[24] ? 6'd32 : - (_theResult____h581026[23] ? + (_theResult____h581027[23] ? 6'd33 : - (_theResult____h581026[22] ? + (_theResult____h581027[22] ? 6'd34 : - (_theResult____h581026[21] ? + (_theResult____h581027[21] ? 6'd35 : - (_theResult____h581026[20] ? + (_theResult____h581027[20] ? 6'd36 : - (_theResult____h581026[19] ? + (_theResult____h581027[19] ? 6'd37 : - (_theResult____h581026[18] ? + (_theResult____h581027[18] ? 6'd38 : - (_theResult____h581026[17] ? + (_theResult____h581027[17] ? 6'd39 : - (_theResult____h581026[16] ? + (_theResult____h581027[16] ? 6'd40 : - (_theResult____h581026[15] ? + (_theResult____h581027[15] ? 6'd41 : - (_theResult____h581026[14] ? + (_theResult____h581027[14] ? 6'd42 : - (_theResult____h581026[13] ? + (_theResult____h581027[13] ? 6'd43 : - (_theResult____h581026[12] ? + (_theResult____h581027[12] ? 6'd44 : - (_theResult____h581026[11] ? + (_theResult____h581027[11] ? 6'd45 : - (_theResult____h581026[10] ? + (_theResult____h581027[10] ? 6'd46 : - (_theResult____h581026[9] ? + (_theResult____h581027[9] ? 6'd47 : - (_theResult____h581026[8] ? + (_theResult____h581027[8] ? 6'd48 : - (_theResult____h581026[7] ? + (_theResult____h581027[7] ? 6'd49 : - (_theResult____h581026[6] ? + (_theResult____h581027[6] ? 6'd50 : - (_theResult____h581026[5] ? + (_theResult____h581027[5] ? 6'd51 : - (_theResult____h581026[4] ? + (_theResult____h581027[4] ? 6'd52 : - (_theResult____h581026[3] ? + (_theResult____h581027[3] ? 6'd53 : - (_theResult____h581026[2] ? + (_theResult____h581027[2] ? 6'd54 : - (_theResult____h581026[1] ? + (_theResult____h581027[1] ? 6'd55 : - (_theResult____h581026[0] ? + (_theResult____h581027[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 = - (_theResult____h363724[56] ? + (_theResult____h363725[56] ? 6'd0 : - (_theResult____h363724[55] ? + (_theResult____h363725[55] ? 6'd1 : - (_theResult____h363724[54] ? + (_theResult____h363725[54] ? 6'd2 : - (_theResult____h363724[53] ? + (_theResult____h363725[53] ? 6'd3 : - (_theResult____h363724[52] ? + (_theResult____h363725[52] ? 6'd4 : - (_theResult____h363724[51] ? + (_theResult____h363725[51] ? 6'd5 : - (_theResult____h363724[50] ? + (_theResult____h363725[50] ? 6'd6 : - (_theResult____h363724[49] ? + (_theResult____h363725[49] ? 6'd7 : - (_theResult____h363724[48] ? + (_theResult____h363725[48] ? 6'd8 : - (_theResult____h363724[47] ? + (_theResult____h363725[47] ? 6'd9 : - (_theResult____h363724[46] ? + (_theResult____h363725[46] ? 6'd10 : - (_theResult____h363724[45] ? + (_theResult____h363725[45] ? 6'd11 : - (_theResult____h363724[44] ? + (_theResult____h363725[44] ? 6'd12 : - (_theResult____h363724[43] ? + (_theResult____h363725[43] ? 6'd13 : - (_theResult____h363724[42] ? + (_theResult____h363725[42] ? 6'd14 : - (_theResult____h363724[41] ? + (_theResult____h363725[41] ? 6'd15 : - (_theResult____h363724[40] ? + (_theResult____h363725[40] ? 6'd16 : - (_theResult____h363724[39] ? + (_theResult____h363725[39] ? 6'd17 : - (_theResult____h363724[38] ? + (_theResult____h363725[38] ? 6'd18 : - (_theResult____h363724[37] ? + (_theResult____h363725[37] ? 6'd19 : - (_theResult____h363724[36] ? + (_theResult____h363725[36] ? 6'd20 : - (_theResult____h363724[35] ? + (_theResult____h363725[35] ? 6'd21 : - (_theResult____h363724[34] ? + (_theResult____h363725[34] ? 6'd22 : - (_theResult____h363724[33] ? + (_theResult____h363725[33] ? 6'd23 : - (_theResult____h363724[32] ? + (_theResult____h363725[32] ? 6'd24 : - (_theResult____h363724[31] ? + (_theResult____h363725[31] ? 6'd25 : - (_theResult____h363724[30] ? + (_theResult____h363725[30] ? 6'd26 : - (_theResult____h363724[29] ? + (_theResult____h363725[29] ? 6'd27 : - (_theResult____h363724[28] ? + (_theResult____h363725[28] ? 6'd28 : - (_theResult____h363724[27] ? + (_theResult____h363725[27] ? 6'd29 : - (_theResult____h363724[26] ? + (_theResult____h363725[26] ? 6'd30 : - (_theResult____h363724[25] ? + (_theResult____h363725[25] ? 6'd31 : - (_theResult____h363724[24] ? + (_theResult____h363725[24] ? 6'd32 : - (_theResult____h363724[23] ? + (_theResult____h363725[23] ? 6'd33 : - (_theResult____h363724[22] ? + (_theResult____h363725[22] ? 6'd34 : - (_theResult____h363724[21] ? + (_theResult____h363725[21] ? 6'd35 : - (_theResult____h363724[20] ? + (_theResult____h363725[20] ? 6'd36 : - (_theResult____h363724[19] ? + (_theResult____h363725[19] ? 6'd37 : - (_theResult____h363724[18] ? + (_theResult____h363725[18] ? 6'd38 : - (_theResult____h363724[17] ? + (_theResult____h363725[17] ? 6'd39 : - (_theResult____h363724[16] ? + (_theResult____h363725[16] ? 6'd40 : - (_theResult____h363724[15] ? + (_theResult____h363725[15] ? 6'd41 : - (_theResult____h363724[14] ? + (_theResult____h363725[14] ? 6'd42 : - (_theResult____h363724[13] ? + (_theResult____h363725[13] ? 6'd43 : - (_theResult____h363724[12] ? + (_theResult____h363725[12] ? 6'd44 : - (_theResult____h363724[11] ? + (_theResult____h363725[11] ? 6'd45 : - (_theResult____h363724[10] ? + (_theResult____h363725[10] ? 6'd46 : - (_theResult____h363724[9] ? + (_theResult____h363725[9] ? 6'd47 : - (_theResult____h363724[8] ? + (_theResult____h363725[8] ? 6'd48 : - (_theResult____h363724[7] ? + (_theResult____h363725[7] ? 6'd49 : - (_theResult____h363724[6] ? + (_theResult____h363725[6] ? 6'd50 : - (_theResult____h363724[5] ? + (_theResult____h363725[5] ? 6'd51 : - (_theResult____h363724[4] ? + (_theResult____h363725[4] ? 6'd52 : - (_theResult____h363724[3] ? + (_theResult____h363725[3] ? 6'd53 : - (_theResult____h363724[2] ? + (_theResult____h363725[2] ? 6'd54 : - (_theResult____h363724[1] ? + (_theResult____h363725[1] ? 6'd55 : - (_theResult____h363724[0] ? + (_theResult____h363725[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 = - (_theResult____h409421[56] ? + (_theResult____h409422[56] ? 6'd0 : - (_theResult____h409421[55] ? + (_theResult____h409422[55] ? 6'd1 : - (_theResult____h409421[54] ? + (_theResult____h409422[54] ? 6'd2 : - (_theResult____h409421[53] ? + (_theResult____h409422[53] ? 6'd3 : - (_theResult____h409421[52] ? + (_theResult____h409422[52] ? 6'd4 : - (_theResult____h409421[51] ? + (_theResult____h409422[51] ? 6'd5 : - (_theResult____h409421[50] ? + (_theResult____h409422[50] ? 6'd6 : - (_theResult____h409421[49] ? + (_theResult____h409422[49] ? 6'd7 : - (_theResult____h409421[48] ? + (_theResult____h409422[48] ? 6'd8 : - (_theResult____h409421[47] ? + (_theResult____h409422[47] ? 6'd9 : - (_theResult____h409421[46] ? + (_theResult____h409422[46] ? 6'd10 : - (_theResult____h409421[45] ? + (_theResult____h409422[45] ? 6'd11 : - (_theResult____h409421[44] ? + (_theResult____h409422[44] ? 6'd12 : - (_theResult____h409421[43] ? + (_theResult____h409422[43] ? 6'd13 : - (_theResult____h409421[42] ? + (_theResult____h409422[42] ? 6'd14 : - (_theResult____h409421[41] ? + (_theResult____h409422[41] ? 6'd15 : - (_theResult____h409421[40] ? + (_theResult____h409422[40] ? 6'd16 : - (_theResult____h409421[39] ? + (_theResult____h409422[39] ? 6'd17 : - (_theResult____h409421[38] ? + (_theResult____h409422[38] ? 6'd18 : - (_theResult____h409421[37] ? + (_theResult____h409422[37] ? 6'd19 : - (_theResult____h409421[36] ? + (_theResult____h409422[36] ? 6'd20 : - (_theResult____h409421[35] ? + (_theResult____h409422[35] ? 6'd21 : - (_theResult____h409421[34] ? + (_theResult____h409422[34] ? 6'd22 : - (_theResult____h409421[33] ? + (_theResult____h409422[33] ? 6'd23 : - (_theResult____h409421[32] ? + (_theResult____h409422[32] ? 6'd24 : - (_theResult____h409421[31] ? + (_theResult____h409422[31] ? 6'd25 : - (_theResult____h409421[30] ? + (_theResult____h409422[30] ? 6'd26 : - (_theResult____h409421[29] ? + (_theResult____h409422[29] ? 6'd27 : - (_theResult____h409421[28] ? + (_theResult____h409422[28] ? 6'd28 : - (_theResult____h409421[27] ? + (_theResult____h409422[27] ? 6'd29 : - (_theResult____h409421[26] ? + (_theResult____h409422[26] ? 6'd30 : - (_theResult____h409421[25] ? + (_theResult____h409422[25] ? 6'd31 : - (_theResult____h409421[24] ? + (_theResult____h409422[24] ? 6'd32 : - (_theResult____h409421[23] ? + (_theResult____h409422[23] ? 6'd33 : - (_theResult____h409421[22] ? + (_theResult____h409422[22] ? 6'd34 : - (_theResult____h409421[21] ? + (_theResult____h409422[21] ? 6'd35 : - (_theResult____h409421[20] ? + (_theResult____h409422[20] ? 6'd36 : - (_theResult____h409421[19] ? + (_theResult____h409422[19] ? 6'd37 : - (_theResult____h409421[18] ? + (_theResult____h409422[18] ? 6'd38 : - (_theResult____h409421[17] ? + (_theResult____h409422[17] ? 6'd39 : - (_theResult____h409421[16] ? + (_theResult____h409422[16] ? 6'd40 : - (_theResult____h409421[15] ? + (_theResult____h409422[15] ? 6'd41 : - (_theResult____h409421[14] ? + (_theResult____h409422[14] ? 6'd42 : - (_theResult____h409421[13] ? + (_theResult____h409422[13] ? 6'd43 : - (_theResult____h409421[12] ? + (_theResult____h409422[12] ? 6'd44 : - (_theResult____h409421[11] ? + (_theResult____h409422[11] ? 6'd45 : - (_theResult____h409421[10] ? + (_theResult____h409422[10] ? 6'd46 : - (_theResult____h409421[9] ? + (_theResult____h409422[9] ? 6'd47 : - (_theResult____h409421[8] ? + (_theResult____h409422[8] ? 6'd48 : - (_theResult____h409421[7] ? + (_theResult____h409422[7] ? 6'd49 : - (_theResult____h409421[6] ? + (_theResult____h409422[6] ? 6'd50 : - (_theResult____h409421[5] ? + (_theResult____h409422[5] ? 6'd51 : - (_theResult____h409421[4] ? + (_theResult____h409422[4] ? 6'd52 : - (_theResult____h409421[3] ? + (_theResult____h409422[3] ? 6'd53 : - (_theResult____h409421[2] ? + (_theResult____h409422[2] ? 6'd54 : - (_theResult____h409421[1] ? + (_theResult____h409422[1] ? 6'd55 : - (_theResult____h409421[0] ? + (_theResult____h409422[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 = - (_theResult____h455116[56] ? + (_theResult____h455117[56] ? 6'd0 : - (_theResult____h455116[55] ? + (_theResult____h455117[55] ? 6'd1 : - (_theResult____h455116[54] ? + (_theResult____h455117[54] ? 6'd2 : - (_theResult____h455116[53] ? + (_theResult____h455117[53] ? 6'd3 : - (_theResult____h455116[52] ? + (_theResult____h455117[52] ? 6'd4 : - (_theResult____h455116[51] ? + (_theResult____h455117[51] ? 6'd5 : - (_theResult____h455116[50] ? + (_theResult____h455117[50] ? 6'd6 : - (_theResult____h455116[49] ? + (_theResult____h455117[49] ? 6'd7 : - (_theResult____h455116[48] ? + (_theResult____h455117[48] ? 6'd8 : - (_theResult____h455116[47] ? + (_theResult____h455117[47] ? 6'd9 : - (_theResult____h455116[46] ? + (_theResult____h455117[46] ? 6'd10 : - (_theResult____h455116[45] ? + (_theResult____h455117[45] ? 6'd11 : - (_theResult____h455116[44] ? + (_theResult____h455117[44] ? 6'd12 : - (_theResult____h455116[43] ? + (_theResult____h455117[43] ? 6'd13 : - (_theResult____h455116[42] ? + (_theResult____h455117[42] ? 6'd14 : - (_theResult____h455116[41] ? + (_theResult____h455117[41] ? 6'd15 : - (_theResult____h455116[40] ? + (_theResult____h455117[40] ? 6'd16 : - (_theResult____h455116[39] ? + (_theResult____h455117[39] ? 6'd17 : - (_theResult____h455116[38] ? + (_theResult____h455117[38] ? 6'd18 : - (_theResult____h455116[37] ? + (_theResult____h455117[37] ? 6'd19 : - (_theResult____h455116[36] ? + (_theResult____h455117[36] ? 6'd20 : - (_theResult____h455116[35] ? + (_theResult____h455117[35] ? 6'd21 : - (_theResult____h455116[34] ? + (_theResult____h455117[34] ? 6'd22 : - (_theResult____h455116[33] ? + (_theResult____h455117[33] ? 6'd23 : - (_theResult____h455116[32] ? + (_theResult____h455117[32] ? 6'd24 : - (_theResult____h455116[31] ? + (_theResult____h455117[31] ? 6'd25 : - (_theResult____h455116[30] ? + (_theResult____h455117[30] ? 6'd26 : - (_theResult____h455116[29] ? + (_theResult____h455117[29] ? 6'd27 : - (_theResult____h455116[28] ? + (_theResult____h455117[28] ? 6'd28 : - (_theResult____h455116[27] ? + (_theResult____h455117[27] ? 6'd29 : - (_theResult____h455116[26] ? + (_theResult____h455117[26] ? 6'd30 : - (_theResult____h455116[25] ? + (_theResult____h455117[25] ? 6'd31 : - (_theResult____h455116[24] ? + (_theResult____h455117[24] ? 6'd32 : - (_theResult____h455116[23] ? + (_theResult____h455117[23] ? 6'd33 : - (_theResult____h455116[22] ? + (_theResult____h455117[22] ? 6'd34 : - (_theResult____h455116[21] ? + (_theResult____h455117[21] ? 6'd35 : - (_theResult____h455116[20] ? + (_theResult____h455117[20] ? 6'd36 : - (_theResult____h455116[19] ? + (_theResult____h455117[19] ? 6'd37 : - (_theResult____h455116[18] ? + (_theResult____h455117[18] ? 6'd38 : - (_theResult____h455116[17] ? + (_theResult____h455117[17] ? 6'd39 : - (_theResult____h455116[16] ? + (_theResult____h455117[16] ? 6'd40 : - (_theResult____h455116[15] ? + (_theResult____h455117[15] ? 6'd41 : - (_theResult____h455116[14] ? + (_theResult____h455117[14] ? 6'd42 : - (_theResult____h455116[13] ? + (_theResult____h455117[13] ? 6'd43 : - (_theResult____h455116[12] ? + (_theResult____h455117[12] ? 6'd44 : - (_theResult____h455116[11] ? + (_theResult____h455117[11] ? 6'd45 : - (_theResult____h455116[10] ? + (_theResult____h455117[10] ? 6'd46 : - (_theResult____h455116[9] ? + (_theResult____h455117[9] ? 6'd47 : - (_theResult____h455116[8] ? + (_theResult____h455117[8] ? 6'd48 : - (_theResult____h455116[7] ? + (_theResult____h455117[7] ? 6'd49 : - (_theResult____h455116[6] ? + (_theResult____h455117[6] ? 6'd50 : - (_theResult____h455116[5] ? + (_theResult____h455117[5] ? 6'd51 : - (_theResult____h455116[4] ? + (_theResult____h455117[4] ? 6'd52 : - (_theResult____h455116[3] ? + (_theResult____h455117[3] ? 6'd53 : - (_theResult____h455116[2] ? + (_theResult____h455117[2] ? 6'd54 : - (_theResult____h455116[1] ? + (_theResult____h455117[1] ? 6'd55 : - (_theResult____h455116[0] ? + (_theResult____h455117[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10424 = - (_theResult___fst_exp__h549958 == 11'd2047) ? + (_theResult___fst_exp__h549959 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -20908,10 +20908,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10691 = - (_theResult___fst_exp__h549958 == 11'd2047) ? + (_theResult___fst_exp__h549959 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -20919,10 +20919,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d8939 = - (_theResult___fst_exp__h511105 == 11'd2047) ? + (_theResult___fst_exp__h511106 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -20930,10 +20930,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9654 = - (_theResult___fst_exp__h589262 == 11'd2047) ? + (_theResult___fst_exp__h589263 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -20941,10 +20941,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9922 = - (_theResult___fst_exp__h589262 == 11'd2047) ? + (_theResult___fst_exp__h589263 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -20952,538 +20952,538 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310 = - (guard__h346095 == 2'b0 || + (guard__h346096 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h354196 : - _theResult___exp__h354712 ; + _theResult___fst_exp__h354197 : + _theResult___exp__h354713 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313 = - (guard__h346095 == 2'b0) ? - _theResult___fst_exp__h354196 : + (guard__h346096 == 2'b0) ? + _theResult___fst_exp__h354197 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h354712 : - _theResult___fst_exp__h354196) ; + _theResult___exp__h354713 : + _theResult___fst_exp__h354197) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957 = - (guard__h346095 == 2'b0 || + (guard__h346096 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h354190[56:34] : - _theResult___sfd__h354713 ; + sfdin__h354191[56:34] : + _theResult___sfd__h354714 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959 = - (guard__h346095 == 2'b0) ? - sfdin__h354190[56:34] : + (guard__h346096 == 2'b0) ? + sfdin__h354191[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h354713 : - sfdin__h354190[56:34]) ; + _theResult___sfd__h354714 : + sfdin__h354191[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702 = - (guard__h391794 == 2'b0 || + (guard__h391795 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h399893 : - _theResult___exp__h400409 ; + _theResult___fst_exp__h399894 : + _theResult___exp__h400410 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705 = - (guard__h391794 == 2'b0) ? - _theResult___fst_exp__h399893 : + (guard__h391795 == 2'b0) ? + _theResult___fst_exp__h399894 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h400409 : - _theResult___fst_exp__h399893) ; + _theResult___exp__h400410 : + _theResult___fst_exp__h399894) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349 = - (guard__h391794 == 2'b0 || + (guard__h391795 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h399887[56:34] : - _theResult___sfd__h400410 ; + sfdin__h399888[56:34] : + _theResult___sfd__h400411 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351 = - (guard__h391794 == 2'b0) ? - sfdin__h399887[56:34] : + (guard__h391795 == 2'b0) ? + sfdin__h399888[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h400410 : - sfdin__h399887[56:34]) ; + _theResult___sfd__h400411 : + sfdin__h399888[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094 = - (guard__h437489 == 2'b0 || + (guard__h437490 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h445588 : - _theResult___exp__h446104 ; + _theResult___fst_exp__h445589 : + _theResult___exp__h446105 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097 = - (guard__h437489 == 2'b0) ? - _theResult___fst_exp__h445588 : + (guard__h437490 == 2'b0) ? + _theResult___fst_exp__h445589 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h446104 : - _theResult___fst_exp__h445588) ; + _theResult___exp__h446105 : + _theResult___fst_exp__h445589) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741 = - (guard__h437489 == 2'b0 || + (guard__h437490 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h445582[56:34] : - _theResult___sfd__h446105 ; + sfdin__h445583[56:34] : + _theResult___sfd__h446106 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743 = - (guard__h437489 == 2'b0) ? - sfdin__h445582[56:34] : + (guard__h437490 == 2'b0) ? + sfdin__h445583[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h446105 : - sfdin__h445582[56:34]) ; + _theResult___sfd__h446106 : + sfdin__h445583[56:34]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536 = - (guard__h541732 == 2'b0 || + (guard__h541733 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h549958 : - _theResult___exp__h550687 ; + _theResult___fst_exp__h549959 : + _theResult___exp__h550688 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538 = - (guard__h541732 == 2'b0) ? - _theResult___fst_exp__h549958 : + (guard__h541733 == 2'b0) ? + _theResult___fst_exp__h549959 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h550687 : - _theResult___fst_exp__h549958) ; + _theResult___exp__h550688 : + _theResult___fst_exp__h549959) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619 = - (guard__h541732 == 2'b0 || + (guard__h541733 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - sfdin__h549952[56:5] : - _theResult___sfd__h550688 ; + sfdin__h549953[56:5] : + _theResult___sfd__h550689 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621 = - (guard__h541732 == 2'b0) ? - sfdin__h549952[56:5] : + (guard__h541733 == 2'b0) ? + sfdin__h549953[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h550688 : - sfdin__h549952[56:5]) ; + _theResult___sfd__h550689 : + sfdin__h549953[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056 = - (guard__h502879 == 2'b0 || + (guard__h502880 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h511105 : - _theResult___exp__h511834 ; + _theResult___fst_exp__h511106 : + _theResult___exp__h511835 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058 = - (guard__h502879 == 2'b0) ? - _theResult___fst_exp__h511105 : + (guard__h502880 == 2'b0) ? + _theResult___fst_exp__h511106 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h511834 : - _theResult___fst_exp__h511105) ; + _theResult___exp__h511835 : + _theResult___fst_exp__h511106) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140 = - (guard__h502879 == 2'b0 || + (guard__h502880 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - sfdin__h511099[56:5] : - _theResult___sfd__h511835 ; + sfdin__h511100[56:5] : + _theResult___sfd__h511836 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142 = - (guard__h502879 == 2'b0) ? - sfdin__h511099[56:5] : + (guard__h502880 == 2'b0) ? + sfdin__h511100[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h511835 : - sfdin__h511099[56:5]) ; + _theResult___sfd__h511836 : + sfdin__h511100[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766 = - (guard__h581036 == 2'b0 || + (guard__h581037 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h589262 : - _theResult___exp__h589991 ; + _theResult___fst_exp__h589263 : + _theResult___exp__h589992 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768 = - (guard__h581036 == 2'b0) ? - _theResult___fst_exp__h589262 : + (guard__h581037 == 2'b0) ? + _theResult___fst_exp__h589263 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h589991 : - _theResult___fst_exp__h589262) ; + _theResult___exp__h589992 : + _theResult___fst_exp__h589263) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849 = - (guard__h581036 == 2'b0 || + (guard__h581037 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - sfdin__h589256[56:5] : - _theResult___sfd__h589992 ; + sfdin__h589257[56:5] : + _theResult___sfd__h589993 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851 = - (guard__h581036 == 2'b0) ? - sfdin__h589256[56:5] : + (guard__h581037 == 2'b0) ? + sfdin__h589257[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h589992 : - sfdin__h589256[56:5]) ; + _theResult___sfd__h589993 : + sfdin__h589257[56:5]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857 = - (guard__h363734 == 2'b0 || + (guard__h363735 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h371962 : - _theResult___exp__h372478 ; + _theResult___fst_exp__h371963 : + _theResult___exp__h372479 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859 = - (guard__h363734 == 2'b0) ? - _theResult___fst_exp__h371962 : + (guard__h363735 == 2'b0) ? + _theResult___fst_exp__h371963 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h372478 : - _theResult___fst_exp__h371962) ; + _theResult___exp__h372479 : + _theResult___fst_exp__h371963) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003 = - (guard__h363734 == 2'b0 || + (guard__h363735 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h371956[56:34] : - _theResult___sfd__h372479 ; + sfdin__h371957[56:34] : + _theResult___sfd__h372480 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005 = - (guard__h363734 == 2'b0) ? - sfdin__h371956[56:34] : + (guard__h363735 == 2'b0) ? + sfdin__h371957[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h372479 : - sfdin__h371956[56:34]) ; + _theResult___sfd__h372480 : + sfdin__h371957[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249 = - (guard__h409431 == 2'b0 || + (guard__h409432 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h417659 : - _theResult___exp__h418175 ; + _theResult___fst_exp__h417660 : + _theResult___exp__h418176 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251 = - (guard__h409431 == 2'b0) ? - _theResult___fst_exp__h417659 : + (guard__h409432 == 2'b0) ? + _theResult___fst_exp__h417660 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h418175 : - _theResult___fst_exp__h417659) ; + _theResult___exp__h418176 : + _theResult___fst_exp__h417660) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395 = - (guard__h409431 == 2'b0 || + (guard__h409432 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h417653[56:34] : - _theResult___sfd__h418176 ; + sfdin__h417654[56:34] : + _theResult___sfd__h418177 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397 = - (guard__h409431 == 2'b0) ? - sfdin__h417653[56:34] : + (guard__h409432 == 2'b0) ? + sfdin__h417654[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h418176 : - sfdin__h417653[56:34]) ; + _theResult___sfd__h418177 : + sfdin__h417654[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641 = - (guard__h455126 == 2'b0 || + (guard__h455127 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h463354 : - _theResult___exp__h463870 ; + _theResult___fst_exp__h463355 : + _theResult___exp__h463871 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643 = - (guard__h455126 == 2'b0) ? - _theResult___fst_exp__h463354 : + (guard__h455127 == 2'b0) ? + _theResult___fst_exp__h463355 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h463870 : - _theResult___fst_exp__h463354) ; + _theResult___exp__h463871 : + _theResult___fst_exp__h463355) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787 = - (guard__h455126 == 2'b0 || + (guard__h455127 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h463348[56:34] : - _theResult___sfd__h463871 ; + sfdin__h463349[56:34] : + _theResult___sfd__h463872 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789 = - (guard__h455126 == 2'b0) ? - sfdin__h463348[56:34] : + (guard__h455127 == 2'b0) ? + sfdin__h463349[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h463871 : - sfdin__h463348[56:34]) ; + _theResult___sfd__h463872 : + sfdin__h463349[56:34]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498 = - (guard__h532420 == 2'b0 || + (guard__h532421 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h540381 : - _theResult___exp__h541036 ; + _theResult___fst_exp__h540382 : + _theResult___exp__h541037 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500 = - (guard__h532420 == 2'b0) ? - _theResult___fst_exp__h540381 : + (guard__h532421 == 2'b0) ? + _theResult___fst_exp__h540382 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h541036 : - _theResult___fst_exp__h540381) ; + _theResult___exp__h541037 : + _theResult___fst_exp__h540382) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567 = - (guard__h550801 == 2'b0 || + (guard__h550802 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h558791 : - _theResult___exp__h559471 ; + _theResult___fst_exp__h558792 : + _theResult___exp__h559472 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569 = - (guard__h550801 == 2'b0) ? - _theResult___fst_exp__h558791 : + (guard__h550802 == 2'b0) ? + _theResult___fst_exp__h558792 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h559471 : - _theResult___fst_exp__h558791) ; + _theResult___exp__h559472 : + _theResult___fst_exp__h558792) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593 = - (guard__h532420 == 2'b0 || + (guard__h532421 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h540332[56:5] : - _theResult___sfd__h541037 ; + _theResult___snd__h540333[56:5] : + _theResult___sfd__h541038 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595 = - (guard__h532420 == 2'b0) ? - _theResult___snd__h540332[56:5] : + (guard__h532421 == 2'b0) ? + _theResult___snd__h540333[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h541037 : - _theResult___snd__h540332[56:5]) ; + _theResult___sfd__h541038 : + _theResult___snd__h540333[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638 = - (guard__h550801 == 2'b0 || + (guard__h550802 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h558737[56:5] : - _theResult___sfd__h559472 ; + _theResult___snd__h558738[56:5] : + _theResult___sfd__h559473 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640 = - (guard__h550801 == 2'b0) ? - _theResult___snd__h558737[56:5] : + (guard__h550802 == 2'b0) ? + _theResult___snd__h558738[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h559472 : - _theResult___snd__h558737[56:5]) ; + _theResult___sfd__h559473 : + _theResult___snd__h558738[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013 = - (guard__h493567 == 2'b0 || + (guard__h493568 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h501528 : - _theResult___exp__h502183 ; + _theResult___fst_exp__h501529 : + _theResult___exp__h502184 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015 = - (guard__h493567 == 2'b0) ? - _theResult___fst_exp__h501528 : + (guard__h493568 == 2'b0) ? + _theResult___fst_exp__h501529 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h502183 : - _theResult___fst_exp__h501528) ; + _theResult___exp__h502184 : + _theResult___fst_exp__h501529) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087 = - (guard__h511948 == 2'b0 || + (guard__h511949 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h519938 : - _theResult___exp__h520618 ; + _theResult___fst_exp__h519939 : + _theResult___exp__h520619 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089 = - (guard__h511948 == 2'b0) ? - _theResult___fst_exp__h519938 : + (guard__h511949 == 2'b0) ? + _theResult___fst_exp__h519939 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h520618 : - _theResult___fst_exp__h519938) ; + _theResult___exp__h520619 : + _theResult___fst_exp__h519939) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113 = - (guard__h493567 == 2'b0 || + (guard__h493568 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h501479[56:5] : - _theResult___sfd__h502184 ; + _theResult___snd__h501480[56:5] : + _theResult___sfd__h502185 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115 = - (guard__h493567 == 2'b0) ? - _theResult___snd__h501479[56:5] : + (guard__h493568 == 2'b0) ? + _theResult___snd__h501480[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h502184 : - _theResult___snd__h501479[56:5]) ; + _theResult___sfd__h502185 : + _theResult___snd__h501480[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159 = - (guard__h511948 == 2'b0 || + (guard__h511949 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h519884[56:5] : - _theResult___sfd__h520619 ; + _theResult___snd__h519885[56:5] : + _theResult___sfd__h520620 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161 = - (guard__h511948 == 2'b0) ? - _theResult___snd__h519884[56:5] : + (guard__h511949 == 2'b0) ? + _theResult___snd__h519885[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h520619 : - _theResult___snd__h519884[56:5]) ; + _theResult___sfd__h520620 : + _theResult___snd__h519885[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728 = - (guard__h571724 == 2'b0 || + (guard__h571725 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h579685 : - _theResult___exp__h580340 ; + _theResult___fst_exp__h579686 : + _theResult___exp__h580341 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730 = - (guard__h571724 == 2'b0) ? - _theResult___fst_exp__h579685 : + (guard__h571725 == 2'b0) ? + _theResult___fst_exp__h579686 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h580340 : - _theResult___fst_exp__h579685) ; + _theResult___exp__h580341 : + _theResult___fst_exp__h579686) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797 = - (guard__h590105 == 2'b0 || + (guard__h590106 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h598095 : - _theResult___exp__h598775 ; + _theResult___fst_exp__h598096 : + _theResult___exp__h598776 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799 = - (guard__h590105 == 2'b0) ? - _theResult___fst_exp__h598095 : + (guard__h590106 == 2'b0) ? + _theResult___fst_exp__h598096 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h598775 : - _theResult___fst_exp__h598095) ; + _theResult___exp__h598776 : + _theResult___fst_exp__h598096) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823 = - (guard__h571724 == 2'b0 || + (guard__h571725 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h579636[56:5] : - _theResult___sfd__h580341 ; + _theResult___snd__h579637[56:5] : + _theResult___sfd__h580342 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825 = - (guard__h571724 == 2'b0) ? - _theResult___snd__h579636[56:5] : + (guard__h571725 == 2'b0) ? + _theResult___snd__h579637[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h580341 : - _theResult___snd__h579636[56:5]) ; + _theResult___sfd__h580342 : + _theResult___snd__h579637[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868 = - (guard__h590105 == 2'b0 || + (guard__h590106 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h598041[56:5] : - _theResult___sfd__h598776 ; + _theResult___snd__h598042[56:5] : + _theResult___sfd__h598777 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870 = - (guard__h590105 == 2'b0) ? - _theResult___snd__h598041[56:5] : + (guard__h590106 == 2'b0) ? + _theResult___snd__h598042[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h598776 : - _theResult___snd__h598041[56:5]) ; + _theResult___sfd__h598777 : + _theResult___snd__h598042[56:5]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532 = - (guard__h354804 == 2'b0 || + (guard__h354805 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h362852 : - _theResult___exp__h363294 ; + _theResult___fst_exp__h362853 : + _theResult___exp__h363295 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534 = - (guard__h354804 == 2'b0) ? - _theResult___fst_exp__h362852 : + (guard__h354805 == 2'b0) ? + _theResult___fst_exp__h362853 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h363294 : - _theResult___fst_exp__h362852) ; + _theResult___exp__h363295 : + _theResult___fst_exp__h362853) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926 = - (guard__h372570 == 2'b0 || + (guard__h372571 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h380647 : - _theResult___exp__h381114 ; + _theResult___fst_exp__h380648 : + _theResult___exp__h381115 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928 = - (guard__h372570 == 2'b0) ? - _theResult___fst_exp__h380647 : + (guard__h372571 == 2'b0) ? + _theResult___fst_exp__h380648 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h381114 : - _theResult___fst_exp__h380647) ; + _theResult___exp__h381115 : + _theResult___fst_exp__h380648) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976 = - (guard__h354804 == 2'b0 || + (guard__h354805 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h362803[56:34] : - _theResult___sfd__h363295 ; + _theResult___snd__h362804[56:34] : + _theResult___sfd__h363296 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978 = - (guard__h354804 == 2'b0) ? - _theResult___snd__h362803[56:34] : + (guard__h354805 == 2'b0) ? + _theResult___snd__h362804[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h363295 : - _theResult___snd__h362803[56:34]) ; + _theResult___sfd__h363296 : + _theResult___snd__h362804[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 = - (guard__h372570 == 2'b0 || + (guard__h372571 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h380593[56:34] : - _theResult___sfd__h381115 ; + _theResult___snd__h380594[56:34] : + _theResult___sfd__h381116 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 = - (guard__h372570 == 2'b0) ? - _theResult___snd__h380593[56:34] : + (guard__h372571 == 2'b0) ? + _theResult___snd__h380594[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h381115 : - _theResult___snd__h380593[56:34]) ; + _theResult___sfd__h381116 : + _theResult___snd__h380594[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924 = - (guard__h400501 == 2'b0 || + (guard__h400502 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h408549 : - _theResult___exp__h408991 ; + _theResult___fst_exp__h408550 : + _theResult___exp__h408992 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926 = - (guard__h400501 == 2'b0) ? - _theResult___fst_exp__h408549 : + (guard__h400502 == 2'b0) ? + _theResult___fst_exp__h408550 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h408991 : - _theResult___fst_exp__h408549) ; + _theResult___exp__h408992 : + _theResult___fst_exp__h408550) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318 = - (guard__h418267 == 2'b0 || + (guard__h418268 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h426344 : - _theResult___exp__h426811 ; + _theResult___fst_exp__h426345 : + _theResult___exp__h426812 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320 = - (guard__h418267 == 2'b0) ? - _theResult___fst_exp__h426344 : + (guard__h418268 == 2'b0) ? + _theResult___fst_exp__h426345 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h426811 : - _theResult___fst_exp__h426344) ; + _theResult___exp__h426812 : + _theResult___fst_exp__h426345) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368 = - (guard__h400501 == 2'b0 || + (guard__h400502 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h408500[56:34] : - _theResult___sfd__h408992 ; + _theResult___snd__h408501[56:34] : + _theResult___sfd__h408993 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370 = - (guard__h400501 == 2'b0) ? - _theResult___snd__h408500[56:34] : + (guard__h400502 == 2'b0) ? + _theResult___snd__h408501[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h408992 : - _theResult___snd__h408500[56:34]) ; + _theResult___sfd__h408993 : + _theResult___snd__h408501[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 = - (guard__h418267 == 2'b0 || + (guard__h418268 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h426290[56:34] : - _theResult___sfd__h426812 ; + _theResult___snd__h426291[56:34] : + _theResult___sfd__h426813 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 = - (guard__h418267 == 2'b0) ? - _theResult___snd__h426290[56:34] : + (guard__h418268 == 2'b0) ? + _theResult___snd__h426291[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h426812 : - _theResult___snd__h426290[56:34]) ; + _theResult___sfd__h426813 : + _theResult___snd__h426291[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316 = - (guard__h446196 == 2'b0 || + (guard__h446197 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h454244 : - _theResult___exp__h454686 ; + _theResult___fst_exp__h454245 : + _theResult___exp__h454687 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318 = - (guard__h446196 == 2'b0) ? - _theResult___fst_exp__h454244 : + (guard__h446197 == 2'b0) ? + _theResult___fst_exp__h454245 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h454686 : - _theResult___fst_exp__h454244) ; + _theResult___exp__h454687 : + _theResult___fst_exp__h454245) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710 = - (guard__h463962 == 2'b0 || + (guard__h463963 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h472039 : - _theResult___exp__h472506 ; + _theResult___fst_exp__h472040 : + _theResult___exp__h472507 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712 = - (guard__h463962 == 2'b0) ? - _theResult___fst_exp__h472039 : + (guard__h463963 == 2'b0) ? + _theResult___fst_exp__h472040 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h472506 : - _theResult___fst_exp__h472039) ; + _theResult___exp__h472507 : + _theResult___fst_exp__h472040) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760 = - (guard__h446196 == 2'b0 || + (guard__h446197 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h454195[56:34] : - _theResult___sfd__h454687 ; + _theResult___snd__h454196[56:34] : + _theResult___sfd__h454688 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762 = - (guard__h446196 == 2'b0) ? - _theResult___snd__h454195[56:34] : + (guard__h446197 == 2'b0) ? + _theResult___snd__h454196[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h454687 : - _theResult___snd__h454195[56:34]) ; + _theResult___sfd__h454688 : + _theResult___snd__h454196[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 = - (guard__h463962 == 2'b0 || + (guard__h463963 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h471985[56:34] : - _theResult___sfd__h472507 ; + _theResult___snd__h471986[56:34] : + _theResult___sfd__h472508 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 = - (guard__h463962 == 2'b0) ? - _theResult___snd__h471985[56:34] : + (guard__h463963 == 2'b0) ? + _theResult___snd__h471986[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h472507 : - _theResult___snd__h471985[56:34]) ; + _theResult___sfd__h472508 : + _theResult___snd__h471986[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10470 = - (_theResult___fst_exp__h558791 == 11'd2047) ? + (_theResult___fst_exp__h558792 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21491,10 +21491,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10676 = - (_theResult___fst_exp__h540381 == 11'd2047) ? + (_theResult___fst_exp__h540382 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21502,10 +21502,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10703 = - (_theResult___fst_exp__h558791 == 11'd2047) ? + (_theResult___fst_exp__h558792 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21513,10 +21513,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d8985 = - (_theResult___fst_exp__h519938 == 11'd2047) ? + (_theResult___fst_exp__h519939 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -21524,10 +21524,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9700 = - (_theResult___fst_exp__h598095 == 11'd2047) ? + (_theResult___fst_exp__h598096 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21535,10 +21535,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9907 = - (_theResult___fst_exp__h579685 == 11'd2047) ? + (_theResult___fst_exp__h579686 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21546,10 +21546,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9934 = - (_theResult___fst_exp__h598095 == 11'd2047) ? + (_theResult___fst_exp__h598096 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21557,7 +21557,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171) ; assign IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824 = (_theResult____h651118 == 16'd0 && @@ -21626,77 +21626,77 @@ module mkCore(CLK, checkForException___d13698[4] || csrf_fs_reg_read__1546_EQ_0_2997_AND_fetchStag_ETC___d13791 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 = - ((f2_exp__h521134 == 8'd0) ? - (f2_sfd__h521135[22] ? + ((f2_exp__h521135 == 8'd0) ? + (f2_sfd__h521136[22] ? 6'd2 : - (f2_sfd__h521135[21] ? + (f2_sfd__h521136[21] ? 6'd3 : - (f2_sfd__h521135[20] ? + (f2_sfd__h521136[20] ? 6'd4 : - (f2_sfd__h521135[19] ? + (f2_sfd__h521136[19] ? 6'd5 : - (f2_sfd__h521135[18] ? + (f2_sfd__h521136[18] ? 6'd6 : - (f2_sfd__h521135[17] ? + (f2_sfd__h521136[17] ? 6'd7 : - (f2_sfd__h521135[16] ? + (f2_sfd__h521136[16] ? 6'd8 : - (f2_sfd__h521135[15] ? + (f2_sfd__h521136[15] ? 6'd9 : - (f2_sfd__h521135[14] ? + (f2_sfd__h521136[14] ? 6'd10 : - (f2_sfd__h521135[13] ? + (f2_sfd__h521136[13] ? 6'd11 : - (f2_sfd__h521135[12] ? + (f2_sfd__h521136[12] ? 6'd12 : - (f2_sfd__h521135[11] ? + (f2_sfd__h521136[11] ? 6'd13 : - (f2_sfd__h521135[10] ? + (f2_sfd__h521136[10] ? 6'd14 : - (f2_sfd__h521135[9] ? + (f2_sfd__h521136[9] ? 6'd15 : - (f2_sfd__h521135[8] ? + (f2_sfd__h521136[8] ? 6'd16 : - (f2_sfd__h521135[7] ? + (f2_sfd__h521136[7] ? 6'd17 : - (f2_sfd__h521135[6] ? + (f2_sfd__h521136[6] ? 6'd18 : - (f2_sfd__h521135[5] ? + (f2_sfd__h521136[5] ? 6'd19 : - (f2_sfd__h521135[4] ? + (f2_sfd__h521136[4] ? 6'd20 : - (f2_sfd__h521135[3] ? + (f2_sfd__h521136[3] ? 6'd21 : - (f2_sfd__h521135[2] ? + (f2_sfd__h521136[2] ? 6'd22 : - (f2_sfd__h521135[1] ? + (f2_sfd__h521136[1] ? 6'd23 : - (f2_sfd__h521135[0] ? + (f2_sfd__h521136[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10474 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0 || - (f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0 || + (f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - ((f2_exp__h521134 == 8'd0) ? + ((f2_exp__h521135 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10129 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10472) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0) ? - _theResult___snd_fst_sfd__h521450 : - _theResult___fst_sfd__h559590 ; + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0) ? + _theResult___snd_fst_sfd__h521451 : + _theResult___fst_sfd__h559591 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10652 = - { (f2_exp__h521134 == 8'd255) ? + { (f2_exp__h521135 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h559586, + _theResult___fst_exp__h559587, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10706 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != @@ -21706,15 +21706,15 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10678) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10705 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10707 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0 || - (f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0 || + (f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10706 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[4] : @@ -21722,7 +21722,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10803 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[4] : @@ -21730,7 +21730,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10847 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[4] : @@ -21738,7 +21738,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10862 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[3] : @@ -21746,7 +21746,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10872 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[3] : @@ -21754,7 +21754,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10883 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[3] : @@ -21762,211 +21762,211 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10902 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10916 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10914 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10931 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10929 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10948 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10946 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10960 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10958 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10971 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10990 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10988 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11002 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11000 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11015 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11013 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 = - ((f1_exp__h482140 == 8'd0) ? - (f1_sfd__h482141[22] ? + ((f1_exp__h482141 == 8'd0) ? + (f1_sfd__h482142[22] ? 6'd2 : - (f1_sfd__h482141[21] ? + (f1_sfd__h482142[21] ? 6'd3 : - (f1_sfd__h482141[20] ? + (f1_sfd__h482142[20] ? 6'd4 : - (f1_sfd__h482141[19] ? + (f1_sfd__h482142[19] ? 6'd5 : - (f1_sfd__h482141[18] ? + (f1_sfd__h482142[18] ? 6'd6 : - (f1_sfd__h482141[17] ? + (f1_sfd__h482142[17] ? 6'd7 : - (f1_sfd__h482141[16] ? + (f1_sfd__h482142[16] ? 6'd8 : - (f1_sfd__h482141[15] ? + (f1_sfd__h482142[15] ? 6'd9 : - (f1_sfd__h482141[14] ? + (f1_sfd__h482142[14] ? 6'd10 : - (f1_sfd__h482141[13] ? + (f1_sfd__h482142[13] ? 6'd11 : - (f1_sfd__h482141[12] ? + (f1_sfd__h482142[12] ? 6'd12 : - (f1_sfd__h482141[11] ? + (f1_sfd__h482142[11] ? 6'd13 : - (f1_sfd__h482141[10] ? + (f1_sfd__h482142[10] ? 6'd14 : - (f1_sfd__h482141[9] ? + (f1_sfd__h482142[9] ? 6'd15 : - (f1_sfd__h482141[8] ? + (f1_sfd__h482142[8] ? 6'd16 : - (f1_sfd__h482141[7] ? + (f1_sfd__h482142[7] ? 6'd17 : - (f1_sfd__h482141[6] ? + (f1_sfd__h482142[6] ? 6'd18 : - (f1_sfd__h482141[5] ? + (f1_sfd__h482142[5] ? 6'd19 : - (f1_sfd__h482141[4] ? + (f1_sfd__h482142[4] ? 6'd20 : - (f1_sfd__h482141[3] ? + (f1_sfd__h482142[3] ? 6'd21 : - (f1_sfd__h482141[2] ? + (f1_sfd__h482142[2] ? 6'd22 : - (f1_sfd__h482141[1] ? + (f1_sfd__h482142[1] ? 6'd23 : - (f1_sfd__h482141[0] ? + (f1_sfd__h482142[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8989 = - (f1_exp__h482140 == 8'd255 && f1_sfd__h482141 != 23'd0 || - (f1_exp__h482140 == 8'd255 || f1_exp__h482140 == 8'd0) && - f1_sfd__h482141 == 23'd0) ? + (f1_exp__h482141 == 8'd255 && f1_sfd__h482142 != 23'd0 || + (f1_exp__h482141 == 8'd255 || f1_exp__h482141 == 8'd0) && + f1_sfd__h482142 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - ((f1_exp__h482140 == 8'd0) ? + ((f1_exp__h482141 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8644 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8987) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172 = - (f1_exp__h482140 == 8'd255 && f1_sfd__h482141 != 23'd0) ? - _theResult___snd_fst_sfd__h482456 : - _theResult___fst_sfd__h520737 ; + (f1_exp__h482141 == 8'd255 && f1_sfd__h482142 != 23'd0) ? + _theResult___snd_fst_sfd__h482457 : + _theResult___fst_sfd__h520738 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9173 = { IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8989, - (f1_exp__h482140 == 8'd255) ? + (f1_exp__h482141 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h520733, + _theResult___fst_exp__h520734, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 = - ((f3_exp__h560438 == 8'd0) ? - (f3_sfd__h560439[22] ? + ((f3_exp__h560439 == 8'd0) ? + (f3_sfd__h560440[22] ? 6'd2 : - (f3_sfd__h560439[21] ? + (f3_sfd__h560440[21] ? 6'd3 : - (f3_sfd__h560439[20] ? + (f3_sfd__h560440[20] ? 6'd4 : - (f3_sfd__h560439[19] ? + (f3_sfd__h560440[19] ? 6'd5 : - (f3_sfd__h560439[18] ? + (f3_sfd__h560440[18] ? 6'd6 : - (f3_sfd__h560439[17] ? + (f3_sfd__h560440[17] ? 6'd7 : - (f3_sfd__h560439[16] ? + (f3_sfd__h560440[16] ? 6'd8 : - (f3_sfd__h560439[15] ? + (f3_sfd__h560440[15] ? 6'd9 : - (f3_sfd__h560439[14] ? + (f3_sfd__h560440[14] ? 6'd10 : - (f3_sfd__h560439[13] ? + (f3_sfd__h560440[13] ? 6'd11 : - (f3_sfd__h560439[12] ? + (f3_sfd__h560440[12] ? 6'd12 : - (f3_sfd__h560439[11] ? + (f3_sfd__h560440[11] ? 6'd13 : - (f3_sfd__h560439[10] ? + (f3_sfd__h560440[10] ? 6'd14 : - (f3_sfd__h560439[9] ? + (f3_sfd__h560440[9] ? 6'd15 : - (f3_sfd__h560439[8] ? + (f3_sfd__h560440[8] ? 6'd16 : - (f3_sfd__h560439[7] ? + (f3_sfd__h560440[7] ? 6'd17 : - (f3_sfd__h560439[6] ? + (f3_sfd__h560440[6] ? 6'd18 : - (f3_sfd__h560439[5] ? + (f3_sfd__h560440[5] ? 6'd19 : - (f3_sfd__h560439[4] ? + (f3_sfd__h560440[4] ? 6'd20 : - (f3_sfd__h560439[3] ? + (f3_sfd__h560440[3] ? 6'd21 : - (f3_sfd__h560439[2] ? + (f3_sfd__h560440[2] ? 6'd22 : - (f3_sfd__h560439[1] ? + (f3_sfd__h560440[1] ? 6'd23 : - (f3_sfd__h560439[0] ? + (f3_sfd__h560440[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9704 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0 || - (f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0 || + (f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - ((f3_exp__h560438 == 8'd0) ? + ((f3_exp__h560439 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9359 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9702) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0) ? - _theResult___snd_fst_sfd__h560754 : - _theResult___fst_sfd__h598894 ; + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0) ? + _theResult___snd_fst_sfd__h560755 : + _theResult___fst_sfd__h598895 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9882 = - { (f3_exp__h560438 == 8'd255) ? + { (f3_exp__h560439 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h598890, + _theResult___fst_exp__h598891, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9937 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != @@ -21976,9 +21976,9 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9909) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9936 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9938 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0 || - (f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0 || + (f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -22187,7 +22187,7 @@ module mkCore(CLK, assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10129 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 || - _theResult___fst_exp__h540381 == 11'd2047) ? + _theResult___fst_exp__h540382 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -22195,12 +22195,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8644 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 || - _theResult___fst_exp__h501528 == 11'd2047) ? + _theResult___fst_exp__h501529 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -22208,12 +22208,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9359 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 || - _theResult___fst_exp__h579685 == 11'd2047) ? + _theResult___fst_exp__h579686 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -22221,7 +22221,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163) ; assign IF_NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3__ETC___d13243 = IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824[0] ? @@ -22706,7 +22706,7 @@ module mkCore(CLK, 4'd9) ? 4'd14 : 4'd15)))))))))) ; - assign IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674 = + assign IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -22745,48 +22745,48 @@ module mkCore(CLK, assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[2] : - _theResult___fst_exp__h520721 == 11'd2047 && - _theResult___fst_sfd__h520722 == 52'd0 ; + _theResult___fst_exp__h520722 == 11'd2047 && + _theResult___fst_sfd__h520723 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10914 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[2] : - _theResult___fst_exp__h559574 == 11'd2047 && - _theResult___fst_sfd__h559575 == 52'd0 ; + _theResult___fst_exp__h559575 == 11'd2047 && + _theResult___fst_sfd__h559576 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10929 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[2] : - _theResult___fst_exp__h598878 == 11'd2047 && - _theResult___fst_sfd__h598879 == 52'd0 ; + _theResult___fst_exp__h598879 == 11'd2047 && + _theResult___fst_sfd__h598880 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10946 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[1] : - _theResult___fst_exp__h519938 == 11'd0 && - guard__h511948 != 2'b0 ; + _theResult___fst_exp__h519939 == 11'd0 && + guard__h511949 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10958 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[1] : - _theResult___fst_exp__h558791 == 11'd0 && - guard__h550801 != 2'b0 ; + _theResult___fst_exp__h558792 == 11'd0 && + guard__h550802 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10971 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[1] : - _theResult___fst_exp__h598095 == 11'd0 && - guard__h590105 != 2'b0 ; + _theResult___fst_exp__h598096 == 11'd0 && + guard__h590106 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10988 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[0] : - _theResult___fst_exp__h519938 != 11'd2047 && - guard__h511948 != 2'b0 ; + _theResult___fst_exp__h519939 != 11'd2047 && + guard__h511949 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11000 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[0] : - _theResult___fst_exp__h558791 != 11'd2047 && - guard__h550801 != 2'b0 ; + _theResult___fst_exp__h558792 != 11'd2047 && + guard__h550802 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11013 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[0] : - _theResult___fst_exp__h598095 != 11'd2047 && - guard__h590105 != 2'b0 ; + _theResult___fst_exp__h598096 != 11'd2047 && + guard__h590106 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8946 = ((SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? @@ -22832,35 +22832,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5099 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - ((_theResult___fst_exp__h371962 == 8'd255) ? + ((_theResult___fst_exp__h371963 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084) : - ((_theResult___fst_exp__h380647 == 8'd255) ? + ((_theResult___fst_exp__h380648 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5136 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - ((_theResult___fst_exp__h371962 == 8'd255) ? + ((_theResult___fst_exp__h371963 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127) : - ((_theResult___fst_exp__h380647 == 8'd255) ? + ((_theResult___fst_exp__h380648 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5227 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[2] : - _theResult___fst_exp__h381195 == 8'd255 && - _theResult___fst_sfd__h381196 == 23'd0 ; + _theResult___fst_exp__h381196 == 8'd255 && + _theResult___fst_sfd__h381197 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5240 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[1] : - _theResult___fst_exp__h380647 == 8'd0 && - guard__h372570 != 2'b0 ; + _theResult___fst_exp__h380648 == 8'd0 && + guard__h372571 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5253 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[0] : - _theResult___fst_exp__h380647 != 8'd255 && - guard__h372570 != 2'b0 ; + _theResult___fst_exp__h380648 != 8'd255 && + guard__h372571 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] == 8'd0) ? @@ -22870,35 +22870,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6491 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - ((_theResult___fst_exp__h417659 == 8'd255) ? + ((_theResult___fst_exp__h417660 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476) : - ((_theResult___fst_exp__h426344 == 8'd255) ? + ((_theResult___fst_exp__h426345 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6528 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - ((_theResult___fst_exp__h417659 == 8'd255) ? + ((_theResult___fst_exp__h417660 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519) : - ((_theResult___fst_exp__h426344 == 8'd255) ? + ((_theResult___fst_exp__h426345 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6619 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[2] : - _theResult___fst_exp__h426892 == 8'd255 && - _theResult___fst_sfd__h426893 == 23'd0 ; + _theResult___fst_exp__h426893 == 8'd255 && + _theResult___fst_sfd__h426894 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6632 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[1] : - _theResult___fst_exp__h426344 == 8'd0 && - guard__h418267 != 2'b0 ; + _theResult___fst_exp__h426345 == 8'd0 && + guard__h418268 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6645 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[0] : - _theResult___fst_exp__h426344 != 8'd255 && - guard__h418267 != 2'b0 ; + _theResult___fst_exp__h426345 != 8'd255 && + guard__h418268 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] == 8'd0) ? @@ -22908,35 +22908,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7883 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - ((_theResult___fst_exp__h463354 == 8'd255) ? + ((_theResult___fst_exp__h463355 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868) : - ((_theResult___fst_exp__h472039 == 8'd255) ? + ((_theResult___fst_exp__h472040 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7920 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - ((_theResult___fst_exp__h463354 == 8'd255) ? + ((_theResult___fst_exp__h463355 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911) : - ((_theResult___fst_exp__h472039 == 8'd255) ? + ((_theResult___fst_exp__h472040 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8011 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[2] : - _theResult___fst_exp__h472587 == 8'd255 && - _theResult___fst_sfd__h472588 == 23'd0 ; + _theResult___fst_exp__h472588 == 8'd255 && + _theResult___fst_sfd__h472589 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8024 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[1] : - _theResult___fst_exp__h472039 == 8'd0 && - guard__h463962 != 2'b0 ; + _theResult___fst_exp__h472040 == 8'd0 && + guard__h463963 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8037 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[0] : - _theResult___fst_exp__h472039 != 8'd255 && - guard__h463962 != 2'b0 ; + _theResult___fst_exp__h472040 != 8'd255 && + guard__h463963 != 2'b0 ; assign IF_checkForException_3008_BIT_4_3009_THEN_IF_c_ETC___d13159 = checkForException___d13008[4] ? CASE_checkForException_3008_BITS_3_TO_0_0_chec_ETC__q234 : @@ -23631,39 +23631,39 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198 = { (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd7) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd6) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd5) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd4) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd3) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd2) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2208 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd1) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd0) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2521 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == @@ -23716,7 +23716,7 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2567 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == 3'd2) ? - x__h197126 : + x__h197127 : (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEh_ETC___d2150 ? 64'd0 : 64'd1) ; @@ -23728,7 +23728,7 @@ module mkCore(CLK, WILL_FIRE_RL_coreFix_memExe_dMem_cache_m_banks_0_cRqTransfer_retry || coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3058 = - _theResult_____2__h296521 == v__h295941 ; + _theResult_____2__h296522 == v__h295942 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3138 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23737,7 +23737,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_lat_0$whas || coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3160 = - _theResult_____2__h304517 == v__h299286 ; + _theResult_____2__h304518 == v__h299287 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3180 = EN_dCacheToParent_fromP_enq ? !coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23766,7 +23766,7 @@ module mkCore(CLK, EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[514:3] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[514:3], - x__h302151 } ; + x__h302152 } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_linkAdd_ETC___d3004 = !MUX_flush_reservation$write_1__SEL_1 && (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_lat_0$whas ? @@ -23864,35 +23864,35 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998 = { (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd7) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd6) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd5) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd4) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd3) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd2) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd1) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? @@ -23920,7 +23920,7 @@ module mkCore(CLK, EN_dCacheToParent_rqToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3332 = - _theResult_____2__h310511 == v__h309800 ; + _theResult_____2__h310512 == v__h309801 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3405 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -23929,7 +23929,7 @@ module mkCore(CLK, EN_dCacheToParent_rsToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3428 = - _theResult_____2__h318365 == v__h313676 ; + _theResult_____2__h318366 == v__h313677 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3447 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -24081,7 +24081,7 @@ module mkCore(CLK, !coreFix_aluExe_0_bypassWire_1$whas || coreFix_memExe_dispToRegQ$RDY_first ; assign IF_coreFix_memExe_forwardQ_deqReq_dummy2_2_rea_ETC___d3750 = - _theResult_____2__h331934 == v__h331502 ; + _theResult_____2__h331935 == v__h331503 ; assign IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3743 = WILL_FIRE_RL_coreFix_memExe_doRespLdForward || coreFix_memExe_forwardQ_deqReq_rl ; @@ -24130,7 +24130,7 @@ module mkCore(CLK, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_31_TO_0_ETC___d1398 }) : IF_coreFix_memExe_lsq_firstLd__277_BIT_94_352__ETC___d1424 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_dummy2_2_r_ETC___d3656 = - _theResult_____2__h328709 == v__h328277 ; + _theResult_____2__h328710 == v__h328278 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3649 = WILL_FIRE_RL_coreFix_memExe_doRespLdMem || coreFix_memExe_memRespLdQ_deqReq_rl ; @@ -24162,7 +24162,7 @@ module mkCore(CLK, coreFix_memExe_respLrScAmoQ_enqReq_rl[64] ; assign IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 = csrf_minstret_ehr_data_lat_0$whas ? - upd__h727048 : + upd__h726805 : csrf_minstret_ehr_data_rl ; assign IF_csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_c_ETC___d14920 = csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_comm_ETC___d14718 ? @@ -24288,17 +24288,17 @@ module mkCore(CLK, EN_mmioToPlatform_pRs_enq ? mmio_pRsQ_enqReq_lat_0$wget[67] : mmio_pRsQ_enqReq_rl[67] ; - assign IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 = - rob$deqPort_0_canDeq ? y_avValue_fst__h730270 : 5'd0 ; - assign IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 = + assign IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 = + rob$deqPort_0_canDeq ? y_avValue_fst__h730027 : 5'd0 ; + assign IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_fst__h730745 : + y_avValue_snd_snd_snd_fst__h730502 : 2'd0 ; assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15191 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? csrf_sepc_csr : csrf_mepc_csr ; - assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282 = + assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? { csrf_mpp_reg, 3'd0, @@ -24321,52 +24321,52 @@ module mkCore(CLK, assign IF_rob_deqPort_0_deq_data__4339_BITS_97_TO_96__ETC___d14512 = { CASE_robdeqPort_0_deq_data_BITS_97_TO_96_0_ro_ETC__q252, rob$deqPort_0_deq_data[95:32] } ; - assign IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675 = + assign IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681 = rob$deqPort_1_canDeq ? - IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674 : + IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680 : rob$deqPort_0_canDeq && rob$deqPort_0_deq_data[26] ; - assign IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139 = - sfdin__h511099[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74 = - sfdin__h417653[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99 = - sfdin__h445582[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179 = - sfdin__h549952[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29 = - sfdin__h354190[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109 = - sfdin__h463348[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39 = - sfdin__h371956[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156 = - sfdin__h589256[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64 = - sfdin__h399887[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135 = - _theResult___snd__h501479[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66 = - _theResult___snd__h408500[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142 = - _theResult___snd__h519884[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79 = - _theResult___snd__h426290[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175 = - _theResult___snd__h540332[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101 = - _theResult___snd__h454195[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182 = - _theResult___snd__h558737[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31 = - _theResult___snd__h362803[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114 = - _theResult___snd__h471985[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152 = - _theResult___snd__h579636[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44 = - _theResult___snd__h380593[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159 = - _theResult___snd__h598041[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139 = + sfdin__h511100[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74 = + sfdin__h417654[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99 = + sfdin__h445583[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179 = + sfdin__h549953[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29 = + sfdin__h354191[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109 = + sfdin__h463349[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39 = + sfdin__h371957[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156 = + sfdin__h589257[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64 = + sfdin__h399888[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135 = + _theResult___snd__h501480[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66 = + _theResult___snd__h408501[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142 = + _theResult___snd__h519885[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79 = + _theResult___snd__h426291[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175 = + _theResult___snd__h540333[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101 = + _theResult___snd__h454196[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182 = + _theResult___snd__h558738[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31 = + _theResult___snd__h362804[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114 = + _theResult___snd__h471986[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152 = + _theResult___snd__h579637[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44 = + _theResult___snd__h380594[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159 = + _theResult___snd__h598042[4] ? 2'd2 : 2'd0 ; assign NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5221 = !_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 || (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? @@ -24457,132 +24457,132 @@ module mkCore(CLK, !IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824[15] && !checkForException___d13698[4] && NOT_csrf_fs_reg_read__1546_EQ_0_2997_2998_OR_N_ETC___d13723 ; - assign NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 = - (fflags__h733530 & csrf_fflags_reg) != fflags__h733530 || + assign NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 = + (fflags__h733287 & csrf_fflags_reg) != fflags__h733287 || csrf_fs_reg != 2'b11 && - (IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675 || - fflags__h733530 != 5'd0) ; + (IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681 || + fflags__h733287 != 5'd0) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 = - !f2_sfd__h521135[21] && !f2_sfd__h521135[20] && - !f2_sfd__h521135[19] && - !f2_sfd__h521135[18] && - !f2_sfd__h521135[17] && - !f2_sfd__h521135[16] && - !f2_sfd__h521135[15] && - !f2_sfd__h521135[14] && - !f2_sfd__h521135[13] && - !f2_sfd__h521135[12] && - !f2_sfd__h521135[11] && - !f2_sfd__h521135[10] && - !f2_sfd__h521135[9] && - !f2_sfd__h521135[8] && - !f2_sfd__h521135[7] && - !f2_sfd__h521135[6] && - !f2_sfd__h521135[5] && - !f2_sfd__h521135[4] && - !f2_sfd__h521135[3] && - !f2_sfd__h521135[2] && - !f2_sfd__h521135[1] && - !f2_sfd__h521135[0] ; + !f2_sfd__h521136[21] && !f2_sfd__h521136[20] && + !f2_sfd__h521136[19] && + !f2_sfd__h521136[18] && + !f2_sfd__h521136[17] && + !f2_sfd__h521136[16] && + !f2_sfd__h521136[15] && + !f2_sfd__h521136[14] && + !f2_sfd__h521136[13] && + !f2_sfd__h521136[12] && + !f2_sfd__h521136[11] && + !f2_sfd__h521136[10] && + !f2_sfd__h521136[9] && + !f2_sfd__h521136[8] && + !f2_sfd__h521136[7] && + !f2_sfd__h521136[6] && + !f2_sfd__h521136[5] && + !f2_sfd__h521136[4] && + !f2_sfd__h521136[3] && + !f2_sfd__h521136[2] && + !f2_sfd__h521136[1] && + !f2_sfd__h521136[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10803) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10865 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10862 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10865 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10872) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10905 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10902 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10920 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10905 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10916) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10951 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10948 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10964 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10951 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10960) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10993 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10990 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11006 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10993 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11002) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 = - !f1_sfd__h482141[21] && !f1_sfd__h482141[20] && - !f1_sfd__h482141[19] && - !f1_sfd__h482141[18] && - !f1_sfd__h482141[17] && - !f1_sfd__h482141[16] && - !f1_sfd__h482141[15] && - !f1_sfd__h482141[14] && - !f1_sfd__h482141[13] && - !f1_sfd__h482141[12] && - !f1_sfd__h482141[11] && - !f1_sfd__h482141[10] && - !f1_sfd__h482141[9] && - !f1_sfd__h482141[8] && - !f1_sfd__h482141[7] && - !f1_sfd__h482141[6] && - !f1_sfd__h482141[5] && - !f1_sfd__h482141[4] && - !f1_sfd__h482141[3] && - !f1_sfd__h482141[2] && - !f1_sfd__h482141[1] && - !f1_sfd__h482141[0] ; + !f1_sfd__h482142[21] && !f1_sfd__h482142[20] && + !f1_sfd__h482142[19] && + !f1_sfd__h482142[18] && + !f1_sfd__h482142[17] && + !f1_sfd__h482142[16] && + !f1_sfd__h482142[15] && + !f1_sfd__h482142[14] && + !f1_sfd__h482142[13] && + !f1_sfd__h482142[12] && + !f1_sfd__h482142[11] && + !f1_sfd__h482142[10] && + !f1_sfd__h482142[9] && + !f1_sfd__h482142[8] && + !f1_sfd__h482142[7] && + !f1_sfd__h482142[6] && + !f1_sfd__h482142[5] && + !f1_sfd__h482142[4] && + !f1_sfd__h482142[3] && + !f1_sfd__h482142[2] && + !f1_sfd__h482142[1] && + !f1_sfd__h482142[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 = - !f3_sfd__h560439[21] && !f3_sfd__h560439[20] && - !f3_sfd__h560439[19] && - !f3_sfd__h560439[18] && - !f3_sfd__h560439[17] && - !f3_sfd__h560439[16] && - !f3_sfd__h560439[15] && - !f3_sfd__h560439[14] && - !f3_sfd__h560439[13] && - !f3_sfd__h560439[12] && - !f3_sfd__h560439[11] && - !f3_sfd__h560439[10] && - !f3_sfd__h560439[9] && - !f3_sfd__h560439[8] && - !f3_sfd__h560439[7] && - !f3_sfd__h560439[6] && - !f3_sfd__h560439[5] && - !f3_sfd__h560439[4] && - !f3_sfd__h560439[3] && - !f3_sfd__h560439[2] && - !f3_sfd__h560439[1] && - !f3_sfd__h560439[0] ; + !f3_sfd__h560440[21] && !f3_sfd__h560440[20] && + !f3_sfd__h560440[19] && + !f3_sfd__h560440[18] && + !f3_sfd__h560440[17] && + !f3_sfd__h560440[16] && + !f3_sfd__h560440[15] && + !f3_sfd__h560440[14] && + !f3_sfd__h560440[13] && + !f3_sfd__h560440[12] && + !f3_sfd__h560440[11] && + !f3_sfd__h560440[10] && + !f3_sfd__h560440[9] && + !f3_sfd__h560440[8] && + !f3_sfd__h560440[7] && + !f3_sfd__h560440[6] && + !f3_sfd__h560440[5] && + !f3_sfd__h560440[4] && + !f3_sfd__h560440[3] && + !f3_sfd__h560440[2] && + !f3_sfd__h560440[1] && + !f3_sfd__h560440[0] ; assign NOT_SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__ETC___d13484 = !SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__343_ETC___d13482 && (fetchStage$pipelines_0_first[194:192] != 3'd1 || @@ -24641,7 +24641,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd19 || rob$deqPort_0_deq_data[329:325] == 5'd20) && _0b0_CONCAT_csrf_external_int_pend_vec_3_read___ETC___d14324 ; - assign NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368 = + assign NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374 = NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15005 && rob$deqPort_0_deq_data[329:325] != 5'd0 && rob$deqPort_0_deq_data[329:325] != 5'd21 && @@ -25537,14 +25537,14 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13725 && rob$enqPort_1_canEnq && epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13894 ; - assign NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356 = + assign NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362 = (!rob$deqPort_0_canDeq || rob$RDY_deqPort_0_deq && regRenamingTable$RDY_commit_0_commit && v_f_to_TV_0$FULL_N) && (!rob$deqPort_1_canDeq || rob$RDY_deqPort_1_deq_data && - NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353) ; - assign NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 = + NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359) ; + assign NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 = (!rob$deqPort_0_canDeq || rob$deqPort_0_deq_data[25] && !rob$deqPort_0_deq_data[18] && !rob$deqPort_0_deq_data[167] && @@ -25566,7 +25566,7 @@ module mkCore(CLK, (IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 != 6'd6 || csrf_terminate_module_terminateQ$FULL_N) ; - assign NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353 = + assign NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359 = !rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -25611,27 +25611,27 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, !CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q268, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2938, - x__h291616 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096 = + x__h291617 } ; + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q269, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q270, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q271 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052 = + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q253, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q254, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q255, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q256 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q257, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q258 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q262, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q263 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10131 = - { {4{f2_exp21134_MINUS_127__q176[7]}}, - f2_exp21134_MINUS_127__q176 } ; + { {4{f2_exp21135_MINUS_127__q176[7]}}, + f2_exp21135_MINUS_127__q176 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10131 ^ 12'h800) <= @@ -25641,8 +25641,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8646 = - { {4{f1_exp82140_MINUS_127__q136[7]}}, - f1_exp82140_MINUS_127__q136 } ; + { {4{f1_exp82141_MINUS_127__q136[7]}}, + f1_exp82141_MINUS_127__q136 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8646 ^ 12'h800) <= @@ -25652,8 +25652,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9361 = - { {4{f3_exp60438_MINUS_127__q153[7]}}, - f3_exp60438_MINUS_127__q153 } ; + { {4{f3_exp60439_MINUS_127__q153[7]}}, + f3_exp60439_MINUS_127__q153 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9361 ^ 12'h800) <= @@ -25738,15 +25738,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5169 = { 3'd0, - _theResult___fst_exp__h354196 == 8'd0 && - (sfdin__h354190[56:34] == 23'd0 || guard__h346095 != 2'b0), + _theResult___fst_exp__h354197 == 8'd0 && + (sfdin__h354191[56:34] == 23'd0 || guard__h346096 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h354793 == 8'd255 && - _theResult___fst_sfd__h354794 == 23'd0, + _theResult___fst_exp__h354794 == 8'd255 && + _theResult___fst_sfd__h354795 == 23'd0, 1'd0, - _theResult___fst_exp__h354196 != 8'd255 && - guard__h346095 != 2'b0 } ; + _theResult___fst_exp__h354197 != 8'd255 && + guard__h346096 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 } ^ @@ -25754,15 +25754,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6561 = { 3'd0, - _theResult___fst_exp__h399893 == 8'd0 && - (sfdin__h399887[56:34] == 23'd0 || guard__h391794 != 2'b0), + _theResult___fst_exp__h399894 == 8'd0 && + (sfdin__h399888[56:34] == 23'd0 || guard__h391795 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h400490 == 8'd255 && - _theResult___fst_sfd__h400491 == 23'd0, + _theResult___fst_exp__h400491 == 8'd255 && + _theResult___fst_sfd__h400492 == 23'd0, 1'd0, - _theResult___fst_exp__h399893 != 8'd255 && - guard__h391794 != 2'b0 } ; + _theResult___fst_exp__h399894 != 8'd255 && + guard__h391795 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 } ^ @@ -25770,15 +25770,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7953 = { 3'd0, - _theResult___fst_exp__h445588 == 8'd0 && - (sfdin__h445582[56:34] == 23'd0 || guard__h437489 != 2'b0), + _theResult___fst_exp__h445589 == 8'd0 && + (sfdin__h445583[56:34] == 23'd0 || guard__h437490 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h446185 == 8'd255 && - _theResult___fst_sfd__h446186 == 23'd0, + _theResult___fst_exp__h446186 == 8'd255 && + _theResult___fst_sfd__h446187 == 23'd0, 1'd0, - _theResult___fst_exp__h445588 != 8'd255 && - guard__h437489 != 2'b0 } ; + _theResult___fst_exp__h445589 != 8'd255 && + guard__h437490 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 } ^ @@ -25786,37 +25786,37 @@ module mkCore(CLK, 12'd2048 ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758 = { 3'd0, - _theResult___fst_exp__h511105 == 11'd0 && - (sfdin__h511099[56:5] == 52'd0 || guard__h502879 != 2'b0), + _theResult___fst_exp__h511106 == 11'd0 && + (sfdin__h511100[56:5] == 52'd0 || guard__h502880 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h511937 == 11'd2047 && - _theResult___fst_sfd__h511938 == 52'd0, + _theResult___fst_exp__h511938 == 11'd2047 && + _theResult___fst_sfd__h511939 == 52'd0, 1'd0, - _theResult___fst_exp__h511105 != 11'd2047 && - guard__h502879 != 2'b0 } ; + _theResult___fst_exp__h511106 != 11'd2047 && + guard__h502880 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799 = { 3'd0, - _theResult___fst_exp__h549958 == 11'd0 && - (sfdin__h549952[56:5] == 52'd0 || guard__h541732 != 2'b0), + _theResult___fst_exp__h549959 == 11'd0 && + (sfdin__h549953[56:5] == 52'd0 || guard__h541733 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h550790 == 11'd2047 && - _theResult___fst_sfd__h550791 == 52'd0, + _theResult___fst_exp__h550791 == 11'd2047 && + _theResult___fst_sfd__h550792 == 52'd0, 1'd0, - _theResult___fst_exp__h549958 != 11'd2047 && - guard__h541732 != 2'b0 } ; + _theResult___fst_exp__h549959 != 11'd2047 && + guard__h541733 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843 = { 3'd0, - _theResult___fst_exp__h589262 == 11'd0 && - (sfdin__h589256[56:5] == 52'd0 || guard__h581036 != 2'b0), + _theResult___fst_exp__h589263 == 11'd0 && + (sfdin__h589257[56:5] == 52'd0 || guard__h581037 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h590094 == 11'd2047 && - _theResult___fst_sfd__h590095 == 52'd0, + _theResult___fst_exp__h590095 == 11'd2047 && + _theResult___fst_sfd__h590096 == 52'd0, 1'd0, - _theResult___fst_exp__h589262 != 11'd2047 && - guard__h581036 != 2'b0 } ; + _theResult___fst_exp__h589263 != 11'd2047 && + guard__h581037 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 } ^ @@ -25834,15 +25834,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198 = { 3'd0, - _theResult___fst_exp__h371962 == 8'd0 && - (sfdin__h371956[56:34] == 23'd0 || guard__h363734 != 2'b0), + _theResult___fst_exp__h371963 == 8'd0 && + (sfdin__h371957[56:34] == 23'd0 || guard__h363735 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h372559 == 8'd255 && - _theResult___fst_sfd__h372560 == 23'd0, + _theResult___fst_exp__h372560 == 8'd255 && + _theResult___fst_sfd__h372561 == 23'd0, 1'd0, - _theResult___fst_exp__h371962 != 8'd255 && - guard__h363734 != 2'b0 } ; + _theResult___fst_exp__h371963 != 8'd255 && + guard__h363735 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 } ^ @@ -25850,15 +25850,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590 = { 3'd0, - _theResult___fst_exp__h417659 == 8'd0 && - (sfdin__h417653[56:34] == 23'd0 || guard__h409431 != 2'b0), + _theResult___fst_exp__h417660 == 8'd0 && + (sfdin__h417654[56:34] == 23'd0 || guard__h409432 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h418256 == 8'd255 && - _theResult___fst_sfd__h418257 == 23'd0, + _theResult___fst_exp__h418257 == 8'd255 && + _theResult___fst_sfd__h418258 == 23'd0, 1'd0, - _theResult___fst_exp__h417659 != 8'd255 && - guard__h409431 != 2'b0 } ; + _theResult___fst_exp__h417660 != 8'd255 && + guard__h409432 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 } ^ @@ -25866,15 +25866,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982 = { 3'd0, - _theResult___fst_exp__h463354 == 8'd0 && - (sfdin__h463348[56:34] == 23'd0 || guard__h455126 != 2'b0), + _theResult___fst_exp__h463355 == 8'd0 && + (sfdin__h463349[56:34] == 23'd0 || guard__h455127 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h463951 == 8'd255 && - _theResult___fst_sfd__h463952 == 23'd0, + _theResult___fst_exp__h463952 == 8'd255 && + _theResult___fst_sfd__h463953 == 23'd0, 1'd0, - _theResult___fst_exp__h463354 != 8'd255 && - guard__h455126 != 2'b0 } ; + _theResult___fst_exp__h463355 != 8'd255 && + guard__h455127 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ^ @@ -25888,37 +25888,37 @@ module mkCore(CLK, 12'h800) ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741 = { 3'd0, - _theResult___fst_exp__h501528 == 11'd0 && - guard__h493567 != 2'b0, + _theResult___fst_exp__h501529 == 11'd0 && + guard__h493568 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h502286 == 11'd2047 && - _theResult___fst_sfd__h502287 == 52'd0, + _theResult___fst_exp__h502287 == 11'd2047 && + _theResult___fst_sfd__h502288 == 52'd0, 1'd0, - _theResult___fst_exp__h501528 != 11'd2047 && - guard__h493567 != 2'b0 } ; + _theResult___fst_exp__h501529 != 11'd2047 && + guard__h493568 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782 = { 3'd0, - _theResult___fst_exp__h540381 == 11'd0 && - guard__h532420 != 2'b0, + _theResult___fst_exp__h540382 == 11'd0 && + guard__h532421 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h541139 == 11'd2047 && - _theResult___fst_sfd__h541140 == 52'd0, + _theResult___fst_exp__h541140 == 11'd2047 && + _theResult___fst_sfd__h541141 == 52'd0, 1'd0, - _theResult___fst_exp__h540381 != 11'd2047 && - guard__h532420 != 2'b0 } ; + _theResult___fst_exp__h540382 != 11'd2047 && + guard__h532421 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826 = { 3'd0, - _theResult___fst_exp__h579685 == 11'd0 && - guard__h571724 != 2'b0, + _theResult___fst_exp__h579686 == 11'd0 && + guard__h571725 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h580443 == 11'd2047 && - _theResult___fst_sfd__h580444 == 52'd0, + _theResult___fst_exp__h580444 == 11'd2047 && + _theResult___fst_sfd__h580445 == 52'd0, 1'd0, - _theResult___fst_exp__h579685 != 11'd2047 && - guard__h571724 != 2'b0 } ; + _theResult___fst_exp__h579686 != 11'd2047 && + guard__h571725 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ^ @@ -25954,15 +25954,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5181 = { 3'd0, - _theResult___fst_exp__h362852 == 8'd0 && - guard__h354804 != 2'b0, + _theResult___fst_exp__h362853 == 8'd0 && + guard__h354805 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h363375 == 8'd255 && - _theResult___fst_sfd__h363376 == 23'd0, + _theResult___fst_exp__h363376 == 8'd255 && + _theResult___fst_sfd__h363377 == 23'd0, 1'd0, - _theResult___fst_exp__h362852 != 8'd255 && - guard__h354804 != 2'b0 } ; + _theResult___fst_exp__h362853 != 8'd255 && + guard__h354805 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ^ @@ -25976,15 +25976,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6573 = { 3'd0, - _theResult___fst_exp__h408549 == 8'd0 && - guard__h400501 != 2'b0, + _theResult___fst_exp__h408550 == 8'd0 && + guard__h400502 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h409072 == 8'd255 && - _theResult___fst_sfd__h409073 == 23'd0, + _theResult___fst_exp__h409073 == 8'd255 && + _theResult___fst_sfd__h409074 == 23'd0, 1'd0, - _theResult___fst_exp__h408549 != 8'd255 && - guard__h400501 != 2'b0 } ; + _theResult___fst_exp__h408550 != 8'd255 && + guard__h400502 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ^ @@ -25998,15 +25998,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7965 = { 3'd0, - _theResult___fst_exp__h454244 == 8'd0 && - guard__h446196 != 2'b0, + _theResult___fst_exp__h454245 == 8'd0 && + guard__h446197 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h454767 == 8'd255 && - _theResult___fst_sfd__h454768 == 23'd0, + _theResult___fst_exp__h454768 == 8'd255 && + _theResult___fst_sfd__h454769 == 23'd0, 1'd0, - _theResult___fst_exp__h454244 != 8'd255 && - guard__h446196 != 2'b0 } ; + _theResult___fst_exp__h454245 != 8'd255 && + guard__h446197 != 2'b0 } ; assign _0_CONCAT_csrf_external_int_en_vec_3_read__1664_ETC___d12798 = { 4'd0, csrf_external_int_en_vec_3 & csrf_external_int_pend_vec_3, @@ -26034,26 +26034,26 @@ module mkCore(CLK, specTagManager$RDY_nextSpecTag) && CASE_fetchStage_pipelines_0_canDeq__2755_AND_N_ETC__q241 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138 = - sfd__h521496 >> + sfd__h521497 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653 = - sfd__h482502 >> + sfd__h482503 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368 = - sfd__h560800 >> + sfd__h560801 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558 = - sfd__h338480 >> + sfd__h338481 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950 = - sfd__h384182 >> + sfd__h384183 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342 = - sfd__h429877 >> + sfd__h429878 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338) ; @@ -26468,51 +26468,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10009 = 12'd3970 - { 7'd0, - f2_sfd__h521135[22] ? + f2_sfd__h521136[22] ? 5'd0 : - (f2_sfd__h521135[21] ? + (f2_sfd__h521136[21] ? 5'd1 : - (f2_sfd__h521135[20] ? + (f2_sfd__h521136[20] ? 5'd2 : - (f2_sfd__h521135[19] ? + (f2_sfd__h521136[19] ? 5'd3 : - (f2_sfd__h521135[18] ? + (f2_sfd__h521136[18] ? 5'd4 : - (f2_sfd__h521135[17] ? + (f2_sfd__h521136[17] ? 5'd5 : - (f2_sfd__h521135[16] ? + (f2_sfd__h521136[16] ? 5'd6 : - (f2_sfd__h521135[15] ? + (f2_sfd__h521136[15] ? 5'd7 : - (f2_sfd__h521135[14] ? + (f2_sfd__h521136[14] ? 5'd8 : - (f2_sfd__h521135[13] ? + (f2_sfd__h521136[13] ? 5'd9 : - (f2_sfd__h521135[12] ? + (f2_sfd__h521136[12] ? 5'd10 : - (f2_sfd__h521135[11] ? + (f2_sfd__h521136[11] ? 5'd11 : - (f2_sfd__h521135[10] ? + (f2_sfd__h521136[10] ? 5'd12 : - (f2_sfd__h521135[9] ? + (f2_sfd__h521136[9] ? 5'd13 : - (f2_sfd__h521135[8] ? + (f2_sfd__h521136[8] ? 5'd14 : - (f2_sfd__h521135[7] ? + (f2_sfd__h521136[7] ? 5'd15 : - (f2_sfd__h521135[6] ? + (f2_sfd__h521136[6] ? 5'd16 : - (f2_sfd__h521135[5] ? + (f2_sfd__h521136[5] ? 5'd17 : - (f2_sfd__h521135[4] ? + (f2_sfd__h521136[4] ? 5'd18 : - (f2_sfd__h521135[3] ? + (f2_sfd__h521136[3] ? 5'd19 : - (f2_sfd__h521135[2] ? + (f2_sfd__h521136[2] ? 5'd20 : - (f2_sfd__h521135[1] ? + (f2_sfd__h521136[1] ? 5'd21 : - (f2_sfd__h521135[0] ? + (f2_sfd__h521136[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 = @@ -26526,51 +26526,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8509 = 12'd3970 - { 7'd0, - f1_sfd__h482141[22] ? + f1_sfd__h482142[22] ? 5'd0 : - (f1_sfd__h482141[21] ? + (f1_sfd__h482142[21] ? 5'd1 : - (f1_sfd__h482141[20] ? + (f1_sfd__h482142[20] ? 5'd2 : - (f1_sfd__h482141[19] ? + (f1_sfd__h482142[19] ? 5'd3 : - (f1_sfd__h482141[18] ? + (f1_sfd__h482142[18] ? 5'd4 : - (f1_sfd__h482141[17] ? + (f1_sfd__h482142[17] ? 5'd5 : - (f1_sfd__h482141[16] ? + (f1_sfd__h482142[16] ? 5'd6 : - (f1_sfd__h482141[15] ? + (f1_sfd__h482142[15] ? 5'd7 : - (f1_sfd__h482141[14] ? + (f1_sfd__h482142[14] ? 5'd8 : - (f1_sfd__h482141[13] ? + (f1_sfd__h482142[13] ? 5'd9 : - (f1_sfd__h482141[12] ? + (f1_sfd__h482142[12] ? 5'd10 : - (f1_sfd__h482141[11] ? + (f1_sfd__h482142[11] ? 5'd11 : - (f1_sfd__h482141[10] ? + (f1_sfd__h482142[10] ? 5'd12 : - (f1_sfd__h482141[9] ? + (f1_sfd__h482142[9] ? 5'd13 : - (f1_sfd__h482141[8] ? + (f1_sfd__h482142[8] ? 5'd14 : - (f1_sfd__h482141[7] ? + (f1_sfd__h482142[7] ? 5'd15 : - (f1_sfd__h482141[6] ? + (f1_sfd__h482142[6] ? 5'd16 : - (f1_sfd__h482141[5] ? + (f1_sfd__h482142[5] ? 5'd17 : - (f1_sfd__h482141[4] ? + (f1_sfd__h482142[4] ? 5'd18 : - (f1_sfd__h482141[3] ? + (f1_sfd__h482142[3] ? 5'd19 : - (f1_sfd__h482141[2] ? + (f1_sfd__h482142[2] ? 5'd20 : - (f1_sfd__h482141[1] ? + (f1_sfd__h482142[1] ? 5'd21 : - (f1_sfd__h482141[0] ? + (f1_sfd__h482142[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 = @@ -26584,51 +26584,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9239 = 12'd3970 - { 7'd0, - f3_sfd__h560439[22] ? + f3_sfd__h560440[22] ? 5'd0 : - (f3_sfd__h560439[21] ? + (f3_sfd__h560440[21] ? 5'd1 : - (f3_sfd__h560439[20] ? + (f3_sfd__h560440[20] ? 5'd2 : - (f3_sfd__h560439[19] ? + (f3_sfd__h560440[19] ? 5'd3 : - (f3_sfd__h560439[18] ? + (f3_sfd__h560440[18] ? 5'd4 : - (f3_sfd__h560439[17] ? + (f3_sfd__h560440[17] ? 5'd5 : - (f3_sfd__h560439[16] ? + (f3_sfd__h560440[16] ? 5'd6 : - (f3_sfd__h560439[15] ? + (f3_sfd__h560440[15] ? 5'd7 : - (f3_sfd__h560439[14] ? + (f3_sfd__h560440[14] ? 5'd8 : - (f3_sfd__h560439[13] ? + (f3_sfd__h560440[13] ? 5'd9 : - (f3_sfd__h560439[12] ? + (f3_sfd__h560440[12] ? 5'd10 : - (f3_sfd__h560439[11] ? + (f3_sfd__h560440[11] ? 5'd11 : - (f3_sfd__h560439[10] ? + (f3_sfd__h560440[10] ? 5'd12 : - (f3_sfd__h560439[9] ? + (f3_sfd__h560440[9] ? 5'd13 : - (f3_sfd__h560439[8] ? + (f3_sfd__h560440[8] ? 5'd14 : - (f3_sfd__h560439[7] ? + (f3_sfd__h560440[7] ? 5'd15 : - (f3_sfd__h560439[6] ? + (f3_sfd__h560440[6] ? 5'd16 : - (f3_sfd__h560439[5] ? + (f3_sfd__h560440[5] ? 5'd17 : - (f3_sfd__h560439[4] ? + (f3_sfd__h560440[4] ? 5'd18 : - (f3_sfd__h560439[3] ? + (f3_sfd__h560440[3] ? 5'd19 : - (f3_sfd__h560439[2] ? + (f3_sfd__h560440[2] ? 5'd20 : - (f3_sfd__h560439[1] ? + (f3_sfd__h560440[1] ? 5'd21 : - (f3_sfd__h560439[0] ? + (f3_sfd__h560440[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 = @@ -26781,1421 +26781,1421 @@ module mkCore(CLK, assign _dor1sbCons$EN_setReady_1_put = WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_F || WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_T ; - assign _theResult_____2__h296521 = + assign _theResult_____2__h296522 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3046) ? - next_deqP___1__h296800 : + next_deqP___1__h296801 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP ; - assign _theResult_____2__h304517 = + assign _theResult_____2__h304518 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3153) ? - next_deqP___1__h304796 : + next_deqP___1__h304797 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP ; - assign _theResult_____2__h310511 = + assign _theResult_____2__h310512 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3324) ? - next_deqP___1__h311077 : + next_deqP___1__h311078 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP ; - assign _theResult_____2__h318365 = + assign _theResult_____2__h318366 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3420) ? - next_deqP___1__h318931 : + next_deqP___1__h318932 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP ; - assign _theResult_____2__h328709 = + assign _theResult_____2__h328710 = (coreFix_memExe_memRespLdQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3649) ? - next_deqP___1__h328988 : + next_deqP___1__h328989 : coreFix_memExe_memRespLdQ_deqP ; - assign _theResult_____2__h331934 = + assign _theResult_____2__h331935 = (coreFix_memExe_forwardQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3743) ? - next_deqP___1__h332213 : + next_deqP___1__h332214 : coreFix_memExe_forwardQ_deqP ; - assign _theResult____h346085 = - (value__h346707 == 54'd0) ? sfd__h338480 : 57'd1 ; - assign _theResult____h363724 = + assign _theResult____h346086 = + (value__h346708 == 54'd0) ? sfd__h338481 : 57'd1 ; + assign _theResult____h363725 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554 ^ 12'h800) < 12'd2105) ? - result__h364337 : - _theResult____h346085 ; - assign _theResult____h391784 = - (value__h392404 == 54'd0) ? sfd__h384182 : 57'd1 ; - assign _theResult____h409421 = + result__h364338 : + _theResult____h346086 ; + assign _theResult____h391785 = + (value__h392405 == 54'd0) ? sfd__h384183 : 57'd1 ; + assign _theResult____h409422 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946 ^ 12'h800) < 12'd2105) ? - result__h410034 : - _theResult____h391784 ; - assign _theResult____h437479 = - (value__h438099 == 54'd0) ? sfd__h429877 : 57'd1 ; - assign _theResult____h455116 = + result__h410035 : + _theResult____h391785 ; + assign _theResult____h437480 = + (value__h438100 == 54'd0) ? sfd__h429878 : 57'd1 ; + assign _theResult____h455117 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338 ^ 12'h800) < 12'd2105) ? - result__h455729 : - _theResult____h437479 ; - assign _theResult____h502869 = + result__h455730 : + _theResult____h437480 ; + assign _theResult____h502870 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ^ 12'h800) < 12'd2105) ? - result__h503482 : - ((value__h487085 == 25'd0) ? sfd__h482502 : 57'd1) ; - assign _theResult____h541722 = + result__h503483 : + ((value__h487086 == 25'd0) ? sfd__h482503 : 57'd1) ; + assign _theResult____h541723 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ^ 12'h800) < 12'd2105) ? - result__h542335 : - ((value__h525938 == 25'd0) ? sfd__h521496 : 57'd1) ; - assign _theResult____h581026 = + result__h542336 : + ((value__h525939 == 25'd0) ? sfd__h521497 : 57'd1) ; + assign _theResult____h581027 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ^ 12'h800) < 12'd2105) ? - result__h581639 : - ((value__h565242 == 25'd0) ? sfd__h560800 : 57'd1) ; + result__h581640 : + ((value__h565243 == 25'd0) ? sfd__h560801 : 57'd1) ; assign _theResult____h651118 = (csrf_prv_reg != 2'd3 || csrf_ie_vec_3) ? enabled_ints___1__h651643 : 16'd0 ; - assign _theResult___exp__h354712 = - sfd__h354288[24] ? - ((_theResult___fst_exp__h354196 == 8'd254) ? + assign _theResult___exp__h354713 = + sfd__h354289[24] ? + ((_theResult___fst_exp__h354197 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381229) : - ((_theResult___fst_exp__h354196 == 8'd0 && - sfd__h354288[24:23] == 2'b01) ? + din_inc___2_exp__h381230) : + ((_theResult___fst_exp__h354197 == 8'd0 && + sfd__h354289[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h354196) ; - assign _theResult___exp__h363294 = - sfd__h362870[24] ? - ((_theResult___fst_exp__h362852 == 8'd254) ? + _theResult___fst_exp__h354197) ; + assign _theResult___exp__h363295 = + sfd__h362871[24] ? + ((_theResult___fst_exp__h362853 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381253) : - ((_theResult___fst_exp__h362852 == 8'd0 && - sfd__h362870[24:23] == 2'b01) ? + din_inc___2_exp__h381254) : + ((_theResult___fst_exp__h362853 == 8'd0 && + sfd__h362871[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h362852) ; - assign _theResult___exp__h372478 = - sfd__h372054[24] ? - ((_theResult___fst_exp__h371962 == 8'd254) ? + _theResult___fst_exp__h362853) ; + assign _theResult___exp__h372479 = + sfd__h372055[24] ? + ((_theResult___fst_exp__h371963 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381283) : - ((_theResult___fst_exp__h371962 == 8'd0 && - sfd__h372054[24:23] == 2'b01) ? + din_inc___2_exp__h381284) : + ((_theResult___fst_exp__h371963 == 8'd0 && + sfd__h372055[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h371962) ; - assign _theResult___exp__h381114 = - sfd__h380666[24] ? - ((_theResult___fst_exp__h380647 == 8'd254) ? + _theResult___fst_exp__h371963) ; + assign _theResult___exp__h381115 = + sfd__h380667[24] ? + ((_theResult___fst_exp__h380648 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381307) : - ((_theResult___fst_exp__h380647 == 8'd0 && - sfd__h380666[24:23] == 2'b01) ? + din_inc___2_exp__h381308) : + ((_theResult___fst_exp__h380648 == 8'd0 && + sfd__h380667[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h380647) ; - assign _theResult___exp__h381216 = + _theResult___fst_exp__h380648) ; + assign _theResult___exp__h381217 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h381207 ; - assign _theResult___exp__h400409 = - sfd__h399985[24] ? - ((_theResult___fst_exp__h399893 == 8'd254) ? + _theResult___fst_exp__h381208 ; + assign _theResult___exp__h400410 = + sfd__h399986[24] ? + ((_theResult___fst_exp__h399894 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426926) : - ((_theResult___fst_exp__h399893 == 8'd0 && - sfd__h399985[24:23] == 2'b01) ? + din_inc___2_exp__h426927) : + ((_theResult___fst_exp__h399894 == 8'd0 && + sfd__h399986[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h399893) ; - assign _theResult___exp__h408991 = - sfd__h408567[24] ? - ((_theResult___fst_exp__h408549 == 8'd254) ? + _theResult___fst_exp__h399894) ; + assign _theResult___exp__h408992 = + sfd__h408568[24] ? + ((_theResult___fst_exp__h408550 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426950) : - ((_theResult___fst_exp__h408549 == 8'd0 && - sfd__h408567[24:23] == 2'b01) ? + din_inc___2_exp__h426951) : + ((_theResult___fst_exp__h408550 == 8'd0 && + sfd__h408568[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h408549) ; - assign _theResult___exp__h418175 = - sfd__h417751[24] ? - ((_theResult___fst_exp__h417659 == 8'd254) ? + _theResult___fst_exp__h408550) ; + assign _theResult___exp__h418176 = + sfd__h417752[24] ? + ((_theResult___fst_exp__h417660 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426980) : - ((_theResult___fst_exp__h417659 == 8'd0 && - sfd__h417751[24:23] == 2'b01) ? + din_inc___2_exp__h426981) : + ((_theResult___fst_exp__h417660 == 8'd0 && + sfd__h417752[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h417659) ; - assign _theResult___exp__h426811 = - sfd__h426363[24] ? - ((_theResult___fst_exp__h426344 == 8'd254) ? + _theResult___fst_exp__h417660) ; + assign _theResult___exp__h426812 = + sfd__h426364[24] ? + ((_theResult___fst_exp__h426345 == 8'd254) ? 8'd255 : - din_inc___2_exp__h427004) : - ((_theResult___fst_exp__h426344 == 8'd0 && - sfd__h426363[24:23] == 2'b01) ? + din_inc___2_exp__h427005) : + ((_theResult___fst_exp__h426345 == 8'd0 && + sfd__h426364[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h426344) ; - assign _theResult___exp__h426913 = + _theResult___fst_exp__h426345) ; + assign _theResult___exp__h426914 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h426904 ; - assign _theResult___exp__h446104 = - sfd__h445680[24] ? - ((_theResult___fst_exp__h445588 == 8'd254) ? + _theResult___fst_exp__h426905 ; + assign _theResult___exp__h446105 = + sfd__h445681[24] ? + ((_theResult___fst_exp__h445589 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472621) : - ((_theResult___fst_exp__h445588 == 8'd0 && - sfd__h445680[24:23] == 2'b01) ? + din_inc___2_exp__h472622) : + ((_theResult___fst_exp__h445589 == 8'd0 && + sfd__h445681[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h445588) ; - assign _theResult___exp__h454686 = - sfd__h454262[24] ? - ((_theResult___fst_exp__h454244 == 8'd254) ? + _theResult___fst_exp__h445589) ; + assign _theResult___exp__h454687 = + sfd__h454263[24] ? + ((_theResult___fst_exp__h454245 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472645) : - ((_theResult___fst_exp__h454244 == 8'd0 && - sfd__h454262[24:23] == 2'b01) ? + din_inc___2_exp__h472646) : + ((_theResult___fst_exp__h454245 == 8'd0 && + sfd__h454263[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h454244) ; - assign _theResult___exp__h463870 = - sfd__h463446[24] ? - ((_theResult___fst_exp__h463354 == 8'd254) ? + _theResult___fst_exp__h454245) ; + assign _theResult___exp__h463871 = + sfd__h463447[24] ? + ((_theResult___fst_exp__h463355 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472675) : - ((_theResult___fst_exp__h463354 == 8'd0 && - sfd__h463446[24:23] == 2'b01) ? + din_inc___2_exp__h472676) : + ((_theResult___fst_exp__h463355 == 8'd0 && + sfd__h463447[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h463354) ; - assign _theResult___exp__h472506 = - sfd__h472058[24] ? - ((_theResult___fst_exp__h472039 == 8'd254) ? + _theResult___fst_exp__h463355) ; + assign _theResult___exp__h472507 = + sfd__h472059[24] ? + ((_theResult___fst_exp__h472040 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472699) : - ((_theResult___fst_exp__h472039 == 8'd0 && - sfd__h472058[24:23] == 2'b01) ? + din_inc___2_exp__h472700) : + ((_theResult___fst_exp__h472040 == 8'd0 && + sfd__h472059[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h472039) ; - assign _theResult___exp__h472608 = + _theResult___fst_exp__h472040) ; + assign _theResult___exp__h472609 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h472599 ; - assign _theResult___exp__h502183 = - sfd__h501546[53] ? - ((_theResult___fst_exp__h501528 == 11'd2046) ? + _theResult___fst_exp__h472600 ; + assign _theResult___exp__h502184 = + sfd__h501547[53] ? + ((_theResult___fst_exp__h501529 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520778) : - ((_theResult___fst_exp__h501528 == 11'd0 && - sfd__h501546[53:52] == 2'b01) ? + din_inc___2_exp__h520779) : + ((_theResult___fst_exp__h501529 == 11'd0 && + sfd__h501547[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h501528) ; - assign _theResult___exp__h511834 = - sfd__h511197[53] ? - ((_theResult___fst_exp__h511105 == 11'd2046) ? + _theResult___fst_exp__h501529) ; + assign _theResult___exp__h511835 = + sfd__h511198[53] ? + ((_theResult___fst_exp__h511106 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520813) : - ((_theResult___fst_exp__h511105 == 11'd0 && - sfd__h511197[53:52] == 2'b01) ? + din_inc___2_exp__h520814) : + ((_theResult___fst_exp__h511106 == 11'd0 && + sfd__h511198[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h511105) ; - assign _theResult___exp__h520618 = - sfd__h519957[53] ? - ((_theResult___fst_exp__h519938 == 11'd2046) ? + _theResult___fst_exp__h511106) ; + assign _theResult___exp__h520619 = + sfd__h519958[53] ? + ((_theResult___fst_exp__h519939 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520839) : - ((_theResult___fst_exp__h519938 == 11'd0 && - sfd__h519957[53:52] == 2'b01) ? + din_inc___2_exp__h520840) : + ((_theResult___fst_exp__h519939 == 11'd0 && + sfd__h519958[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h519938) ; - assign _theResult___exp__h541036 = - sfd__h540399[53] ? - ((_theResult___fst_exp__h540381 == 11'd2046) ? + _theResult___fst_exp__h519939) ; + assign _theResult___exp__h541037 = + sfd__h540400[53] ? + ((_theResult___fst_exp__h540382 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559631) : - ((_theResult___fst_exp__h540381 == 11'd0 && - sfd__h540399[53:52] == 2'b01) ? + din_inc___2_exp__h559632) : + ((_theResult___fst_exp__h540382 == 11'd0 && + sfd__h540400[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h540381) ; - assign _theResult___exp__h550687 = - sfd__h550050[53] ? - ((_theResult___fst_exp__h549958 == 11'd2046) ? + _theResult___fst_exp__h540382) ; + assign _theResult___exp__h550688 = + sfd__h550051[53] ? + ((_theResult___fst_exp__h549959 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559666) : - ((_theResult___fst_exp__h549958 == 11'd0 && - sfd__h550050[53:52] == 2'b01) ? + din_inc___2_exp__h559667) : + ((_theResult___fst_exp__h549959 == 11'd0 && + sfd__h550051[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h549958) ; - assign _theResult___exp__h559471 = - sfd__h558810[53] ? - ((_theResult___fst_exp__h558791 == 11'd2046) ? + _theResult___fst_exp__h549959) ; + assign _theResult___exp__h559472 = + sfd__h558811[53] ? + ((_theResult___fst_exp__h558792 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559692) : - ((_theResult___fst_exp__h558791 == 11'd0 && - sfd__h558810[53:52] == 2'b01) ? + din_inc___2_exp__h559693) : + ((_theResult___fst_exp__h558792 == 11'd0 && + sfd__h558811[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h558791) ; - assign _theResult___exp__h580340 = - sfd__h579703[53] ? - ((_theResult___fst_exp__h579685 == 11'd2046) ? + _theResult___fst_exp__h558792) ; + assign _theResult___exp__h580341 = + sfd__h579704[53] ? + ((_theResult___fst_exp__h579686 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598935) : - ((_theResult___fst_exp__h579685 == 11'd0 && - sfd__h579703[53:52] == 2'b01) ? + din_inc___2_exp__h598936) : + ((_theResult___fst_exp__h579686 == 11'd0 && + sfd__h579704[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h579685) ; - assign _theResult___exp__h589991 = - sfd__h589354[53] ? - ((_theResult___fst_exp__h589262 == 11'd2046) ? + _theResult___fst_exp__h579686) ; + assign _theResult___exp__h589992 = + sfd__h589355[53] ? + ((_theResult___fst_exp__h589263 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598970) : - ((_theResult___fst_exp__h589262 == 11'd0 && - sfd__h589354[53:52] == 2'b01) ? + din_inc___2_exp__h598971) : + ((_theResult___fst_exp__h589263 == 11'd0 && + sfd__h589355[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h589262) ; - assign _theResult___exp__h598775 = - sfd__h598114[53] ? - ((_theResult___fst_exp__h598095 == 11'd2046) ? + _theResult___fst_exp__h589263) ; + assign _theResult___exp__h598776 = + sfd__h598115[53] ? + ((_theResult___fst_exp__h598096 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598996) : - ((_theResult___fst_exp__h598095 == 11'd0 && - sfd__h598114[53:52] == 2'b01) ? + din_inc___2_exp__h598997) : + ((_theResult___fst_exp__h598096 == 11'd0 && + sfd__h598115[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h598095) ; - assign _theResult___fst__h603370 = - a__h602948[63] ? a___1__h603375 : a__h602948 ; - assign _theResult___fst_exp__h354196 = - _theResult____h346085[56] ? + _theResult___fst_exp__h598096) ; + assign _theResult___fst__h603371 = + a__h602949[63] ? a___1__h603376 : a__h602949 ; + assign _theResult___fst_exp__h354197 = + _theResult____h346086[56] ? 8'd2 : - _theResult___fst_exp__h354270 ; - assign _theResult___fst_exp__h354261 = + _theResult___fst_exp__h354271 ; + assign _theResult___fst_exp__h354262 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 } ; - assign _theResult___fst_exp__h354267 = - (!_theResult____h346085[56] && !_theResult____h346085[55] && - !_theResult____h346085[54] && - !_theResult____h346085[53] && - !_theResult____h346085[52] && - !_theResult____h346085[51] && - !_theResult____h346085[50] && - !_theResult____h346085[49] && - !_theResult____h346085[48] && - !_theResult____h346085[47] && - !_theResult____h346085[46] && - !_theResult____h346085[45] && - !_theResult____h346085[44] && - !_theResult____h346085[43] && - !_theResult____h346085[42] && - !_theResult____h346085[41] && - !_theResult____h346085[40] && - !_theResult____h346085[39] && - !_theResult____h346085[38] && - !_theResult____h346085[37] && - !_theResult____h346085[36] && - !_theResult____h346085[35] && - !_theResult____h346085[34] && - !_theResult____h346085[33] && - !_theResult____h346085[32] && - !_theResult____h346085[31] && - !_theResult____h346085[30] && - !_theResult____h346085[29] && - !_theResult____h346085[28] && - !_theResult____h346085[27] && - !_theResult____h346085[26] && - !_theResult____h346085[25] && - !_theResult____h346085[24] && - !_theResult____h346085[23] && - !_theResult____h346085[22] && - !_theResult____h346085[21] && - !_theResult____h346085[20] && - !_theResult____h346085[19] && - !_theResult____h346085[18] && - !_theResult____h346085[17] && - !_theResult____h346085[16] && - !_theResult____h346085[15] && - !_theResult____h346085[14] && - !_theResult____h346085[13] && - !_theResult____h346085[12] && - !_theResult____h346085[11] && - !_theResult____h346085[10] && - !_theResult____h346085[9] && - !_theResult____h346085[8] && - !_theResult____h346085[7] && - !_theResult____h346085[6] && - !_theResult____h346085[5] && - !_theResult____h346085[4] && - !_theResult____h346085[3] && - !_theResult____h346085[2] && - !_theResult____h346085[1] && - !_theResult____h346085[0] || + assign _theResult___fst_exp__h354268 = + (!_theResult____h346086[56] && !_theResult____h346086[55] && + !_theResult____h346086[54] && + !_theResult____h346086[53] && + !_theResult____h346086[52] && + !_theResult____h346086[51] && + !_theResult____h346086[50] && + !_theResult____h346086[49] && + !_theResult____h346086[48] && + !_theResult____h346086[47] && + !_theResult____h346086[46] && + !_theResult____h346086[45] && + !_theResult____h346086[44] && + !_theResult____h346086[43] && + !_theResult____h346086[42] && + !_theResult____h346086[41] && + !_theResult____h346086[40] && + !_theResult____h346086[39] && + !_theResult____h346086[38] && + !_theResult____h346086[37] && + !_theResult____h346086[36] && + !_theResult____h346086[35] && + !_theResult____h346086[34] && + !_theResult____h346086[33] && + !_theResult____h346086[32] && + !_theResult____h346086[31] && + !_theResult____h346086[30] && + !_theResult____h346086[29] && + !_theResult____h346086[28] && + !_theResult____h346086[27] && + !_theResult____h346086[26] && + !_theResult____h346086[25] && + !_theResult____h346086[24] && + !_theResult____h346086[23] && + !_theResult____h346086[22] && + !_theResult____h346086[21] && + !_theResult____h346086[20] && + !_theResult____h346086[19] && + !_theResult____h346086[18] && + !_theResult____h346086[17] && + !_theResult____h346086[16] && + !_theResult____h346086[15] && + !_theResult____h346086[14] && + !_theResult____h346086[13] && + !_theResult____h346086[12] && + !_theResult____h346086[11] && + !_theResult____h346086[10] && + !_theResult____h346086[9] && + !_theResult____h346086[8] && + !_theResult____h346086[7] && + !_theResult____h346086[6] && + !_theResult____h346086[5] && + !_theResult____h346086[4] && + !_theResult____h346086[3] && + !_theResult____h346086[2] && + !_theResult____h346086[1] && + !_theResult____h346086[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4249) ? 8'd0 : - _theResult___fst_exp__h354261 ; - assign _theResult___fst_exp__h354270 = - (!_theResult____h346085[56] && _theResult____h346085[55]) ? + _theResult___fst_exp__h354262 ; + assign _theResult___fst_exp__h354271 = + (!_theResult____h346086[56] && _theResult____h346086[55]) ? 8'd1 : - _theResult___fst_exp__h354267 ; - assign _theResult___fst_exp__h354793 = - (_theResult___fst_exp__h354196 == 8'd255) ? - _theResult___fst_exp__h354196 : - _theResult___fst_exp__h354790 ; - assign _theResult___fst_exp__h362843 = + _theResult___fst_exp__h354268 ; + assign _theResult___fst_exp__h354794 = + (_theResult___fst_exp__h354197 == 8'd255) ? + _theResult___fst_exp__h354197 : + _theResult___fst_exp__h354791 ; + assign _theResult___fst_exp__h362844 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 } ; - assign _theResult___fst_exp__h362849 = + assign _theResult___fst_exp__h362850 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4480) ? 8'd0 : - _theResult___fst_exp__h362843 ; - assign _theResult___fst_exp__h362852 = + _theResult___fst_exp__h362844 ; + assign _theResult___fst_exp__h362853 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h362849 : + _theResult___fst_exp__h362850 : 8'd129 ; - assign _theResult___fst_exp__h363375 = - (_theResult___fst_exp__h362852 == 8'd255) ? - _theResult___fst_exp__h362852 : - _theResult___fst_exp__h363372 ; - assign _theResult___fst_exp__h371962 = - _theResult____h363724[56] ? + assign _theResult___fst_exp__h363376 = + (_theResult___fst_exp__h362853 == 8'd255) ? + _theResult___fst_exp__h362853 : + _theResult___fst_exp__h363373 ; + assign _theResult___fst_exp__h371963 = + _theResult____h363725[56] ? 8'd2 : - _theResult___fst_exp__h372036 ; - assign _theResult___fst_exp__h372027 = + _theResult___fst_exp__h372037 ; + assign _theResult___fst_exp__h372028 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 } ; - assign _theResult___fst_exp__h372033 = - (!_theResult____h363724[56] && !_theResult____h363724[55] && - !_theResult____h363724[54] && - !_theResult____h363724[53] && - !_theResult____h363724[52] && - !_theResult____h363724[51] && - !_theResult____h363724[50] && - !_theResult____h363724[49] && - !_theResult____h363724[48] && - !_theResult____h363724[47] && - !_theResult____h363724[46] && - !_theResult____h363724[45] && - !_theResult____h363724[44] && - !_theResult____h363724[43] && - !_theResult____h363724[42] && - !_theResult____h363724[41] && - !_theResult____h363724[40] && - !_theResult____h363724[39] && - !_theResult____h363724[38] && - !_theResult____h363724[37] && - !_theResult____h363724[36] && - !_theResult____h363724[35] && - !_theResult____h363724[34] && - !_theResult____h363724[33] && - !_theResult____h363724[32] && - !_theResult____h363724[31] && - !_theResult____h363724[30] && - !_theResult____h363724[29] && - !_theResult____h363724[28] && - !_theResult____h363724[27] && - !_theResult____h363724[26] && - !_theResult____h363724[25] && - !_theResult____h363724[24] && - !_theResult____h363724[23] && - !_theResult____h363724[22] && - !_theResult____h363724[21] && - !_theResult____h363724[20] && - !_theResult____h363724[19] && - !_theResult____h363724[18] && - !_theResult____h363724[17] && - !_theResult____h363724[16] && - !_theResult____h363724[15] && - !_theResult____h363724[14] && - !_theResult____h363724[13] && - !_theResult____h363724[12] && - !_theResult____h363724[11] && - !_theResult____h363724[10] && - !_theResult____h363724[9] && - !_theResult____h363724[8] && - !_theResult____h363724[7] && - !_theResult____h363724[6] && - !_theResult____h363724[5] && - !_theResult____h363724[4] && - !_theResult____h363724[3] && - !_theResult____h363724[2] && - !_theResult____h363724[1] && - !_theResult____h363724[0] || + assign _theResult___fst_exp__h372034 = + (!_theResult____h363725[56] && !_theResult____h363725[55] && + !_theResult____h363725[54] && + !_theResult____h363725[53] && + !_theResult____h363725[52] && + !_theResult____h363725[51] && + !_theResult____h363725[50] && + !_theResult____h363725[49] && + !_theResult____h363725[48] && + !_theResult____h363725[47] && + !_theResult____h363725[46] && + !_theResult____h363725[45] && + !_theResult____h363725[44] && + !_theResult____h363725[43] && + !_theResult____h363725[42] && + !_theResult____h363725[41] && + !_theResult____h363725[40] && + !_theResult____h363725[39] && + !_theResult____h363725[38] && + !_theResult____h363725[37] && + !_theResult____h363725[36] && + !_theResult____h363725[35] && + !_theResult____h363725[34] && + !_theResult____h363725[33] && + !_theResult____h363725[32] && + !_theResult____h363725[31] && + !_theResult____h363725[30] && + !_theResult____h363725[29] && + !_theResult____h363725[28] && + !_theResult____h363725[27] && + !_theResult____h363725[26] && + !_theResult____h363725[25] && + !_theResult____h363725[24] && + !_theResult____h363725[23] && + !_theResult____h363725[22] && + !_theResult____h363725[21] && + !_theResult____h363725[20] && + !_theResult____h363725[19] && + !_theResult____h363725[18] && + !_theResult____h363725[17] && + !_theResult____h363725[16] && + !_theResult____h363725[15] && + !_theResult____h363725[14] && + !_theResult____h363725[13] && + !_theResult____h363725[12] && + !_theResult____h363725[11] && + !_theResult____h363725[10] && + !_theResult____h363725[9] && + !_theResult____h363725[8] && + !_theResult____h363725[7] && + !_theResult____h363725[6] && + !_theResult____h363725[5] && + !_theResult____h363725[4] && + !_theResult____h363725[3] && + !_theResult____h363725[2] && + !_theResult____h363725[1] && + !_theResult____h363725[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4800) ? 8'd0 : - _theResult___fst_exp__h372027 ; - assign _theResult___fst_exp__h372036 = - (!_theResult____h363724[56] && _theResult____h363724[55]) ? + _theResult___fst_exp__h372028 ; + assign _theResult___fst_exp__h372037 = + (!_theResult____h363725[56] && _theResult____h363725[55]) ? 8'd1 : - _theResult___fst_exp__h372033 ; - assign _theResult___fst_exp__h372559 = - (_theResult___fst_exp__h371962 == 8'd255) ? - _theResult___fst_exp__h371962 : - _theResult___fst_exp__h372556 ; - assign _theResult___fst_exp__h380599 = + _theResult___fst_exp__h372034 ; + assign _theResult___fst_exp__h372560 = + (_theResult___fst_exp__h371963 == 8'd255) ? + _theResult___fst_exp__h371963 : + _theResult___fst_exp__h372557 ; + assign _theResult___fst_exp__h380600 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] ; - assign _theResult___fst_exp__h380638 = + assign _theResult___fst_exp__h380639 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 } ; - assign _theResult___fst_exp__h380644 = + assign _theResult___fst_exp__h380645 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4873) ? 8'd0 : - _theResult___fst_exp__h380638 ; - assign _theResult___fst_exp__h380647 = + _theResult___fst_exp__h380639 ; + assign _theResult___fst_exp__h380648 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h380644 : - _theResult___fst_exp__h380599 ; - assign _theResult___fst_exp__h381195 = - (_theResult___fst_exp__h380647 == 8'd255) ? - _theResult___fst_exp__h380647 : - _theResult___fst_exp__h381192 ; - assign _theResult___fst_exp__h381204 = + _theResult___fst_exp__h380645 : + _theResult___fst_exp__h380600 ; + assign _theResult___fst_exp__h381196 = + (_theResult___fst_exp__h380648 == 8'd255) ? + _theResult___fst_exp__h380648 : + _theResult___fst_exp__h381193 ; + assign _theResult___fst_exp__h381205 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 ? - _theResult___snd_fst_exp__h363378 : - _theResult___fst_exp__h346067) : + _theResult___snd_fst_exp__h363379 : + _theResult___fst_exp__h346068) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4552 ? - _theResult___snd_fst_exp__h381198 : - _theResult___fst_exp__h346067) ; - assign _theResult___fst_exp__h381207 = + _theResult___snd_fst_exp__h381199 : + _theResult___fst_exp__h346068) ; + assign _theResult___fst_exp__h381208 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h381204 ; - assign _theResult___fst_exp__h399893 = - _theResult____h391784[56] ? + _theResult___fst_exp__h381205 ; + assign _theResult___fst_exp__h399894 = + _theResult____h391785[56] ? 8'd2 : - _theResult___fst_exp__h399967 ; - assign _theResult___fst_exp__h399958 = + _theResult___fst_exp__h399968 ; + assign _theResult___fst_exp__h399959 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 } ; - assign _theResult___fst_exp__h399964 = - (!_theResult____h391784[56] && !_theResult____h391784[55] && - !_theResult____h391784[54] && - !_theResult____h391784[53] && - !_theResult____h391784[52] && - !_theResult____h391784[51] && - !_theResult____h391784[50] && - !_theResult____h391784[49] && - !_theResult____h391784[48] && - !_theResult____h391784[47] && - !_theResult____h391784[46] && - !_theResult____h391784[45] && - !_theResult____h391784[44] && - !_theResult____h391784[43] && - !_theResult____h391784[42] && - !_theResult____h391784[41] && - !_theResult____h391784[40] && - !_theResult____h391784[39] && - !_theResult____h391784[38] && - !_theResult____h391784[37] && - !_theResult____h391784[36] && - !_theResult____h391784[35] && - !_theResult____h391784[34] && - !_theResult____h391784[33] && - !_theResult____h391784[32] && - !_theResult____h391784[31] && - !_theResult____h391784[30] && - !_theResult____h391784[29] && - !_theResult____h391784[28] && - !_theResult____h391784[27] && - !_theResult____h391784[26] && - !_theResult____h391784[25] && - !_theResult____h391784[24] && - !_theResult____h391784[23] && - !_theResult____h391784[22] && - !_theResult____h391784[21] && - !_theResult____h391784[20] && - !_theResult____h391784[19] && - !_theResult____h391784[18] && - !_theResult____h391784[17] && - !_theResult____h391784[16] && - !_theResult____h391784[15] && - !_theResult____h391784[14] && - !_theResult____h391784[13] && - !_theResult____h391784[12] && - !_theResult____h391784[11] && - !_theResult____h391784[10] && - !_theResult____h391784[9] && - !_theResult____h391784[8] && - !_theResult____h391784[7] && - !_theResult____h391784[6] && - !_theResult____h391784[5] && - !_theResult____h391784[4] && - !_theResult____h391784[3] && - !_theResult____h391784[2] && - !_theResult____h391784[1] && - !_theResult____h391784[0] || + assign _theResult___fst_exp__h399965 = + (!_theResult____h391785[56] && !_theResult____h391785[55] && + !_theResult____h391785[54] && + !_theResult____h391785[53] && + !_theResult____h391785[52] && + !_theResult____h391785[51] && + !_theResult____h391785[50] && + !_theResult____h391785[49] && + !_theResult____h391785[48] && + !_theResult____h391785[47] && + !_theResult____h391785[46] && + !_theResult____h391785[45] && + !_theResult____h391785[44] && + !_theResult____h391785[43] && + !_theResult____h391785[42] && + !_theResult____h391785[41] && + !_theResult____h391785[40] && + !_theResult____h391785[39] && + !_theResult____h391785[38] && + !_theResult____h391785[37] && + !_theResult____h391785[36] && + !_theResult____h391785[35] && + !_theResult____h391785[34] && + !_theResult____h391785[33] && + !_theResult____h391785[32] && + !_theResult____h391785[31] && + !_theResult____h391785[30] && + !_theResult____h391785[29] && + !_theResult____h391785[28] && + !_theResult____h391785[27] && + !_theResult____h391785[26] && + !_theResult____h391785[25] && + !_theResult____h391785[24] && + !_theResult____h391785[23] && + !_theResult____h391785[22] && + !_theResult____h391785[21] && + !_theResult____h391785[20] && + !_theResult____h391785[19] && + !_theResult____h391785[18] && + !_theResult____h391785[17] && + !_theResult____h391785[16] && + !_theResult____h391785[15] && + !_theResult____h391785[14] && + !_theResult____h391785[13] && + !_theResult____h391785[12] && + !_theResult____h391785[11] && + !_theResult____h391785[10] && + !_theResult____h391785[9] && + !_theResult____h391785[8] && + !_theResult____h391785[7] && + !_theResult____h391785[6] && + !_theResult____h391785[5] && + !_theResult____h391785[4] && + !_theResult____h391785[3] && + !_theResult____h391785[2] && + !_theResult____h391785[1] && + !_theResult____h391785[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641) ? 8'd0 : - _theResult___fst_exp__h399958 ; - assign _theResult___fst_exp__h399967 = - (!_theResult____h391784[56] && _theResult____h391784[55]) ? + _theResult___fst_exp__h399959 ; + assign _theResult___fst_exp__h399968 = + (!_theResult____h391785[56] && _theResult____h391785[55]) ? 8'd1 : - _theResult___fst_exp__h399964 ; - assign _theResult___fst_exp__h400490 = - (_theResult___fst_exp__h399893 == 8'd255) ? - _theResult___fst_exp__h399893 : - _theResult___fst_exp__h400487 ; - assign _theResult___fst_exp__h408540 = + _theResult___fst_exp__h399965 ; + assign _theResult___fst_exp__h400491 = + (_theResult___fst_exp__h399894 == 8'd255) ? + _theResult___fst_exp__h399894 : + _theResult___fst_exp__h400488 ; + assign _theResult___fst_exp__h408541 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ; - assign _theResult___fst_exp__h408546 = + assign _theResult___fst_exp__h408547 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872) ? 8'd0 : - _theResult___fst_exp__h408540 ; - assign _theResult___fst_exp__h408549 = + _theResult___fst_exp__h408541 ; + assign _theResult___fst_exp__h408550 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h408546 : + _theResult___fst_exp__h408547 : 8'd129 ; - assign _theResult___fst_exp__h409072 = - (_theResult___fst_exp__h408549 == 8'd255) ? - _theResult___fst_exp__h408549 : - _theResult___fst_exp__h409069 ; - assign _theResult___fst_exp__h417659 = - _theResult____h409421[56] ? + assign _theResult___fst_exp__h409073 = + (_theResult___fst_exp__h408550 == 8'd255) ? + _theResult___fst_exp__h408550 : + _theResult___fst_exp__h409070 ; + assign _theResult___fst_exp__h417660 = + _theResult____h409422[56] ? 8'd2 : - _theResult___fst_exp__h417733 ; - assign _theResult___fst_exp__h417724 = + _theResult___fst_exp__h417734 ; + assign _theResult___fst_exp__h417725 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 } ; - assign _theResult___fst_exp__h417730 = - (!_theResult____h409421[56] && !_theResult____h409421[55] && - !_theResult____h409421[54] && - !_theResult____h409421[53] && - !_theResult____h409421[52] && - !_theResult____h409421[51] && - !_theResult____h409421[50] && - !_theResult____h409421[49] && - !_theResult____h409421[48] && - !_theResult____h409421[47] && - !_theResult____h409421[46] && - !_theResult____h409421[45] && - !_theResult____h409421[44] && - !_theResult____h409421[43] && - !_theResult____h409421[42] && - !_theResult____h409421[41] && - !_theResult____h409421[40] && - !_theResult____h409421[39] && - !_theResult____h409421[38] && - !_theResult____h409421[37] && - !_theResult____h409421[36] && - !_theResult____h409421[35] && - !_theResult____h409421[34] && - !_theResult____h409421[33] && - !_theResult____h409421[32] && - !_theResult____h409421[31] && - !_theResult____h409421[30] && - !_theResult____h409421[29] && - !_theResult____h409421[28] && - !_theResult____h409421[27] && - !_theResult____h409421[26] && - !_theResult____h409421[25] && - !_theResult____h409421[24] && - !_theResult____h409421[23] && - !_theResult____h409421[22] && - !_theResult____h409421[21] && - !_theResult____h409421[20] && - !_theResult____h409421[19] && - !_theResult____h409421[18] && - !_theResult____h409421[17] && - !_theResult____h409421[16] && - !_theResult____h409421[15] && - !_theResult____h409421[14] && - !_theResult____h409421[13] && - !_theResult____h409421[12] && - !_theResult____h409421[11] && - !_theResult____h409421[10] && - !_theResult____h409421[9] && - !_theResult____h409421[8] && - !_theResult____h409421[7] && - !_theResult____h409421[6] && - !_theResult____h409421[5] && - !_theResult____h409421[4] && - !_theResult____h409421[3] && - !_theResult____h409421[2] && - !_theResult____h409421[1] && - !_theResult____h409421[0] || + assign _theResult___fst_exp__h417731 = + (!_theResult____h409422[56] && !_theResult____h409422[55] && + !_theResult____h409422[54] && + !_theResult____h409422[53] && + !_theResult____h409422[52] && + !_theResult____h409422[51] && + !_theResult____h409422[50] && + !_theResult____h409422[49] && + !_theResult____h409422[48] && + !_theResult____h409422[47] && + !_theResult____h409422[46] && + !_theResult____h409422[45] && + !_theResult____h409422[44] && + !_theResult____h409422[43] && + !_theResult____h409422[42] && + !_theResult____h409422[41] && + !_theResult____h409422[40] && + !_theResult____h409422[39] && + !_theResult____h409422[38] && + !_theResult____h409422[37] && + !_theResult____h409422[36] && + !_theResult____h409422[35] && + !_theResult____h409422[34] && + !_theResult____h409422[33] && + !_theResult____h409422[32] && + !_theResult____h409422[31] && + !_theResult____h409422[30] && + !_theResult____h409422[29] && + !_theResult____h409422[28] && + !_theResult____h409422[27] && + !_theResult____h409422[26] && + !_theResult____h409422[25] && + !_theResult____h409422[24] && + !_theResult____h409422[23] && + !_theResult____h409422[22] && + !_theResult____h409422[21] && + !_theResult____h409422[20] && + !_theResult____h409422[19] && + !_theResult____h409422[18] && + !_theResult____h409422[17] && + !_theResult____h409422[16] && + !_theResult____h409422[15] && + !_theResult____h409422[14] && + !_theResult____h409422[13] && + !_theResult____h409422[12] && + !_theResult____h409422[11] && + !_theResult____h409422[10] && + !_theResult____h409422[9] && + !_theResult____h409422[8] && + !_theResult____h409422[7] && + !_theResult____h409422[6] && + !_theResult____h409422[5] && + !_theResult____h409422[4] && + !_theResult____h409422[3] && + !_theResult____h409422[2] && + !_theResult____h409422[1] && + !_theResult____h409422[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192) ? 8'd0 : - _theResult___fst_exp__h417724 ; - assign _theResult___fst_exp__h417733 = - (!_theResult____h409421[56] && _theResult____h409421[55]) ? + _theResult___fst_exp__h417725 ; + assign _theResult___fst_exp__h417734 = + (!_theResult____h409422[56] && _theResult____h409422[55]) ? 8'd1 : - _theResult___fst_exp__h417730 ; - assign _theResult___fst_exp__h418256 = - (_theResult___fst_exp__h417659 == 8'd255) ? - _theResult___fst_exp__h417659 : - _theResult___fst_exp__h418253 ; - assign _theResult___fst_exp__h426296 = + _theResult___fst_exp__h417731 ; + assign _theResult___fst_exp__h418257 = + (_theResult___fst_exp__h417660 == 8'd255) ? + _theResult___fst_exp__h417660 : + _theResult___fst_exp__h418254 ; + assign _theResult___fst_exp__h426297 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] ; - assign _theResult___fst_exp__h426335 = + assign _theResult___fst_exp__h426336 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ; - assign _theResult___fst_exp__h426341 = + assign _theResult___fst_exp__h426342 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6265) ? 8'd0 : - _theResult___fst_exp__h426335 ; - assign _theResult___fst_exp__h426344 = + _theResult___fst_exp__h426336 ; + assign _theResult___fst_exp__h426345 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h426341 : - _theResult___fst_exp__h426296 ; - assign _theResult___fst_exp__h426892 = - (_theResult___fst_exp__h426344 == 8'd255) ? - _theResult___fst_exp__h426344 : - _theResult___fst_exp__h426889 ; - assign _theResult___fst_exp__h426901 = + _theResult___fst_exp__h426342 : + _theResult___fst_exp__h426297 ; + assign _theResult___fst_exp__h426893 = + (_theResult___fst_exp__h426345 == 8'd255) ? + _theResult___fst_exp__h426345 : + _theResult___fst_exp__h426890 ; + assign _theResult___fst_exp__h426902 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5404 ? - _theResult___snd_fst_exp__h409075 : - _theResult___fst_exp__h391766) : + _theResult___snd_fst_exp__h409076 : + _theResult___fst_exp__h391767) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5944 ? - _theResult___snd_fst_exp__h426895 : - _theResult___fst_exp__h391766) ; - assign _theResult___fst_exp__h426904 = + _theResult___snd_fst_exp__h426896 : + _theResult___fst_exp__h391767) ; + assign _theResult___fst_exp__h426905 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h426901 ; - assign _theResult___fst_exp__h445588 = - _theResult____h437479[56] ? + _theResult___fst_exp__h426902 ; + assign _theResult___fst_exp__h445589 = + _theResult____h437480[56] ? 8'd2 : - _theResult___fst_exp__h445662 ; - assign _theResult___fst_exp__h445653 = + _theResult___fst_exp__h445663 ; + assign _theResult___fst_exp__h445654 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 } ; - assign _theResult___fst_exp__h445659 = - (!_theResult____h437479[56] && !_theResult____h437479[55] && - !_theResult____h437479[54] && - !_theResult____h437479[53] && - !_theResult____h437479[52] && - !_theResult____h437479[51] && - !_theResult____h437479[50] && - !_theResult____h437479[49] && - !_theResult____h437479[48] && - !_theResult____h437479[47] && - !_theResult____h437479[46] && - !_theResult____h437479[45] && - !_theResult____h437479[44] && - !_theResult____h437479[43] && - !_theResult____h437479[42] && - !_theResult____h437479[41] && - !_theResult____h437479[40] && - !_theResult____h437479[39] && - !_theResult____h437479[38] && - !_theResult____h437479[37] && - !_theResult____h437479[36] && - !_theResult____h437479[35] && - !_theResult____h437479[34] && - !_theResult____h437479[33] && - !_theResult____h437479[32] && - !_theResult____h437479[31] && - !_theResult____h437479[30] && - !_theResult____h437479[29] && - !_theResult____h437479[28] && - !_theResult____h437479[27] && - !_theResult____h437479[26] && - !_theResult____h437479[25] && - !_theResult____h437479[24] && - !_theResult____h437479[23] && - !_theResult____h437479[22] && - !_theResult____h437479[21] && - !_theResult____h437479[20] && - !_theResult____h437479[19] && - !_theResult____h437479[18] && - !_theResult____h437479[17] && - !_theResult____h437479[16] && - !_theResult____h437479[15] && - !_theResult____h437479[14] && - !_theResult____h437479[13] && - !_theResult____h437479[12] && - !_theResult____h437479[11] && - !_theResult____h437479[10] && - !_theResult____h437479[9] && - !_theResult____h437479[8] && - !_theResult____h437479[7] && - !_theResult____h437479[6] && - !_theResult____h437479[5] && - !_theResult____h437479[4] && - !_theResult____h437479[3] && - !_theResult____h437479[2] && - !_theResult____h437479[1] && - !_theResult____h437479[0] || + assign _theResult___fst_exp__h445660 = + (!_theResult____h437480[56] && !_theResult____h437480[55] && + !_theResult____h437480[54] && + !_theResult____h437480[53] && + !_theResult____h437480[52] && + !_theResult____h437480[51] && + !_theResult____h437480[50] && + !_theResult____h437480[49] && + !_theResult____h437480[48] && + !_theResult____h437480[47] && + !_theResult____h437480[46] && + !_theResult____h437480[45] && + !_theResult____h437480[44] && + !_theResult____h437480[43] && + !_theResult____h437480[42] && + !_theResult____h437480[41] && + !_theResult____h437480[40] && + !_theResult____h437480[39] && + !_theResult____h437480[38] && + !_theResult____h437480[37] && + !_theResult____h437480[36] && + !_theResult____h437480[35] && + !_theResult____h437480[34] && + !_theResult____h437480[33] && + !_theResult____h437480[32] && + !_theResult____h437480[31] && + !_theResult____h437480[30] && + !_theResult____h437480[29] && + !_theResult____h437480[28] && + !_theResult____h437480[27] && + !_theResult____h437480[26] && + !_theResult____h437480[25] && + !_theResult____h437480[24] && + !_theResult____h437480[23] && + !_theResult____h437480[22] && + !_theResult____h437480[21] && + !_theResult____h437480[20] && + !_theResult____h437480[19] && + !_theResult____h437480[18] && + !_theResult____h437480[17] && + !_theResult____h437480[16] && + !_theResult____h437480[15] && + !_theResult____h437480[14] && + !_theResult____h437480[13] && + !_theResult____h437480[12] && + !_theResult____h437480[11] && + !_theResult____h437480[10] && + !_theResult____h437480[9] && + !_theResult____h437480[8] && + !_theResult____h437480[7] && + !_theResult____h437480[6] && + !_theResult____h437480[5] && + !_theResult____h437480[4] && + !_theResult____h437480[3] && + !_theResult____h437480[2] && + !_theResult____h437480[1] && + !_theResult____h437480[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033) ? 8'd0 : - _theResult___fst_exp__h445653 ; - assign _theResult___fst_exp__h445662 = - (!_theResult____h437479[56] && _theResult____h437479[55]) ? + _theResult___fst_exp__h445654 ; + assign _theResult___fst_exp__h445663 = + (!_theResult____h437480[56] && _theResult____h437480[55]) ? 8'd1 : - _theResult___fst_exp__h445659 ; - assign _theResult___fst_exp__h446185 = - (_theResult___fst_exp__h445588 == 8'd255) ? - _theResult___fst_exp__h445588 : - _theResult___fst_exp__h446182 ; - assign _theResult___fst_exp__h454235 = + _theResult___fst_exp__h445660 ; + assign _theResult___fst_exp__h446186 = + (_theResult___fst_exp__h445589 == 8'd255) ? + _theResult___fst_exp__h445589 : + _theResult___fst_exp__h446183 ; + assign _theResult___fst_exp__h454236 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ; - assign _theResult___fst_exp__h454241 = + assign _theResult___fst_exp__h454242 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264) ? 8'd0 : - _theResult___fst_exp__h454235 ; - assign _theResult___fst_exp__h454244 = + _theResult___fst_exp__h454236 ; + assign _theResult___fst_exp__h454245 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h454241 : + _theResult___fst_exp__h454242 : 8'd129 ; - assign _theResult___fst_exp__h454767 = - (_theResult___fst_exp__h454244 == 8'd255) ? - _theResult___fst_exp__h454244 : - _theResult___fst_exp__h454764 ; - assign _theResult___fst_exp__h463354 = - _theResult____h455116[56] ? + assign _theResult___fst_exp__h454768 = + (_theResult___fst_exp__h454245 == 8'd255) ? + _theResult___fst_exp__h454245 : + _theResult___fst_exp__h454765 ; + assign _theResult___fst_exp__h463355 = + _theResult____h455117[56] ? 8'd2 : - _theResult___fst_exp__h463428 ; - assign _theResult___fst_exp__h463419 = + _theResult___fst_exp__h463429 ; + assign _theResult___fst_exp__h463420 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 } ; - assign _theResult___fst_exp__h463425 = - (!_theResult____h455116[56] && !_theResult____h455116[55] && - !_theResult____h455116[54] && - !_theResult____h455116[53] && - !_theResult____h455116[52] && - !_theResult____h455116[51] && - !_theResult____h455116[50] && - !_theResult____h455116[49] && - !_theResult____h455116[48] && - !_theResult____h455116[47] && - !_theResult____h455116[46] && - !_theResult____h455116[45] && - !_theResult____h455116[44] && - !_theResult____h455116[43] && - !_theResult____h455116[42] && - !_theResult____h455116[41] && - !_theResult____h455116[40] && - !_theResult____h455116[39] && - !_theResult____h455116[38] && - !_theResult____h455116[37] && - !_theResult____h455116[36] && - !_theResult____h455116[35] && - !_theResult____h455116[34] && - !_theResult____h455116[33] && - !_theResult____h455116[32] && - !_theResult____h455116[31] && - !_theResult____h455116[30] && - !_theResult____h455116[29] && - !_theResult____h455116[28] && - !_theResult____h455116[27] && - !_theResult____h455116[26] && - !_theResult____h455116[25] && - !_theResult____h455116[24] && - !_theResult____h455116[23] && - !_theResult____h455116[22] && - !_theResult____h455116[21] && - !_theResult____h455116[20] && - !_theResult____h455116[19] && - !_theResult____h455116[18] && - !_theResult____h455116[17] && - !_theResult____h455116[16] && - !_theResult____h455116[15] && - !_theResult____h455116[14] && - !_theResult____h455116[13] && - !_theResult____h455116[12] && - !_theResult____h455116[11] && - !_theResult____h455116[10] && - !_theResult____h455116[9] && - !_theResult____h455116[8] && - !_theResult____h455116[7] && - !_theResult____h455116[6] && - !_theResult____h455116[5] && - !_theResult____h455116[4] && - !_theResult____h455116[3] && - !_theResult____h455116[2] && - !_theResult____h455116[1] && - !_theResult____h455116[0] || + assign _theResult___fst_exp__h463426 = + (!_theResult____h455117[56] && !_theResult____h455117[55] && + !_theResult____h455117[54] && + !_theResult____h455117[53] && + !_theResult____h455117[52] && + !_theResult____h455117[51] && + !_theResult____h455117[50] && + !_theResult____h455117[49] && + !_theResult____h455117[48] && + !_theResult____h455117[47] && + !_theResult____h455117[46] && + !_theResult____h455117[45] && + !_theResult____h455117[44] && + !_theResult____h455117[43] && + !_theResult____h455117[42] && + !_theResult____h455117[41] && + !_theResult____h455117[40] && + !_theResult____h455117[39] && + !_theResult____h455117[38] && + !_theResult____h455117[37] && + !_theResult____h455117[36] && + !_theResult____h455117[35] && + !_theResult____h455117[34] && + !_theResult____h455117[33] && + !_theResult____h455117[32] && + !_theResult____h455117[31] && + !_theResult____h455117[30] && + !_theResult____h455117[29] && + !_theResult____h455117[28] && + !_theResult____h455117[27] && + !_theResult____h455117[26] && + !_theResult____h455117[25] && + !_theResult____h455117[24] && + !_theResult____h455117[23] && + !_theResult____h455117[22] && + !_theResult____h455117[21] && + !_theResult____h455117[20] && + !_theResult____h455117[19] && + !_theResult____h455117[18] && + !_theResult____h455117[17] && + !_theResult____h455117[16] && + !_theResult____h455117[15] && + !_theResult____h455117[14] && + !_theResult____h455117[13] && + !_theResult____h455117[12] && + !_theResult____h455117[11] && + !_theResult____h455117[10] && + !_theResult____h455117[9] && + !_theResult____h455117[8] && + !_theResult____h455117[7] && + !_theResult____h455117[6] && + !_theResult____h455117[5] && + !_theResult____h455117[4] && + !_theResult____h455117[3] && + !_theResult____h455117[2] && + !_theResult____h455117[1] && + !_theResult____h455117[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584) ? 8'd0 : - _theResult___fst_exp__h463419 ; - assign _theResult___fst_exp__h463428 = - (!_theResult____h455116[56] && _theResult____h455116[55]) ? + _theResult___fst_exp__h463420 ; + assign _theResult___fst_exp__h463429 = + (!_theResult____h455117[56] && _theResult____h455117[55]) ? 8'd1 : - _theResult___fst_exp__h463425 ; - assign _theResult___fst_exp__h463951 = - (_theResult___fst_exp__h463354 == 8'd255) ? - _theResult___fst_exp__h463354 : - _theResult___fst_exp__h463948 ; - assign _theResult___fst_exp__h471991 = + _theResult___fst_exp__h463426 ; + assign _theResult___fst_exp__h463952 = + (_theResult___fst_exp__h463355 == 8'd255) ? + _theResult___fst_exp__h463355 : + _theResult___fst_exp__h463949 ; + assign _theResult___fst_exp__h471992 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] ; - assign _theResult___fst_exp__h472030 = + assign _theResult___fst_exp__h472031 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ; - assign _theResult___fst_exp__h472036 = + assign _theResult___fst_exp__h472037 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7657) ? 8'd0 : - _theResult___fst_exp__h472030 ; - assign _theResult___fst_exp__h472039 = + _theResult___fst_exp__h472031 ; + assign _theResult___fst_exp__h472040 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h472036 : - _theResult___fst_exp__h471991 ; - assign _theResult___fst_exp__h472587 = - (_theResult___fst_exp__h472039 == 8'd255) ? - _theResult___fst_exp__h472039 : - _theResult___fst_exp__h472584 ; - assign _theResult___fst_exp__h472596 = + _theResult___fst_exp__h472037 : + _theResult___fst_exp__h471992 ; + assign _theResult___fst_exp__h472588 = + (_theResult___fst_exp__h472040 == 8'd255) ? + _theResult___fst_exp__h472040 : + _theResult___fst_exp__h472585 ; + assign _theResult___fst_exp__h472597 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6796 ? - _theResult___snd_fst_exp__h454770 : - _theResult___fst_exp__h437461) : + _theResult___snd_fst_exp__h454771 : + _theResult___fst_exp__h437462) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7336 ? - _theResult___snd_fst_exp__h472590 : - _theResult___fst_exp__h437461) ; - assign _theResult___fst_exp__h472599 = + _theResult___snd_fst_exp__h472591 : + _theResult___fst_exp__h437462) ; + assign _theResult___fst_exp__h472600 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h472596 ; - assign _theResult___fst_exp__h486455 = + _theResult___fst_exp__h472597 ; + assign _theResult___fst_exp__h486456 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q14 ; - assign _theResult___fst_exp__h501519 = + assign _theResult___fst_exp__h501520 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ; - assign _theResult___fst_exp__h501525 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___fst_exp__h501526 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585) ? 11'd0 : - _theResult___fst_exp__h501519 ; - assign _theResult___fst_exp__h501528 = - (f1_exp__h482140 == 8'd0) ? - _theResult___fst_exp__h501525 : + _theResult___fst_exp__h501520 ; + assign _theResult___fst_exp__h501529 = + (f1_exp__h482141 == 8'd0) ? + _theResult___fst_exp__h501526 : 11'd897 ; - assign _theResult___fst_exp__h502283 = + assign _theResult___fst_exp__h502284 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 : + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 ; - assign _theResult___fst_exp__h502286 = - (_theResult___fst_exp__h501528 == 11'd2047) ? - _theResult___fst_exp__h501528 : - _theResult___fst_exp__h502283 ; - assign _theResult___fst_exp__h511105 = - _theResult____h502869[56] ? + assign _theResult___fst_exp__h502287 = + (_theResult___fst_exp__h501529 == 11'd2047) ? + _theResult___fst_exp__h501529 : + _theResult___fst_exp__h502284 ; + assign _theResult___fst_exp__h511106 = + _theResult____h502870[56] ? 11'd2 : - _theResult___fst_exp__h511179 ; - assign _theResult___fst_exp__h511170 = + _theResult___fst_exp__h511180 ; + assign _theResult___fst_exp__h511171 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 } ; - assign _theResult___fst_exp__h511176 = - (!_theResult____h502869[56] && !_theResult____h502869[55] && - !_theResult____h502869[54] && - !_theResult____h502869[53] && - !_theResult____h502869[52] && - !_theResult____h502869[51] && - !_theResult____h502869[50] && - !_theResult____h502869[49] && - !_theResult____h502869[48] && - !_theResult____h502869[47] && - !_theResult____h502869[46] && - !_theResult____h502869[45] && - !_theResult____h502869[44] && - !_theResult____h502869[43] && - !_theResult____h502869[42] && - !_theResult____h502869[41] && - !_theResult____h502869[40] && - !_theResult____h502869[39] && - !_theResult____h502869[38] && - !_theResult____h502869[37] && - !_theResult____h502869[36] && - !_theResult____h502869[35] && - !_theResult____h502869[34] && - !_theResult____h502869[33] && - !_theResult____h502869[32] && - !_theResult____h502869[31] && - !_theResult____h502869[30] && - !_theResult____h502869[29] && - !_theResult____h502869[28] && - !_theResult____h502869[27] && - !_theResult____h502869[26] && - !_theResult____h502869[25] && - !_theResult____h502869[24] && - !_theResult____h502869[23] && - !_theResult____h502869[22] && - !_theResult____h502869[21] && - !_theResult____h502869[20] && - !_theResult____h502869[19] && - !_theResult____h502869[18] && - !_theResult____h502869[17] && - !_theResult____h502869[16] && - !_theResult____h502869[15] && - !_theResult____h502869[14] && - !_theResult____h502869[13] && - !_theResult____h502869[12] && - !_theResult____h502869[11] && - !_theResult____h502869[10] && - !_theResult____h502869[9] && - !_theResult____h502869[8] && - !_theResult____h502869[7] && - !_theResult____h502869[6] && - !_theResult____h502869[5] && - !_theResult____h502869[4] && - !_theResult____h502869[3] && - !_theResult____h502869[2] && - !_theResult____h502869[1] && - !_theResult____h502869[0] || + assign _theResult___fst_exp__h511177 = + (!_theResult____h502870[56] && !_theResult____h502870[55] && + !_theResult____h502870[54] && + !_theResult____h502870[53] && + !_theResult____h502870[52] && + !_theResult____h502870[51] && + !_theResult____h502870[50] && + !_theResult____h502870[49] && + !_theResult____h502870[48] && + !_theResult____h502870[47] && + !_theResult____h502870[46] && + !_theResult____h502870[45] && + !_theResult____h502870[44] && + !_theResult____h502870[43] && + !_theResult____h502870[42] && + !_theResult____h502870[41] && + !_theResult____h502870[40] && + !_theResult____h502870[39] && + !_theResult____h502870[38] && + !_theResult____h502870[37] && + !_theResult____h502870[36] && + !_theResult____h502870[35] && + !_theResult____h502870[34] && + !_theResult____h502870[33] && + !_theResult____h502870[32] && + !_theResult____h502870[31] && + !_theResult____h502870[30] && + !_theResult____h502870[29] && + !_theResult____h502870[28] && + !_theResult____h502870[27] && + !_theResult____h502870[26] && + !_theResult____h502870[25] && + !_theResult____h502870[24] && + !_theResult____h502870[23] && + !_theResult____h502870[22] && + !_theResult____h502870[21] && + !_theResult____h502870[20] && + !_theResult____h502870[19] && + !_theResult____h502870[18] && + !_theResult____h502870[17] && + !_theResult____h502870[16] && + !_theResult____h502870[15] && + !_theResult____h502870[14] && + !_theResult____h502870[13] && + !_theResult____h502870[12] && + !_theResult____h502870[11] && + !_theResult____h502870[10] && + !_theResult____h502870[9] && + !_theResult____h502870[8] && + !_theResult____h502870[7] && + !_theResult____h502870[6] && + !_theResult____h502870[5] && + !_theResult____h502870[4] && + !_theResult____h502870[3] && + !_theResult____h502870[2] && + !_theResult____h502870[1] && + !_theResult____h502870[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897) ? 11'd0 : - _theResult___fst_exp__h511170 ; - assign _theResult___fst_exp__h511179 = - (!_theResult____h502869[56] && _theResult____h502869[55]) ? + _theResult___fst_exp__h511171 ; + assign _theResult___fst_exp__h511180 = + (!_theResult____h502870[56] && _theResult____h502870[55]) ? 11'd1 : - _theResult___fst_exp__h511176 ; - assign _theResult___fst_exp__h511934 = + _theResult___fst_exp__h511177 ; + assign _theResult___fst_exp__h511935 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 : + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 ; - assign _theResult___fst_exp__h511937 = - (_theResult___fst_exp__h511105 == 11'd2047) ? - _theResult___fst_exp__h511105 : - _theResult___fst_exp__h511934 ; - assign _theResult___fst_exp__h519890 = + assign _theResult___fst_exp__h511938 = + (_theResult___fst_exp__h511106 == 11'd2047) ? + _theResult___fst_exp__h511106 : + _theResult___fst_exp__h511935 ; + assign _theResult___fst_exp__h519891 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] ; - assign _theResult___fst_exp__h519929 = + assign _theResult___fst_exp__h519930 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ; - assign _theResult___fst_exp__h519935 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___fst_exp__h519936 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8947) ? 11'd0 : - _theResult___fst_exp__h519929 ; - assign _theResult___fst_exp__h519938 = - (f1_exp__h482140 == 8'd0) ? - _theResult___fst_exp__h519935 : - _theResult___fst_exp__h519890 ; - assign _theResult___fst_exp__h520718 = + _theResult___fst_exp__h519930 ; + assign _theResult___fst_exp__h519939 = + (f1_exp__h482141 == 8'd0) ? + _theResult___fst_exp__h519936 : + _theResult___fst_exp__h519891 ; + assign _theResult___fst_exp__h520719 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 : + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 ; - assign _theResult___fst_exp__h520721 = - (_theResult___fst_exp__h519938 == 11'd2047) ? - _theResult___fst_exp__h519938 : - _theResult___fst_exp__h520718 ; - assign _theResult___fst_exp__h520730 = - (f1_exp__h482140 == 8'd0) ? + assign _theResult___fst_exp__h520722 = + (_theResult___fst_exp__h519939 == 11'd2047) ? + _theResult___fst_exp__h519939 : + _theResult___fst_exp__h520719 ; + assign _theResult___fst_exp__h520731 = + (f1_exp__h482141 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 ? - _theResult___snd_fst_exp__h502289 : - _theResult___fst_exp__h486455) : + _theResult___snd_fst_exp__h502290 : + _theResult___fst_exp__h486456) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 ? - _theResult___snd_fst_exp__h520724 : - _theResult___fst_exp__h486455) ; - assign _theResult___fst_exp__h520733 = - (f1_exp__h482140 == 8'd0 && f1_sfd__h482141 == 23'd0) ? + _theResult___snd_fst_exp__h520725 : + _theResult___fst_exp__h486456) ; + assign _theResult___fst_exp__h520734 = + (f1_exp__h482141 == 8'd0 && f1_sfd__h482142 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h520730 ; - assign _theResult___fst_exp__h525308 = + _theResult___fst_exp__h520731 ; + assign _theResult___fst_exp__h525309 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16 ; - assign _theResult___fst_exp__h540372 = + assign _theResult___fst_exp__h540373 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ; - assign _theResult___fst_exp__h540378 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___fst_exp__h540379 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085) ? 11'd0 : - _theResult___fst_exp__h540372 ; - assign _theResult___fst_exp__h540381 = - (f2_exp__h521134 == 8'd0) ? - _theResult___fst_exp__h540378 : + _theResult___fst_exp__h540373 ; + assign _theResult___fst_exp__h540382 = + (f2_exp__h521135 == 8'd0) ? + _theResult___fst_exp__h540379 : 11'd897 ; - assign _theResult___fst_exp__h541136 = + assign _theResult___fst_exp__h541137 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 : + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 ; - assign _theResult___fst_exp__h541139 = - (_theResult___fst_exp__h540381 == 11'd2047) ? - _theResult___fst_exp__h540381 : - _theResult___fst_exp__h541136 ; - assign _theResult___fst_exp__h549958 = - _theResult____h541722[56] ? + assign _theResult___fst_exp__h541140 = + (_theResult___fst_exp__h540382 == 11'd2047) ? + _theResult___fst_exp__h540382 : + _theResult___fst_exp__h541137 ; + assign _theResult___fst_exp__h549959 = + _theResult____h541723[56] ? 11'd2 : - _theResult___fst_exp__h550032 ; - assign _theResult___fst_exp__h550023 = + _theResult___fst_exp__h550033 ; + assign _theResult___fst_exp__h550024 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 } ; - assign _theResult___fst_exp__h550029 = - (!_theResult____h541722[56] && !_theResult____h541722[55] && - !_theResult____h541722[54] && - !_theResult____h541722[53] && - !_theResult____h541722[52] && - !_theResult____h541722[51] && - !_theResult____h541722[50] && - !_theResult____h541722[49] && - !_theResult____h541722[48] && - !_theResult____h541722[47] && - !_theResult____h541722[46] && - !_theResult____h541722[45] && - !_theResult____h541722[44] && - !_theResult____h541722[43] && - !_theResult____h541722[42] && - !_theResult____h541722[41] && - !_theResult____h541722[40] && - !_theResult____h541722[39] && - !_theResult____h541722[38] && - !_theResult____h541722[37] && - !_theResult____h541722[36] && - !_theResult____h541722[35] && - !_theResult____h541722[34] && - !_theResult____h541722[33] && - !_theResult____h541722[32] && - !_theResult____h541722[31] && - !_theResult____h541722[30] && - !_theResult____h541722[29] && - !_theResult____h541722[28] && - !_theResult____h541722[27] && - !_theResult____h541722[26] && - !_theResult____h541722[25] && - !_theResult____h541722[24] && - !_theResult____h541722[23] && - !_theResult____h541722[22] && - !_theResult____h541722[21] && - !_theResult____h541722[20] && - !_theResult____h541722[19] && - !_theResult____h541722[18] && - !_theResult____h541722[17] && - !_theResult____h541722[16] && - !_theResult____h541722[15] && - !_theResult____h541722[14] && - !_theResult____h541722[13] && - !_theResult____h541722[12] && - !_theResult____h541722[11] && - !_theResult____h541722[10] && - !_theResult____h541722[9] && - !_theResult____h541722[8] && - !_theResult____h541722[7] && - !_theResult____h541722[6] && - !_theResult____h541722[5] && - !_theResult____h541722[4] && - !_theResult____h541722[3] && - !_theResult____h541722[2] && - !_theResult____h541722[1] && - !_theResult____h541722[0] || + assign _theResult___fst_exp__h550030 = + (!_theResult____h541723[56] && !_theResult____h541723[55] && + !_theResult____h541723[54] && + !_theResult____h541723[53] && + !_theResult____h541723[52] && + !_theResult____h541723[51] && + !_theResult____h541723[50] && + !_theResult____h541723[49] && + !_theResult____h541723[48] && + !_theResult____h541723[47] && + !_theResult____h541723[46] && + !_theResult____h541723[45] && + !_theResult____h541723[44] && + !_theResult____h541723[43] && + !_theResult____h541723[42] && + !_theResult____h541723[41] && + !_theResult____h541723[40] && + !_theResult____h541723[39] && + !_theResult____h541723[38] && + !_theResult____h541723[37] && + !_theResult____h541723[36] && + !_theResult____h541723[35] && + !_theResult____h541723[34] && + !_theResult____h541723[33] && + !_theResult____h541723[32] && + !_theResult____h541723[31] && + !_theResult____h541723[30] && + !_theResult____h541723[29] && + !_theResult____h541723[28] && + !_theResult____h541723[27] && + !_theResult____h541723[26] && + !_theResult____h541723[25] && + !_theResult____h541723[24] && + !_theResult____h541723[23] && + !_theResult____h541723[22] && + !_theResult____h541723[21] && + !_theResult____h541723[20] && + !_theResult____h541723[19] && + !_theResult____h541723[18] && + !_theResult____h541723[17] && + !_theResult____h541723[16] && + !_theResult____h541723[15] && + !_theResult____h541723[14] && + !_theResult____h541723[13] && + !_theResult____h541723[12] && + !_theResult____h541723[11] && + !_theResult____h541723[10] && + !_theResult____h541723[9] && + !_theResult____h541723[8] && + !_theResult____h541723[7] && + !_theResult____h541723[6] && + !_theResult____h541723[5] && + !_theResult____h541723[4] && + !_theResult____h541723[3] && + !_theResult____h541723[2] && + !_theResult____h541723[1] && + !_theResult____h541723[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382) ? 11'd0 : - _theResult___fst_exp__h550023 ; - assign _theResult___fst_exp__h550032 = - (!_theResult____h541722[56] && _theResult____h541722[55]) ? + _theResult___fst_exp__h550024 ; + assign _theResult___fst_exp__h550033 = + (!_theResult____h541723[56] && _theResult____h541723[55]) ? 11'd1 : - _theResult___fst_exp__h550029 ; - assign _theResult___fst_exp__h550787 = + _theResult___fst_exp__h550030 ; + assign _theResult___fst_exp__h550788 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 : + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 ; - assign _theResult___fst_exp__h550790 = - (_theResult___fst_exp__h549958 == 11'd2047) ? - _theResult___fst_exp__h549958 : - _theResult___fst_exp__h550787 ; - assign _theResult___fst_exp__h558743 = + assign _theResult___fst_exp__h550791 = + (_theResult___fst_exp__h549959 == 11'd2047) ? + _theResult___fst_exp__h549959 : + _theResult___fst_exp__h550788 ; + assign _theResult___fst_exp__h558744 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] ; - assign _theResult___fst_exp__h558782 = + assign _theResult___fst_exp__h558783 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ; - assign _theResult___fst_exp__h558788 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___fst_exp__h558789 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10432) ? 11'd0 : - _theResult___fst_exp__h558782 ; - assign _theResult___fst_exp__h558791 = - (f2_exp__h521134 == 8'd0) ? - _theResult___fst_exp__h558788 : - _theResult___fst_exp__h558743 ; - assign _theResult___fst_exp__h559571 = + _theResult___fst_exp__h558783 ; + assign _theResult___fst_exp__h558792 = + (f2_exp__h521135 == 8'd0) ? + _theResult___fst_exp__h558789 : + _theResult___fst_exp__h558744 ; + assign _theResult___fst_exp__h559572 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 : + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 ; - assign _theResult___fst_exp__h559574 = - (_theResult___fst_exp__h558791 == 11'd2047) ? - _theResult___fst_exp__h558791 : - _theResult___fst_exp__h559571 ; - assign _theResult___fst_exp__h559583 = - (f2_exp__h521134 == 8'd0) ? + assign _theResult___fst_exp__h559575 = + (_theResult___fst_exp__h558792 == 11'd2047) ? + _theResult___fst_exp__h558792 : + _theResult___fst_exp__h559572 ; + assign _theResult___fst_exp__h559584 = + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? - _theResult___snd_fst_exp__h541142 : - _theResult___fst_exp__h525308) : + _theResult___snd_fst_exp__h541143 : + _theResult___fst_exp__h525309) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 ? - _theResult___snd_fst_exp__h559577 : - _theResult___fst_exp__h525308) ; - assign _theResult___fst_exp__h559586 = - (f2_exp__h521134 == 8'd0 && f2_sfd__h521135 == 23'd0) ? + _theResult___snd_fst_exp__h559578 : + _theResult___fst_exp__h525309) ; + assign _theResult___fst_exp__h559587 = + (f2_exp__h521135 == 8'd0 && f2_sfd__h521136 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h559583 ; - assign _theResult___fst_exp__h564612 = + _theResult___fst_exp__h559584 ; + assign _theResult___fst_exp__h564613 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18 ; - assign _theResult___fst_exp__h579676 = + assign _theResult___fst_exp__h579677 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 } ; - assign _theResult___fst_exp__h579682 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___fst_exp__h579683 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9315) ? 11'd0 : - _theResult___fst_exp__h579676 ; - assign _theResult___fst_exp__h579685 = - (f3_exp__h560438 == 8'd0) ? - _theResult___fst_exp__h579682 : + _theResult___fst_exp__h579677 ; + assign _theResult___fst_exp__h579686 = + (f3_exp__h560439 == 8'd0) ? + _theResult___fst_exp__h579683 : 11'd897 ; - assign _theResult___fst_exp__h580440 = + assign _theResult___fst_exp__h580441 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 : + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 ; - assign _theResult___fst_exp__h580443 = - (_theResult___fst_exp__h579685 == 11'd2047) ? - _theResult___fst_exp__h579685 : - _theResult___fst_exp__h580440 ; - assign _theResult___fst_exp__h589262 = - _theResult____h581026[56] ? + assign _theResult___fst_exp__h580444 = + (_theResult___fst_exp__h579686 == 11'd2047) ? + _theResult___fst_exp__h579686 : + _theResult___fst_exp__h580441 ; + assign _theResult___fst_exp__h589263 = + _theResult____h581027[56] ? 11'd2 : - _theResult___fst_exp__h589336 ; - assign _theResult___fst_exp__h589327 = + _theResult___fst_exp__h589337 ; + assign _theResult___fst_exp__h589328 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 } ; - assign _theResult___fst_exp__h589333 = - (!_theResult____h581026[56] && !_theResult____h581026[55] && - !_theResult____h581026[54] && - !_theResult____h581026[53] && - !_theResult____h581026[52] && - !_theResult____h581026[51] && - !_theResult____h581026[50] && - !_theResult____h581026[49] && - !_theResult____h581026[48] && - !_theResult____h581026[47] && - !_theResult____h581026[46] && - !_theResult____h581026[45] && - !_theResult____h581026[44] && - !_theResult____h581026[43] && - !_theResult____h581026[42] && - !_theResult____h581026[41] && - !_theResult____h581026[40] && - !_theResult____h581026[39] && - !_theResult____h581026[38] && - !_theResult____h581026[37] && - !_theResult____h581026[36] && - !_theResult____h581026[35] && - !_theResult____h581026[34] && - !_theResult____h581026[33] && - !_theResult____h581026[32] && - !_theResult____h581026[31] && - !_theResult____h581026[30] && - !_theResult____h581026[29] && - !_theResult____h581026[28] && - !_theResult____h581026[27] && - !_theResult____h581026[26] && - !_theResult____h581026[25] && - !_theResult____h581026[24] && - !_theResult____h581026[23] && - !_theResult____h581026[22] && - !_theResult____h581026[21] && - !_theResult____h581026[20] && - !_theResult____h581026[19] && - !_theResult____h581026[18] && - !_theResult____h581026[17] && - !_theResult____h581026[16] && - !_theResult____h581026[15] && - !_theResult____h581026[14] && - !_theResult____h581026[13] && - !_theResult____h581026[12] && - !_theResult____h581026[11] && - !_theResult____h581026[10] && - !_theResult____h581026[9] && - !_theResult____h581026[8] && - !_theResult____h581026[7] && - !_theResult____h581026[6] && - !_theResult____h581026[5] && - !_theResult____h581026[4] && - !_theResult____h581026[3] && - !_theResult____h581026[2] && - !_theResult____h581026[1] && - !_theResult____h581026[0] || + assign _theResult___fst_exp__h589334 = + (!_theResult____h581027[56] && !_theResult____h581027[55] && + !_theResult____h581027[54] && + !_theResult____h581027[53] && + !_theResult____h581027[52] && + !_theResult____h581027[51] && + !_theResult____h581027[50] && + !_theResult____h581027[49] && + !_theResult____h581027[48] && + !_theResult____h581027[47] && + !_theResult____h581027[46] && + !_theResult____h581027[45] && + !_theResult____h581027[44] && + !_theResult____h581027[43] && + !_theResult____h581027[42] && + !_theResult____h581027[41] && + !_theResult____h581027[40] && + !_theResult____h581027[39] && + !_theResult____h581027[38] && + !_theResult____h581027[37] && + !_theResult____h581027[36] && + !_theResult____h581027[35] && + !_theResult____h581027[34] && + !_theResult____h581027[33] && + !_theResult____h581027[32] && + !_theResult____h581027[31] && + !_theResult____h581027[30] && + !_theResult____h581027[29] && + !_theResult____h581027[28] && + !_theResult____h581027[27] && + !_theResult____h581027[26] && + !_theResult____h581027[25] && + !_theResult____h581027[24] && + !_theResult____h581027[23] && + !_theResult____h581027[22] && + !_theResult____h581027[21] && + !_theResult____h581027[20] && + !_theResult____h581027[19] && + !_theResult____h581027[18] && + !_theResult____h581027[17] && + !_theResult____h581027[16] && + !_theResult____h581027[15] && + !_theResult____h581027[14] && + !_theResult____h581027[13] && + !_theResult____h581027[12] && + !_theResult____h581027[11] && + !_theResult____h581027[10] && + !_theResult____h581027[9] && + !_theResult____h581027[8] && + !_theResult____h581027[7] && + !_theResult____h581027[6] && + !_theResult____h581027[5] && + !_theResult____h581027[4] && + !_theResult____h581027[3] && + !_theResult____h581027[2] && + !_theResult____h581027[1] && + !_theResult____h581027[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9612) ? 11'd0 : - _theResult___fst_exp__h589327 ; - assign _theResult___fst_exp__h589336 = - (!_theResult____h581026[56] && _theResult____h581026[55]) ? + _theResult___fst_exp__h589328 ; + assign _theResult___fst_exp__h589337 = + (!_theResult____h581027[56] && _theResult____h581027[55]) ? 11'd1 : - _theResult___fst_exp__h589333 ; - assign _theResult___fst_exp__h590091 = + _theResult___fst_exp__h589334 ; + assign _theResult___fst_exp__h590092 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 : + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 ; - assign _theResult___fst_exp__h590094 = - (_theResult___fst_exp__h589262 == 11'd2047) ? - _theResult___fst_exp__h589262 : - _theResult___fst_exp__h590091 ; - assign _theResult___fst_exp__h598047 = + assign _theResult___fst_exp__h590095 = + (_theResult___fst_exp__h589263 == 11'd2047) ? + _theResult___fst_exp__h589263 : + _theResult___fst_exp__h590092 ; + assign _theResult___fst_exp__h598048 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] ; - assign _theResult___fst_exp__h598086 = + assign _theResult___fst_exp__h598087 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 } ; - assign _theResult___fst_exp__h598092 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___fst_exp__h598093 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9662) ? 11'd0 : - _theResult___fst_exp__h598086 ; - assign _theResult___fst_exp__h598095 = - (f3_exp__h560438 == 8'd0) ? - _theResult___fst_exp__h598092 : - _theResult___fst_exp__h598047 ; - assign _theResult___fst_exp__h598875 = + _theResult___fst_exp__h598087 ; + assign _theResult___fst_exp__h598096 = + (f3_exp__h560439 == 8'd0) ? + _theResult___fst_exp__h598093 : + _theResult___fst_exp__h598048 ; + assign _theResult___fst_exp__h598876 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 : + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 ; - assign _theResult___fst_exp__h598878 = - (_theResult___fst_exp__h598095 == 11'd2047) ? - _theResult___fst_exp__h598095 : - _theResult___fst_exp__h598875 ; - assign _theResult___fst_exp__h598887 = - (f3_exp__h560438 == 8'd0) ? + assign _theResult___fst_exp__h598879 = + (_theResult___fst_exp__h598096 == 11'd2047) ? + _theResult___fst_exp__h598096 : + _theResult___fst_exp__h598876 ; + assign _theResult___fst_exp__h598888 = + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? - _theResult___snd_fst_exp__h580446 : - _theResult___fst_exp__h564612) : + _theResult___snd_fst_exp__h580447 : + _theResult___fst_exp__h564613) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 ? - _theResult___snd_fst_exp__h598881 : - _theResult___fst_exp__h564612) ; - assign _theResult___fst_exp__h598890 = - (f3_exp__h560438 == 8'd0 && f3_sfd__h560439 == 23'd0) ? + _theResult___snd_fst_exp__h598882 : + _theResult___fst_exp__h564613) ; + assign _theResult___fst_exp__h598891 = + (f3_exp__h560439 == 8'd0 && f3_sfd__h560440 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h598887 ; - assign _theResult___fst_sfd__h354794 = - (_theResult___fst_exp__h354196 == 8'd255) ? - sfdin__h354190[56:34] : - _theResult___fst_sfd__h354791 ; - assign _theResult___fst_sfd__h363376 = - (_theResult___fst_exp__h362852 == 8'd255) ? - _theResult___snd__h362803[56:34] : - _theResult___fst_sfd__h363373 ; - assign _theResult___fst_sfd__h372560 = - (_theResult___fst_exp__h371962 == 8'd255) ? - sfdin__h371956[56:34] : - _theResult___fst_sfd__h372557 ; - assign _theResult___fst_sfd__h381196 = - (_theResult___fst_exp__h380647 == 8'd255) ? - _theResult___snd__h380593[56:34] : - _theResult___fst_sfd__h381193 ; - assign _theResult___fst_sfd__h381205 = + _theResult___fst_exp__h598888 ; + assign _theResult___fst_sfd__h354795 = + (_theResult___fst_exp__h354197 == 8'd255) ? + sfdin__h354191[56:34] : + _theResult___fst_sfd__h354792 ; + assign _theResult___fst_sfd__h363377 = + (_theResult___fst_exp__h362853 == 8'd255) ? + _theResult___snd__h362804[56:34] : + _theResult___fst_sfd__h363374 ; + assign _theResult___fst_sfd__h372561 = + (_theResult___fst_exp__h371963 == 8'd255) ? + sfdin__h371957[56:34] : + _theResult___fst_sfd__h372558 ; + assign _theResult___fst_sfd__h381197 = + (_theResult___fst_exp__h380648 == 8'd255) ? + _theResult___snd__h380594[56:34] : + _theResult___fst_sfd__h381194 ; + assign _theResult___fst_sfd__h381206 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 ? - _theResult___snd_fst_sfd__h363379 : - _theResult___fst_sfd__h346068) : + _theResult___snd_fst_sfd__h363380 : + _theResult___fst_sfd__h346069) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4552 ? - _theResult___snd_fst_sfd__h381199 : - _theResult___fst_sfd__h346068) ; - assign _theResult___fst_sfd__h381211 = + _theResult___snd_fst_sfd__h381200 : + _theResult___fst_sfd__h346069) ; + assign _theResult___fst_sfd__h381212 = ((coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == @@ -28203,33 +28203,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h381205 ; - assign _theResult___fst_sfd__h400491 = - (_theResult___fst_exp__h399893 == 8'd255) ? - sfdin__h399887[56:34] : - _theResult___fst_sfd__h400488 ; - assign _theResult___fst_sfd__h409073 = - (_theResult___fst_exp__h408549 == 8'd255) ? - _theResult___snd__h408500[56:34] : - _theResult___fst_sfd__h409070 ; - assign _theResult___fst_sfd__h418257 = - (_theResult___fst_exp__h417659 == 8'd255) ? - sfdin__h417653[56:34] : - _theResult___fst_sfd__h418254 ; - assign _theResult___fst_sfd__h426893 = - (_theResult___fst_exp__h426344 == 8'd255) ? - _theResult___snd__h426290[56:34] : - _theResult___fst_sfd__h426890 ; - assign _theResult___fst_sfd__h426902 = + _theResult___fst_sfd__h381206 ; + assign _theResult___fst_sfd__h400492 = + (_theResult___fst_exp__h399894 == 8'd255) ? + sfdin__h399888[56:34] : + _theResult___fst_sfd__h400489 ; + assign _theResult___fst_sfd__h409074 = + (_theResult___fst_exp__h408550 == 8'd255) ? + _theResult___snd__h408501[56:34] : + _theResult___fst_sfd__h409071 ; + assign _theResult___fst_sfd__h418258 = + (_theResult___fst_exp__h417660 == 8'd255) ? + sfdin__h417654[56:34] : + _theResult___fst_sfd__h418255 ; + assign _theResult___fst_sfd__h426894 = + (_theResult___fst_exp__h426345 == 8'd255) ? + _theResult___snd__h426291[56:34] : + _theResult___fst_sfd__h426891 ; + assign _theResult___fst_sfd__h426903 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5404 ? - _theResult___snd_fst_sfd__h409076 : - _theResult___fst_sfd__h391767) : + _theResult___snd_fst_sfd__h409077 : + _theResult___fst_sfd__h391768) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5944 ? - _theResult___snd_fst_sfd__h426896 : - _theResult___fst_sfd__h391767) ; - assign _theResult___fst_sfd__h426908 = + _theResult___snd_fst_sfd__h426897 : + _theResult___fst_sfd__h391768) ; + assign _theResult___fst_sfd__h426909 = ((coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == @@ -28237,33 +28237,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h426902 ; - assign _theResult___fst_sfd__h446186 = - (_theResult___fst_exp__h445588 == 8'd255) ? - sfdin__h445582[56:34] : - _theResult___fst_sfd__h446183 ; - assign _theResult___fst_sfd__h454768 = - (_theResult___fst_exp__h454244 == 8'd255) ? - _theResult___snd__h454195[56:34] : - _theResult___fst_sfd__h454765 ; - assign _theResult___fst_sfd__h463952 = - (_theResult___fst_exp__h463354 == 8'd255) ? - sfdin__h463348[56:34] : - _theResult___fst_sfd__h463949 ; - assign _theResult___fst_sfd__h472588 = - (_theResult___fst_exp__h472039 == 8'd255) ? - _theResult___snd__h471985[56:34] : - _theResult___fst_sfd__h472585 ; - assign _theResult___fst_sfd__h472597 = + _theResult___fst_sfd__h426903 ; + assign _theResult___fst_sfd__h446187 = + (_theResult___fst_exp__h445589 == 8'd255) ? + sfdin__h445583[56:34] : + _theResult___fst_sfd__h446184 ; + assign _theResult___fst_sfd__h454769 = + (_theResult___fst_exp__h454245 == 8'd255) ? + _theResult___snd__h454196[56:34] : + _theResult___fst_sfd__h454766 ; + assign _theResult___fst_sfd__h463953 = + (_theResult___fst_exp__h463355 == 8'd255) ? + sfdin__h463349[56:34] : + _theResult___fst_sfd__h463950 ; + assign _theResult___fst_sfd__h472589 = + (_theResult___fst_exp__h472040 == 8'd255) ? + _theResult___snd__h471986[56:34] : + _theResult___fst_sfd__h472586 ; + assign _theResult___fst_sfd__h472598 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6796 ? - _theResult___snd_fst_sfd__h454771 : - _theResult___fst_sfd__h437462) : + _theResult___snd_fst_sfd__h454772 : + _theResult___fst_sfd__h437463) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7336 ? - _theResult___snd_fst_sfd__h472591 : - _theResult___fst_sfd__h437462) ; - assign _theResult___fst_sfd__h472603 = + _theResult___snd_fst_sfd__h472592 : + _theResult___fst_sfd__h437463) ; + assign _theResult___fst_sfd__h472604 = ((coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == @@ -28271,1303 +28271,1303 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h472597 ; - assign _theResult___fst_sfd__h486456 = + _theResult___fst_sfd__h472598 ; + assign _theResult___fst_sfd__h486457 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15 ; - assign _theResult___fst_sfd__h502284 = + assign _theResult___fst_sfd__h502285 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 : + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 ; - assign _theResult___fst_sfd__h502287 = - (_theResult___fst_exp__h501528 == 11'd2047) ? - _theResult___snd__h501479[56:5] : - _theResult___fst_sfd__h502284 ; - assign _theResult___fst_sfd__h511935 = + assign _theResult___fst_sfd__h502288 = + (_theResult___fst_exp__h501529 == 11'd2047) ? + _theResult___snd__h501480[56:5] : + _theResult___fst_sfd__h502285 ; + assign _theResult___fst_sfd__h511936 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 : + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 ; - assign _theResult___fst_sfd__h511938 = - (_theResult___fst_exp__h511105 == 11'd2047) ? - sfdin__h511099[56:5] : - _theResult___fst_sfd__h511935 ; - assign _theResult___fst_sfd__h520719 = + assign _theResult___fst_sfd__h511939 = + (_theResult___fst_exp__h511106 == 11'd2047) ? + sfdin__h511100[56:5] : + _theResult___fst_sfd__h511936 ; + assign _theResult___fst_sfd__h520720 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 : + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 ; - assign _theResult___fst_sfd__h520722 = - (_theResult___fst_exp__h519938 == 11'd2047) ? - _theResult___snd__h519884[56:5] : - _theResult___fst_sfd__h520719 ; - assign _theResult___fst_sfd__h520731 = - (f1_exp__h482140 == 8'd0) ? + assign _theResult___fst_sfd__h520723 = + (_theResult___fst_exp__h519939 == 11'd2047) ? + _theResult___snd__h519885[56:5] : + _theResult___fst_sfd__h520720 ; + assign _theResult___fst_sfd__h520732 = + (f1_exp__h482141 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 ? - _theResult___snd_fst_sfd__h502290 : - _theResult___fst_sfd__h486456) : + _theResult___snd_fst_sfd__h502291 : + _theResult___fst_sfd__h486457) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 ? - _theResult___snd_fst_sfd__h520725 : - _theResult___fst_sfd__h486456) ; - assign _theResult___fst_sfd__h520737 = - ((f1_exp__h482140 == 8'd255 || f1_exp__h482140 == 8'd0) && - f1_sfd__h482141 == 23'd0) ? + _theResult___snd_fst_sfd__h520726 : + _theResult___fst_sfd__h486457) ; + assign _theResult___fst_sfd__h520738 = + ((f1_exp__h482141 == 8'd255 || f1_exp__h482141 == 8'd0) && + f1_sfd__h482142 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h520731 ; - assign _theResult___fst_sfd__h525309 = + _theResult___fst_sfd__h520732 ; + assign _theResult___fst_sfd__h525310 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17 ; - assign _theResult___fst_sfd__h541137 = + assign _theResult___fst_sfd__h541138 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 : + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 ; - assign _theResult___fst_sfd__h541140 = - (_theResult___fst_exp__h540381 == 11'd2047) ? - _theResult___snd__h540332[56:5] : - _theResult___fst_sfd__h541137 ; - assign _theResult___fst_sfd__h550788 = + assign _theResult___fst_sfd__h541141 = + (_theResult___fst_exp__h540382 == 11'd2047) ? + _theResult___snd__h540333[56:5] : + _theResult___fst_sfd__h541138 ; + assign _theResult___fst_sfd__h550789 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 : + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 ; - assign _theResult___fst_sfd__h550791 = - (_theResult___fst_exp__h549958 == 11'd2047) ? - sfdin__h549952[56:5] : - _theResult___fst_sfd__h550788 ; - assign _theResult___fst_sfd__h559572 = + assign _theResult___fst_sfd__h550792 = + (_theResult___fst_exp__h549959 == 11'd2047) ? + sfdin__h549953[56:5] : + _theResult___fst_sfd__h550789 ; + assign _theResult___fst_sfd__h559573 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 : + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 ; - assign _theResult___fst_sfd__h559575 = - (_theResult___fst_exp__h558791 == 11'd2047) ? - _theResult___snd__h558737[56:5] : - _theResult___fst_sfd__h559572 ; - assign _theResult___fst_sfd__h559584 = - (f2_exp__h521134 == 8'd0) ? + assign _theResult___fst_sfd__h559576 = + (_theResult___fst_exp__h558792 == 11'd2047) ? + _theResult___snd__h558738[56:5] : + _theResult___fst_sfd__h559573 ; + assign _theResult___fst_sfd__h559585 = + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? - _theResult___snd_fst_sfd__h541143 : - _theResult___fst_sfd__h525309) : + _theResult___snd_fst_sfd__h541144 : + _theResult___fst_sfd__h525310) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 ? - _theResult___snd_fst_sfd__h559578 : - _theResult___fst_sfd__h525309) ; - assign _theResult___fst_sfd__h559590 = - ((f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + _theResult___snd_fst_sfd__h559579 : + _theResult___fst_sfd__h525310) ; + assign _theResult___fst_sfd__h559591 = + ((f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h559584 ; - assign _theResult___fst_sfd__h564613 = + _theResult___fst_sfd__h559585 ; + assign _theResult___fst_sfd__h564614 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19 ; - assign _theResult___fst_sfd__h580441 = + assign _theResult___fst_sfd__h580442 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 : + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 ; - assign _theResult___fst_sfd__h580444 = - (_theResult___fst_exp__h579685 == 11'd2047) ? - _theResult___snd__h579636[56:5] : - _theResult___fst_sfd__h580441 ; - assign _theResult___fst_sfd__h590092 = + assign _theResult___fst_sfd__h580445 = + (_theResult___fst_exp__h579686 == 11'd2047) ? + _theResult___snd__h579637[56:5] : + _theResult___fst_sfd__h580442 ; + assign _theResult___fst_sfd__h590093 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 : + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 ; - assign _theResult___fst_sfd__h590095 = - (_theResult___fst_exp__h589262 == 11'd2047) ? - sfdin__h589256[56:5] : - _theResult___fst_sfd__h590092 ; - assign _theResult___fst_sfd__h598876 = + assign _theResult___fst_sfd__h590096 = + (_theResult___fst_exp__h589263 == 11'd2047) ? + sfdin__h589257[56:5] : + _theResult___fst_sfd__h590093 ; + assign _theResult___fst_sfd__h598877 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 : + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 ; - assign _theResult___fst_sfd__h598879 = - (_theResult___fst_exp__h598095 == 11'd2047) ? - _theResult___snd__h598041[56:5] : - _theResult___fst_sfd__h598876 ; - assign _theResult___fst_sfd__h598888 = - (f3_exp__h560438 == 8'd0) ? + assign _theResult___fst_sfd__h598880 = + (_theResult___fst_exp__h598096 == 11'd2047) ? + _theResult___snd__h598042[56:5] : + _theResult___fst_sfd__h598877 ; + assign _theResult___fst_sfd__h598889 = + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? - _theResult___snd_fst_sfd__h580447 : - _theResult___fst_sfd__h564613) : + _theResult___snd_fst_sfd__h580448 : + _theResult___fst_sfd__h564614) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 ? - _theResult___snd_fst_sfd__h598882 : - _theResult___fst_sfd__h564613) ; - assign _theResult___fst_sfd__h598894 = - ((f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + _theResult___snd_fst_sfd__h598883 : + _theResult___fst_sfd__h564614) ; + assign _theResult___fst_sfd__h598895 = + ((f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h598888 ; - assign _theResult___sfd__h354713 = - sfd__h354288[24] ? - ((_theResult___fst_exp__h354196 == 8'd254) ? + _theResult___fst_sfd__h598889 ; + assign _theResult___sfd__h354714 = + sfd__h354289[24] ? + ((_theResult___fst_exp__h354197 == 8'd254) ? 23'd0 : - sfd__h354288[23:1]) : - sfd__h354288[22:0] ; - assign _theResult___sfd__h363295 = - sfd__h362870[24] ? - ((_theResult___fst_exp__h362852 == 8'd254) ? + sfd__h354289[23:1]) : + sfd__h354289[22:0] ; + assign _theResult___sfd__h363296 = + sfd__h362871[24] ? + ((_theResult___fst_exp__h362853 == 8'd254) ? 23'd0 : - sfd__h362870[23:1]) : - sfd__h362870[22:0] ; - assign _theResult___sfd__h372479 = - sfd__h372054[24] ? - ((_theResult___fst_exp__h371962 == 8'd254) ? + sfd__h362871[23:1]) : + sfd__h362871[22:0] ; + assign _theResult___sfd__h372480 = + sfd__h372055[24] ? + ((_theResult___fst_exp__h371963 == 8'd254) ? 23'd0 : - sfd__h372054[23:1]) : - sfd__h372054[22:0] ; - assign _theResult___sfd__h381115 = - sfd__h380666[24] ? - ((_theResult___fst_exp__h380647 == 8'd254) ? + sfd__h372055[23:1]) : + sfd__h372055[22:0] ; + assign _theResult___sfd__h381116 = + sfd__h380667[24] ? + ((_theResult___fst_exp__h380648 == 8'd254) ? 23'd0 : - sfd__h380666[23:1]) : - sfd__h380666[22:0] ; - assign _theResult___sfd__h381217 = + sfd__h380667[23:1]) : + sfd__h380667[22:0] ; + assign _theResult___sfd__h381218 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h338430 : - _theResult___fst_sfd__h381211 ; - assign _theResult___sfd__h400410 = - sfd__h399985[24] ? - ((_theResult___fst_exp__h399893 == 8'd254) ? + _theResult___snd_fst_sfd__h338431 : + _theResult___fst_sfd__h381212 ; + assign _theResult___sfd__h400411 = + sfd__h399986[24] ? + ((_theResult___fst_exp__h399894 == 8'd254) ? 23'd0 : - sfd__h399985[23:1]) : - sfd__h399985[22:0] ; - assign _theResult___sfd__h408992 = - sfd__h408567[24] ? - ((_theResult___fst_exp__h408549 == 8'd254) ? + sfd__h399986[23:1]) : + sfd__h399986[22:0] ; + assign _theResult___sfd__h408993 = + sfd__h408568[24] ? + ((_theResult___fst_exp__h408550 == 8'd254) ? 23'd0 : - sfd__h408567[23:1]) : - sfd__h408567[22:0] ; - assign _theResult___sfd__h418176 = - sfd__h417751[24] ? - ((_theResult___fst_exp__h417659 == 8'd254) ? + sfd__h408568[23:1]) : + sfd__h408568[22:0] ; + assign _theResult___sfd__h418177 = + sfd__h417752[24] ? + ((_theResult___fst_exp__h417660 == 8'd254) ? 23'd0 : - sfd__h417751[23:1]) : - sfd__h417751[22:0] ; - assign _theResult___sfd__h426812 = - sfd__h426363[24] ? - ((_theResult___fst_exp__h426344 == 8'd254) ? + sfd__h417752[23:1]) : + sfd__h417752[22:0] ; + assign _theResult___sfd__h426813 = + sfd__h426364[24] ? + ((_theResult___fst_exp__h426345 == 8'd254) ? 23'd0 : - sfd__h426363[23:1]) : - sfd__h426363[22:0] ; - assign _theResult___sfd__h426914 = + sfd__h426364[23:1]) : + sfd__h426364[22:0] ; + assign _theResult___sfd__h426915 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h384132 : - _theResult___fst_sfd__h426908 ; - assign _theResult___sfd__h446105 = - sfd__h445680[24] ? - ((_theResult___fst_exp__h445588 == 8'd254) ? + _theResult___snd_fst_sfd__h384133 : + _theResult___fst_sfd__h426909 ; + assign _theResult___sfd__h446106 = + sfd__h445681[24] ? + ((_theResult___fst_exp__h445589 == 8'd254) ? 23'd0 : - sfd__h445680[23:1]) : - sfd__h445680[22:0] ; - assign _theResult___sfd__h454687 = - sfd__h454262[24] ? - ((_theResult___fst_exp__h454244 == 8'd254) ? + sfd__h445681[23:1]) : + sfd__h445681[22:0] ; + assign _theResult___sfd__h454688 = + sfd__h454263[24] ? + ((_theResult___fst_exp__h454245 == 8'd254) ? 23'd0 : - sfd__h454262[23:1]) : - sfd__h454262[22:0] ; - assign _theResult___sfd__h463871 = - sfd__h463446[24] ? - ((_theResult___fst_exp__h463354 == 8'd254) ? + sfd__h454263[23:1]) : + sfd__h454263[22:0] ; + assign _theResult___sfd__h463872 = + sfd__h463447[24] ? + ((_theResult___fst_exp__h463355 == 8'd254) ? 23'd0 : - sfd__h463446[23:1]) : - sfd__h463446[22:0] ; - assign _theResult___sfd__h472507 = - sfd__h472058[24] ? - ((_theResult___fst_exp__h472039 == 8'd254) ? + sfd__h463447[23:1]) : + sfd__h463447[22:0] ; + assign _theResult___sfd__h472508 = + sfd__h472059[24] ? + ((_theResult___fst_exp__h472040 == 8'd254) ? 23'd0 : - sfd__h472058[23:1]) : - sfd__h472058[22:0] ; - assign _theResult___sfd__h472609 = + sfd__h472059[23:1]) : + sfd__h472059[22:0] ; + assign _theResult___sfd__h472610 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h429827 : - _theResult___fst_sfd__h472603 ; - assign _theResult___sfd__h502184 = - sfd__h501546[53] ? - ((_theResult___fst_exp__h501528 == 11'd2046) ? + _theResult___snd_fst_sfd__h429828 : + _theResult___fst_sfd__h472604 ; + assign _theResult___sfd__h502185 = + sfd__h501547[53] ? + ((_theResult___fst_exp__h501529 == 11'd2046) ? 52'd0 : - sfd__h501546[52:1]) : - sfd__h501546[51:0] ; - assign _theResult___sfd__h511835 = - sfd__h511197[53] ? - ((_theResult___fst_exp__h511105 == 11'd2046) ? + sfd__h501547[52:1]) : + sfd__h501547[51:0] ; + assign _theResult___sfd__h511836 = + sfd__h511198[53] ? + ((_theResult___fst_exp__h511106 == 11'd2046) ? 52'd0 : - sfd__h511197[52:1]) : - sfd__h511197[51:0] ; - assign _theResult___sfd__h520619 = - sfd__h519957[53] ? - ((_theResult___fst_exp__h519938 == 11'd2046) ? + sfd__h511198[52:1]) : + sfd__h511198[51:0] ; + assign _theResult___sfd__h520620 = + sfd__h519958[53] ? + ((_theResult___fst_exp__h519939 == 11'd2046) ? 52'd0 : - sfd__h519957[52:1]) : - sfd__h519957[51:0] ; - assign _theResult___sfd__h541037 = - sfd__h540399[53] ? - ((_theResult___fst_exp__h540381 == 11'd2046) ? + sfd__h519958[52:1]) : + sfd__h519958[51:0] ; + assign _theResult___sfd__h541038 = + sfd__h540400[53] ? + ((_theResult___fst_exp__h540382 == 11'd2046) ? 52'd0 : - sfd__h540399[52:1]) : - sfd__h540399[51:0] ; - assign _theResult___sfd__h550688 = - sfd__h550050[53] ? - ((_theResult___fst_exp__h549958 == 11'd2046) ? + sfd__h540400[52:1]) : + sfd__h540400[51:0] ; + assign _theResult___sfd__h550689 = + sfd__h550051[53] ? + ((_theResult___fst_exp__h549959 == 11'd2046) ? 52'd0 : - sfd__h550050[52:1]) : - sfd__h550050[51:0] ; - assign _theResult___sfd__h559472 = - sfd__h558810[53] ? - ((_theResult___fst_exp__h558791 == 11'd2046) ? + sfd__h550051[52:1]) : + sfd__h550051[51:0] ; + assign _theResult___sfd__h559473 = + sfd__h558811[53] ? + ((_theResult___fst_exp__h558792 == 11'd2046) ? 52'd0 : - sfd__h558810[52:1]) : - sfd__h558810[51:0] ; - assign _theResult___sfd__h580341 = - sfd__h579703[53] ? - ((_theResult___fst_exp__h579685 == 11'd2046) ? + sfd__h558811[52:1]) : + sfd__h558811[51:0] ; + assign _theResult___sfd__h580342 = + sfd__h579704[53] ? + ((_theResult___fst_exp__h579686 == 11'd2046) ? 52'd0 : - sfd__h579703[52:1]) : - sfd__h579703[51:0] ; - assign _theResult___sfd__h589992 = - sfd__h589354[53] ? - ((_theResult___fst_exp__h589262 == 11'd2046) ? + sfd__h579704[52:1]) : + sfd__h579704[51:0] ; + assign _theResult___sfd__h589993 = + sfd__h589355[53] ? + ((_theResult___fst_exp__h589263 == 11'd2046) ? 52'd0 : - sfd__h589354[52:1]) : - sfd__h589354[51:0] ; - assign _theResult___sfd__h598776 = - sfd__h598114[53] ? - ((_theResult___fst_exp__h598095 == 11'd2046) ? + sfd__h589355[52:1]) : + sfd__h589355[51:0] ; + assign _theResult___sfd__h598777 = + sfd__h598115[53] ? + ((_theResult___fst_exp__h598096 == 11'd2046) ? 52'd0 : - sfd__h598114[52:1]) : - sfd__h598114[51:0] ; - assign _theResult___snd__h354207 = { _theResult____h346085[55:0], 1'd0 } ; - assign _theResult___snd__h354218 = - (!_theResult____h346085[56] && _theResult____h346085[55]) ? - _theResult___snd__h354220 : - _theResult___snd__h354230 ; - assign _theResult___snd__h354220 = { _theResult____h346085[54:0], 2'd0 } ; - assign _theResult___snd__h354230 = - (!_theResult____h346085[56] && !_theResult____h346085[55] && - !_theResult____h346085[54] && - !_theResult____h346085[53] && - !_theResult____h346085[52] && - !_theResult____h346085[51] && - !_theResult____h346085[50] && - !_theResult____h346085[49] && - !_theResult____h346085[48] && - !_theResult____h346085[47] && - !_theResult____h346085[46] && - !_theResult____h346085[45] && - !_theResult____h346085[44] && - !_theResult____h346085[43] && - !_theResult____h346085[42] && - !_theResult____h346085[41] && - !_theResult____h346085[40] && - !_theResult____h346085[39] && - !_theResult____h346085[38] && - !_theResult____h346085[37] && - !_theResult____h346085[36] && - !_theResult____h346085[35] && - !_theResult____h346085[34] && - !_theResult____h346085[33] && - !_theResult____h346085[32] && - !_theResult____h346085[31] && - !_theResult____h346085[30] && - !_theResult____h346085[29] && - !_theResult____h346085[28] && - !_theResult____h346085[27] && - !_theResult____h346085[26] && - !_theResult____h346085[25] && - !_theResult____h346085[24] && - !_theResult____h346085[23] && - !_theResult____h346085[22] && - !_theResult____h346085[21] && - !_theResult____h346085[20] && - !_theResult____h346085[19] && - !_theResult____h346085[18] && - !_theResult____h346085[17] && - !_theResult____h346085[16] && - !_theResult____h346085[15] && - !_theResult____h346085[14] && - !_theResult____h346085[13] && - !_theResult____h346085[12] && - !_theResult____h346085[11] && - !_theResult____h346085[10] && - !_theResult____h346085[9] && - !_theResult____h346085[8] && - !_theResult____h346085[7] && - !_theResult____h346085[6] && - !_theResult____h346085[5] && - !_theResult____h346085[4] && - !_theResult____h346085[3] && - !_theResult____h346085[2] && - !_theResult____h346085[1] && - !_theResult____h346085[0]) ? - _theResult____h346085 : - _theResult___snd__h354236 ; - assign _theResult___snd__h354236 = + sfd__h598115[52:1]) : + sfd__h598115[51:0] ; + assign _theResult___snd__h354208 = { _theResult____h346086[55:0], 1'd0 } ; + assign _theResult___snd__h354219 = + (!_theResult____h346086[56] && _theResult____h346086[55]) ? + _theResult___snd__h354221 : + _theResult___snd__h354231 ; + assign _theResult___snd__h354221 = { _theResult____h346086[54:0], 2'd0 } ; + assign _theResult___snd__h354231 = + (!_theResult____h346086[56] && !_theResult____h346086[55] && + !_theResult____h346086[54] && + !_theResult____h346086[53] && + !_theResult____h346086[52] && + !_theResult____h346086[51] && + !_theResult____h346086[50] && + !_theResult____h346086[49] && + !_theResult____h346086[48] && + !_theResult____h346086[47] && + !_theResult____h346086[46] && + !_theResult____h346086[45] && + !_theResult____h346086[44] && + !_theResult____h346086[43] && + !_theResult____h346086[42] && + !_theResult____h346086[41] && + !_theResult____h346086[40] && + !_theResult____h346086[39] && + !_theResult____h346086[38] && + !_theResult____h346086[37] && + !_theResult____h346086[36] && + !_theResult____h346086[35] && + !_theResult____h346086[34] && + !_theResult____h346086[33] && + !_theResult____h346086[32] && + !_theResult____h346086[31] && + !_theResult____h346086[30] && + !_theResult____h346086[29] && + !_theResult____h346086[28] && + !_theResult____h346086[27] && + !_theResult____h346086[26] && + !_theResult____h346086[25] && + !_theResult____h346086[24] && + !_theResult____h346086[23] && + !_theResult____h346086[22] && + !_theResult____h346086[21] && + !_theResult____h346086[20] && + !_theResult____h346086[19] && + !_theResult____h346086[18] && + !_theResult____h346086[17] && + !_theResult____h346086[16] && + !_theResult____h346086[15] && + !_theResult____h346086[14] && + !_theResult____h346086[13] && + !_theResult____h346086[12] && + !_theResult____h346086[11] && + !_theResult____h346086[10] && + !_theResult____h346086[9] && + !_theResult____h346086[8] && + !_theResult____h346086[7] && + !_theResult____h346086[6] && + !_theResult____h346086[5] && + !_theResult____h346086[4] && + !_theResult____h346086[3] && + !_theResult____h346086[2] && + !_theResult____h346086[1] && + !_theResult____h346086[0]) ? + _theResult____h346086 : + _theResult___snd__h354237 ; + assign _theResult___snd__h354237 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28[54:0], 2'd0 } ; - assign _theResult___snd__h354259 = - _theResult____h346085 << + assign _theResult___snd__h354260 = + _theResult____h346086 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 ; - assign _theResult___snd__h362803 = + assign _theResult___snd__h362804 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h362812 : - _theResult___snd__h362805 ; - assign _theResult___snd__h362805 = + _theResult___snd__h362813 : + _theResult___snd__h362806 ; + assign _theResult___snd__h362806 = { coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h362812 = + assign _theResult___snd__h362813 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423) ? - sfd__h338480 : - _theResult___snd__h362818 ; - assign _theResult___snd__h362818 = + sfd__h338481 : + _theResult___snd__h362819 ; + assign _theResult___snd__h362819 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q30[54:0], 2'd0 } ; - assign _theResult___snd__h362841 = - sfd__h338480 << + assign _theResult___snd__h362842 = + sfd__h338481 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 ; - assign _theResult___snd__h371973 = { _theResult____h363724[55:0], 1'd0 } ; - assign _theResult___snd__h371984 = - (!_theResult____h363724[56] && _theResult____h363724[55]) ? - _theResult___snd__h371986 : - _theResult___snd__h371996 ; - assign _theResult___snd__h371986 = { _theResult____h363724[54:0], 2'd0 } ; - assign _theResult___snd__h371996 = - (!_theResult____h363724[56] && !_theResult____h363724[55] && - !_theResult____h363724[54] && - !_theResult____h363724[53] && - !_theResult____h363724[52] && - !_theResult____h363724[51] && - !_theResult____h363724[50] && - !_theResult____h363724[49] && - !_theResult____h363724[48] && - !_theResult____h363724[47] && - !_theResult____h363724[46] && - !_theResult____h363724[45] && - !_theResult____h363724[44] && - !_theResult____h363724[43] && - !_theResult____h363724[42] && - !_theResult____h363724[41] && - !_theResult____h363724[40] && - !_theResult____h363724[39] && - !_theResult____h363724[38] && - !_theResult____h363724[37] && - !_theResult____h363724[36] && - !_theResult____h363724[35] && - !_theResult____h363724[34] && - !_theResult____h363724[33] && - !_theResult____h363724[32] && - !_theResult____h363724[31] && - !_theResult____h363724[30] && - !_theResult____h363724[29] && - !_theResult____h363724[28] && - !_theResult____h363724[27] && - !_theResult____h363724[26] && - !_theResult____h363724[25] && - !_theResult____h363724[24] && - !_theResult____h363724[23] && - !_theResult____h363724[22] && - !_theResult____h363724[21] && - !_theResult____h363724[20] && - !_theResult____h363724[19] && - !_theResult____h363724[18] && - !_theResult____h363724[17] && - !_theResult____h363724[16] && - !_theResult____h363724[15] && - !_theResult____h363724[14] && - !_theResult____h363724[13] && - !_theResult____h363724[12] && - !_theResult____h363724[11] && - !_theResult____h363724[10] && - !_theResult____h363724[9] && - !_theResult____h363724[8] && - !_theResult____h363724[7] && - !_theResult____h363724[6] && - !_theResult____h363724[5] && - !_theResult____h363724[4] && - !_theResult____h363724[3] && - !_theResult____h363724[2] && - !_theResult____h363724[1] && - !_theResult____h363724[0]) ? - _theResult____h363724 : - _theResult___snd__h372002 ; - assign _theResult___snd__h372002 = + assign _theResult___snd__h371974 = { _theResult____h363725[55:0], 1'd0 } ; + assign _theResult___snd__h371985 = + (!_theResult____h363725[56] && _theResult____h363725[55]) ? + _theResult___snd__h371987 : + _theResult___snd__h371997 ; + assign _theResult___snd__h371987 = { _theResult____h363725[54:0], 2'd0 } ; + assign _theResult___snd__h371997 = + (!_theResult____h363725[56] && !_theResult____h363725[55] && + !_theResult____h363725[54] && + !_theResult____h363725[53] && + !_theResult____h363725[52] && + !_theResult____h363725[51] && + !_theResult____h363725[50] && + !_theResult____h363725[49] && + !_theResult____h363725[48] && + !_theResult____h363725[47] && + !_theResult____h363725[46] && + !_theResult____h363725[45] && + !_theResult____h363725[44] && + !_theResult____h363725[43] && + !_theResult____h363725[42] && + !_theResult____h363725[41] && + !_theResult____h363725[40] && + !_theResult____h363725[39] && + !_theResult____h363725[38] && + !_theResult____h363725[37] && + !_theResult____h363725[36] && + !_theResult____h363725[35] && + !_theResult____h363725[34] && + !_theResult____h363725[33] && + !_theResult____h363725[32] && + !_theResult____h363725[31] && + !_theResult____h363725[30] && + !_theResult____h363725[29] && + !_theResult____h363725[28] && + !_theResult____h363725[27] && + !_theResult____h363725[26] && + !_theResult____h363725[25] && + !_theResult____h363725[24] && + !_theResult____h363725[23] && + !_theResult____h363725[22] && + !_theResult____h363725[21] && + !_theResult____h363725[20] && + !_theResult____h363725[19] && + !_theResult____h363725[18] && + !_theResult____h363725[17] && + !_theResult____h363725[16] && + !_theResult____h363725[15] && + !_theResult____h363725[14] && + !_theResult____h363725[13] && + !_theResult____h363725[12] && + !_theResult____h363725[11] && + !_theResult____h363725[10] && + !_theResult____h363725[9] && + !_theResult____h363725[8] && + !_theResult____h363725[7] && + !_theResult____h363725[6] && + !_theResult____h363725[5] && + !_theResult____h363725[4] && + !_theResult____h363725[3] && + !_theResult____h363725[2] && + !_theResult____h363725[1] && + !_theResult____h363725[0]) ? + _theResult____h363725 : + _theResult___snd__h372003 ; + assign _theResult___snd__h372003 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q38[54:0], 2'd0 } ; - assign _theResult___snd__h372025 = - _theResult____h363724 << + assign _theResult___snd__h372026 = + _theResult____h363725 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 ; - assign _theResult___snd__h380593 = + assign _theResult___snd__h380594 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h380607 : - _theResult___snd__h362805 ; - assign _theResult___snd__h380607 = + _theResult___snd__h380608 : + _theResult___snd__h362806 ; + assign _theResult___snd__h380608 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423) ? - sfd__h338480 : - _theResult___snd__h380613 ; - assign _theResult___snd__h380613 = + sfd__h338481 : + _theResult___snd__h380614 ; + assign _theResult___snd__h380614 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q43[54:0], 2'd0 } ; - assign _theResult___snd__h380631 = - sfd__h338480 << + assign _theResult___snd__h380632 = + sfd__h338481 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872) ; - assign _theResult___snd__h399904 = { _theResult____h391784[55:0], 1'd0 } ; - assign _theResult___snd__h399915 = - (!_theResult____h391784[56] && _theResult____h391784[55]) ? - _theResult___snd__h399917 : - _theResult___snd__h399927 ; - assign _theResult___snd__h399917 = { _theResult____h391784[54:0], 2'd0 } ; - assign _theResult___snd__h399927 = - (!_theResult____h391784[56] && !_theResult____h391784[55] && - !_theResult____h391784[54] && - !_theResult____h391784[53] && - !_theResult____h391784[52] && - !_theResult____h391784[51] && - !_theResult____h391784[50] && - !_theResult____h391784[49] && - !_theResult____h391784[48] && - !_theResult____h391784[47] && - !_theResult____h391784[46] && - !_theResult____h391784[45] && - !_theResult____h391784[44] && - !_theResult____h391784[43] && - !_theResult____h391784[42] && - !_theResult____h391784[41] && - !_theResult____h391784[40] && - !_theResult____h391784[39] && - !_theResult____h391784[38] && - !_theResult____h391784[37] && - !_theResult____h391784[36] && - !_theResult____h391784[35] && - !_theResult____h391784[34] && - !_theResult____h391784[33] && - !_theResult____h391784[32] && - !_theResult____h391784[31] && - !_theResult____h391784[30] && - !_theResult____h391784[29] && - !_theResult____h391784[28] && - !_theResult____h391784[27] && - !_theResult____h391784[26] && - !_theResult____h391784[25] && - !_theResult____h391784[24] && - !_theResult____h391784[23] && - !_theResult____h391784[22] && - !_theResult____h391784[21] && - !_theResult____h391784[20] && - !_theResult____h391784[19] && - !_theResult____h391784[18] && - !_theResult____h391784[17] && - !_theResult____h391784[16] && - !_theResult____h391784[15] && - !_theResult____h391784[14] && - !_theResult____h391784[13] && - !_theResult____h391784[12] && - !_theResult____h391784[11] && - !_theResult____h391784[10] && - !_theResult____h391784[9] && - !_theResult____h391784[8] && - !_theResult____h391784[7] && - !_theResult____h391784[6] && - !_theResult____h391784[5] && - !_theResult____h391784[4] && - !_theResult____h391784[3] && - !_theResult____h391784[2] && - !_theResult____h391784[1] && - !_theResult____h391784[0]) ? - _theResult____h391784 : - _theResult___snd__h399933 ; - assign _theResult___snd__h399933 = + assign _theResult___snd__h399905 = { _theResult____h391785[55:0], 1'd0 } ; + assign _theResult___snd__h399916 = + (!_theResult____h391785[56] && _theResult____h391785[55]) ? + _theResult___snd__h399918 : + _theResult___snd__h399928 ; + assign _theResult___snd__h399918 = { _theResult____h391785[54:0], 2'd0 } ; + assign _theResult___snd__h399928 = + (!_theResult____h391785[56] && !_theResult____h391785[55] && + !_theResult____h391785[54] && + !_theResult____h391785[53] && + !_theResult____h391785[52] && + !_theResult____h391785[51] && + !_theResult____h391785[50] && + !_theResult____h391785[49] && + !_theResult____h391785[48] && + !_theResult____h391785[47] && + !_theResult____h391785[46] && + !_theResult____h391785[45] && + !_theResult____h391785[44] && + !_theResult____h391785[43] && + !_theResult____h391785[42] && + !_theResult____h391785[41] && + !_theResult____h391785[40] && + !_theResult____h391785[39] && + !_theResult____h391785[38] && + !_theResult____h391785[37] && + !_theResult____h391785[36] && + !_theResult____h391785[35] && + !_theResult____h391785[34] && + !_theResult____h391785[33] && + !_theResult____h391785[32] && + !_theResult____h391785[31] && + !_theResult____h391785[30] && + !_theResult____h391785[29] && + !_theResult____h391785[28] && + !_theResult____h391785[27] && + !_theResult____h391785[26] && + !_theResult____h391785[25] && + !_theResult____h391785[24] && + !_theResult____h391785[23] && + !_theResult____h391785[22] && + !_theResult____h391785[21] && + !_theResult____h391785[20] && + !_theResult____h391785[19] && + !_theResult____h391785[18] && + !_theResult____h391785[17] && + !_theResult____h391785[16] && + !_theResult____h391785[15] && + !_theResult____h391785[14] && + !_theResult____h391785[13] && + !_theResult____h391785[12] && + !_theResult____h391785[11] && + !_theResult____h391785[10] && + !_theResult____h391785[9] && + !_theResult____h391785[8] && + !_theResult____h391785[7] && + !_theResult____h391785[6] && + !_theResult____h391785[5] && + !_theResult____h391785[4] && + !_theResult____h391785[3] && + !_theResult____h391785[2] && + !_theResult____h391785[1] && + !_theResult____h391785[0]) ? + _theResult____h391785 : + _theResult___snd__h399934 ; + assign _theResult___snd__h399934 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63[54:0], 2'd0 } ; - assign _theResult___snd__h399956 = - _theResult____h391784 << + assign _theResult___snd__h399957 = + _theResult____h391785 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 ; - assign _theResult___snd__h408500 = + assign _theResult___snd__h408501 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h408509 : - _theResult___snd__h408502 ; - assign _theResult___snd__h408502 = + _theResult___snd__h408510 : + _theResult___snd__h408503 ; + assign _theResult___snd__h408503 = { coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h408509 = + assign _theResult___snd__h408510 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815) ? - sfd__h384182 : - _theResult___snd__h408515 ; - assign _theResult___snd__h408515 = + sfd__h384183 : + _theResult___snd__h408516 ; + assign _theResult___snd__h408516 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q65[54:0], 2'd0 } ; - assign _theResult___snd__h408538 = - sfd__h384182 << + assign _theResult___snd__h408539 = + sfd__h384183 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 ; - assign _theResult___snd__h417670 = { _theResult____h409421[55:0], 1'd0 } ; - assign _theResult___snd__h417681 = - (!_theResult____h409421[56] && _theResult____h409421[55]) ? - _theResult___snd__h417683 : - _theResult___snd__h417693 ; - assign _theResult___snd__h417683 = { _theResult____h409421[54:0], 2'd0 } ; - assign _theResult___snd__h417693 = - (!_theResult____h409421[56] && !_theResult____h409421[55] && - !_theResult____h409421[54] && - !_theResult____h409421[53] && - !_theResult____h409421[52] && - !_theResult____h409421[51] && - !_theResult____h409421[50] && - !_theResult____h409421[49] && - !_theResult____h409421[48] && - !_theResult____h409421[47] && - !_theResult____h409421[46] && - !_theResult____h409421[45] && - !_theResult____h409421[44] && - !_theResult____h409421[43] && - !_theResult____h409421[42] && - !_theResult____h409421[41] && - !_theResult____h409421[40] && - !_theResult____h409421[39] && - !_theResult____h409421[38] && - !_theResult____h409421[37] && - !_theResult____h409421[36] && - !_theResult____h409421[35] && - !_theResult____h409421[34] && - !_theResult____h409421[33] && - !_theResult____h409421[32] && - !_theResult____h409421[31] && - !_theResult____h409421[30] && - !_theResult____h409421[29] && - !_theResult____h409421[28] && - !_theResult____h409421[27] && - !_theResult____h409421[26] && - !_theResult____h409421[25] && - !_theResult____h409421[24] && - !_theResult____h409421[23] && - !_theResult____h409421[22] && - !_theResult____h409421[21] && - !_theResult____h409421[20] && - !_theResult____h409421[19] && - !_theResult____h409421[18] && - !_theResult____h409421[17] && - !_theResult____h409421[16] && - !_theResult____h409421[15] && - !_theResult____h409421[14] && - !_theResult____h409421[13] && - !_theResult____h409421[12] && - !_theResult____h409421[11] && - !_theResult____h409421[10] && - !_theResult____h409421[9] && - !_theResult____h409421[8] && - !_theResult____h409421[7] && - !_theResult____h409421[6] && - !_theResult____h409421[5] && - !_theResult____h409421[4] && - !_theResult____h409421[3] && - !_theResult____h409421[2] && - !_theResult____h409421[1] && - !_theResult____h409421[0]) ? - _theResult____h409421 : - _theResult___snd__h417699 ; - assign _theResult___snd__h417699 = + assign _theResult___snd__h417671 = { _theResult____h409422[55:0], 1'd0 } ; + assign _theResult___snd__h417682 = + (!_theResult____h409422[56] && _theResult____h409422[55]) ? + _theResult___snd__h417684 : + _theResult___snd__h417694 ; + assign _theResult___snd__h417684 = { _theResult____h409422[54:0], 2'd0 } ; + assign _theResult___snd__h417694 = + (!_theResult____h409422[56] && !_theResult____h409422[55] && + !_theResult____h409422[54] && + !_theResult____h409422[53] && + !_theResult____h409422[52] && + !_theResult____h409422[51] && + !_theResult____h409422[50] && + !_theResult____h409422[49] && + !_theResult____h409422[48] && + !_theResult____h409422[47] && + !_theResult____h409422[46] && + !_theResult____h409422[45] && + !_theResult____h409422[44] && + !_theResult____h409422[43] && + !_theResult____h409422[42] && + !_theResult____h409422[41] && + !_theResult____h409422[40] && + !_theResult____h409422[39] && + !_theResult____h409422[38] && + !_theResult____h409422[37] && + !_theResult____h409422[36] && + !_theResult____h409422[35] && + !_theResult____h409422[34] && + !_theResult____h409422[33] && + !_theResult____h409422[32] && + !_theResult____h409422[31] && + !_theResult____h409422[30] && + !_theResult____h409422[29] && + !_theResult____h409422[28] && + !_theResult____h409422[27] && + !_theResult____h409422[26] && + !_theResult____h409422[25] && + !_theResult____h409422[24] && + !_theResult____h409422[23] && + !_theResult____h409422[22] && + !_theResult____h409422[21] && + !_theResult____h409422[20] && + !_theResult____h409422[19] && + !_theResult____h409422[18] && + !_theResult____h409422[17] && + !_theResult____h409422[16] && + !_theResult____h409422[15] && + !_theResult____h409422[14] && + !_theResult____h409422[13] && + !_theResult____h409422[12] && + !_theResult____h409422[11] && + !_theResult____h409422[10] && + !_theResult____h409422[9] && + !_theResult____h409422[8] && + !_theResult____h409422[7] && + !_theResult____h409422[6] && + !_theResult____h409422[5] && + !_theResult____h409422[4] && + !_theResult____h409422[3] && + !_theResult____h409422[2] && + !_theResult____h409422[1] && + !_theResult____h409422[0]) ? + _theResult____h409422 : + _theResult___snd__h417700 ; + assign _theResult___snd__h417700 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q73[54:0], 2'd0 } ; - assign _theResult___snd__h417722 = - _theResult____h409421 << + assign _theResult___snd__h417723 = + _theResult____h409422 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 ; - assign _theResult___snd__h426290 = + assign _theResult___snd__h426291 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h426304 : - _theResult___snd__h408502 ; - assign _theResult___snd__h426304 = + _theResult___snd__h426305 : + _theResult___snd__h408503 ; + assign _theResult___snd__h426305 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815) ? - sfd__h384182 : - _theResult___snd__h426310 ; - assign _theResult___snd__h426310 = + sfd__h384183 : + _theResult___snd__h426311 ; + assign _theResult___snd__h426311 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q78[54:0], 2'd0 } ; - assign _theResult___snd__h426328 = - sfd__h384182 << + assign _theResult___snd__h426329 = + sfd__h384183 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264) ; - assign _theResult___snd__h445599 = { _theResult____h437479[55:0], 1'd0 } ; - assign _theResult___snd__h445610 = - (!_theResult____h437479[56] && _theResult____h437479[55]) ? - _theResult___snd__h445612 : - _theResult___snd__h445622 ; - assign _theResult___snd__h445612 = { _theResult____h437479[54:0], 2'd0 } ; - assign _theResult___snd__h445622 = - (!_theResult____h437479[56] && !_theResult____h437479[55] && - !_theResult____h437479[54] && - !_theResult____h437479[53] && - !_theResult____h437479[52] && - !_theResult____h437479[51] && - !_theResult____h437479[50] && - !_theResult____h437479[49] && - !_theResult____h437479[48] && - !_theResult____h437479[47] && - !_theResult____h437479[46] && - !_theResult____h437479[45] && - !_theResult____h437479[44] && - !_theResult____h437479[43] && - !_theResult____h437479[42] && - !_theResult____h437479[41] && - !_theResult____h437479[40] && - !_theResult____h437479[39] && - !_theResult____h437479[38] && - !_theResult____h437479[37] && - !_theResult____h437479[36] && - !_theResult____h437479[35] && - !_theResult____h437479[34] && - !_theResult____h437479[33] && - !_theResult____h437479[32] && - !_theResult____h437479[31] && - !_theResult____h437479[30] && - !_theResult____h437479[29] && - !_theResult____h437479[28] && - !_theResult____h437479[27] && - !_theResult____h437479[26] && - !_theResult____h437479[25] && - !_theResult____h437479[24] && - !_theResult____h437479[23] && - !_theResult____h437479[22] && - !_theResult____h437479[21] && - !_theResult____h437479[20] && - !_theResult____h437479[19] && - !_theResult____h437479[18] && - !_theResult____h437479[17] && - !_theResult____h437479[16] && - !_theResult____h437479[15] && - !_theResult____h437479[14] && - !_theResult____h437479[13] && - !_theResult____h437479[12] && - !_theResult____h437479[11] && - !_theResult____h437479[10] && - !_theResult____h437479[9] && - !_theResult____h437479[8] && - !_theResult____h437479[7] && - !_theResult____h437479[6] && - !_theResult____h437479[5] && - !_theResult____h437479[4] && - !_theResult____h437479[3] && - !_theResult____h437479[2] && - !_theResult____h437479[1] && - !_theResult____h437479[0]) ? - _theResult____h437479 : - _theResult___snd__h445628 ; - assign _theResult___snd__h445628 = + assign _theResult___snd__h445600 = { _theResult____h437480[55:0], 1'd0 } ; + assign _theResult___snd__h445611 = + (!_theResult____h437480[56] && _theResult____h437480[55]) ? + _theResult___snd__h445613 : + _theResult___snd__h445623 ; + assign _theResult___snd__h445613 = { _theResult____h437480[54:0], 2'd0 } ; + assign _theResult___snd__h445623 = + (!_theResult____h437480[56] && !_theResult____h437480[55] && + !_theResult____h437480[54] && + !_theResult____h437480[53] && + !_theResult____h437480[52] && + !_theResult____h437480[51] && + !_theResult____h437480[50] && + !_theResult____h437480[49] && + !_theResult____h437480[48] && + !_theResult____h437480[47] && + !_theResult____h437480[46] && + !_theResult____h437480[45] && + !_theResult____h437480[44] && + !_theResult____h437480[43] && + !_theResult____h437480[42] && + !_theResult____h437480[41] && + !_theResult____h437480[40] && + !_theResult____h437480[39] && + !_theResult____h437480[38] && + !_theResult____h437480[37] && + !_theResult____h437480[36] && + !_theResult____h437480[35] && + !_theResult____h437480[34] && + !_theResult____h437480[33] && + !_theResult____h437480[32] && + !_theResult____h437480[31] && + !_theResult____h437480[30] && + !_theResult____h437480[29] && + !_theResult____h437480[28] && + !_theResult____h437480[27] && + !_theResult____h437480[26] && + !_theResult____h437480[25] && + !_theResult____h437480[24] && + !_theResult____h437480[23] && + !_theResult____h437480[22] && + !_theResult____h437480[21] && + !_theResult____h437480[20] && + !_theResult____h437480[19] && + !_theResult____h437480[18] && + !_theResult____h437480[17] && + !_theResult____h437480[16] && + !_theResult____h437480[15] && + !_theResult____h437480[14] && + !_theResult____h437480[13] && + !_theResult____h437480[12] && + !_theResult____h437480[11] && + !_theResult____h437480[10] && + !_theResult____h437480[9] && + !_theResult____h437480[8] && + !_theResult____h437480[7] && + !_theResult____h437480[6] && + !_theResult____h437480[5] && + !_theResult____h437480[4] && + !_theResult____h437480[3] && + !_theResult____h437480[2] && + !_theResult____h437480[1] && + !_theResult____h437480[0]) ? + _theResult____h437480 : + _theResult___snd__h445629 ; + assign _theResult___snd__h445629 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98[54:0], 2'd0 } ; - assign _theResult___snd__h445651 = - _theResult____h437479 << + assign _theResult___snd__h445652 = + _theResult____h437480 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 ; - assign _theResult___snd__h454195 = + assign _theResult___snd__h454196 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h454204 : - _theResult___snd__h454197 ; - assign _theResult___snd__h454197 = + _theResult___snd__h454205 : + _theResult___snd__h454198 ; + assign _theResult___snd__h454198 = { coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h454204 = + assign _theResult___snd__h454205 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207) ? - sfd__h429877 : - _theResult___snd__h454210 ; - assign _theResult___snd__h454210 = + sfd__h429878 : + _theResult___snd__h454211 ; + assign _theResult___snd__h454211 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q100[54:0], 2'd0 } ; - assign _theResult___snd__h454233 = - sfd__h429877 << + assign _theResult___snd__h454234 = + sfd__h429878 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 ; - assign _theResult___snd__h463365 = { _theResult____h455116[55:0], 1'd0 } ; - assign _theResult___snd__h463376 = - (!_theResult____h455116[56] && _theResult____h455116[55]) ? - _theResult___snd__h463378 : - _theResult___snd__h463388 ; - assign _theResult___snd__h463378 = { _theResult____h455116[54:0], 2'd0 } ; - assign _theResult___snd__h463388 = - (!_theResult____h455116[56] && !_theResult____h455116[55] && - !_theResult____h455116[54] && - !_theResult____h455116[53] && - !_theResult____h455116[52] && - !_theResult____h455116[51] && - !_theResult____h455116[50] && - !_theResult____h455116[49] && - !_theResult____h455116[48] && - !_theResult____h455116[47] && - !_theResult____h455116[46] && - !_theResult____h455116[45] && - !_theResult____h455116[44] && - !_theResult____h455116[43] && - !_theResult____h455116[42] && - !_theResult____h455116[41] && - !_theResult____h455116[40] && - !_theResult____h455116[39] && - !_theResult____h455116[38] && - !_theResult____h455116[37] && - !_theResult____h455116[36] && - !_theResult____h455116[35] && - !_theResult____h455116[34] && - !_theResult____h455116[33] && - !_theResult____h455116[32] && - !_theResult____h455116[31] && - !_theResult____h455116[30] && - !_theResult____h455116[29] && - !_theResult____h455116[28] && - !_theResult____h455116[27] && - !_theResult____h455116[26] && - !_theResult____h455116[25] && - !_theResult____h455116[24] && - !_theResult____h455116[23] && - !_theResult____h455116[22] && - !_theResult____h455116[21] && - !_theResult____h455116[20] && - !_theResult____h455116[19] && - !_theResult____h455116[18] && - !_theResult____h455116[17] && - !_theResult____h455116[16] && - !_theResult____h455116[15] && - !_theResult____h455116[14] && - !_theResult____h455116[13] && - !_theResult____h455116[12] && - !_theResult____h455116[11] && - !_theResult____h455116[10] && - !_theResult____h455116[9] && - !_theResult____h455116[8] && - !_theResult____h455116[7] && - !_theResult____h455116[6] && - !_theResult____h455116[5] && - !_theResult____h455116[4] && - !_theResult____h455116[3] && - !_theResult____h455116[2] && - !_theResult____h455116[1] && - !_theResult____h455116[0]) ? - _theResult____h455116 : - _theResult___snd__h463394 ; - assign _theResult___snd__h463394 = + assign _theResult___snd__h463366 = { _theResult____h455117[55:0], 1'd0 } ; + assign _theResult___snd__h463377 = + (!_theResult____h455117[56] && _theResult____h455117[55]) ? + _theResult___snd__h463379 : + _theResult___snd__h463389 ; + assign _theResult___snd__h463379 = { _theResult____h455117[54:0], 2'd0 } ; + assign _theResult___snd__h463389 = + (!_theResult____h455117[56] && !_theResult____h455117[55] && + !_theResult____h455117[54] && + !_theResult____h455117[53] && + !_theResult____h455117[52] && + !_theResult____h455117[51] && + !_theResult____h455117[50] && + !_theResult____h455117[49] && + !_theResult____h455117[48] && + !_theResult____h455117[47] && + !_theResult____h455117[46] && + !_theResult____h455117[45] && + !_theResult____h455117[44] && + !_theResult____h455117[43] && + !_theResult____h455117[42] && + !_theResult____h455117[41] && + !_theResult____h455117[40] && + !_theResult____h455117[39] && + !_theResult____h455117[38] && + !_theResult____h455117[37] && + !_theResult____h455117[36] && + !_theResult____h455117[35] && + !_theResult____h455117[34] && + !_theResult____h455117[33] && + !_theResult____h455117[32] && + !_theResult____h455117[31] && + !_theResult____h455117[30] && + !_theResult____h455117[29] && + !_theResult____h455117[28] && + !_theResult____h455117[27] && + !_theResult____h455117[26] && + !_theResult____h455117[25] && + !_theResult____h455117[24] && + !_theResult____h455117[23] && + !_theResult____h455117[22] && + !_theResult____h455117[21] && + !_theResult____h455117[20] && + !_theResult____h455117[19] && + !_theResult____h455117[18] && + !_theResult____h455117[17] && + !_theResult____h455117[16] && + !_theResult____h455117[15] && + !_theResult____h455117[14] && + !_theResult____h455117[13] && + !_theResult____h455117[12] && + !_theResult____h455117[11] && + !_theResult____h455117[10] && + !_theResult____h455117[9] && + !_theResult____h455117[8] && + !_theResult____h455117[7] && + !_theResult____h455117[6] && + !_theResult____h455117[5] && + !_theResult____h455117[4] && + !_theResult____h455117[3] && + !_theResult____h455117[2] && + !_theResult____h455117[1] && + !_theResult____h455117[0]) ? + _theResult____h455117 : + _theResult___snd__h463395 ; + assign _theResult___snd__h463395 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q108[54:0], 2'd0 } ; - assign _theResult___snd__h463417 = - _theResult____h455116 << + assign _theResult___snd__h463418 = + _theResult____h455117 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 ; - assign _theResult___snd__h471985 = + assign _theResult___snd__h471986 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h471999 : - _theResult___snd__h454197 ; - assign _theResult___snd__h471999 = + _theResult___snd__h472000 : + _theResult___snd__h454198 ; + assign _theResult___snd__h472000 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207) ? - sfd__h429877 : - _theResult___snd__h472005 ; - assign _theResult___snd__h472005 = + sfd__h429878 : + _theResult___snd__h472006 ; + assign _theResult___snd__h472006 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q113[54:0], 2'd0 } ; - assign _theResult___snd__h472023 = - sfd__h429877 << + assign _theResult___snd__h472024 = + sfd__h429878 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656) ; - assign _theResult___snd__h501479 = - (f1_exp__h482140 == 8'd0) ? - _theResult___snd__h501488 : - _theResult___snd__h501481 ; - assign _theResult___snd__h501481 = { f1_sfd__h482141, 34'd0 } ; - assign _theResult___snd__h501488 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___snd__h501480 = + (f1_exp__h482141 == 8'd0) ? + _theResult___snd__h501489 : + _theResult___snd__h501482 ; + assign _theResult___snd__h501482 = { f1_sfd__h482142, 34'd0 } ; + assign _theResult___snd__h501489 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556) ? - sfd__h482502 : - _theResult___snd__h501494 ; - assign _theResult___snd__h501494 = + sfd__h482503 : + _theResult___snd__h501495 ; + assign _theResult___snd__h501495 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134[54:0], 2'd0 } ; - assign _theResult___snd__h501517 = - sfd__h482502 << + assign _theResult___snd__h501518 = + sfd__h482503 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 ; - assign _theResult___snd__h511116 = { _theResult____h502869[55:0], 1'd0 } ; - assign _theResult___snd__h511127 = - (!_theResult____h502869[56] && _theResult____h502869[55]) ? - _theResult___snd__h511129 : - _theResult___snd__h511139 ; - assign _theResult___snd__h511129 = { _theResult____h502869[54:0], 2'd0 } ; - assign _theResult___snd__h511139 = - (!_theResult____h502869[56] && !_theResult____h502869[55] && - !_theResult____h502869[54] && - !_theResult____h502869[53] && - !_theResult____h502869[52] && - !_theResult____h502869[51] && - !_theResult____h502869[50] && - !_theResult____h502869[49] && - !_theResult____h502869[48] && - !_theResult____h502869[47] && - !_theResult____h502869[46] && - !_theResult____h502869[45] && - !_theResult____h502869[44] && - !_theResult____h502869[43] && - !_theResult____h502869[42] && - !_theResult____h502869[41] && - !_theResult____h502869[40] && - !_theResult____h502869[39] && - !_theResult____h502869[38] && - !_theResult____h502869[37] && - !_theResult____h502869[36] && - !_theResult____h502869[35] && - !_theResult____h502869[34] && - !_theResult____h502869[33] && - !_theResult____h502869[32] && - !_theResult____h502869[31] && - !_theResult____h502869[30] && - !_theResult____h502869[29] && - !_theResult____h502869[28] && - !_theResult____h502869[27] && - !_theResult____h502869[26] && - !_theResult____h502869[25] && - !_theResult____h502869[24] && - !_theResult____h502869[23] && - !_theResult____h502869[22] && - !_theResult____h502869[21] && - !_theResult____h502869[20] && - !_theResult____h502869[19] && - !_theResult____h502869[18] && - !_theResult____h502869[17] && - !_theResult____h502869[16] && - !_theResult____h502869[15] && - !_theResult____h502869[14] && - !_theResult____h502869[13] && - !_theResult____h502869[12] && - !_theResult____h502869[11] && - !_theResult____h502869[10] && - !_theResult____h502869[9] && - !_theResult____h502869[8] && - !_theResult____h502869[7] && - !_theResult____h502869[6] && - !_theResult____h502869[5] && - !_theResult____h502869[4] && - !_theResult____h502869[3] && - !_theResult____h502869[2] && - !_theResult____h502869[1] && - !_theResult____h502869[0]) ? - _theResult____h502869 : - _theResult___snd__h511145 ; - assign _theResult___snd__h511145 = + assign _theResult___snd__h511117 = { _theResult____h502870[55:0], 1'd0 } ; + assign _theResult___snd__h511128 = + (!_theResult____h502870[56] && _theResult____h502870[55]) ? + _theResult___snd__h511130 : + _theResult___snd__h511140 ; + assign _theResult___snd__h511130 = { _theResult____h502870[54:0], 2'd0 } ; + assign _theResult___snd__h511140 = + (!_theResult____h502870[56] && !_theResult____h502870[55] && + !_theResult____h502870[54] && + !_theResult____h502870[53] && + !_theResult____h502870[52] && + !_theResult____h502870[51] && + !_theResult____h502870[50] && + !_theResult____h502870[49] && + !_theResult____h502870[48] && + !_theResult____h502870[47] && + !_theResult____h502870[46] && + !_theResult____h502870[45] && + !_theResult____h502870[44] && + !_theResult____h502870[43] && + !_theResult____h502870[42] && + !_theResult____h502870[41] && + !_theResult____h502870[40] && + !_theResult____h502870[39] && + !_theResult____h502870[38] && + !_theResult____h502870[37] && + !_theResult____h502870[36] && + !_theResult____h502870[35] && + !_theResult____h502870[34] && + !_theResult____h502870[33] && + !_theResult____h502870[32] && + !_theResult____h502870[31] && + !_theResult____h502870[30] && + !_theResult____h502870[29] && + !_theResult____h502870[28] && + !_theResult____h502870[27] && + !_theResult____h502870[26] && + !_theResult____h502870[25] && + !_theResult____h502870[24] && + !_theResult____h502870[23] && + !_theResult____h502870[22] && + !_theResult____h502870[21] && + !_theResult____h502870[20] && + !_theResult____h502870[19] && + !_theResult____h502870[18] && + !_theResult____h502870[17] && + !_theResult____h502870[16] && + !_theResult____h502870[15] && + !_theResult____h502870[14] && + !_theResult____h502870[13] && + !_theResult____h502870[12] && + !_theResult____h502870[11] && + !_theResult____h502870[10] && + !_theResult____h502870[9] && + !_theResult____h502870[8] && + !_theResult____h502870[7] && + !_theResult____h502870[6] && + !_theResult____h502870[5] && + !_theResult____h502870[4] && + !_theResult____h502870[3] && + !_theResult____h502870[2] && + !_theResult____h502870[1] && + !_theResult____h502870[0]) ? + _theResult____h502870 : + _theResult___snd__h511146 ; + assign _theResult___snd__h511146 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138[54:0], 2'd0 } ; - assign _theResult___snd__h511168 = - _theResult____h502869 << + assign _theResult___snd__h511169 = + _theResult____h502870 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 ; - assign _theResult___snd__h519884 = - (f1_exp__h482140 == 8'd0) ? - _theResult___snd__h519898 : - _theResult___snd__h501481 ; - assign _theResult___snd__h519898 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___snd__h519885 = + (f1_exp__h482141 == 8'd0) ? + _theResult___snd__h519899 : + _theResult___snd__h501482 ; + assign _theResult___snd__h519899 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556) ? - sfd__h482502 : - _theResult___snd__h519904 ; - assign _theResult___snd__h519904 = + sfd__h482503 : + _theResult___snd__h519905 ; + assign _theResult___snd__h519905 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141[54:0], 2'd0 } ; - assign _theResult___snd__h519922 = - sfd__h482502 << + assign _theResult___snd__h519923 = + sfd__h482503 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8946 ; - assign _theResult___snd__h540332 = - (f2_exp__h521134 == 8'd0) ? - _theResult___snd__h540341 : - _theResult___snd__h540334 ; - assign _theResult___snd__h540334 = { f2_sfd__h521135, 34'd0 } ; - assign _theResult___snd__h540341 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___snd__h540333 = + (f2_exp__h521135 == 8'd0) ? + _theResult___snd__h540342 : + _theResult___snd__h540335 ; + assign _theResult___snd__h540335 = { f2_sfd__h521136, 34'd0 } ; + assign _theResult___snd__h540342 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056) ? - sfd__h521496 : - _theResult___snd__h540347 ; - assign _theResult___snd__h540347 = + sfd__h521497 : + _theResult___snd__h540348 ; + assign _theResult___snd__h540348 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174[54:0], 2'd0 } ; - assign _theResult___snd__h540370 = - sfd__h521496 << + assign _theResult___snd__h540371 = + sfd__h521497 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 ; - assign _theResult___snd__h549969 = { _theResult____h541722[55:0], 1'd0 } ; - assign _theResult___snd__h549980 = - (!_theResult____h541722[56] && _theResult____h541722[55]) ? - _theResult___snd__h549982 : - _theResult___snd__h549992 ; - assign _theResult___snd__h549982 = { _theResult____h541722[54:0], 2'd0 } ; - assign _theResult___snd__h549992 = - (!_theResult____h541722[56] && !_theResult____h541722[55] && - !_theResult____h541722[54] && - !_theResult____h541722[53] && - !_theResult____h541722[52] && - !_theResult____h541722[51] && - !_theResult____h541722[50] && - !_theResult____h541722[49] && - !_theResult____h541722[48] && - !_theResult____h541722[47] && - !_theResult____h541722[46] && - !_theResult____h541722[45] && - !_theResult____h541722[44] && - !_theResult____h541722[43] && - !_theResult____h541722[42] && - !_theResult____h541722[41] && - !_theResult____h541722[40] && - !_theResult____h541722[39] && - !_theResult____h541722[38] && - !_theResult____h541722[37] && - !_theResult____h541722[36] && - !_theResult____h541722[35] && - !_theResult____h541722[34] && - !_theResult____h541722[33] && - !_theResult____h541722[32] && - !_theResult____h541722[31] && - !_theResult____h541722[30] && - !_theResult____h541722[29] && - !_theResult____h541722[28] && - !_theResult____h541722[27] && - !_theResult____h541722[26] && - !_theResult____h541722[25] && - !_theResult____h541722[24] && - !_theResult____h541722[23] && - !_theResult____h541722[22] && - !_theResult____h541722[21] && - !_theResult____h541722[20] && - !_theResult____h541722[19] && - !_theResult____h541722[18] && - !_theResult____h541722[17] && - !_theResult____h541722[16] && - !_theResult____h541722[15] && - !_theResult____h541722[14] && - !_theResult____h541722[13] && - !_theResult____h541722[12] && - !_theResult____h541722[11] && - !_theResult____h541722[10] && - !_theResult____h541722[9] && - !_theResult____h541722[8] && - !_theResult____h541722[7] && - !_theResult____h541722[6] && - !_theResult____h541722[5] && - !_theResult____h541722[4] && - !_theResult____h541722[3] && - !_theResult____h541722[2] && - !_theResult____h541722[1] && - !_theResult____h541722[0]) ? - _theResult____h541722 : - _theResult___snd__h549998 ; - assign _theResult___snd__h549998 = + assign _theResult___snd__h549970 = { _theResult____h541723[55:0], 1'd0 } ; + assign _theResult___snd__h549981 = + (!_theResult____h541723[56] && _theResult____h541723[55]) ? + _theResult___snd__h549983 : + _theResult___snd__h549993 ; + assign _theResult___snd__h549983 = { _theResult____h541723[54:0], 2'd0 } ; + assign _theResult___snd__h549993 = + (!_theResult____h541723[56] && !_theResult____h541723[55] && + !_theResult____h541723[54] && + !_theResult____h541723[53] && + !_theResult____h541723[52] && + !_theResult____h541723[51] && + !_theResult____h541723[50] && + !_theResult____h541723[49] && + !_theResult____h541723[48] && + !_theResult____h541723[47] && + !_theResult____h541723[46] && + !_theResult____h541723[45] && + !_theResult____h541723[44] && + !_theResult____h541723[43] && + !_theResult____h541723[42] && + !_theResult____h541723[41] && + !_theResult____h541723[40] && + !_theResult____h541723[39] && + !_theResult____h541723[38] && + !_theResult____h541723[37] && + !_theResult____h541723[36] && + !_theResult____h541723[35] && + !_theResult____h541723[34] && + !_theResult____h541723[33] && + !_theResult____h541723[32] && + !_theResult____h541723[31] && + !_theResult____h541723[30] && + !_theResult____h541723[29] && + !_theResult____h541723[28] && + !_theResult____h541723[27] && + !_theResult____h541723[26] && + !_theResult____h541723[25] && + !_theResult____h541723[24] && + !_theResult____h541723[23] && + !_theResult____h541723[22] && + !_theResult____h541723[21] && + !_theResult____h541723[20] && + !_theResult____h541723[19] && + !_theResult____h541723[18] && + !_theResult____h541723[17] && + !_theResult____h541723[16] && + !_theResult____h541723[15] && + !_theResult____h541723[14] && + !_theResult____h541723[13] && + !_theResult____h541723[12] && + !_theResult____h541723[11] && + !_theResult____h541723[10] && + !_theResult____h541723[9] && + !_theResult____h541723[8] && + !_theResult____h541723[7] && + !_theResult____h541723[6] && + !_theResult____h541723[5] && + !_theResult____h541723[4] && + !_theResult____h541723[3] && + !_theResult____h541723[2] && + !_theResult____h541723[1] && + !_theResult____h541723[0]) ? + _theResult____h541723 : + _theResult___snd__h549999 ; + assign _theResult___snd__h549999 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178[54:0], 2'd0 } ; - assign _theResult___snd__h550021 = - _theResult____h541722 << + assign _theResult___snd__h550022 = + _theResult____h541723 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 ; - assign _theResult___snd__h558737 = - (f2_exp__h521134 == 8'd0) ? - _theResult___snd__h558751 : - _theResult___snd__h540334 ; - assign _theResult___snd__h558751 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___snd__h558738 = + (f2_exp__h521135 == 8'd0) ? + _theResult___snd__h558752 : + _theResult___snd__h540335 ; + assign _theResult___snd__h558752 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056) ? - sfd__h521496 : - _theResult___snd__h558757 ; - assign _theResult___snd__h558757 = + sfd__h521497 : + _theResult___snd__h558758 ; + assign _theResult___snd__h558758 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181[54:0], 2'd0 } ; - assign _theResult___snd__h558775 = - sfd__h521496 << + assign _theResult___snd__h558776 = + sfd__h521497 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10431 ; - assign _theResult___snd__h579636 = - (f3_exp__h560438 == 8'd0) ? - _theResult___snd__h579645 : - _theResult___snd__h579638 ; - assign _theResult___snd__h579638 = { f3_sfd__h560439, 34'd0 } ; - assign _theResult___snd__h579645 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___snd__h579637 = + (f3_exp__h560439 == 8'd0) ? + _theResult___snd__h579646 : + _theResult___snd__h579639 ; + assign _theResult___snd__h579639 = { f3_sfd__h560440, 34'd0 } ; + assign _theResult___snd__h579646 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286) ? - sfd__h560800 : - _theResult___snd__h579651 ; - assign _theResult___snd__h579651 = + sfd__h560801 : + _theResult___snd__h579652 ; + assign _theResult___snd__h579652 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151[54:0], 2'd0 } ; - assign _theResult___snd__h579674 = - sfd__h560800 << + assign _theResult___snd__h579675 = + sfd__h560801 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 ; - assign _theResult___snd__h589273 = { _theResult____h581026[55:0], 1'd0 } ; - assign _theResult___snd__h589284 = - (!_theResult____h581026[56] && _theResult____h581026[55]) ? - _theResult___snd__h589286 : - _theResult___snd__h589296 ; - assign _theResult___snd__h589286 = { _theResult____h581026[54:0], 2'd0 } ; - assign _theResult___snd__h589296 = - (!_theResult____h581026[56] && !_theResult____h581026[55] && - !_theResult____h581026[54] && - !_theResult____h581026[53] && - !_theResult____h581026[52] && - !_theResult____h581026[51] && - !_theResult____h581026[50] && - !_theResult____h581026[49] && - !_theResult____h581026[48] && - !_theResult____h581026[47] && - !_theResult____h581026[46] && - !_theResult____h581026[45] && - !_theResult____h581026[44] && - !_theResult____h581026[43] && - !_theResult____h581026[42] && - !_theResult____h581026[41] && - !_theResult____h581026[40] && - !_theResult____h581026[39] && - !_theResult____h581026[38] && - !_theResult____h581026[37] && - !_theResult____h581026[36] && - !_theResult____h581026[35] && - !_theResult____h581026[34] && - !_theResult____h581026[33] && - !_theResult____h581026[32] && - !_theResult____h581026[31] && - !_theResult____h581026[30] && - !_theResult____h581026[29] && - !_theResult____h581026[28] && - !_theResult____h581026[27] && - !_theResult____h581026[26] && - !_theResult____h581026[25] && - !_theResult____h581026[24] && - !_theResult____h581026[23] && - !_theResult____h581026[22] && - !_theResult____h581026[21] && - !_theResult____h581026[20] && - !_theResult____h581026[19] && - !_theResult____h581026[18] && - !_theResult____h581026[17] && - !_theResult____h581026[16] && - !_theResult____h581026[15] && - !_theResult____h581026[14] && - !_theResult____h581026[13] && - !_theResult____h581026[12] && - !_theResult____h581026[11] && - !_theResult____h581026[10] && - !_theResult____h581026[9] && - !_theResult____h581026[8] && - !_theResult____h581026[7] && - !_theResult____h581026[6] && - !_theResult____h581026[5] && - !_theResult____h581026[4] && - !_theResult____h581026[3] && - !_theResult____h581026[2] && - !_theResult____h581026[1] && - !_theResult____h581026[0]) ? - _theResult____h581026 : - _theResult___snd__h589302 ; - assign _theResult___snd__h589302 = + assign _theResult___snd__h589274 = { _theResult____h581027[55:0], 1'd0 } ; + assign _theResult___snd__h589285 = + (!_theResult____h581027[56] && _theResult____h581027[55]) ? + _theResult___snd__h589287 : + _theResult___snd__h589297 ; + assign _theResult___snd__h589287 = { _theResult____h581027[54:0], 2'd0 } ; + assign _theResult___snd__h589297 = + (!_theResult____h581027[56] && !_theResult____h581027[55] && + !_theResult____h581027[54] && + !_theResult____h581027[53] && + !_theResult____h581027[52] && + !_theResult____h581027[51] && + !_theResult____h581027[50] && + !_theResult____h581027[49] && + !_theResult____h581027[48] && + !_theResult____h581027[47] && + !_theResult____h581027[46] && + !_theResult____h581027[45] && + !_theResult____h581027[44] && + !_theResult____h581027[43] && + !_theResult____h581027[42] && + !_theResult____h581027[41] && + !_theResult____h581027[40] && + !_theResult____h581027[39] && + !_theResult____h581027[38] && + !_theResult____h581027[37] && + !_theResult____h581027[36] && + !_theResult____h581027[35] && + !_theResult____h581027[34] && + !_theResult____h581027[33] && + !_theResult____h581027[32] && + !_theResult____h581027[31] && + !_theResult____h581027[30] && + !_theResult____h581027[29] && + !_theResult____h581027[28] && + !_theResult____h581027[27] && + !_theResult____h581027[26] && + !_theResult____h581027[25] && + !_theResult____h581027[24] && + !_theResult____h581027[23] && + !_theResult____h581027[22] && + !_theResult____h581027[21] && + !_theResult____h581027[20] && + !_theResult____h581027[19] && + !_theResult____h581027[18] && + !_theResult____h581027[17] && + !_theResult____h581027[16] && + !_theResult____h581027[15] && + !_theResult____h581027[14] && + !_theResult____h581027[13] && + !_theResult____h581027[12] && + !_theResult____h581027[11] && + !_theResult____h581027[10] && + !_theResult____h581027[9] && + !_theResult____h581027[8] && + !_theResult____h581027[7] && + !_theResult____h581027[6] && + !_theResult____h581027[5] && + !_theResult____h581027[4] && + !_theResult____h581027[3] && + !_theResult____h581027[2] && + !_theResult____h581027[1] && + !_theResult____h581027[0]) ? + _theResult____h581027 : + _theResult___snd__h589303 ; + assign _theResult___snd__h589303 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155[54:0], 2'd0 } ; - assign _theResult___snd__h589325 = - _theResult____h581026 << + assign _theResult___snd__h589326 = + _theResult____h581027 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 ; - assign _theResult___snd__h598041 = - (f3_exp__h560438 == 8'd0) ? - _theResult___snd__h598055 : - _theResult___snd__h579638 ; - assign _theResult___snd__h598055 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___snd__h598042 = + (f3_exp__h560439 == 8'd0) ? + _theResult___snd__h598056 : + _theResult___snd__h579639 ; + assign _theResult___snd__h598056 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286) ? - sfd__h560800 : - _theResult___snd__h598061 ; - assign _theResult___snd__h598061 = + sfd__h560801 : + _theResult___snd__h598062 ; + assign _theResult___snd__h598062 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158[54:0], 2'd0 } ; - assign _theResult___snd__h598079 = - sfd__h560800 << + assign _theResult___snd__h598080 = + sfd__h560801 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9661 ; - assign _theResult___snd__h603371 = - b__h602949[63] ? b___1__h603420 : b__h602949 ; - assign _theResult___snd_fst_exp__h363378 = + assign _theResult___snd__h603372 = + b__h602950[63] ? b___1__h603421 : b__h602950 ; + assign _theResult___snd_fst_exp__h363379 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - _theResult___fst_exp__h354793 : - _theResult___fst_exp__h363375 ; - assign _theResult___snd_fst_exp__h381198 = + _theResult___fst_exp__h354794 : + _theResult___fst_exp__h363376 ; + assign _theResult___snd_fst_exp__h381199 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - _theResult___fst_exp__h372559 : - _theResult___fst_exp__h381195 ; - assign _theResult___snd_fst_exp__h409075 = + _theResult___fst_exp__h372560 : + _theResult___fst_exp__h381196 ; + assign _theResult___snd_fst_exp__h409076 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - _theResult___fst_exp__h400490 : - _theResult___fst_exp__h409072 ; - assign _theResult___snd_fst_exp__h426895 = + _theResult___fst_exp__h400491 : + _theResult___fst_exp__h409073 ; + assign _theResult___snd_fst_exp__h426896 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - _theResult___fst_exp__h418256 : - _theResult___fst_exp__h426892 ; - assign _theResult___snd_fst_exp__h454770 = + _theResult___fst_exp__h418257 : + _theResult___fst_exp__h426893 ; + assign _theResult___snd_fst_exp__h454771 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - _theResult___fst_exp__h446185 : - _theResult___fst_exp__h454767 ; - assign _theResult___snd_fst_exp__h472590 = + _theResult___fst_exp__h446186 : + _theResult___fst_exp__h454768 ; + assign _theResult___snd_fst_exp__h472591 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - _theResult___fst_exp__h463951 : - _theResult___fst_exp__h472587 ; - assign _theResult___snd_fst_exp__h502289 = + _theResult___fst_exp__h463952 : + _theResult___fst_exp__h472588 ; + assign _theResult___snd_fst_exp__h502290 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 ? 11'd0 : - _theResult___fst_exp__h502286 ; - assign _theResult___snd_fst_exp__h520724 = + _theResult___fst_exp__h502287 ; + assign _theResult___snd_fst_exp__h520725 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? - _theResult___fst_exp__h511937 : - _theResult___fst_exp__h520721 ; - assign _theResult___snd_fst_exp__h541142 = + _theResult___fst_exp__h511938 : + _theResult___fst_exp__h520722 ; + assign _theResult___snd_fst_exp__h541143 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? 11'd0 : - _theResult___fst_exp__h541139 ; - assign _theResult___snd_fst_exp__h559577 = + _theResult___fst_exp__h541140 ; + assign _theResult___snd_fst_exp__h559578 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? - _theResult___fst_exp__h550790 : - _theResult___fst_exp__h559574 ; - assign _theResult___snd_fst_exp__h580446 = + _theResult___fst_exp__h550791 : + _theResult___fst_exp__h559575 ; + assign _theResult___snd_fst_exp__h580447 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? 11'd0 : - _theResult___fst_exp__h580443 ; - assign _theResult___snd_fst_exp__h598881 = + _theResult___fst_exp__h580444 ; + assign _theResult___snd_fst_exp__h598882 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? - _theResult___fst_exp__h590094 : - _theResult___fst_exp__h598878 ; - assign _theResult___snd_fst_sfd__h338430 = + _theResult___fst_exp__h590095 : + _theResult___fst_exp__h598879 ; + assign _theResult___snd_fst_sfd__h338431 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h363379 = + assign _theResult___snd_fst_sfd__h363380 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - _theResult___fst_sfd__h354794 : - _theResult___fst_sfd__h363376 ; - assign _theResult___snd_fst_sfd__h381199 = + _theResult___fst_sfd__h354795 : + _theResult___fst_sfd__h363377 ; + assign _theResult___snd_fst_sfd__h381200 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - _theResult___fst_sfd__h372560 : - _theResult___fst_sfd__h381196 ; - assign _theResult___snd_fst_sfd__h384132 = + _theResult___fst_sfd__h372561 : + _theResult___fst_sfd__h381197 ; + assign _theResult___snd_fst_sfd__h384133 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h409076 = + assign _theResult___snd_fst_sfd__h409077 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - _theResult___fst_sfd__h400491 : - _theResult___fst_sfd__h409073 ; - assign _theResult___snd_fst_sfd__h426896 = + _theResult___fst_sfd__h400492 : + _theResult___fst_sfd__h409074 ; + assign _theResult___snd_fst_sfd__h426897 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - _theResult___fst_sfd__h418257 : - _theResult___fst_sfd__h426893 ; - assign _theResult___snd_fst_sfd__h429827 = + _theResult___fst_sfd__h418258 : + _theResult___fst_sfd__h426894 ; + assign _theResult___snd_fst_sfd__h429828 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h454771 = + assign _theResult___snd_fst_sfd__h454772 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - _theResult___fst_sfd__h446186 : - _theResult___fst_sfd__h454768 ; - assign _theResult___snd_fst_sfd__h472591 = + _theResult___fst_sfd__h446187 : + _theResult___fst_sfd__h454769 ; + assign _theResult___snd_fst_sfd__h472592 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - _theResult___fst_sfd__h463952 : - _theResult___fst_sfd__h472588 ; - assign _theResult___snd_fst_sfd__h482456 = - (f1_sfd__h482141 == 23'd0) ? + _theResult___fst_sfd__h463953 : + _theResult___fst_sfd__h472589 ; + assign _theResult___snd_fst_sfd__h482457 = + (f1_sfd__h482142 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h482204 ; - assign _theResult___snd_fst_sfd__h502290 = + out___1_sfd__h482205 ; + assign _theResult___snd_fst_sfd__h502291 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 ? 52'd0 : - _theResult___fst_sfd__h502287 ; - assign _theResult___snd_fst_sfd__h520725 = + _theResult___fst_sfd__h502288 ; + assign _theResult___snd_fst_sfd__h520726 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? - _theResult___fst_sfd__h511938 : - _theResult___fst_sfd__h520722 ; - assign _theResult___snd_fst_sfd__h521450 = - (f2_sfd__h521135 == 23'd0) ? + _theResult___fst_sfd__h511939 : + _theResult___fst_sfd__h520723 ; + assign _theResult___snd_fst_sfd__h521451 = + (f2_sfd__h521136 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h521198 ; - assign _theResult___snd_fst_sfd__h541143 = + out___1_sfd__h521199 ; + assign _theResult___snd_fst_sfd__h541144 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? 52'd0 : - _theResult___fst_sfd__h541140 ; - assign _theResult___snd_fst_sfd__h559578 = + _theResult___fst_sfd__h541141 ; + assign _theResult___snd_fst_sfd__h559579 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? - _theResult___fst_sfd__h550791 : - _theResult___fst_sfd__h559575 ; - assign _theResult___snd_fst_sfd__h560754 = - (f3_sfd__h560439 == 23'd0) ? + _theResult___fst_sfd__h550792 : + _theResult___fst_sfd__h559576 ; + assign _theResult___snd_fst_sfd__h560755 = + (f3_sfd__h560440 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h560502 ; - assign _theResult___snd_fst_sfd__h580447 = + out___1_sfd__h560503 ; + assign _theResult___snd_fst_sfd__h580448 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? 52'd0 : - _theResult___fst_sfd__h580444 ; - assign _theResult___snd_fst_sfd__h598882 = + _theResult___fst_sfd__h580445 ; + assign _theResult___snd_fst_sfd__h598883 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? - _theResult___fst_sfd__h590095 : - _theResult___fst_sfd__h598879 ; - assign a___1__h603089 = + _theResult___fst_sfd__h590096 : + _theResult___fst_sfd__h598880 ; + assign a___1__h603090 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd1) ? { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[171:140] } : { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11 } ; - assign a___1__h603375 = 64'd0 - a__h602948 ; - assign a__h602948 = + assign a___1__h603376 = 64'd0 - a__h602949 ; + assign a__h602949 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - a___1__h603089 : + a___1__h603090 : coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign b___1__h603090 = + assign b___1__h603091 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12 } : { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] } ; - assign b___1__h603420 = 64'd0 - b__h602949 ; - assign b__h602949 = + assign b___1__h603421 = 64'd0 - b__h602950 ; + assign b__h602950 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - b___1__h603090 : + b___1__h603091 : coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; assign base__h712403 = { csrf_stvec_base_hi_reg, 2'b0 } ; assign base__h712423 = { csrf_mtvec_base_hi_reg, 2'b0 } ; @@ -29594,8 +29594,8 @@ module mkCore(CLK, CASE_commitStage_f_rob_dataD_OUT_BITS_165_TO__ETC__q251, trap_val__h709444, IF_commitStage_f_rob_data_first__4755_BITS_97__ETC___d14926 } ; - assign commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450 = - commitStage_rg_serial_num + y__h730732 ; + assign commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456 = + commitStage_rg_serial_num + y__h730489 ; assign coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12205 = coreFix_aluExe_0_bypassWire_0$wget[70:64] == coreFix_aluExe_0_dispToRegQ$first[84:78] ; @@ -29743,9 +29743,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10847) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10888 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29753,9 +29753,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10883) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10936 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29763,9 +29763,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10920 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10931) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10978 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29773,9 +29773,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10964 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d11020 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29783,9 +29783,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11006 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11015) ; assign coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12 = coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] ; @@ -29825,7 +29825,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[58] && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[57:0] == - y__h254803 ; + y__h254804 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIn_ETC___d3067 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3031 || @@ -30043,15 +30043,15 @@ module mkCore(CLK, !coreFix_memExe_forwardQ_deqReq_rl) && coreFix_memExe_forwardQ_full ; assign coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1706 = - { coreFix_memExe_lsq$getOrigBE << x__h183902[2:0], - x__h183902, + { coreFix_memExe_lsq$getOrigBE << x__h183903[2:0], + x__h183903, coreFix_memExe_regToExeQ$first[75:12], coreFix_memExe_lsq$getOrigBE, coreFix_memExe_lsq$getOrigBE[7] ? - x__h183902[2:0] != 3'd0 : + x__h183903[2:0] != 3'd0 : (coreFix_memExe_lsq$getOrigBE[3] ? - x__h183902[1:0] != 2'd0 : - coreFix_memExe_lsq$getOrigBE[1] && x__h183902[0]) } ; + x__h183903[1:0] != 2'd0 : + coreFix_memExe_lsq$getOrigBE[1] && x__h183903[0]) } ; assign coreFix_memExe_memRespLdQ_enqReq_dummy2_2_read_ETC___d3665 = coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3634 || @@ -30181,18 +30181,18 @@ module mkCore(CLK, csrf_rg_dcsr[2] || !fetchStage$pipelines_0_canDeq || fetchStage$RDY_pipelines_0_first && IF_fetchStage_RDY_pipelines_0_first__2754_AND__ETC___d13435 ; - assign data75282_BITS_31_TO_0__q13 = data__h475282[31:0] ; - assign data___1__h475008 = + assign data75283_BITS_31_TO_0__q13 = data__h475283[31:0] ; + assign data___1__h475009 = { {32{IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC__q133[31]}}, IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC__q133 } ; - assign data___1__h475816 = - { {32{data75282_BITS_31_TO_0__q13[31]}}, - data75282_BITS_31_TO_0__q13 } ; - assign data__h475282 = + assign data___1__h475817 = + { {32{data75283_BITS_31_TO_0__q13[31]}}, + data75283_BITS_31_TO_0__q13 } ; + assign data__h475283 = (coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[35:34] == 2'd2) ? - x_quotient__h475196 : - x_remainder__h475197 ; + x_quotient__h475197 : + x_remainder__h475198 ; assign dcsr_cause__h708962 = (commitStage_commitTrap[36] && commitStage_commitTrap[35:32] == 4'd14) ? @@ -30210,27 +30210,27 @@ module mkCore(CLK, commitStage_commitTrap[35:32] != 4'd14) ? 3'd4 : 3'd1) ; - assign din_inc___2_exp__h381229 = _theResult___fst_exp__h354196 + 8'd1 ; - assign din_inc___2_exp__h381253 = _theResult___fst_exp__h362852 + 8'd1 ; - assign din_inc___2_exp__h381283 = _theResult___fst_exp__h371962 + 8'd1 ; - assign din_inc___2_exp__h381307 = _theResult___fst_exp__h380647 + 8'd1 ; - assign din_inc___2_exp__h426926 = _theResult___fst_exp__h399893 + 8'd1 ; - assign din_inc___2_exp__h426950 = _theResult___fst_exp__h408549 + 8'd1 ; - assign din_inc___2_exp__h426980 = _theResult___fst_exp__h417659 + 8'd1 ; - assign din_inc___2_exp__h427004 = _theResult___fst_exp__h426344 + 8'd1 ; - assign din_inc___2_exp__h472621 = _theResult___fst_exp__h445588 + 8'd1 ; - assign din_inc___2_exp__h472645 = _theResult___fst_exp__h454244 + 8'd1 ; - assign din_inc___2_exp__h472675 = _theResult___fst_exp__h463354 + 8'd1 ; - assign din_inc___2_exp__h472699 = _theResult___fst_exp__h472039 + 8'd1 ; - assign din_inc___2_exp__h520778 = _theResult___fst_exp__h501528 + 11'd1 ; - assign din_inc___2_exp__h520813 = _theResult___fst_exp__h511105 + 11'd1 ; - assign din_inc___2_exp__h520839 = _theResult___fst_exp__h519938 + 11'd1 ; - assign din_inc___2_exp__h559631 = _theResult___fst_exp__h540381 + 11'd1 ; - assign din_inc___2_exp__h559666 = _theResult___fst_exp__h549958 + 11'd1 ; - assign din_inc___2_exp__h559692 = _theResult___fst_exp__h558791 + 11'd1 ; - assign din_inc___2_exp__h598935 = _theResult___fst_exp__h579685 + 11'd1 ; - assign din_inc___2_exp__h598970 = _theResult___fst_exp__h589262 + 11'd1 ; - assign din_inc___2_exp__h598996 = _theResult___fst_exp__h598095 + 11'd1 ; + assign din_inc___2_exp__h381230 = _theResult___fst_exp__h354197 + 8'd1 ; + assign din_inc___2_exp__h381254 = _theResult___fst_exp__h362853 + 8'd1 ; + assign din_inc___2_exp__h381284 = _theResult___fst_exp__h371963 + 8'd1 ; + assign din_inc___2_exp__h381308 = _theResult___fst_exp__h380648 + 8'd1 ; + assign din_inc___2_exp__h426927 = _theResult___fst_exp__h399894 + 8'd1 ; + assign din_inc___2_exp__h426951 = _theResult___fst_exp__h408550 + 8'd1 ; + assign din_inc___2_exp__h426981 = _theResult___fst_exp__h417660 + 8'd1 ; + assign din_inc___2_exp__h427005 = _theResult___fst_exp__h426345 + 8'd1 ; + assign din_inc___2_exp__h472622 = _theResult___fst_exp__h445589 + 8'd1 ; + assign din_inc___2_exp__h472646 = _theResult___fst_exp__h454245 + 8'd1 ; + assign din_inc___2_exp__h472676 = _theResult___fst_exp__h463355 + 8'd1 ; + assign din_inc___2_exp__h472700 = _theResult___fst_exp__h472040 + 8'd1 ; + assign din_inc___2_exp__h520779 = _theResult___fst_exp__h501529 + 11'd1 ; + assign din_inc___2_exp__h520814 = _theResult___fst_exp__h511106 + 11'd1 ; + assign din_inc___2_exp__h520840 = _theResult___fst_exp__h519939 + 11'd1 ; + assign din_inc___2_exp__h559632 = _theResult___fst_exp__h540382 + 11'd1 ; + assign din_inc___2_exp__h559667 = _theResult___fst_exp__h549959 + 11'd1 ; + assign din_inc___2_exp__h559693 = _theResult___fst_exp__h558792 + 11'd1 ; + assign din_inc___2_exp__h598936 = _theResult___fst_exp__h579686 + 11'd1 ; + assign din_inc___2_exp__h598971 = _theResult___fst_exp__h589263 + 11'd1 ; + assign din_inc___2_exp__h598997 = _theResult___fst_exp__h598096 + 11'd1 ; assign enabled_ints___1__h651643 = pend_ints__h651116 & y__h651655 ; assign enabled_ints__h651689 = pend_ints__h651116 & @@ -30256,38 +30256,38 @@ module mkCore(CLK, specTagManager$canClaim) && regRenamingTable_rename_0_canRename__3403_AND__ETC___d13479 && IF_fetchStage_pipelines_0_first__2757_BITS_194_ETC___d13890) ; - assign f1_exp82140_MINUS_127__q136 = f1_exp__h482140 - 8'd127 ; - assign f1_exp__h482140 = + assign f1_exp82141_MINUS_127__q136 = f1_exp__h482141 - 8'd127 ; + assign f1_exp__h482141 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[170:163] : 8'd255 ; - assign f1_sfd__h482141 = + assign f1_sfd__h482142 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[162:140] : 23'd4194304 ; - assign f2_exp21134_MINUS_127__q176 = f2_exp__h521134 - 8'd127 ; - assign f2_exp__h521134 = + assign f2_exp21135_MINUS_127__q176 = f2_exp__h521135 - 8'd127 ; + assign f2_exp__h521135 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[106:99] : 8'd255 ; - assign f2_sfd__h521135 = + assign f2_sfd__h521136 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[98:76] : 23'd4194304 ; - assign f3_exp60438_MINUS_127__q153 = f3_exp__h560438 - 8'd127 ; - assign f3_exp__h560438 = + assign f3_exp60439_MINUS_127__q153 = f3_exp__h560439 - 8'd127 ; + assign f3_exp__h560439 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[42:35] : 8'd255 ; - assign f3_sfd__h560439 = + assign f3_sfd__h560440 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[34:12] : 23'd4194304 ; - assign f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893 = + assign f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899 = f_csr_rsps$FULL_N && (f_csr_reqs$D_OUT[75:64] != 12'd2049 || csrf_stats_module_writeQ$FULL_N) && @@ -30483,7 +30483,7 @@ module mkCore(CLK, assign fetchStage_pipelines_1_first__2766_BIT_173_358_ETC___d13676 = { fetchStage$pipelines_1_first[173], CASE_fetchStagepipelines_1_first_BITS_172_TO__ETC__q235 } ; - assign fflags__h728257 = + assign fflags__h728014 = ({ rob$deqPort_0_deq_data[361:356], 1'd0, rob$deqPort_0_deq_data[354:350], @@ -30493,8 +30493,8 @@ module mkCore(CLK, rob$deqPort_0_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h728242 ; - assign fflags__h730910 = + po_fflags__h727999 ; + assign fflags__h730667 = ({ rob$deqPort_1_deq_data[361:356], 1'd0, rob$deqPort_1_deq_data[354:350], @@ -30504,82 +30504,82 @@ module mkCore(CLK, rob$deqPort_1_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h730895 ; - assign fflags__h733530 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_fst__h733467 : - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 ; + po_fflags__h730652 ; + assign fflags__h733287 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_fst__h733224 : + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 ; assign fflags_csr__read__h609352 = { 59'd0, csrf_fflags_reg } ; assign frm_csr__read__h609363 = { 61'd0, csrf_frm_reg } ; - assign guard__h346095 = - { IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29[1], - { sfdin__h354190[32:0], 23'd0 } != 56'd0 } ; - assign guard__h354804 = - { IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31[1], - { _theResult___snd__h362803[32:0], 23'd0 } != 56'd0 } ; - assign guard__h363734 = - { IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39[1], - { sfdin__h371956[32:0], 23'd0 } != 56'd0 } ; - assign guard__h364332 = x__h364434 != 57'd0 ; - assign guard__h372570 = - { IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44[1], - { _theResult___snd__h380593[32:0], 23'd0 } != 56'd0 } ; - assign guard__h391794 = - { IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64[1], - { sfdin__h399887[32:0], 23'd0 } != 56'd0 } ; - assign guard__h400501 = - { IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66[1], - { _theResult___snd__h408500[32:0], 23'd0 } != 56'd0 } ; - assign guard__h409431 = - { IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74[1], - { sfdin__h417653[32:0], 23'd0 } != 56'd0 } ; - assign guard__h410029 = x__h410131 != 57'd0 ; - assign guard__h418267 = - { IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79[1], - { _theResult___snd__h426290[32:0], 23'd0 } != 56'd0 } ; - assign guard__h437489 = - { IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99[1], - { sfdin__h445582[32:0], 23'd0 } != 56'd0 } ; - assign guard__h446196 = - { IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101[1], - { _theResult___snd__h454195[32:0], 23'd0 } != 56'd0 } ; - assign guard__h455126 = - { IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109[1], - { sfdin__h463348[32:0], 23'd0 } != 56'd0 } ; - assign guard__h455724 = x__h455826 != 57'd0 ; - assign guard__h463962 = - { IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114[1], - { _theResult___snd__h471985[32:0], 23'd0 } != 56'd0 } ; - assign guard__h493567 = - { IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135[1], - { _theResult___snd__h501479[3:0], 52'd0 } != 56'd0 } ; - assign guard__h502879 = - { IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139[1], - { sfdin__h511099[3:0], 52'd0 } != 56'd0 } ; - assign guard__h503477 = x__h503577 != 57'd0 ; - assign guard__h511948 = - { IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142[1], - { _theResult___snd__h519884[3:0], 52'd0 } != 56'd0 } ; - assign guard__h532420 = - { IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175[1], - { _theResult___snd__h540332[3:0], 52'd0 } != 56'd0 } ; - assign guard__h541732 = - { IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179[1], - { sfdin__h549952[3:0], 52'd0 } != 56'd0 } ; - assign guard__h542330 = x__h542430 != 57'd0 ; - assign guard__h550801 = - { IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182[1], - { _theResult___snd__h558737[3:0], 52'd0 } != 56'd0 } ; - assign guard__h571724 = - { IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152[1], - { _theResult___snd__h579636[3:0], 52'd0 } != 56'd0 } ; - assign guard__h581036 = - { IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156[1], - { sfdin__h589256[3:0], 52'd0 } != 56'd0 } ; - assign guard__h581634 = x__h581734 != 57'd0 ; - assign guard__h590105 = - { IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159[1], - { _theResult___snd__h598041[3:0], 52'd0 } != 56'd0 } ; + assign guard__h346096 = + { IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29[1], + { sfdin__h354191[32:0], 23'd0 } != 56'd0 } ; + assign guard__h354805 = + { IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31[1], + { _theResult___snd__h362804[32:0], 23'd0 } != 56'd0 } ; + assign guard__h363735 = + { IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39[1], + { sfdin__h371957[32:0], 23'd0 } != 56'd0 } ; + assign guard__h364333 = x__h364435 != 57'd0 ; + assign guard__h372571 = + { IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44[1], + { _theResult___snd__h380594[32:0], 23'd0 } != 56'd0 } ; + assign guard__h391795 = + { IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64[1], + { sfdin__h399888[32:0], 23'd0 } != 56'd0 } ; + assign guard__h400502 = + { IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66[1], + { _theResult___snd__h408501[32:0], 23'd0 } != 56'd0 } ; + assign guard__h409432 = + { IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74[1], + { sfdin__h417654[32:0], 23'd0 } != 56'd0 } ; + assign guard__h410030 = x__h410132 != 57'd0 ; + assign guard__h418268 = + { IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79[1], + { _theResult___snd__h426291[32:0], 23'd0 } != 56'd0 } ; + assign guard__h437490 = + { IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99[1], + { sfdin__h445583[32:0], 23'd0 } != 56'd0 } ; + assign guard__h446197 = + { IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101[1], + { _theResult___snd__h454196[32:0], 23'd0 } != 56'd0 } ; + assign guard__h455127 = + { IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109[1], + { sfdin__h463349[32:0], 23'd0 } != 56'd0 } ; + assign guard__h455725 = x__h455827 != 57'd0 ; + assign guard__h463963 = + { IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114[1], + { _theResult___snd__h471986[32:0], 23'd0 } != 56'd0 } ; + assign guard__h493568 = + { IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135[1], + { _theResult___snd__h501480[3:0], 52'd0 } != 56'd0 } ; + assign guard__h502880 = + { IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139[1], + { sfdin__h511100[3:0], 52'd0 } != 56'd0 } ; + assign guard__h503478 = x__h503578 != 57'd0 ; + assign guard__h511949 = + { IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142[1], + { _theResult___snd__h519885[3:0], 52'd0 } != 56'd0 } ; + assign guard__h532421 = + { IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175[1], + { _theResult___snd__h540333[3:0], 52'd0 } != 56'd0 } ; + assign guard__h541733 = + { IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179[1], + { sfdin__h549953[3:0], 52'd0 } != 56'd0 } ; + assign guard__h542331 = x__h542431 != 57'd0 ; + assign guard__h550802 = + { IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182[1], + { _theResult___snd__h558738[3:0], 52'd0 } != 56'd0 } ; + assign guard__h571725 = + { IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152[1], + { _theResult___snd__h579637[3:0], 52'd0 } != 56'd0 } ; + assign guard__h581037 = + { IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156[1], + { sfdin__h589257[3:0], 52'd0 } != 56'd0 } ; + assign guard__h581635 = x__h581735 != 57'd0 ; + assign guard__h590106 = + { IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159[1], + { _theResult___snd__h598042[3:0], 52'd0 } != 56'd0 } ; assign idx__h685370 = fetchStage$pipelines_0_canDeq && NOT_fetchStage_pipelines_0_first__2757_BITS_19_ETC___d13746 || @@ -30686,35 +30686,35 @@ module mkCore(CLK, (!mmio_pRsQ_deqReq_dummy2_2$Q_OUT || !mmio_pRsQ_deqReq_lat_0$whas && !mmio_pRsQ_deqReq_rl) && mmio_pRsQ_full ; - assign msip__h76122 = csrf_software_int_pend_vec_3 ; + assign msip__h76123 = csrf_software_int_pend_vec_3 ; assign mstatus_csr__read__h610223 = { r1__read__h614221, csrf_ie_vec_0 } ; assign mtvec_csr__read__h610672 = { r1__read__h614480, csrf_mtvec_mode_low_reg } ; - assign n___1__h198529 = + assign n___1__h198530 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[78] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[70:63] : - x__h197126[63:56], + x__h197127[63:56], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[77] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[62:55] : - x__h197126[55:48], + x__h197127[55:48], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[76] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[54:47] : - x__h197126[47:40], + x__h197127[47:40], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[75] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[46:39] : - x__h197126[39:32], + x__h197127[39:32], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[74] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[38:31] : - x__h197126[31:24], + x__h197127[31:24], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[73] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[30:23] : - x__h197126[23:16], + x__h197127[23:16], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[72] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[22:15] : - x__h197126[15:8], + x__h197127[15:8], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[71] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[14:7] : - x__h197126[7:0] } ; + x__h197127[7:0] } ; assign n__read__h611356 = (csrf_mcycle_ehr_data_dummy2_0$Q_OUT && csrf_mcycle_ehr_data_dummy2_1$Q_OUT) ? @@ -30725,244 +30725,244 @@ module mkCore(CLK, csrf_minstret_ehr_data_dummy2_1$Q_OUT) ? csrf_minstret_ehr_data_rl : 64'd0 ; - assign n__read__h6759 = + assign n__read__h6760 = csrf_mcycle_ehr_data_dummy2_1$Q_OUT ? (csrf_mcycle_ehr_data_lat_0$whas ? - upd__h6873 : + upd__h6874 : csrf_mcycle_ehr_data_rl) : 64'd0 ; - assign n__read__h726937 = + assign n__read__h726694 = csrf_minstret_ehr_data_dummy2_1$Q_OUT ? IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 : 64'd0 ; - assign next_deqP___1__h296800 = + assign next_deqP___1__h296801 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP + 3'd1 ; - assign next_deqP___1__h304796 = + assign next_deqP___1__h304797 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP + 1'd1 ; - assign next_deqP___1__h311077 = + assign next_deqP___1__h311078 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP + 1'd1 ; - assign next_deqP___1__h318931 = + assign next_deqP___1__h318932 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP + 1'd1 ; - assign next_deqP___1__h328988 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; - assign next_deqP___1__h332213 = coreFix_memExe_forwardQ_deqP + 1'd1 ; + assign next_deqP___1__h328989 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; + assign next_deqP___1__h332214 = coreFix_memExe_forwardQ_deqP + 1'd1 ; assign next_pc__h722452 = (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? rob$deqPort_0_deq_data[95:32] : rob$deqPort_0_deq_data[425:362] + 64'd4 ; - assign old_fflags__h733017 = + assign old_fflags__h732774 = csrf_fflags_reg | rob$deqPort_0_deq_data[31:27] ; - assign out___1_sfd__h482204 = { f1_sfd__h482141, 29'd0 } ; - assign out___1_sfd__h521198 = { f2_sfd__h521135, 29'd0 } ; - assign out___1_sfd__h560502 = { f3_sfd__h560439, 29'd0 } ; - assign out_exp__h354715 = - sfdin__h354190[34] ? - _theResult___exp__h354712 : - _theResult___fst_exp__h354196 ; - assign out_exp__h363297 = - _theResult___snd__h362803[34] ? - _theResult___exp__h363294 : - _theResult___fst_exp__h362852 ; - assign out_exp__h372481 = - sfdin__h371956[34] ? - _theResult___exp__h372478 : - _theResult___fst_exp__h371962 ; - assign out_exp__h381117 = - _theResult___snd__h380593[34] ? - _theResult___exp__h381114 : - _theResult___fst_exp__h380647 ; - assign out_exp__h400412 = - sfdin__h399887[34] ? - _theResult___exp__h400409 : - _theResult___fst_exp__h399893 ; - assign out_exp__h408994 = - _theResult___snd__h408500[34] ? - _theResult___exp__h408991 : - _theResult___fst_exp__h408549 ; - assign out_exp__h418178 = - sfdin__h417653[34] ? - _theResult___exp__h418175 : - _theResult___fst_exp__h417659 ; - assign out_exp__h426814 = - _theResult___snd__h426290[34] ? - _theResult___exp__h426811 : - _theResult___fst_exp__h426344 ; - assign out_exp__h446107 = - sfdin__h445582[34] ? - _theResult___exp__h446104 : - _theResult___fst_exp__h445588 ; - assign out_exp__h454689 = - _theResult___snd__h454195[34] ? - _theResult___exp__h454686 : - _theResult___fst_exp__h454244 ; - assign out_exp__h463873 = - sfdin__h463348[34] ? - _theResult___exp__h463870 : - _theResult___fst_exp__h463354 ; - assign out_exp__h472509 = - _theResult___snd__h471985[34] ? - _theResult___exp__h472506 : - _theResult___fst_exp__h472039 ; - assign out_exp__h502186 = - _theResult___snd__h501479[5] ? - _theResult___exp__h502183 : - _theResult___fst_exp__h501528 ; - assign out_exp__h511837 = - sfdin__h511099[5] ? - _theResult___exp__h511834 : - _theResult___fst_exp__h511105 ; - assign out_exp__h520621 = - _theResult___snd__h519884[5] ? - _theResult___exp__h520618 : - _theResult___fst_exp__h519938 ; - assign out_exp__h541039 = - _theResult___snd__h540332[5] ? - _theResult___exp__h541036 : - _theResult___fst_exp__h540381 ; - assign out_exp__h550690 = - sfdin__h549952[5] ? - _theResult___exp__h550687 : - _theResult___fst_exp__h549958 ; - assign out_exp__h559474 = - _theResult___snd__h558737[5] ? - _theResult___exp__h559471 : - _theResult___fst_exp__h558791 ; - assign out_exp__h580343 = - _theResult___snd__h579636[5] ? - _theResult___exp__h580340 : - _theResult___fst_exp__h579685 ; - assign out_exp__h589994 = - sfdin__h589256[5] ? - _theResult___exp__h589991 : - _theResult___fst_exp__h589262 ; - assign out_exp__h598778 = - _theResult___snd__h598041[5] ? - _theResult___exp__h598775 : - _theResult___fst_exp__h598095 ; - assign out_f_exp__h381493 = - (_theResult___exp__h381216 == 8'd255 && - _theResult___sfd__h381217 != 23'd0 || + assign out___1_sfd__h482205 = { f1_sfd__h482142, 29'd0 } ; + assign out___1_sfd__h521199 = { f2_sfd__h521136, 29'd0 } ; + assign out___1_sfd__h560503 = { f3_sfd__h560440, 29'd0 } ; + assign out_exp__h354716 = + sfdin__h354191[34] ? + _theResult___exp__h354713 : + _theResult___fst_exp__h354197 ; + assign out_exp__h363298 = + _theResult___snd__h362804[34] ? + _theResult___exp__h363295 : + _theResult___fst_exp__h362853 ; + assign out_exp__h372482 = + sfdin__h371957[34] ? + _theResult___exp__h372479 : + _theResult___fst_exp__h371963 ; + assign out_exp__h381118 = + _theResult___snd__h380594[34] ? + _theResult___exp__h381115 : + _theResult___fst_exp__h380648 ; + assign out_exp__h400413 = + sfdin__h399888[34] ? + _theResult___exp__h400410 : + _theResult___fst_exp__h399894 ; + assign out_exp__h408995 = + _theResult___snd__h408501[34] ? + _theResult___exp__h408992 : + _theResult___fst_exp__h408550 ; + assign out_exp__h418179 = + sfdin__h417654[34] ? + _theResult___exp__h418176 : + _theResult___fst_exp__h417660 ; + assign out_exp__h426815 = + _theResult___snd__h426291[34] ? + _theResult___exp__h426812 : + _theResult___fst_exp__h426345 ; + assign out_exp__h446108 = + sfdin__h445583[34] ? + _theResult___exp__h446105 : + _theResult___fst_exp__h445589 ; + assign out_exp__h454690 = + _theResult___snd__h454196[34] ? + _theResult___exp__h454687 : + _theResult___fst_exp__h454245 ; + assign out_exp__h463874 = + sfdin__h463349[34] ? + _theResult___exp__h463871 : + _theResult___fst_exp__h463355 ; + assign out_exp__h472510 = + _theResult___snd__h471986[34] ? + _theResult___exp__h472507 : + _theResult___fst_exp__h472040 ; + assign out_exp__h502187 = + _theResult___snd__h501480[5] ? + _theResult___exp__h502184 : + _theResult___fst_exp__h501529 ; + assign out_exp__h511838 = + sfdin__h511100[5] ? + _theResult___exp__h511835 : + _theResult___fst_exp__h511106 ; + assign out_exp__h520622 = + _theResult___snd__h519885[5] ? + _theResult___exp__h520619 : + _theResult___fst_exp__h519939 ; + assign out_exp__h541040 = + _theResult___snd__h540333[5] ? + _theResult___exp__h541037 : + _theResult___fst_exp__h540382 ; + assign out_exp__h550691 = + sfdin__h549953[5] ? + _theResult___exp__h550688 : + _theResult___fst_exp__h549959 ; + assign out_exp__h559475 = + _theResult___snd__h558738[5] ? + _theResult___exp__h559472 : + _theResult___fst_exp__h558792 ; + assign out_exp__h580344 = + _theResult___snd__h579637[5] ? + _theResult___exp__h580341 : + _theResult___fst_exp__h579686 ; + assign out_exp__h589995 = + sfdin__h589257[5] ? + _theResult___exp__h589992 : + _theResult___fst_exp__h589263 ; + assign out_exp__h598779 = + _theResult___snd__h598042[5] ? + _theResult___exp__h598776 : + _theResult___fst_exp__h598096 ; + assign out_f_exp__h381494 = + (_theResult___exp__h381217 == 8'd255 && + _theResult___sfd__h381218 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h381207 ; - assign out_f_exp__h427190 = - (_theResult___exp__h426913 == 8'd255 && - _theResult___sfd__h426914 != 23'd0 || + _theResult___fst_exp__h381208 ; + assign out_f_exp__h427191 = + (_theResult___exp__h426914 == 8'd255 && + _theResult___sfd__h426915 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h426904 ; - assign out_f_exp__h472885 = - (_theResult___exp__h472608 == 8'd255 && - _theResult___sfd__h472609 != 23'd0 || + _theResult___fst_exp__h426905 ; + assign out_f_exp__h472886 = + (_theResult___exp__h472609 == 8'd255 && + _theResult___sfd__h472610 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h472599 ; - assign out_f_sfd__h381494 = - (_theResult___exp__h381216 == 8'd255 && - _theResult___sfd__h381217 != 23'd0) ? + _theResult___fst_exp__h472600 ; + assign out_f_sfd__h381495 = + (_theResult___exp__h381217 == 8'd255 && + _theResult___sfd__h381218 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h381217 ; - assign out_f_sfd__h427191 = - (_theResult___exp__h426913 == 8'd255 && - _theResult___sfd__h426914 != 23'd0) ? + _theResult___sfd__h381218 ; + assign out_f_sfd__h427192 = + (_theResult___exp__h426914 == 8'd255 && + _theResult___sfd__h426915 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h426914 ; - assign out_f_sfd__h472886 = - (_theResult___exp__h472608 == 8'd255 && - _theResult___sfd__h472609 != 23'd0) ? + _theResult___sfd__h426915 ; + assign out_f_sfd__h472887 = + (_theResult___exp__h472609 == 8'd255 && + _theResult___sfd__h472610 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h472609 ; - assign out_sfd__h354716 = - sfdin__h354190[34] ? - _theResult___sfd__h354713 : - sfdin__h354190[56:34] ; - assign out_sfd__h363298 = - _theResult___snd__h362803[34] ? - _theResult___sfd__h363295 : - _theResult___snd__h362803[56:34] ; - assign out_sfd__h372482 = - sfdin__h371956[34] ? - _theResult___sfd__h372479 : - sfdin__h371956[56:34] ; - assign out_sfd__h381118 = - _theResult___snd__h380593[34] ? - _theResult___sfd__h381115 : - _theResult___snd__h380593[56:34] ; - assign out_sfd__h400413 = - sfdin__h399887[34] ? - _theResult___sfd__h400410 : - sfdin__h399887[56:34] ; - assign out_sfd__h408995 = - _theResult___snd__h408500[34] ? - _theResult___sfd__h408992 : - _theResult___snd__h408500[56:34] ; - assign out_sfd__h418179 = - sfdin__h417653[34] ? - _theResult___sfd__h418176 : - sfdin__h417653[56:34] ; - assign out_sfd__h426815 = - _theResult___snd__h426290[34] ? - _theResult___sfd__h426812 : - _theResult___snd__h426290[56:34] ; - assign out_sfd__h446108 = - sfdin__h445582[34] ? - _theResult___sfd__h446105 : - sfdin__h445582[56:34] ; - assign out_sfd__h454690 = - _theResult___snd__h454195[34] ? - _theResult___sfd__h454687 : - _theResult___snd__h454195[56:34] ; - assign out_sfd__h463874 = - sfdin__h463348[34] ? - _theResult___sfd__h463871 : - sfdin__h463348[56:34] ; - assign out_sfd__h472510 = - _theResult___snd__h471985[34] ? - _theResult___sfd__h472507 : - _theResult___snd__h471985[56:34] ; - assign out_sfd__h502187 = - _theResult___snd__h501479[5] ? - _theResult___sfd__h502184 : - _theResult___snd__h501479[56:5] ; - assign out_sfd__h511838 = - sfdin__h511099[5] ? - _theResult___sfd__h511835 : - sfdin__h511099[56:5] ; - assign out_sfd__h520622 = - _theResult___snd__h519884[5] ? - _theResult___sfd__h520619 : - _theResult___snd__h519884[56:5] ; - assign out_sfd__h541040 = - _theResult___snd__h540332[5] ? - _theResult___sfd__h541037 : - _theResult___snd__h540332[56:5] ; - assign out_sfd__h550691 = - sfdin__h549952[5] ? - _theResult___sfd__h550688 : - sfdin__h549952[56:5] ; - assign out_sfd__h559475 = - _theResult___snd__h558737[5] ? - _theResult___sfd__h559472 : - _theResult___snd__h558737[56:5] ; - assign out_sfd__h580344 = - _theResult___snd__h579636[5] ? - _theResult___sfd__h580341 : - _theResult___snd__h579636[56:5] ; - assign out_sfd__h589995 = - sfdin__h589256[5] ? - _theResult___sfd__h589992 : - sfdin__h589256[56:5] ; - assign out_sfd__h598779 = - _theResult___snd__h598041[5] ? - _theResult___sfd__h598776 : - _theResult___snd__h598041[56:5] ; + _theResult___sfd__h472610 ; + assign out_sfd__h354717 = + sfdin__h354191[34] ? + _theResult___sfd__h354714 : + sfdin__h354191[56:34] ; + assign out_sfd__h363299 = + _theResult___snd__h362804[34] ? + _theResult___sfd__h363296 : + _theResult___snd__h362804[56:34] ; + assign out_sfd__h372483 = + sfdin__h371957[34] ? + _theResult___sfd__h372480 : + sfdin__h371957[56:34] ; + assign out_sfd__h381119 = + _theResult___snd__h380594[34] ? + _theResult___sfd__h381116 : + _theResult___snd__h380594[56:34] ; + assign out_sfd__h400414 = + sfdin__h399888[34] ? + _theResult___sfd__h400411 : + sfdin__h399888[56:34] ; + assign out_sfd__h408996 = + _theResult___snd__h408501[34] ? + _theResult___sfd__h408993 : + _theResult___snd__h408501[56:34] ; + assign out_sfd__h418180 = + sfdin__h417654[34] ? + _theResult___sfd__h418177 : + sfdin__h417654[56:34] ; + assign out_sfd__h426816 = + _theResult___snd__h426291[34] ? + _theResult___sfd__h426813 : + _theResult___snd__h426291[56:34] ; + assign out_sfd__h446109 = + sfdin__h445583[34] ? + _theResult___sfd__h446106 : + sfdin__h445583[56:34] ; + assign out_sfd__h454691 = + _theResult___snd__h454196[34] ? + _theResult___sfd__h454688 : + _theResult___snd__h454196[56:34] ; + assign out_sfd__h463875 = + sfdin__h463349[34] ? + _theResult___sfd__h463872 : + sfdin__h463349[56:34] ; + assign out_sfd__h472511 = + _theResult___snd__h471986[34] ? + _theResult___sfd__h472508 : + _theResult___snd__h471986[56:34] ; + assign out_sfd__h502188 = + _theResult___snd__h501480[5] ? + _theResult___sfd__h502185 : + _theResult___snd__h501480[56:5] ; + assign out_sfd__h511839 = + sfdin__h511100[5] ? + _theResult___sfd__h511836 : + sfdin__h511100[56:5] ; + assign out_sfd__h520623 = + _theResult___snd__h519885[5] ? + _theResult___sfd__h520620 : + _theResult___snd__h519885[56:5] ; + assign out_sfd__h541041 = + _theResult___snd__h540333[5] ? + _theResult___sfd__h541038 : + _theResult___snd__h540333[56:5] ; + assign out_sfd__h550692 = + sfdin__h549953[5] ? + _theResult___sfd__h550689 : + sfdin__h549953[56:5] ; + assign out_sfd__h559476 = + _theResult___snd__h558738[5] ? + _theResult___sfd__h559473 : + _theResult___snd__h558738[56:5] ; + assign out_sfd__h580345 = + _theResult___snd__h579637[5] ? + _theResult___sfd__h580342 : + _theResult___snd__h579637[56:5] ; + assign out_sfd__h589996 = + sfdin__h589257[5] ? + _theResult___sfd__h589993 : + sfdin__h589257[56:5] ; + assign out_sfd__h598780 = + _theResult___snd__h598042[5] ? + _theResult___sfd__h598777 : + _theResult___snd__h598042[56:5] ; assign pc__h712387 = csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_comm_ETC___d14718 ? y_avValue_new_pc__h712179 : @@ -30973,12 +30973,12 @@ module mkCore(CLK, 1'd0, csrf_software_int_en_vec_1 & csrf_software_int_pend_vec_1, 1'd0 } ; - assign po_fflags__h728242 = old_fflags__h733017 ; - assign po_fflags__h730895 = - old_fflags__h733017 | rob$deqPort_1_deq_data[31:27] ; - assign prv__h735199 = csrf_prv_reg ; - assign prv__h735243 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; - assign q___1__h475881 = + assign po_fflags__h727999 = old_fflags__h732774 ; + assign po_fflags__h730652 = + old_fflags__h732774 | rob$deqPort_1_deq_data[31:27] ; + assign prv__h734956 = csrf_prv_reg ; + assign prv__h735000 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; + assign q___1__h475882 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[127:64] ; assign r1__read_BITS_13_TO_0___h651665 = @@ -30990,7 +30990,7 @@ module mkCore(CLK, csrf_mideleg_5_3_reg, 1'b0 } ; assign r1__read_BITS_13_TO_12___h655197 = csrf_fs_reg ; - assign r1__read_BITS_62_TO_14___h729920 = { r1__read__h614245, 2'd0 } ; + assign r1__read_BITS_62_TO_14___h729677 = { r1__read__h614245, 2'd0 } ; assign r1__read_BIT_20___h655893 = csrf_tw_reg ; assign r1__read__h613050 = { r1__read__h613052, csrf_ie_vec_1 } ; assign r1__read__h613052 = { r1__read__h613054, 2'b0 } ; @@ -31040,7 +31040,7 @@ module mkCore(CLK, assign r1__read__h614237 = { r1__read__h614239, 2'b0 } ; assign r1__read__h614239 = { r1__read__h614241, csrf_mpp_reg } ; assign r1__read__h614241 = - { r1__read_BITS_62_TO_14___h729920, csrf_fs_reg } ; + { r1__read_BITS_62_TO_14___h729677, csrf_fs_reg } ; assign r1__read__h614245 = { r1__read__h614247, csrf_mprv_reg } ; assign r1__read__h614247 = { r1__read__h614249, csrf_sum_reg } ; assign r1__read__h614249 = { r1__read__h614251, csrf_mxr_reg } ; @@ -31096,9 +31096,9 @@ module mkCore(CLK, assign r1__read__h614522 = { r1__read__h614524, 1'b0 } ; assign r1__read__h614524 = { 52'b0, csrf_external_int_pend_vec_3 } ; assign r1__read__h614601 = { 4'd0, csrf_rg_tdata1_dmode } ; - assign rVal1__h481761 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign rVal2__h481762 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign r___1__h475907 = + assign rVal1__h481762 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; + assign rVal2__h481763 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; + assign r___1__h475908 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[63:0] ; assign regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13309 = @@ -31323,8 +31323,8 @@ module mkCore(CLK, fetchStage$pipelines_0_canDeq ? y_avValue_fst__h681634 : specTagManager$currentSpecBits ; - assign res_data__h337869 = { 32'hFFFFFFFF, x__h337884 } ; - assign res_data__h337874 = + assign res_data__h337870 = { 32'hFFFFFFFF, x__h337885 } ; + assign res_data__h337875 = { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == @@ -31337,8 +31337,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:5] } ; - assign res_data__h383571 = { 32'hFFFFFFFF, x__h383586 } ; - assign res_data__h383576 = + assign res_data__h383572 = { 32'hFFFFFFFF, x__h383587 } ; + assign res_data__h383577 = { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == @@ -31351,8 +31351,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:5] } ; - assign res_data__h429266 = { 32'hFFFFFFFF, x__h429281 } ; - assign res_data__h429271 = + assign res_data__h429267 = { 32'hFFFFFFFF, x__h429282 } ; + assign res_data__h429272 = { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == @@ -31365,7 +31365,7 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:5] } ; - assign res_fflags__h337870 = + assign res_fflags__h337871 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != @@ -31433,7 +31433,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d5255 } ; - assign res_fflags__h383572 = + assign res_fflags__h383573 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != @@ -31501,7 +31501,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d6647 } ; - assign res_fflags__h429267 = + assign res_fflags__h429268 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != @@ -31569,36 +31569,36 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d8039 } ; - assign resp_addr__h291971 = + assign resp_addr__h291972 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getSlot[52:1], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getRq[95:84] } ; - assign result__h364337 = + assign result__h364338 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558[0] | - guard__h364332 } ; - assign result__h410034 = + guard__h364333 } ; + assign result__h410035 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950[0] | - guard__h410029 } ; - assign result__h455729 = + guard__h410030 } ; + assign result__h455730 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342[0] | - guard__h455724 } ; - assign result__h503482 = + guard__h455725 } ; + assign result__h503483 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653[0] | - guard__h503477 } ; - assign result__h542335 = + guard__h503478 } ; + assign result__h542336 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138[0] | - guard__h542330 } ; - assign result__h581639 = + guard__h542331 } ; + assign result__h581640 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368[0] | - guard__h581634 } ; + guard__h581635 } ; assign result__h646695 = w__h646690 & y__h646724 ; assign result__h646746 = ~x__h646745 ; - assign rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729 = + assign rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735 = rg_core_run_state == 2'd2 && !flush_reservation && !flush_tlbs && !update_vm_info && fetchStage$iTlbIfc_flush_done && @@ -31613,7 +31613,7 @@ module mkCore(CLK, fetchStage$iTlbIfc_noPendingReq && coreFix_memExe_dTlb$noPendingReq && NOT_rob_deqPort_0_deq_data__4339_BITS_329_TO_3_ETC___d14993 ; - assign rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292 = + assign rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298 = { rob$deqPort_0_deq_data[161:98], (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? @@ -31630,7 +31630,7 @@ module mkCore(CLK, 64'hAAAAAAAAAAAAAAAA, x_prv__h723013, 64'hAAAAAAAAAAAAAAAA, - x__h726431, + x__h726188, 128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404 = { rob$deqPort_0_deq_data[166], @@ -31667,7 +31667,7 @@ module mkCore(CLK, (sbCons$lazyLookup_3_get[2] || IF_coreFix_memExe_dispToRegQ_RDY_first__549_AN_ETC___d1612 && IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1629) ; - assign sbIdx__h157151 = + assign sbIdx__h157152 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[65:64] : @@ -31677,155 +31677,155 @@ module mkCore(CLK, { r1__read__h613982, csrf_scause_code_reg } ; assign scounteren_csr__read__h609739 = { r1__read__h613969, csrf_scounteren_cy_reg } ; - assign sfd__h338480 = { value__h346707, 3'd0 } ; - assign sfd__h354288 = + assign sfd__h338481 = { value__h346708, 3'd0 } ; + assign sfd__h354289 = { 1'b0, - _theResult___fst_exp__h354196 != 8'd0, - sfdin__h354190[56:34] } + + _theResult___fst_exp__h354197 != 8'd0, + sfdin__h354191[56:34] } + 25'd1 ; - assign sfd__h362870 = + assign sfd__h362871 = { 1'b0, - _theResult___fst_exp__h362852 != 8'd0, - _theResult___snd__h362803[56:34] } + + _theResult___fst_exp__h362853 != 8'd0, + _theResult___snd__h362804[56:34] } + 25'd1 ; - assign sfd__h372054 = + assign sfd__h372055 = { 1'b0, - _theResult___fst_exp__h371962 != 8'd0, - sfdin__h371956[56:34] } + + _theResult___fst_exp__h371963 != 8'd0, + sfdin__h371957[56:34] } + 25'd1 ; - assign sfd__h380666 = + assign sfd__h380667 = { 1'b0, - _theResult___fst_exp__h380647 != 8'd0, - _theResult___snd__h380593[56:34] } + + _theResult___fst_exp__h380648 != 8'd0, + _theResult___snd__h380594[56:34] } + 25'd1 ; - assign sfd__h384182 = { value__h392404, 3'd0 } ; - assign sfd__h399985 = + assign sfd__h384183 = { value__h392405, 3'd0 } ; + assign sfd__h399986 = { 1'b0, - _theResult___fst_exp__h399893 != 8'd0, - sfdin__h399887[56:34] } + + _theResult___fst_exp__h399894 != 8'd0, + sfdin__h399888[56:34] } + 25'd1 ; - assign sfd__h408567 = + assign sfd__h408568 = { 1'b0, - _theResult___fst_exp__h408549 != 8'd0, - _theResult___snd__h408500[56:34] } + + _theResult___fst_exp__h408550 != 8'd0, + _theResult___snd__h408501[56:34] } + 25'd1 ; - assign sfd__h417751 = + assign sfd__h417752 = { 1'b0, - _theResult___fst_exp__h417659 != 8'd0, - sfdin__h417653[56:34] } + + _theResult___fst_exp__h417660 != 8'd0, + sfdin__h417654[56:34] } + 25'd1 ; - assign sfd__h426363 = + assign sfd__h426364 = { 1'b0, - _theResult___fst_exp__h426344 != 8'd0, - _theResult___snd__h426290[56:34] } + + _theResult___fst_exp__h426345 != 8'd0, + _theResult___snd__h426291[56:34] } + 25'd1 ; - assign sfd__h429877 = { value__h438099, 3'd0 } ; - assign sfd__h445680 = + assign sfd__h429878 = { value__h438100, 3'd0 } ; + assign sfd__h445681 = { 1'b0, - _theResult___fst_exp__h445588 != 8'd0, - sfdin__h445582[56:34] } + + _theResult___fst_exp__h445589 != 8'd0, + sfdin__h445583[56:34] } + 25'd1 ; - assign sfd__h454262 = + assign sfd__h454263 = { 1'b0, - _theResult___fst_exp__h454244 != 8'd0, - _theResult___snd__h454195[56:34] } + + _theResult___fst_exp__h454245 != 8'd0, + _theResult___snd__h454196[56:34] } + 25'd1 ; - assign sfd__h463446 = + assign sfd__h463447 = { 1'b0, - _theResult___fst_exp__h463354 != 8'd0, - sfdin__h463348[56:34] } + + _theResult___fst_exp__h463355 != 8'd0, + sfdin__h463349[56:34] } + 25'd1 ; - assign sfd__h472058 = + assign sfd__h472059 = { 1'b0, - _theResult___fst_exp__h472039 != 8'd0, - _theResult___snd__h471985[56:34] } + + _theResult___fst_exp__h472040 != 8'd0, + _theResult___snd__h471986[56:34] } + 25'd1 ; - assign sfd__h482502 = { value__h487085, 32'd0 } ; - assign sfd__h501546 = + assign sfd__h482503 = { value__h487086, 32'd0 } ; + assign sfd__h501547 = { 1'b0, - _theResult___fst_exp__h501528 != 11'd0, - _theResult___snd__h501479[56:5] } + + _theResult___fst_exp__h501529 != 11'd0, + _theResult___snd__h501480[56:5] } + 54'd1 ; - assign sfd__h511197 = + assign sfd__h511198 = { 1'b0, - _theResult___fst_exp__h511105 != 11'd0, - sfdin__h511099[56:5] } + + _theResult___fst_exp__h511106 != 11'd0, + sfdin__h511100[56:5] } + 54'd1 ; - assign sfd__h519957 = + assign sfd__h519958 = { 1'b0, - _theResult___fst_exp__h519938 != 11'd0, - _theResult___snd__h519884[56:5] } + + _theResult___fst_exp__h519939 != 11'd0, + _theResult___snd__h519885[56:5] } + 54'd1 ; - assign sfd__h521496 = { value__h525938, 32'd0 } ; - assign sfd__h540399 = + assign sfd__h521497 = { value__h525939, 32'd0 } ; + assign sfd__h540400 = { 1'b0, - _theResult___fst_exp__h540381 != 11'd0, - _theResult___snd__h540332[56:5] } + + _theResult___fst_exp__h540382 != 11'd0, + _theResult___snd__h540333[56:5] } + 54'd1 ; - assign sfd__h550050 = + assign sfd__h550051 = { 1'b0, - _theResult___fst_exp__h549958 != 11'd0, - sfdin__h549952[56:5] } + + _theResult___fst_exp__h549959 != 11'd0, + sfdin__h549953[56:5] } + 54'd1 ; - assign sfd__h558810 = + assign sfd__h558811 = { 1'b0, - _theResult___fst_exp__h558791 != 11'd0, - _theResult___snd__h558737[56:5] } + + _theResult___fst_exp__h558792 != 11'd0, + _theResult___snd__h558738[56:5] } + 54'd1 ; - assign sfd__h560800 = { value__h565242, 32'd0 } ; - assign sfd__h579703 = + assign sfd__h560801 = { value__h565243, 32'd0 } ; + assign sfd__h579704 = { 1'b0, - _theResult___fst_exp__h579685 != 11'd0, - _theResult___snd__h579636[56:5] } + + _theResult___fst_exp__h579686 != 11'd0, + _theResult___snd__h579637[56:5] } + 54'd1 ; - assign sfd__h589354 = + assign sfd__h589355 = { 1'b0, - _theResult___fst_exp__h589262 != 11'd0, - sfdin__h589256[56:5] } + + _theResult___fst_exp__h589263 != 11'd0, + sfdin__h589257[56:5] } + 54'd1 ; - assign sfd__h598114 = + assign sfd__h598115 = { 1'b0, - _theResult___fst_exp__h598095 != 11'd0, - _theResult___snd__h598041[56:5] } + + _theResult___fst_exp__h598096 != 11'd0, + _theResult___snd__h598042[56:5] } + 54'd1 ; - assign sfdin__h354190 = - _theResult____h346085[56] ? - _theResult___snd__h354207 : - _theResult___snd__h354218 ; - assign sfdin__h371956 = - _theResult____h363724[56] ? - _theResult___snd__h371973 : - _theResult___snd__h371984 ; - assign sfdin__h399887 = - _theResult____h391784[56] ? - _theResult___snd__h399904 : - _theResult___snd__h399915 ; - assign sfdin__h417653 = - _theResult____h409421[56] ? - _theResult___snd__h417670 : - _theResult___snd__h417681 ; - assign sfdin__h445582 = - _theResult____h437479[56] ? - _theResult___snd__h445599 : - _theResult___snd__h445610 ; - assign sfdin__h463348 = - _theResult____h455116[56] ? - _theResult___snd__h463365 : - _theResult___snd__h463376 ; - assign sfdin__h511099 = - _theResult____h502869[56] ? - _theResult___snd__h511116 : - _theResult___snd__h511127 ; - assign sfdin__h549952 = - _theResult____h541722[56] ? - _theResult___snd__h549969 : - _theResult___snd__h549980 ; - assign sfdin__h589256 = - _theResult____h581026[56] ? - _theResult___snd__h589273 : - _theResult___snd__h589284 ; - assign shiftData__h181567 = - coreFix_memExe_regToExeQ$first[75:12] << x__h181699 ; + assign sfdin__h354191 = + _theResult____h346086[56] ? + _theResult___snd__h354208 : + _theResult___snd__h354219 ; + assign sfdin__h371957 = + _theResult____h363725[56] ? + _theResult___snd__h371974 : + _theResult___snd__h371985 ; + assign sfdin__h399888 = + _theResult____h391785[56] ? + _theResult___snd__h399905 : + _theResult___snd__h399916 ; + assign sfdin__h417654 = + _theResult____h409422[56] ? + _theResult___snd__h417671 : + _theResult___snd__h417682 ; + assign sfdin__h445583 = + _theResult____h437480[56] ? + _theResult___snd__h445600 : + _theResult___snd__h445611 ; + assign sfdin__h463349 = + _theResult____h455117[56] ? + _theResult___snd__h463366 : + _theResult___snd__h463377 ; + assign sfdin__h511100 = + _theResult____h502870[56] ? + _theResult___snd__h511117 : + _theResult___snd__h511128 ; + assign sfdin__h549953 = + _theResult____h541723[56] ? + _theResult___snd__h549970 : + _theResult___snd__h549981 ; + assign sfdin__h589257 = + _theResult____h581027[56] ? + _theResult___snd__h589274 : + _theResult___snd__h589285 ; + assign shiftData__h181568 = + coreFix_memExe_regToExeQ$first[75:12] << x__h181700 ; assign sie_csr__read__h609643 = { r1__read__h613454, 1'b0 } ; assign sip_csr__read__h610017 = { r1__read__h613988, 1'b0 } ; assign spec_bits__h688398 = specTagManager$currentSpecBits | y__h688411 ; @@ -31834,236 +31834,236 @@ module mkCore(CLK, { r1__read__h613964, csrf_stvec_mode_low_reg } ; assign trap_val__h709444 = commitStage_commitTrap[36] ? 64'd0 : trap_val__h710482 ; - assign tsr_val__h726551 = csrf_tsr_reg ; - assign tvm_val__h726553 = csrf_tvm_reg ; - assign upd__h3993 = + assign tsr_val__h726308 = csrf_tsr_reg ; + assign tvm_val__h726310 = csrf_tvm_reg ; + assign upd__h3994 = WILL_FIRE_RL_commitStage_doCommitSystemInst ? MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 : MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 ; - assign upd__h5310 = n__read__h6759 + 64'd1 ; - assign upd__h6873 = + assign upd__h5311 = n__read__h6760 + 64'd1 ; + assign upd__h6874 = MUX_csrf_mcycle_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign upd__h727048 = + assign upd__h726805 = MUX_csrf_minstret_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign v__h295941 = + assign v__h295942 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3031) ? - v__h296172 : + v__h296173 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP ; - assign v__h296172 = + assign v__h296173 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP + 3'd1 ; - assign v__h299286 = + assign v__h299287 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3138) ? - v__h299804 : + v__h299805 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP ; - assign v__h299804 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; - assign v__h309800 = + assign v__h299805 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; + assign v__h309801 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3309) ? - v__h310031 : + v__h310032 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP ; - assign v__h310031 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; - assign v__h313676 = + assign v__h310032 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; + assign v__h313677 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3405) ? - v__h313907 : + v__h313908 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP ; - assign v__h313907 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; - assign v__h328277 = + assign v__h313908 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; + assign v__h328278 = (coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3634) ? - v__h328508 : + v__h328509 : coreFix_memExe_memRespLdQ_enqP ; - assign v__h328508 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; - assign v__h331502 = + assign v__h328509 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; + assign v__h331503 = (coreFix_memExe_forwardQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_enqReq_lat_1_whas___ETC___d3728) ? - v__h331733 : + v__h331734 : coreFix_memExe_forwardQ_enqP ; - assign v__h331733 = coreFix_memExe_forwardQ_enqP + 1'd1 ; - assign v__h603883 = + assign v__h331734 = coreFix_memExe_forwardQ_enqP + 1'd1 ; + assign v__h603884 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_deqEn$whas ? - v__h603893 : + v__h603894 : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit ; - assign v__h603893 = + assign v__h603894 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit + 2'd1 ; - assign v__h604528 = v__h603883 - 2'd1 ; + assign v__h604529 = v__h603884 - 2'd1 ; assign v__h607935 = sbCons$lazyLookup_1_get[3] ? rf$read_1_rd1 : y_avValue__h608841 ; assign v__h632818 = sbCons$lazyLookup_0_get[3] ? rf$read_0_rd1 : y_avValue__h633571 ; - assign value__h346707 = + assign value__h346708 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] } ; - assign value__h392404 = + assign value__h392405 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] } ; - assign value__h438099 = + assign value__h438100 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] } ; - assign value__h487085 = { 1'b0, f1_exp__h482140 != 8'd0, f1_sfd__h482141 } ; - assign value__h525938 = { 1'b0, f2_exp__h521134 != 8'd0, f2_sfd__h521135 } ; - assign value__h565242 = { 1'b0, f3_exp__h560438 != 8'd0, f3_sfd__h560439 } ; + assign value__h487086 = { 1'b0, f1_exp__h482141 != 8'd0, f1_sfd__h482142 } ; + assign value__h525939 = { 1'b0, f2_exp__h521135 != 8'd0, f2_sfd__h521136 } ; + assign value__h565243 = { 1'b0, f3_exp__h560439 != 8'd0, f3_sfd__h560440 } ; assign vm_mode_reg__read__h614204 = { csrf_vm_mode_sv39_reg, 3'b0 } ; assign w__h646690 = coreFix_globalSpecUpdate_correctSpecTag_0$whas ? result__h646746 : 12'd4095 ; - assign x__h153725 = + assign x__h153726 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[68:64] : coreFix_memExe_reqLdQ_data_0_rl[68:64]) : 5'd0 ; - assign x__h153731 = + assign x__h153732 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqLdQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h157272 = { 3'd0, sbIdx__h157151 } ; - assign x__h157278 = + assign x__h157273 = { 3'd0, sbIdx__h157152 } ; + assign x__h157279 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqStQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h160088 = + assign x__h160089 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[152:148] : coreFix_memExe_reqLrScAmoQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h160092 = + assign x__h160093 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[147:84] : coreFix_memExe_reqLrScAmoQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h161940 = + assign x__h161941 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[70:7] : coreFix_memExe_reqLrScAmoQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h181476 = - sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h180564 ; assign x__h181477 = - sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h181170 ; - assign x__h181699 = { x__h183902[2:0], 3'b0 } ; - assign x__h18385 = + sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h180565 ; + assign x__h181478 = + sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h181171 ; + assign x__h181700 = { x__h183903[2:0], 3'b0 } ; + assign x__h18386 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[141:78] : mmio_dataReqQ_enqReq_rl[141:78] ; - assign x__h183902 = + assign x__h183903 = coreFix_memExe_regToExeQ$first[139:76] + { {32{coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10[31]}}, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10 } ; - assign x__h193679 = + assign x__h193680 = coreFix_memExe_dMem_cache_m_banks_0_processAmo[90] ? - curData__h192916[63:32] : - curData__h192916[31:0] ; - assign x__h20923 = + curData__h192917[63:32] : + curData__h192917[31:0] ; + assign x__h20924 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[63:0] : mmio_dataReqQ_enqReq_rl[63:0] ; - assign x__h287279 = + assign x__h287280 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[152:148] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h287291 = + assign x__h287292 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[147:84] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h289145 = + assign x__h289146 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[70:7] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h302151 = + assign x__h302152 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[2:0] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[2:0] ; - assign x__h337884 = - { (_theResult___exp__h381216 != 8'd255 || - _theResult___sfd__h381217 == 23'd0) && + assign x__h337885 = + { (_theResult___exp__h381217 != 8'd255 || + _theResult___sfd__h381218 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5140, - out_f_exp__h381493, - out_f_sfd__h381494 } ; - assign x__h364434 = - sfd__h338480 << (x__h364467[11] ? 12'hAAA : x__h364467) ; - assign x__h364467 = + out_f_exp__h381494, + out_f_sfd__h381495 } ; + assign x__h364435 = + sfd__h338481 << (x__h364468[11] ? 12'hAAA : x__h364468) ; + assign x__h364468 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554 ; - assign x__h383586 = - { (_theResult___exp__h426913 != 8'd255 || - _theResult___sfd__h426914 == 23'd0) && + assign x__h383587 = + { (_theResult___exp__h426914 != 8'd255 || + _theResult___sfd__h426915 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6532, - out_f_exp__h427190, - out_f_sfd__h427191 } ; - assign x__h410131 = - sfd__h384182 << (x__h410164[11] ? 12'hAAA : x__h410164) ; - assign x__h410164 = + out_f_exp__h427191, + out_f_sfd__h427192 } ; + assign x__h410132 = + sfd__h384183 << (x__h410165[11] ? 12'hAAA : x__h410165) ; + assign x__h410165 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946 ; - assign x__h429281 = - { (_theResult___exp__h472608 != 8'd255 || - _theResult___sfd__h472609 == 23'd0) && + assign x__h429282 = + { (_theResult___exp__h472609 != 8'd255 || + _theResult___sfd__h472610 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7924, - out_f_exp__h472885, - out_f_sfd__h472886 } ; - assign x__h455826 = - sfd__h429877 << (x__h455859[11] ? 12'hAAA : x__h455859) ; - assign x__h455859 = + out_f_exp__h472886, + out_f_sfd__h472887 } ; + assign x__h455827 = + sfd__h429878 << (x__h455860[11] ? 12'hAAA : x__h455860) ; + assign x__h455860 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338 ; - assign x__h46292 = + assign x__h46293 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[141:78] : mmio_cRqQ_enqReq_rl[141:78] ; - assign x__h481670 = - sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h478806 ; assign x__h481671 = - sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h479414 ; + sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h478807 ; assign x__h481672 = - sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h480016 ; - assign x__h48828 = + sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h479415 ; + assign x__h481673 = + sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h480017 ; + assign x__h48829 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[63:0] : mmio_cRqQ_enqReq_rl[63:0] ; - assign x__h503577 = sfd__h482502 << x__h503610 ; - assign x__h503610 = + assign x__h503578 = sfd__h482503 << x__h503611 ; + assign x__h503611 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ; - assign x__h542430 = sfd__h521496 << x__h542463 ; - assign x__h542463 = + assign x__h542431 = sfd__h521497 << x__h542464 ; + assign x__h542464 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ; - assign x__h581734 = sfd__h560800 << x__h581767 ; - assign x__h581767 = + assign x__h581735 = sfd__h560801 << x__h581768 ; + assign x__h581768 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ; - assign x__h603384 = a__h602948[63] ^ b__h602949[63] ; + assign x__h603385 = a__h602949[63] ^ b__h602950[63] ; assign x__h613035 = { csrf_frm_reg, csrf_fflags_reg } ; assign x__h617232 = coreFix_aluExe_1_dispToRegQ$first[131] ? @@ -32092,7 +32092,7 @@ module mkCore(CLK, assign x__h714837 = { commitStage_commitTrap[36], 59'b0, cause_code__h709443 } ; assign x__h722556 = { 1'b0, csrf_spp_reg } ; - assign x__h726431 = + assign x__h726188 = { csrf_fs_reg == 2'b11, 40'd5120, csrf_tsr_reg, @@ -32103,9 +32103,9 @@ module mkCore(CLK, csrf_mprv_reg, 2'd0, csrf_fs_reg, - IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282 } ; - assign x__h729900 = - { r1__read_BITS_62_TO_14___h729920, + IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288 } ; + assign x__h729657 = + { r1__read_BITS_62_TO_14___h729677, 2'b11, csrf_mpp_reg, 2'b0, @@ -32118,20 +32118,20 @@ module mkCore(CLK, 1'b0, csrf_ie_vec_1, csrf_ie_vec_0 } ; - assign x__h733045 = - { y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027[63:15], + assign x__h732802 = + { y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784[63:15], 2'b11, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027[12:0] } ; - assign x__h733794 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_snd_snd_snd_fst__h733604 : - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 ; - assign x__h76237 = mmio_pRqQ_data_0[31:0] ; - assign x_addr__h314074 = + y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784[12:0] } ; + assign x__h733551 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_snd_snd_snd_fst__h733361 : + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 ; + assign x__h76238 = mmio_pRqQ_data_0[31:0] ; + assign x_addr__h314075 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[578:515] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[578:515] ; - assign x_data__h66086 = + assign x_data__h66087 = EN_mmioToPlatform_pRq_enq ? mmio_pRqQ_enqReq_lat_0$wget[31:0] : mmio_pRqQ_enqReq_rl[31:0] ; @@ -32146,22 +32146,22 @@ module mkCore(CLK, (rob$deqPort_0_deq_data[329:325] == 5'd19) ? x__h722556 : csrf_mpp_reg ; - assign x_quotient__h475196 = + assign x_quotient__h475197 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[75] ? 64'hFFFFFFFFFFFFFFFF : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[9]) ? - q___1__h475881 : + q___1__h475882 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[127:64]) ; assign x_reg_ifc__read__h609482 = { 63'd0, csrf_stats_module_doStats } ; - assign x_remainder__h475197 = + assign x_remainder__h475198 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[75] ? coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[74:11] : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[8]) ? - r___1__h475907 : + r___1__h475908 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[63:0]) ; - assign y__h254803 = + assign y__h254804 = { coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[569:518], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[95:90] } ; assign y__h646724 = ~x__h646694 ; @@ -32175,31 +32175,31 @@ module mkCore(CLK, 1'd1, ~csrf_mideleg_1_0_reg } ; assign y__h688411 = 12'd1 << specTagManager$nextSpecTag ; - assign y__h730732 = + assign y__h730489 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_snd_snd_fst__h730755 : + y_avValue_snd_snd_snd_snd_snd_fst__h730512 : 64'd0 ; - assign y__h733553 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_snd_snd_snd_snd_snd_fst__h733614 : - y__h730732 ; - assign y_avValue__h180564 = + assign y__h733310 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_snd_snd_snd_snd_snd_fst__h733371 : + y__h730489 ; + assign y_avValue__h180565 = NOT_coreFix_memExe_bypassWire_0_whas__568_574__ETC___d1595 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1649 ; - assign y_avValue__h181170 = + assign y_avValue__h181171 = NOT_coreFix_memExe_bypassWire_0_whas__568_574__ETC___d1622 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1660 ; - assign y_avValue__h478806 = + assign y_avValue__h478807 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8233 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8337 ; - assign y_avValue__h479414 = + assign y_avValue__h479415 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8260 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8348 ; - assign y_avValue__h480016 = + assign y_avValue__h480017 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8284 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8359 ; @@ -32233,7 +32233,7 @@ module mkCore(CLK, regRenamingTable_rename_0_canRename__3403_AND__ETC___d13429) ? y_avValue_fst__h681600 : specTagManager$currentSpecBits ; - assign y_avValue_fst__h730270 = + assign y_avValue_fst__h730027 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32247,10 +32247,10 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 5'd0 : rob$deqPort_0_deq_data[31:27] ; - assign y_avValue_fst__h733435 = - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 | + assign y_avValue_fst__h733192 = + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 | rob$deqPort_1_deq_data[31:27] ; - assign y_avValue_fst__h733467 = + assign y_avValue_fst__h733224 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32262,8 +32262,8 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 : - y_avValue_fst__h733435 ; + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 : + y_avValue_fst__h733192 ; assign y_avValue_new_pc__h712179 = (csrf_stvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h712403 + { 58'd0, x__h712418 } : @@ -32272,7 +32272,7 @@ module mkCore(CLK, (csrf_mtvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h712423 + { 58'd0, x__h712418 } : base__h712423 ; - assign y_avValue_snd_snd_snd_fst__h730745 = + assign y_avValue_snd_snd_snd_fst__h730502 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32286,7 +32286,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 2'd0 : 2'd1 ; - assign y_avValue_snd_snd_snd_fst__h733604 = + assign y_avValue_snd_snd_snd_fst__h733361 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32298,12 +32298,12 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 : - y_avValue_snd_snd_snd_fst__h733640 ; - assign y_avValue_snd_snd_snd_fst__h733640 = - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 + + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 : + y_avValue_snd_snd_snd_fst__h733397 ; + assign y_avValue_snd_snd_snd_fst__h733397 = + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 + 2'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h730755 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h730512 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32317,7 +32317,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 64'd0 : 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h733614 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h733371 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32329,10 +32329,10 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - y__h730732 : - y_avValue_snd_snd_snd_snd_snd_fst__h733650 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h733650 = y__h730732 + 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027 = x__h729900 ; + y__h730489 : + y_avValue_snd_snd_snd_snd_snd_fst__h733407 ; + assign y_avValue_snd_snd_snd_snd_snd_fst__h733407 = y__h730489 + 64'd1 ; + assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784 = x__h729657 ; always@(v_f_to_TV_1$D_OUT) begin case (v_f_to_TV_1$D_OUT[475:464]) @@ -32533,28 +32533,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87]) 3'd0: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -32570,28 +32570,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP) 3'd0: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_0; 3'd1: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_1; 3'd2: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_2; 3'd3: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_3; 3'd4: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_4; 3'd5: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_5; 3'd6: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_6; 3'd7: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_7; endcase end @@ -32601,10 +32601,10 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - addr__h290067 = + addr__h290068 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[581:518]; 1'd1: - addr__h290067 = + addr__h290068 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[581:518]; endcase end @@ -32613,28 +32613,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91]) 3'd0: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -32657,9 +32657,9 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - x__h291616 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; + x__h291617 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; 1'd1: - x__h291616 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; + x__h291617 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; endcase end always@(f_csr_reqs$D_OUT or @@ -32699,46 +32699,46 @@ module mkCore(CLK, n__read__h611356 or n__read__h611547 or csrf_time_reg) begin case (f_csr_reqs$D_OUT[75:64]) - 12'd1: data_out__h737644 = fflags_csr__read__h609352; - 12'd2: data_out__h737644 = frm_csr__read__h609363; - 12'd3: data_out__h737644 = fcsr_csr__read__h609377; - 12'd256: data_out__h737644 = sstatus_csr__read__h609573; - 12'd260: data_out__h737644 = sie_csr__read__h609643; - 12'd261: data_out__h737644 = stvec_csr__read__h609686; - 12'd262: data_out__h737644 = scounteren_csr__read__h609739; - 12'd320: data_out__h737644 = csrf_sscratch_csr; - 12'd321: data_out__h737644 = csrf_sepc_csr; - 12'd322: data_out__h737644 = scause_csr__read__h609877; - 12'd323: data_out__h737644 = csrf_stval_csr; - 12'd324: data_out__h737644 = sip_csr__read__h610017; - 12'd384: data_out__h737644 = satp_csr__read__h610080; - 12'd768: data_out__h737644 = mstatus_csr__read__h610223; - 12'd769: data_out__h737644 = 64'h800000000014112D; - 12'd770: data_out__h737644 = medeleg_csr__read__h610371; - 12'd771: data_out__h737644 = mideleg_csr__read__h610466; - 12'd772: data_out__h737644 = mie_csr__read__h610590; - 12'd773: data_out__h737644 = mtvec_csr__read__h610672; - 12'd774: data_out__h737644 = mcounteren_csr__read__h610764; - 12'd832: data_out__h737644 = csrf_mscratch_csr; - 12'd833: data_out__h737644 = csrf_mepc_csr; - 12'd834: data_out__h737644 = mcause_csr__read__h611019; - 12'd835: data_out__h737644 = csrf_mtval_csr; - 12'd836: data_out__h737644 = mip_csr__read__h611252; - 12'd1952: data_out__h737644 = csrf_rg_tselect; - 12'd1953: data_out__h737644 = rg_tdata1__read__h612207; - 12'd1954: data_out__h737644 = csrf_rg_tdata2; - 12'd1955: data_out__h737644 = csrf_rg_tdata3; - 12'd1968: data_out__h737644 = csrf_rg_dcsr; - 12'd1969: data_out__h737644 = csrf_rg_dpc; - 12'd1970: data_out__h737644 = csrf_rg_dscratch0; - 12'd1971: data_out__h737644 = csrf_rg_dscratch1; + 12'd1: data_out__h737401 = fflags_csr__read__h609352; + 12'd2: data_out__h737401 = frm_csr__read__h609363; + 12'd3: data_out__h737401 = fcsr_csr__read__h609377; + 12'd256: data_out__h737401 = sstatus_csr__read__h609573; + 12'd260: data_out__h737401 = sie_csr__read__h609643; + 12'd261: data_out__h737401 = stvec_csr__read__h609686; + 12'd262: data_out__h737401 = scounteren_csr__read__h609739; + 12'd320: data_out__h737401 = csrf_sscratch_csr; + 12'd321: data_out__h737401 = csrf_sepc_csr; + 12'd322: data_out__h737401 = scause_csr__read__h609877; + 12'd323: data_out__h737401 = csrf_stval_csr; + 12'd324: data_out__h737401 = sip_csr__read__h610017; + 12'd384: data_out__h737401 = satp_csr__read__h610080; + 12'd768: data_out__h737401 = mstatus_csr__read__h610223; + 12'd769: data_out__h737401 = 64'h800000000014112D; + 12'd770: data_out__h737401 = medeleg_csr__read__h610371; + 12'd771: data_out__h737401 = mideleg_csr__read__h610466; + 12'd772: data_out__h737401 = mie_csr__read__h610590; + 12'd773: data_out__h737401 = mtvec_csr__read__h610672; + 12'd774: data_out__h737401 = mcounteren_csr__read__h610764; + 12'd832: data_out__h737401 = csrf_mscratch_csr; + 12'd833: data_out__h737401 = csrf_mepc_csr; + 12'd834: data_out__h737401 = mcause_csr__read__h611019; + 12'd835: data_out__h737401 = csrf_mtval_csr; + 12'd836: data_out__h737401 = mip_csr__read__h611252; + 12'd1952: data_out__h737401 = csrf_rg_tselect; + 12'd1953: data_out__h737401 = rg_tdata1__read__h612207; + 12'd1954: data_out__h737401 = csrf_rg_tdata2; + 12'd1955: data_out__h737401 = csrf_rg_tdata3; + 12'd1968: data_out__h737401 = csrf_rg_dcsr; + 12'd1969: data_out__h737401 = csrf_rg_dpc; + 12'd1970: data_out__h737401 = csrf_rg_dscratch0; + 12'd1971: data_out__h737401 = csrf_rg_dscratch1; 12'd2048, 12'd3857, 12'd3858, 12'd3859, 12'd3860: - data_out__h737644 = 64'd0; - 12'd2049: data_out__h737644 = x_reg_ifc__read__h609482; - 12'd2816, 12'd3072: data_out__h737644 = n__read__h611356; - 12'd2818, 12'd3074: data_out__h737644 = n__read__h611547; - 12'd3073: data_out__h737644 = csrf_time_reg; - default: data_out__h737644 = 64'b0; + data_out__h737401 = 64'd0; + 12'd2049: data_out__h737401 = x_reg_ifc__read__h609482; + 12'd2816, 12'd3072: data_out__h737401 = n__read__h611356; + 12'd2818, 12'd3074: data_out__h737401 = n__read__h611547; + 12'd3073: data_out__h737401 = csrf_time_reg; + default: data_out__h737401 = 64'b0; endcase end always@(coreFix_aluExe_1_dispToRegQ$first or @@ -32903,114 +32903,114 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h346067 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h346068 = 8'd255; 3'd2: - _theResult___fst_exp__h346067 = + _theResult___fst_exp__h346068 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h346067 = + _theResult___fst_exp__h346068 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h346067 = 8'd254; - default: _theResult___fst_exp__h346067 = 8'd0; + 3'd4: _theResult___fst_exp__h346068 = 8'd254; + default: _theResult___fst_exp__h346068 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h346068 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h346069 = 23'd0; 3'd2: - _theResult___fst_sfd__h346068 = + _theResult___fst_sfd__h346069 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h346068 = + _theResult___fst_sfd__h346069 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h346068 = 23'd8388607; - default: _theResult___fst_sfd__h346068 = 23'd0; + 3'd4: _theResult___fst_sfd__h346069 = 23'd8388607; + default: _theResult___fst_sfd__h346069 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h391766 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h391767 = 8'd255; 3'd2: - _theResult___fst_exp__h391766 = + _theResult___fst_exp__h391767 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h391766 = + _theResult___fst_exp__h391767 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h391766 = 8'd254; - default: _theResult___fst_exp__h391766 = 8'd0; + 3'd4: _theResult___fst_exp__h391767 = 8'd254; + default: _theResult___fst_exp__h391767 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h391767 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h391768 = 23'd0; 3'd2: - _theResult___fst_sfd__h391767 = + _theResult___fst_sfd__h391768 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h391767 = + _theResult___fst_sfd__h391768 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h391767 = 23'd8388607; - default: _theResult___fst_sfd__h391767 = 23'd0; + 3'd4: _theResult___fst_sfd__h391768 = 23'd8388607; + default: _theResult___fst_sfd__h391768 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h437461 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h437462 = 8'd255; 3'd2: - _theResult___fst_exp__h437461 = + _theResult___fst_exp__h437462 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h437461 = + _theResult___fst_exp__h437462 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h437461 = 8'd254; - default: _theResult___fst_exp__h437461 = 8'd0; + 3'd4: _theResult___fst_exp__h437462 = 8'd254; + default: _theResult___fst_exp__h437462 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h437462 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h437463 = 23'd0; 3'd2: - _theResult___fst_sfd__h437462 = + _theResult___fst_sfd__h437463 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h437462 = + _theResult___fst_sfd__h437463 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h437462 = 23'd8388607; - default: _theResult___fst_sfd__h437462 = 23'd0; + 3'd4: _theResult___fst_sfd__h437463 = 23'd8388607; + default: _theResult___fst_sfd__h437463 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first) @@ -33398,446 +33398,446 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[194:131]; endcase end - always@(guard__h354804 or - _theResult___fst_exp__h362852 or - out_exp__h363297 or _theResult___exp__h363294) + always@(guard__h354805 or + _theResult___fst_exp__h362853 or + out_exp__h363298 or _theResult___exp__h363295) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - _theResult___fst_exp__h362852; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + _theResult___fst_exp__h362853; 2'b10: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - out_exp__h363297; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + out_exp__h363298; 2'b11: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - _theResult___exp__h363294; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + _theResult___exp__h363295; endcase end - always@(guard__h354804 or - _theResult___fst_exp__h362852 or _theResult___exp__h363294) + always@(guard__h354805 or + _theResult___fst_exp__h362853 or _theResult___exp__h363295) begin - case (guard__h354804) + case (guard__h354805) 2'b0: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 = - _theResult___fst_exp__h362852; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 = + _theResult___fst_exp__h362853; 2'b01, 2'b10, 2'b11: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 = - _theResult___exp__h363294; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 = + _theResult___exp__h363295; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 or - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 or + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 or + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534 or - _theResult___fst_exp__h362852) + _theResult___fst_exp__h362853) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h363372 = - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32; + _theResult___fst_exp__h363373 = + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32; 3'd1: - _theResult___fst_exp__h363372 = - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33; + _theResult___fst_exp__h363373 = + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33; 3'd2: - _theResult___fst_exp__h363372 = + _theResult___fst_exp__h363373 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532; 3'd3: - _theResult___fst_exp__h363372 = + _theResult___fst_exp__h363373 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534; - 3'd4: _theResult___fst_exp__h363372 = _theResult___fst_exp__h362852; - default: _theResult___fst_exp__h363372 = 8'd0; + 3'd4: _theResult___fst_exp__h363373 = _theResult___fst_exp__h362853; + default: _theResult___fst_exp__h363373 = 8'd0; endcase end - always@(guard__h346095 or - _theResult___fst_exp__h354196 or - out_exp__h354715 or _theResult___exp__h354712) + always@(guard__h346096 or + _theResult___fst_exp__h354197 or + out_exp__h354716 or _theResult___exp__h354713) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - _theResult___fst_exp__h354196; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + _theResult___fst_exp__h354197; 2'b10: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - out_exp__h354715; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + out_exp__h354716; 2'b11: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - _theResult___exp__h354712; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + _theResult___exp__h354713; endcase end - always@(guard__h346095 or - _theResult___fst_exp__h354196 or _theResult___exp__h354712) + always@(guard__h346096 or + _theResult___fst_exp__h354197 or _theResult___exp__h354713) begin - case (guard__h346095) + case (guard__h346096) 2'b0: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 = - _theResult___fst_exp__h354196; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 = + _theResult___fst_exp__h354197; 2'b01, 2'b10, 2'b11: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 = - _theResult___exp__h354712; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 = + _theResult___exp__h354713; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 or - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 or + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 or + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313 or - _theResult___fst_exp__h354196) + _theResult___fst_exp__h354197) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h354790 = - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34; + _theResult___fst_exp__h354791 = + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34; 3'd1: - _theResult___fst_exp__h354790 = - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35; + _theResult___fst_exp__h354791 = + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35; 3'd2: - _theResult___fst_exp__h354790 = + _theResult___fst_exp__h354791 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310; 3'd3: - _theResult___fst_exp__h354790 = + _theResult___fst_exp__h354791 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313; - 3'd4: _theResult___fst_exp__h354790 = _theResult___fst_exp__h354196; - default: _theResult___fst_exp__h354790 = 8'd0; + 3'd4: _theResult___fst_exp__h354791 = _theResult___fst_exp__h354197; + default: _theResult___fst_exp__h354791 = 8'd0; endcase end - always@(guard__h363734 or - _theResult___fst_exp__h371962 or - out_exp__h372481 or _theResult___exp__h372478) + always@(guard__h363735 or + _theResult___fst_exp__h371963 or + out_exp__h372482 or _theResult___exp__h372479) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - _theResult___fst_exp__h371962; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + _theResult___fst_exp__h371963; 2'b10: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - out_exp__h372481; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + out_exp__h372482; 2'b11: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - _theResult___exp__h372478; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + _theResult___exp__h372479; endcase end - always@(guard__h363734 or - _theResult___fst_exp__h371962 or _theResult___exp__h372478) + always@(guard__h363735 or + _theResult___fst_exp__h371963 or _theResult___exp__h372479) begin - case (guard__h363734) + case (guard__h363735) 2'b0: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 = - _theResult___fst_exp__h371962; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 = + _theResult___fst_exp__h371963; 2'b01, 2'b10, 2'b11: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 = - _theResult___exp__h372478; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 = + _theResult___exp__h372479; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 or - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 or + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 or + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859 or - _theResult___fst_exp__h371962) + _theResult___fst_exp__h371963) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h372556 = - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40; + _theResult___fst_exp__h372557 = + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40; 3'd1: - _theResult___fst_exp__h372556 = - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41; + _theResult___fst_exp__h372557 = + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41; 3'd2: - _theResult___fst_exp__h372556 = + _theResult___fst_exp__h372557 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857; 3'd3: - _theResult___fst_exp__h372556 = + _theResult___fst_exp__h372557 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859; - 3'd4: _theResult___fst_exp__h372556 = _theResult___fst_exp__h371962; - default: _theResult___fst_exp__h372556 = 8'd0; + 3'd4: _theResult___fst_exp__h372557 = _theResult___fst_exp__h371963; + default: _theResult___fst_exp__h372557 = 8'd0; endcase end - always@(guard__h372570 or - _theResult___fst_exp__h380647 or - out_exp__h381117 or _theResult___exp__h381114) + always@(guard__h372571 or + _theResult___fst_exp__h380648 or + out_exp__h381118 or _theResult___exp__h381115) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - _theResult___fst_exp__h380647; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + _theResult___fst_exp__h380648; 2'b10: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - out_exp__h381117; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + out_exp__h381118; 2'b11: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - _theResult___exp__h381114; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + _theResult___exp__h381115; endcase end - always@(guard__h372570 or - _theResult___fst_exp__h380647 or _theResult___exp__h381114) + always@(guard__h372571 or + _theResult___fst_exp__h380648 or _theResult___exp__h381115) begin - case (guard__h372570) + case (guard__h372571) 2'b0: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 = - _theResult___fst_exp__h380647; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 = + _theResult___fst_exp__h380648; 2'b01, 2'b10, 2'b11: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 = - _theResult___exp__h381114; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 = + _theResult___exp__h381115; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 or - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 or + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 or + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928 or - _theResult___fst_exp__h380647) + _theResult___fst_exp__h380648) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h381192 = - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45; + _theResult___fst_exp__h381193 = + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45; 3'd1: - _theResult___fst_exp__h381192 = - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46; + _theResult___fst_exp__h381193 = + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46; 3'd2: - _theResult___fst_exp__h381192 = + _theResult___fst_exp__h381193 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926; 3'd3: - _theResult___fst_exp__h381192 = + _theResult___fst_exp__h381193 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928; - 3'd4: _theResult___fst_exp__h381192 = _theResult___fst_exp__h380647; - default: _theResult___fst_exp__h381192 = 8'd0; + 3'd4: _theResult___fst_exp__h381193 = _theResult___fst_exp__h380648; + default: _theResult___fst_exp__h381193 = 8'd0; endcase end - always@(guard__h354804 or - _theResult___snd__h362803 or - out_sfd__h363298 or _theResult___sfd__h363295) + always@(guard__h354805 or + _theResult___snd__h362804 or + out_sfd__h363299 or _theResult___sfd__h363296) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - _theResult___snd__h362803[56:34]; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + _theResult___snd__h362804[56:34]; 2'b10: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - out_sfd__h363298; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + out_sfd__h363299; 2'b11: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - _theResult___sfd__h363295; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + _theResult___sfd__h363296; endcase end - always@(guard__h354804 or - _theResult___snd__h362803 or _theResult___sfd__h363295) + always@(guard__h354805 or + _theResult___snd__h362804 or _theResult___sfd__h363296) begin - case (guard__h354804) + case (guard__h354805) 2'b0: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 = - _theResult___snd__h362803[56:34]; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 = + _theResult___snd__h362804[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 = - _theResult___sfd__h363295; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 = + _theResult___sfd__h363296; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 or - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 or + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 or + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978 or - _theResult___snd__h362803) + _theResult___snd__h362804) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h363373 = - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47; + _theResult___fst_sfd__h363374 = + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47; 3'd1: - _theResult___fst_sfd__h363373 = - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48; + _theResult___fst_sfd__h363374 = + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48; 3'd2: - _theResult___fst_sfd__h363373 = + _theResult___fst_sfd__h363374 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976; 3'd3: - _theResult___fst_sfd__h363373 = + _theResult___fst_sfd__h363374 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978; - 3'd4: _theResult___fst_sfd__h363373 = _theResult___snd__h362803[56:34]; - default: _theResult___fst_sfd__h363373 = 23'd0; + 3'd4: _theResult___fst_sfd__h363374 = _theResult___snd__h362804[56:34]; + default: _theResult___fst_sfd__h363374 = 23'd0; endcase end - always@(guard__h346095 or - sfdin__h354190 or out_sfd__h354716 or _theResult___sfd__h354713) + always@(guard__h346096 or + sfdin__h354191 or out_sfd__h354717 or _theResult___sfd__h354714) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - sfdin__h354190[56:34]; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + sfdin__h354191[56:34]; 2'b10: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - out_sfd__h354716; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + out_sfd__h354717; 2'b11: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - _theResult___sfd__h354713; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + _theResult___sfd__h354714; endcase end - always@(guard__h346095 or sfdin__h354190 or _theResult___sfd__h354713) + always@(guard__h346096 or sfdin__h354191 or _theResult___sfd__h354714) begin - case (guard__h346095) + case (guard__h346096) 2'b0: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 = - sfdin__h354190[56:34]; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 = + sfdin__h354191[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 = - _theResult___sfd__h354713; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 = + _theResult___sfd__h354714; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 or - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 or + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 or + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959 or - sfdin__h354190) + sfdin__h354191) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h354791 = - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49; + _theResult___fst_sfd__h354792 = + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49; 3'd1: - _theResult___fst_sfd__h354791 = - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50; + _theResult___fst_sfd__h354792 = + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50; 3'd2: - _theResult___fst_sfd__h354791 = + _theResult___fst_sfd__h354792 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957; 3'd3: - _theResult___fst_sfd__h354791 = + _theResult___fst_sfd__h354792 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959; - 3'd4: _theResult___fst_sfd__h354791 = sfdin__h354190[56:34]; - default: _theResult___fst_sfd__h354791 = 23'd0; + 3'd4: _theResult___fst_sfd__h354792 = sfdin__h354191[56:34]; + default: _theResult___fst_sfd__h354792 = 23'd0; endcase end - always@(guard__h363734 or - sfdin__h371956 or out_sfd__h372482 or _theResult___sfd__h372479) + always@(guard__h363735 or + sfdin__h371957 or out_sfd__h372483 or _theResult___sfd__h372480) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - sfdin__h371956[56:34]; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + sfdin__h371957[56:34]; 2'b10: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - out_sfd__h372482; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + out_sfd__h372483; 2'b11: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - _theResult___sfd__h372479; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + _theResult___sfd__h372480; endcase end - always@(guard__h363734 or sfdin__h371956 or _theResult___sfd__h372479) + always@(guard__h363735 or sfdin__h371957 or _theResult___sfd__h372480) begin - case (guard__h363734) + case (guard__h363735) 2'b0: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 = - sfdin__h371956[56:34]; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 = + sfdin__h371957[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 = - _theResult___sfd__h372479; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 = + _theResult___sfd__h372480; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 or - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 or + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 or + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005 or - sfdin__h371956) + sfdin__h371957) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h372557 = - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51; + _theResult___fst_sfd__h372558 = + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51; 3'd1: - _theResult___fst_sfd__h372557 = - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52; + _theResult___fst_sfd__h372558 = + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52; 3'd2: - _theResult___fst_sfd__h372557 = + _theResult___fst_sfd__h372558 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003; 3'd3: - _theResult___fst_sfd__h372557 = + _theResult___fst_sfd__h372558 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005; - 3'd4: _theResult___fst_sfd__h372557 = sfdin__h371956[56:34]; - default: _theResult___fst_sfd__h372557 = 23'd0; + 3'd4: _theResult___fst_sfd__h372558 = sfdin__h371957[56:34]; + default: _theResult___fst_sfd__h372558 = 23'd0; endcase end - always@(guard__h372570 or - _theResult___snd__h380593 or - out_sfd__h381118 or _theResult___sfd__h381115) + always@(guard__h372571 or + _theResult___snd__h380594 or + out_sfd__h381119 or _theResult___sfd__h381116) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - _theResult___snd__h380593[56:34]; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + _theResult___snd__h380594[56:34]; 2'b10: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - out_sfd__h381118; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + out_sfd__h381119; 2'b11: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - _theResult___sfd__h381115; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + _theResult___sfd__h381116; endcase end - always@(guard__h372570 or - _theResult___snd__h380593 or _theResult___sfd__h381115) + always@(guard__h372571 or + _theResult___snd__h380594 or _theResult___sfd__h381116) begin - case (guard__h372570) + case (guard__h372571) 2'b0: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 = - _theResult___snd__h380593[56:34]; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 = + _theResult___snd__h380594[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 = - _theResult___sfd__h381115; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 = + _theResult___sfd__h381116; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 or - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 or + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 or + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 or - _theResult___snd__h380593) + _theResult___snd__h380594) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h381193 = - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53; + _theResult___fst_sfd__h381194 = + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53; 3'd1: - _theResult___fst_sfd__h381193 = - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54; + _theResult___fst_sfd__h381194 = + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54; 3'd2: - _theResult___fst_sfd__h381193 = + _theResult___fst_sfd__h381194 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022; 3'd3: - _theResult___fst_sfd__h381193 = + _theResult___fst_sfd__h381194 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024; - 3'd4: _theResult___fst_sfd__h381193 = _theResult___snd__h380593[56:34]; - default: _theResult___fst_sfd__h381193 = 23'd0; + 3'd4: _theResult___fst_sfd__h381194 = _theResult___snd__h380594[56:34]; + default: _theResult___fst_sfd__h381194 = 23'd0; endcase end - always@(guard__h346095 or + always@(guard__h346096 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01, 2'b10: - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = - guard__h346095 == 2'b11 && + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = + guard__h346096 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 or - guard__h346095) + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 or + guard__h346096) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55; + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = - (guard__h346095 == 2'b0) ? + (guard__h346096 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h346095 == 2'b01 || guard__h346095 == 2'b10 || - guard__h346095 == 2'b11) && + (guard__h346096 == 2'b01 || guard__h346096 == 2'b10 || + guard__h346096 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = @@ -33848,34 +33848,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h346095 or + always@(guard__h346096 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01, 2'b10: - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = - guard__h346095 != 2'b11 || + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = + guard__h346096 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 or - guard__h346095) + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 or + guard__h346096) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56; + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = - (guard__h346095 == 2'b0) ? + (guard__h346096 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h346095 != 2'b01 && guard__h346095 != 2'b10 && - guard__h346095 != 2'b11 || + guard__h346096 != 2'b01 && guard__h346096 != 2'b10 && + guard__h346096 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = @@ -33886,34 +33886,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h354804 or + always@(guard__h354805 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01, 2'b10: - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = - guard__h354804 == 2'b11 && + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = + guard__h354805 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 or - guard__h354804) + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 or + guard__h354805) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57; + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = - (guard__h354804 == 2'b0) ? + (guard__h354805 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h354804 == 2'b01 || guard__h354804 == 2'b10 || - guard__h354804 == 2'b11) && + (guard__h354805 == 2'b01 || guard__h354805 == 2'b10 || + guard__h354805 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = @@ -33924,34 +33924,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h354804 or + always@(guard__h354805 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01, 2'b10: - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = - guard__h354804 != 2'b11 || + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = + guard__h354805 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 or - guard__h354804) + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 or + guard__h354805) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58; + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = - (guard__h354804 == 2'b0) ? + (guard__h354805 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h354804 != 2'b01 && guard__h354804 != 2'b10 && - guard__h354804 != 2'b11 || + guard__h354805 != 2'b01 && guard__h354805 != 2'b10 && + guard__h354805 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = @@ -33962,34 +33962,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h363734 or + always@(guard__h363735 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01, 2'b10: - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = - guard__h363734 == 2'b11 && + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = + guard__h363735 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 or - guard__h363734) + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 or + guard__h363735) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59; + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = - (guard__h363734 == 2'b0) ? + (guard__h363735 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h363734 == 2'b01 || guard__h363734 == 2'b10 || - guard__h363734 == 2'b11) && + (guard__h363735 == 2'b01 || guard__h363735 == 2'b10 || + guard__h363735 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = @@ -34000,34 +34000,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h363734 or + always@(guard__h363735 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01, 2'b10: - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = - guard__h363734 != 2'b11 || + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = + guard__h363735 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 or - guard__h363734) + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 or + guard__h363735) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60; + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = - (guard__h363734 == 2'b0) ? + (guard__h363735 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h363734 != 2'b01 && guard__h363734 != 2'b10 && - guard__h363734 != 2'b11 || + guard__h363735 != 2'b01 && guard__h363735 != 2'b10 && + guard__h363735 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = @@ -34038,34 +34038,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h372570 or + always@(guard__h372571 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01, 2'b10: - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = - guard__h372570 == 2'b11 && + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = + guard__h372571 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 or - guard__h372570) + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 or + guard__h372571) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61; + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = - (guard__h372570 == 2'b0) ? + (guard__h372571 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h372570 == 2'b01 || guard__h372570 == 2'b10 || - guard__h372570 == 2'b11) && + (guard__h372571 == 2'b01 || guard__h372571 == 2'b10 || + guard__h372571 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = @@ -34076,34 +34076,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h372570 or + always@(guard__h372571 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01, 2'b10: - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = - guard__h372570 != 2'b11 || + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = + guard__h372571 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 or - guard__h372570) + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 or + guard__h372571) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62; + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = - (guard__h372570 == 2'b0) ? + (guard__h372571 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h372570 != 2'b01 && guard__h372570 != 2'b10 && - guard__h372570 != 2'b11 || + guard__h372571 != 2'b01 && guard__h372571 != 2'b10 && + guard__h372571 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = @@ -34140,446 +34140,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h400501 or - _theResult___fst_exp__h408549 or - out_exp__h408994 or _theResult___exp__h408991) + always@(guard__h400502 or + _theResult___fst_exp__h408550 or + out_exp__h408995 or _theResult___exp__h408992) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - _theResult___fst_exp__h408549; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + _theResult___fst_exp__h408550; 2'b10: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - out_exp__h408994; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + out_exp__h408995; 2'b11: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - _theResult___exp__h408991; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + _theResult___exp__h408992; endcase end - always@(guard__h400501 or - _theResult___fst_exp__h408549 or _theResult___exp__h408991) + always@(guard__h400502 or + _theResult___fst_exp__h408550 or _theResult___exp__h408992) begin - case (guard__h400501) + case (guard__h400502) 2'b0: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 = - _theResult___fst_exp__h408549; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 = + _theResult___fst_exp__h408550; 2'b01, 2'b10, 2'b11: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 = - _theResult___exp__h408991; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 = + _theResult___exp__h408992; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 or - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 or + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 or + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926 or - _theResult___fst_exp__h408549) + _theResult___fst_exp__h408550) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h409069 = - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67; + _theResult___fst_exp__h409070 = + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67; 3'd1: - _theResult___fst_exp__h409069 = - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68; + _theResult___fst_exp__h409070 = + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68; 3'd2: - _theResult___fst_exp__h409069 = + _theResult___fst_exp__h409070 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924; 3'd3: - _theResult___fst_exp__h409069 = + _theResult___fst_exp__h409070 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926; - 3'd4: _theResult___fst_exp__h409069 = _theResult___fst_exp__h408549; - default: _theResult___fst_exp__h409069 = 8'd0; + 3'd4: _theResult___fst_exp__h409070 = _theResult___fst_exp__h408550; + default: _theResult___fst_exp__h409070 = 8'd0; endcase end - always@(guard__h391794 or - _theResult___fst_exp__h399893 or - out_exp__h400412 or _theResult___exp__h400409) + always@(guard__h391795 or + _theResult___fst_exp__h399894 or + out_exp__h400413 or _theResult___exp__h400410) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - _theResult___fst_exp__h399893; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + _theResult___fst_exp__h399894; 2'b10: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - out_exp__h400412; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + out_exp__h400413; 2'b11: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - _theResult___exp__h400409; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + _theResult___exp__h400410; endcase end - always@(guard__h391794 or - _theResult___fst_exp__h399893 or _theResult___exp__h400409) + always@(guard__h391795 or + _theResult___fst_exp__h399894 or _theResult___exp__h400410) begin - case (guard__h391794) + case (guard__h391795) 2'b0: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 = - _theResult___fst_exp__h399893; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 = + _theResult___fst_exp__h399894; 2'b01, 2'b10, 2'b11: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 = - _theResult___exp__h400409; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 = + _theResult___exp__h400410; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 or - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 or + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 or + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705 or - _theResult___fst_exp__h399893) + _theResult___fst_exp__h399894) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h400487 = - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69; + _theResult___fst_exp__h400488 = + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69; 3'd1: - _theResult___fst_exp__h400487 = - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70; + _theResult___fst_exp__h400488 = + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70; 3'd2: - _theResult___fst_exp__h400487 = + _theResult___fst_exp__h400488 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702; 3'd3: - _theResult___fst_exp__h400487 = + _theResult___fst_exp__h400488 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705; - 3'd4: _theResult___fst_exp__h400487 = _theResult___fst_exp__h399893; - default: _theResult___fst_exp__h400487 = 8'd0; + 3'd4: _theResult___fst_exp__h400488 = _theResult___fst_exp__h399894; + default: _theResult___fst_exp__h400488 = 8'd0; endcase end - always@(guard__h409431 or - _theResult___fst_exp__h417659 or - out_exp__h418178 or _theResult___exp__h418175) + always@(guard__h409432 or + _theResult___fst_exp__h417660 or + out_exp__h418179 or _theResult___exp__h418176) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - _theResult___fst_exp__h417659; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + _theResult___fst_exp__h417660; 2'b10: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - out_exp__h418178; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + out_exp__h418179; 2'b11: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - _theResult___exp__h418175; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + _theResult___exp__h418176; endcase end - always@(guard__h409431 or - _theResult___fst_exp__h417659 or _theResult___exp__h418175) + always@(guard__h409432 or + _theResult___fst_exp__h417660 or _theResult___exp__h418176) begin - case (guard__h409431) + case (guard__h409432) 2'b0: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 = - _theResult___fst_exp__h417659; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 = + _theResult___fst_exp__h417660; 2'b01, 2'b10, 2'b11: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 = - _theResult___exp__h418175; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 = + _theResult___exp__h418176; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 or - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 or + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 or + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251 or - _theResult___fst_exp__h417659) + _theResult___fst_exp__h417660) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h418253 = - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75; + _theResult___fst_exp__h418254 = + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75; 3'd1: - _theResult___fst_exp__h418253 = - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76; + _theResult___fst_exp__h418254 = + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76; 3'd2: - _theResult___fst_exp__h418253 = + _theResult___fst_exp__h418254 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249; 3'd3: - _theResult___fst_exp__h418253 = + _theResult___fst_exp__h418254 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251; - 3'd4: _theResult___fst_exp__h418253 = _theResult___fst_exp__h417659; - default: _theResult___fst_exp__h418253 = 8'd0; + 3'd4: _theResult___fst_exp__h418254 = _theResult___fst_exp__h417660; + default: _theResult___fst_exp__h418254 = 8'd0; endcase end - always@(guard__h418267 or - _theResult___fst_exp__h426344 or - out_exp__h426814 or _theResult___exp__h426811) + always@(guard__h418268 or + _theResult___fst_exp__h426345 or + out_exp__h426815 or _theResult___exp__h426812) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - _theResult___fst_exp__h426344; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + _theResult___fst_exp__h426345; 2'b10: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - out_exp__h426814; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + out_exp__h426815; 2'b11: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - _theResult___exp__h426811; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + _theResult___exp__h426812; endcase end - always@(guard__h418267 or - _theResult___fst_exp__h426344 or _theResult___exp__h426811) + always@(guard__h418268 or + _theResult___fst_exp__h426345 or _theResult___exp__h426812) begin - case (guard__h418267) + case (guard__h418268) 2'b0: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 = - _theResult___fst_exp__h426344; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 = + _theResult___fst_exp__h426345; 2'b01, 2'b10, 2'b11: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 = - _theResult___exp__h426811; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 = + _theResult___exp__h426812; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 or - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 or + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 or + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320 or - _theResult___fst_exp__h426344) + _theResult___fst_exp__h426345) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h426889 = - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80; + _theResult___fst_exp__h426890 = + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80; 3'd1: - _theResult___fst_exp__h426889 = - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81; + _theResult___fst_exp__h426890 = + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81; 3'd2: - _theResult___fst_exp__h426889 = + _theResult___fst_exp__h426890 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318; 3'd3: - _theResult___fst_exp__h426889 = + _theResult___fst_exp__h426890 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320; - 3'd4: _theResult___fst_exp__h426889 = _theResult___fst_exp__h426344; - default: _theResult___fst_exp__h426889 = 8'd0; + 3'd4: _theResult___fst_exp__h426890 = _theResult___fst_exp__h426345; + default: _theResult___fst_exp__h426890 = 8'd0; endcase end - always@(guard__h400501 or - _theResult___snd__h408500 or - out_sfd__h408995 or _theResult___sfd__h408992) + always@(guard__h400502 or + _theResult___snd__h408501 or + out_sfd__h408996 or _theResult___sfd__h408993) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - _theResult___snd__h408500[56:34]; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + _theResult___snd__h408501[56:34]; 2'b10: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - out_sfd__h408995; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + out_sfd__h408996; 2'b11: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - _theResult___sfd__h408992; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + _theResult___sfd__h408993; endcase end - always@(guard__h400501 or - _theResult___snd__h408500 or _theResult___sfd__h408992) + always@(guard__h400502 or + _theResult___snd__h408501 or _theResult___sfd__h408993) begin - case (guard__h400501) + case (guard__h400502) 2'b0: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 = - _theResult___snd__h408500[56:34]; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 = + _theResult___snd__h408501[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 = - _theResult___sfd__h408992; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 = + _theResult___sfd__h408993; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 or - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 or + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 or + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370 or - _theResult___snd__h408500) + _theResult___snd__h408501) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h409070 = - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82; + _theResult___fst_sfd__h409071 = + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82; 3'd1: - _theResult___fst_sfd__h409070 = - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83; + _theResult___fst_sfd__h409071 = + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83; 3'd2: - _theResult___fst_sfd__h409070 = + _theResult___fst_sfd__h409071 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368; 3'd3: - _theResult___fst_sfd__h409070 = + _theResult___fst_sfd__h409071 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370; - 3'd4: _theResult___fst_sfd__h409070 = _theResult___snd__h408500[56:34]; - default: _theResult___fst_sfd__h409070 = 23'd0; + 3'd4: _theResult___fst_sfd__h409071 = _theResult___snd__h408501[56:34]; + default: _theResult___fst_sfd__h409071 = 23'd0; endcase end - always@(guard__h391794 or - sfdin__h399887 or out_sfd__h400413 or _theResult___sfd__h400410) + always@(guard__h391795 or + sfdin__h399888 or out_sfd__h400414 or _theResult___sfd__h400411) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - sfdin__h399887[56:34]; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + sfdin__h399888[56:34]; 2'b10: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - out_sfd__h400413; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + out_sfd__h400414; 2'b11: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - _theResult___sfd__h400410; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + _theResult___sfd__h400411; endcase end - always@(guard__h391794 or sfdin__h399887 or _theResult___sfd__h400410) + always@(guard__h391795 or sfdin__h399888 or _theResult___sfd__h400411) begin - case (guard__h391794) + case (guard__h391795) 2'b0: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 = - sfdin__h399887[56:34]; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 = + sfdin__h399888[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 = - _theResult___sfd__h400410; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 = + _theResult___sfd__h400411; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 or - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 or + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 or + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351 or - sfdin__h399887) + sfdin__h399888) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h400488 = - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84; + _theResult___fst_sfd__h400489 = + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84; 3'd1: - _theResult___fst_sfd__h400488 = - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85; + _theResult___fst_sfd__h400489 = + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85; 3'd2: - _theResult___fst_sfd__h400488 = + _theResult___fst_sfd__h400489 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349; 3'd3: - _theResult___fst_sfd__h400488 = + _theResult___fst_sfd__h400489 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351; - 3'd4: _theResult___fst_sfd__h400488 = sfdin__h399887[56:34]; - default: _theResult___fst_sfd__h400488 = 23'd0; + 3'd4: _theResult___fst_sfd__h400489 = sfdin__h399888[56:34]; + default: _theResult___fst_sfd__h400489 = 23'd0; endcase end - always@(guard__h409431 or - sfdin__h417653 or out_sfd__h418179 or _theResult___sfd__h418176) + always@(guard__h409432 or + sfdin__h417654 or out_sfd__h418180 or _theResult___sfd__h418177) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - sfdin__h417653[56:34]; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + sfdin__h417654[56:34]; 2'b10: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - out_sfd__h418179; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + out_sfd__h418180; 2'b11: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - _theResult___sfd__h418176; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + _theResult___sfd__h418177; endcase end - always@(guard__h409431 or sfdin__h417653 or _theResult___sfd__h418176) + always@(guard__h409432 or sfdin__h417654 or _theResult___sfd__h418177) begin - case (guard__h409431) + case (guard__h409432) 2'b0: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 = - sfdin__h417653[56:34]; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 = + sfdin__h417654[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 = - _theResult___sfd__h418176; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 = + _theResult___sfd__h418177; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 or - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 or + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 or + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397 or - sfdin__h417653) + sfdin__h417654) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h418254 = - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86; + _theResult___fst_sfd__h418255 = + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86; 3'd1: - _theResult___fst_sfd__h418254 = - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87; + _theResult___fst_sfd__h418255 = + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87; 3'd2: - _theResult___fst_sfd__h418254 = + _theResult___fst_sfd__h418255 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395; 3'd3: - _theResult___fst_sfd__h418254 = + _theResult___fst_sfd__h418255 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397; - 3'd4: _theResult___fst_sfd__h418254 = sfdin__h417653[56:34]; - default: _theResult___fst_sfd__h418254 = 23'd0; + 3'd4: _theResult___fst_sfd__h418255 = sfdin__h417654[56:34]; + default: _theResult___fst_sfd__h418255 = 23'd0; endcase end - always@(guard__h418267 or - _theResult___snd__h426290 or - out_sfd__h426815 or _theResult___sfd__h426812) + always@(guard__h418268 or + _theResult___snd__h426291 or + out_sfd__h426816 or _theResult___sfd__h426813) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - _theResult___snd__h426290[56:34]; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + _theResult___snd__h426291[56:34]; 2'b10: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - out_sfd__h426815; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + out_sfd__h426816; 2'b11: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - _theResult___sfd__h426812; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + _theResult___sfd__h426813; endcase end - always@(guard__h418267 or - _theResult___snd__h426290 or _theResult___sfd__h426812) + always@(guard__h418268 or + _theResult___snd__h426291 or _theResult___sfd__h426813) begin - case (guard__h418267) + case (guard__h418268) 2'b0: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 = - _theResult___snd__h426290[56:34]; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 = + _theResult___snd__h426291[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 = - _theResult___sfd__h426812; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 = + _theResult___sfd__h426813; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 or - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 or + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 or + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 or - _theResult___snd__h426290) + _theResult___snd__h426291) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h426890 = - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88; + _theResult___fst_sfd__h426891 = + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88; 3'd1: - _theResult___fst_sfd__h426890 = - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89; + _theResult___fst_sfd__h426891 = + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89; 3'd2: - _theResult___fst_sfd__h426890 = + _theResult___fst_sfd__h426891 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414; 3'd3: - _theResult___fst_sfd__h426890 = + _theResult___fst_sfd__h426891 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416; - 3'd4: _theResult___fst_sfd__h426890 = _theResult___snd__h426290[56:34]; - default: _theResult___fst_sfd__h426890 = 23'd0; + 3'd4: _theResult___fst_sfd__h426891 = _theResult___snd__h426291[56:34]; + default: _theResult___fst_sfd__h426891 = 23'd0; endcase end - always@(guard__h391794 or + always@(guard__h391795 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01, 2'b10: - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = - guard__h391794 == 2'b11 && + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = + guard__h391795 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 or - guard__h391794) + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 or + guard__h391795) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90; + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = - (guard__h391794 == 2'b0) ? + (guard__h391795 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h391794 == 2'b01 || guard__h391794 == 2'b10 || - guard__h391794 == 2'b11) && + (guard__h391795 == 2'b01 || guard__h391795 == 2'b10 || + guard__h391795 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = @@ -34590,34 +34590,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h391794 or + always@(guard__h391795 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01, 2'b10: - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = - guard__h391794 != 2'b11 || + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = + guard__h391795 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 or - guard__h391794) + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 or + guard__h391795) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91; + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = - (guard__h391794 == 2'b0) ? + (guard__h391795 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h391794 != 2'b01 && guard__h391794 != 2'b10 && - guard__h391794 != 2'b11 || + guard__h391795 != 2'b01 && guard__h391795 != 2'b10 && + guard__h391795 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = @@ -34628,34 +34628,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h400501 or + always@(guard__h400502 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01, 2'b10: - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = - guard__h400501 == 2'b11 && + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = + guard__h400502 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 or - guard__h400501) + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 or + guard__h400502) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92; + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = - (guard__h400501 == 2'b0) ? + (guard__h400502 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h400501 == 2'b01 || guard__h400501 == 2'b10 || - guard__h400501 == 2'b11) && + (guard__h400502 == 2'b01 || guard__h400502 == 2'b10 || + guard__h400502 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = @@ -34666,34 +34666,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h400501 or + always@(guard__h400502 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01, 2'b10: - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = - guard__h400501 != 2'b11 || + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = + guard__h400502 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 or - guard__h400501) + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 or + guard__h400502) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93; + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = - (guard__h400501 == 2'b0) ? + (guard__h400502 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h400501 != 2'b01 && guard__h400501 != 2'b10 && - guard__h400501 != 2'b11 || + guard__h400502 != 2'b01 && guard__h400502 != 2'b10 && + guard__h400502 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = @@ -34704,34 +34704,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h409431 or + always@(guard__h409432 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01, 2'b10: - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = - guard__h409431 == 2'b11 && + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = + guard__h409432 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 or - guard__h409431) + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 or + guard__h409432) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94; + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = - (guard__h409431 == 2'b0) ? + (guard__h409432 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h409431 == 2'b01 || guard__h409431 == 2'b10 || - guard__h409431 == 2'b11) && + (guard__h409432 == 2'b01 || guard__h409432 == 2'b10 || + guard__h409432 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = @@ -34742,34 +34742,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h409431 or + always@(guard__h409432 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01, 2'b10: - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = - guard__h409431 != 2'b11 || + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = + guard__h409432 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 or - guard__h409431) + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 or + guard__h409432) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95; + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = - (guard__h409431 == 2'b0) ? + (guard__h409432 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h409431 != 2'b01 && guard__h409431 != 2'b10 && - guard__h409431 != 2'b11 || + guard__h409432 != 2'b01 && guard__h409432 != 2'b10 && + guard__h409432 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = @@ -34780,34 +34780,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h418267 or + always@(guard__h418268 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01, 2'b10: - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = - guard__h418267 == 2'b11 && + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = + guard__h418268 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 or - guard__h418267) + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 or + guard__h418268) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96; + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = - (guard__h418267 == 2'b0) ? + (guard__h418268 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h418267 == 2'b01 || guard__h418267 == 2'b10 || - guard__h418267 == 2'b11) && + (guard__h418268 == 2'b01 || guard__h418268 == 2'b10 || + guard__h418268 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = @@ -34818,34 +34818,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h418267 or + always@(guard__h418268 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01, 2'b10: - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = - guard__h418267 != 2'b11 || + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = + guard__h418268 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 or - guard__h418267) + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 or + guard__h418268) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97; + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = - (guard__h418267 == 2'b0) ? + (guard__h418268 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h418267 != 2'b01 && guard__h418267 != 2'b10 && - guard__h418267 != 2'b11 || + guard__h418268 != 2'b01 && guard__h418268 != 2'b10 && + guard__h418268 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = @@ -34882,446 +34882,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h446196 or - _theResult___fst_exp__h454244 or - out_exp__h454689 or _theResult___exp__h454686) + always@(guard__h446197 or + _theResult___fst_exp__h454245 or + out_exp__h454690 or _theResult___exp__h454687) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - _theResult___fst_exp__h454244; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + _theResult___fst_exp__h454245; 2'b10: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - out_exp__h454689; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + out_exp__h454690; 2'b11: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - _theResult___exp__h454686; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + _theResult___exp__h454687; endcase end - always@(guard__h446196 or - _theResult___fst_exp__h454244 or _theResult___exp__h454686) + always@(guard__h446197 or + _theResult___fst_exp__h454245 or _theResult___exp__h454687) begin - case (guard__h446196) + case (guard__h446197) 2'b0: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 = - _theResult___fst_exp__h454244; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 = + _theResult___fst_exp__h454245; 2'b01, 2'b10, 2'b11: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 = - _theResult___exp__h454686; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 = + _theResult___exp__h454687; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 or - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 or + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 or + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318 or - _theResult___fst_exp__h454244) + _theResult___fst_exp__h454245) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h454764 = - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102; + _theResult___fst_exp__h454765 = + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102; 3'd1: - _theResult___fst_exp__h454764 = - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103; + _theResult___fst_exp__h454765 = + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103; 3'd2: - _theResult___fst_exp__h454764 = + _theResult___fst_exp__h454765 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316; 3'd3: - _theResult___fst_exp__h454764 = + _theResult___fst_exp__h454765 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318; - 3'd4: _theResult___fst_exp__h454764 = _theResult___fst_exp__h454244; - default: _theResult___fst_exp__h454764 = 8'd0; + 3'd4: _theResult___fst_exp__h454765 = _theResult___fst_exp__h454245; + default: _theResult___fst_exp__h454765 = 8'd0; endcase end - always@(guard__h437489 or - _theResult___fst_exp__h445588 or - out_exp__h446107 or _theResult___exp__h446104) + always@(guard__h437490 or + _theResult___fst_exp__h445589 or + out_exp__h446108 or _theResult___exp__h446105) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - _theResult___fst_exp__h445588; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + _theResult___fst_exp__h445589; 2'b10: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - out_exp__h446107; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + out_exp__h446108; 2'b11: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - _theResult___exp__h446104; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + _theResult___exp__h446105; endcase end - always@(guard__h437489 or - _theResult___fst_exp__h445588 or _theResult___exp__h446104) + always@(guard__h437490 or + _theResult___fst_exp__h445589 or _theResult___exp__h446105) begin - case (guard__h437489) + case (guard__h437490) 2'b0: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 = - _theResult___fst_exp__h445588; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 = + _theResult___fst_exp__h445589; 2'b01, 2'b10, 2'b11: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 = - _theResult___exp__h446104; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 = + _theResult___exp__h446105; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 or - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 or + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 or + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097 or - _theResult___fst_exp__h445588) + _theResult___fst_exp__h445589) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h446182 = - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104; + _theResult___fst_exp__h446183 = + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104; 3'd1: - _theResult___fst_exp__h446182 = - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105; + _theResult___fst_exp__h446183 = + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105; 3'd2: - _theResult___fst_exp__h446182 = + _theResult___fst_exp__h446183 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094; 3'd3: - _theResult___fst_exp__h446182 = + _theResult___fst_exp__h446183 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097; - 3'd4: _theResult___fst_exp__h446182 = _theResult___fst_exp__h445588; - default: _theResult___fst_exp__h446182 = 8'd0; + 3'd4: _theResult___fst_exp__h446183 = _theResult___fst_exp__h445589; + default: _theResult___fst_exp__h446183 = 8'd0; endcase end - always@(guard__h455126 or - _theResult___fst_exp__h463354 or - out_exp__h463873 or _theResult___exp__h463870) + always@(guard__h455127 or + _theResult___fst_exp__h463355 or + out_exp__h463874 or _theResult___exp__h463871) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - _theResult___fst_exp__h463354; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + _theResult___fst_exp__h463355; 2'b10: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - out_exp__h463873; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + out_exp__h463874; 2'b11: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - _theResult___exp__h463870; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + _theResult___exp__h463871; endcase end - always@(guard__h455126 or - _theResult___fst_exp__h463354 or _theResult___exp__h463870) + always@(guard__h455127 or + _theResult___fst_exp__h463355 or _theResult___exp__h463871) begin - case (guard__h455126) + case (guard__h455127) 2'b0: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 = - _theResult___fst_exp__h463354; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 = + _theResult___fst_exp__h463355; 2'b01, 2'b10, 2'b11: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 = - _theResult___exp__h463870; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 = + _theResult___exp__h463871; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 or - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 or + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 or + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643 or - _theResult___fst_exp__h463354) + _theResult___fst_exp__h463355) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h463948 = - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110; + _theResult___fst_exp__h463949 = + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110; 3'd1: - _theResult___fst_exp__h463948 = - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111; + _theResult___fst_exp__h463949 = + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111; 3'd2: - _theResult___fst_exp__h463948 = + _theResult___fst_exp__h463949 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641; 3'd3: - _theResult___fst_exp__h463948 = + _theResult___fst_exp__h463949 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643; - 3'd4: _theResult___fst_exp__h463948 = _theResult___fst_exp__h463354; - default: _theResult___fst_exp__h463948 = 8'd0; + 3'd4: _theResult___fst_exp__h463949 = _theResult___fst_exp__h463355; + default: _theResult___fst_exp__h463949 = 8'd0; endcase end - always@(guard__h463962 or - _theResult___fst_exp__h472039 or - out_exp__h472509 or _theResult___exp__h472506) + always@(guard__h463963 or + _theResult___fst_exp__h472040 or + out_exp__h472510 or _theResult___exp__h472507) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - _theResult___fst_exp__h472039; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + _theResult___fst_exp__h472040; 2'b10: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - out_exp__h472509; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + out_exp__h472510; 2'b11: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - _theResult___exp__h472506; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + _theResult___exp__h472507; endcase end - always@(guard__h463962 or - _theResult___fst_exp__h472039 or _theResult___exp__h472506) + always@(guard__h463963 or + _theResult___fst_exp__h472040 or _theResult___exp__h472507) begin - case (guard__h463962) + case (guard__h463963) 2'b0: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 = - _theResult___fst_exp__h472039; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 = + _theResult___fst_exp__h472040; 2'b01, 2'b10, 2'b11: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 = - _theResult___exp__h472506; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 = + _theResult___exp__h472507; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 or - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 or + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 or + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712 or - _theResult___fst_exp__h472039) + _theResult___fst_exp__h472040) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h472584 = - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115; + _theResult___fst_exp__h472585 = + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115; 3'd1: - _theResult___fst_exp__h472584 = - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116; + _theResult___fst_exp__h472585 = + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116; 3'd2: - _theResult___fst_exp__h472584 = + _theResult___fst_exp__h472585 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710; 3'd3: - _theResult___fst_exp__h472584 = + _theResult___fst_exp__h472585 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712; - 3'd4: _theResult___fst_exp__h472584 = _theResult___fst_exp__h472039; - default: _theResult___fst_exp__h472584 = 8'd0; + 3'd4: _theResult___fst_exp__h472585 = _theResult___fst_exp__h472040; + default: _theResult___fst_exp__h472585 = 8'd0; endcase end - always@(guard__h446196 or - _theResult___snd__h454195 or - out_sfd__h454690 or _theResult___sfd__h454687) + always@(guard__h446197 or + _theResult___snd__h454196 or + out_sfd__h454691 or _theResult___sfd__h454688) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - _theResult___snd__h454195[56:34]; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + _theResult___snd__h454196[56:34]; 2'b10: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - out_sfd__h454690; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + out_sfd__h454691; 2'b11: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - _theResult___sfd__h454687; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + _theResult___sfd__h454688; endcase end - always@(guard__h446196 or - _theResult___snd__h454195 or _theResult___sfd__h454687) + always@(guard__h446197 or + _theResult___snd__h454196 or _theResult___sfd__h454688) begin - case (guard__h446196) + case (guard__h446197) 2'b0: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 = - _theResult___snd__h454195[56:34]; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 = + _theResult___snd__h454196[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 = - _theResult___sfd__h454687; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 = + _theResult___sfd__h454688; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 or - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 or + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 or + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762 or - _theResult___snd__h454195) + _theResult___snd__h454196) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h454765 = - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117; + _theResult___fst_sfd__h454766 = + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117; 3'd1: - _theResult___fst_sfd__h454765 = - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118; + _theResult___fst_sfd__h454766 = + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118; 3'd2: - _theResult___fst_sfd__h454765 = + _theResult___fst_sfd__h454766 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760; 3'd3: - _theResult___fst_sfd__h454765 = + _theResult___fst_sfd__h454766 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762; - 3'd4: _theResult___fst_sfd__h454765 = _theResult___snd__h454195[56:34]; - default: _theResult___fst_sfd__h454765 = 23'd0; + 3'd4: _theResult___fst_sfd__h454766 = _theResult___snd__h454196[56:34]; + default: _theResult___fst_sfd__h454766 = 23'd0; endcase end - always@(guard__h437489 or - sfdin__h445582 or out_sfd__h446108 or _theResult___sfd__h446105) + always@(guard__h437490 or + sfdin__h445583 or out_sfd__h446109 or _theResult___sfd__h446106) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - sfdin__h445582[56:34]; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + sfdin__h445583[56:34]; 2'b10: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - out_sfd__h446108; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + out_sfd__h446109; 2'b11: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - _theResult___sfd__h446105; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + _theResult___sfd__h446106; endcase end - always@(guard__h437489 or sfdin__h445582 or _theResult___sfd__h446105) + always@(guard__h437490 or sfdin__h445583 or _theResult___sfd__h446106) begin - case (guard__h437489) + case (guard__h437490) 2'b0: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 = - sfdin__h445582[56:34]; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 = + sfdin__h445583[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 = - _theResult___sfd__h446105; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 = + _theResult___sfd__h446106; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 or - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 or + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 or + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743 or - sfdin__h445582) + sfdin__h445583) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h446183 = - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119; + _theResult___fst_sfd__h446184 = + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119; 3'd1: - _theResult___fst_sfd__h446183 = - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120; + _theResult___fst_sfd__h446184 = + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120; 3'd2: - _theResult___fst_sfd__h446183 = + _theResult___fst_sfd__h446184 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741; 3'd3: - _theResult___fst_sfd__h446183 = + _theResult___fst_sfd__h446184 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743; - 3'd4: _theResult___fst_sfd__h446183 = sfdin__h445582[56:34]; - default: _theResult___fst_sfd__h446183 = 23'd0; + 3'd4: _theResult___fst_sfd__h446184 = sfdin__h445583[56:34]; + default: _theResult___fst_sfd__h446184 = 23'd0; endcase end - always@(guard__h455126 or - sfdin__h463348 or out_sfd__h463874 or _theResult___sfd__h463871) + always@(guard__h455127 or + sfdin__h463349 or out_sfd__h463875 or _theResult___sfd__h463872) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - sfdin__h463348[56:34]; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + sfdin__h463349[56:34]; 2'b10: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - out_sfd__h463874; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + out_sfd__h463875; 2'b11: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - _theResult___sfd__h463871; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + _theResult___sfd__h463872; endcase end - always@(guard__h455126 or sfdin__h463348 or _theResult___sfd__h463871) + always@(guard__h455127 or sfdin__h463349 or _theResult___sfd__h463872) begin - case (guard__h455126) + case (guard__h455127) 2'b0: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 = - sfdin__h463348[56:34]; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 = + sfdin__h463349[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 = - _theResult___sfd__h463871; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 = + _theResult___sfd__h463872; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 or - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 or + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 or + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789 or - sfdin__h463348) + sfdin__h463349) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h463949 = - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121; + _theResult___fst_sfd__h463950 = + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121; 3'd1: - _theResult___fst_sfd__h463949 = - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122; + _theResult___fst_sfd__h463950 = + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122; 3'd2: - _theResult___fst_sfd__h463949 = + _theResult___fst_sfd__h463950 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787; 3'd3: - _theResult___fst_sfd__h463949 = + _theResult___fst_sfd__h463950 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789; - 3'd4: _theResult___fst_sfd__h463949 = sfdin__h463348[56:34]; - default: _theResult___fst_sfd__h463949 = 23'd0; + 3'd4: _theResult___fst_sfd__h463950 = sfdin__h463349[56:34]; + default: _theResult___fst_sfd__h463950 = 23'd0; endcase end - always@(guard__h463962 or - _theResult___snd__h471985 or - out_sfd__h472510 or _theResult___sfd__h472507) + always@(guard__h463963 or + _theResult___snd__h471986 or + out_sfd__h472511 or _theResult___sfd__h472508) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - _theResult___snd__h471985[56:34]; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + _theResult___snd__h471986[56:34]; 2'b10: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - out_sfd__h472510; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + out_sfd__h472511; 2'b11: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - _theResult___sfd__h472507; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + _theResult___sfd__h472508; endcase end - always@(guard__h463962 or - _theResult___snd__h471985 or _theResult___sfd__h472507) + always@(guard__h463963 or + _theResult___snd__h471986 or _theResult___sfd__h472508) begin - case (guard__h463962) + case (guard__h463963) 2'b0: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 = - _theResult___snd__h471985[56:34]; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 = + _theResult___snd__h471986[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 = - _theResult___sfd__h472507; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 = + _theResult___sfd__h472508; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 or - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 or + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 or + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 or - _theResult___snd__h471985) + _theResult___snd__h471986) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h472585 = - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123; + _theResult___fst_sfd__h472586 = + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123; 3'd1: - _theResult___fst_sfd__h472585 = - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124; + _theResult___fst_sfd__h472586 = + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124; 3'd2: - _theResult___fst_sfd__h472585 = + _theResult___fst_sfd__h472586 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806; 3'd3: - _theResult___fst_sfd__h472585 = + _theResult___fst_sfd__h472586 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808; - 3'd4: _theResult___fst_sfd__h472585 = _theResult___snd__h471985[56:34]; - default: _theResult___fst_sfd__h472585 = 23'd0; + 3'd4: _theResult___fst_sfd__h472586 = _theResult___snd__h471986[56:34]; + default: _theResult___fst_sfd__h472586 = 23'd0; endcase end - always@(guard__h437489 or + always@(guard__h437490 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01, 2'b10: - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = - guard__h437489 == 2'b11 && + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = + guard__h437490 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 or - guard__h437489) + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 or + guard__h437490) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125; + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = - (guard__h437489 == 2'b0) ? + (guard__h437490 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h437489 == 2'b01 || guard__h437489 == 2'b10 || - guard__h437489 == 2'b11) && + (guard__h437490 == 2'b01 || guard__h437490 == 2'b10 || + guard__h437490 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = @@ -35332,34 +35332,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h446196 or + always@(guard__h446197 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01, 2'b10: - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = - guard__h446196 == 2'b11 && + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + guard__h446197 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or - guard__h446196) + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or + guard__h446197) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = - (guard__h446196 == 2'b0) ? + (guard__h446197 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h446196 == 2'b01 || guard__h446196 == 2'b10 || - guard__h446196 == 2'b11) && + (guard__h446197 == 2'b01 || guard__h446197 == 2'b10 || + guard__h446197 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = @@ -35370,34 +35370,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h437489 or + always@(guard__h437490 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01, 2'b10: - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = - guard__h437489 != 2'b11 || + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + guard__h437490 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or - guard__h437489) + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or + guard__h437490) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = - (guard__h437489 == 2'b0) ? + (guard__h437490 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h437489 != 2'b01 && guard__h437489 != 2'b10 && - guard__h437489 != 2'b11 || + guard__h437490 != 2'b01 && guard__h437490 != 2'b10 && + guard__h437490 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = @@ -35408,34 +35408,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h446196 or + always@(guard__h446197 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01, 2'b10: - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = - guard__h446196 != 2'b11 || + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = + guard__h446197 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 or - guard__h446196) + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 or + guard__h446197) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128; + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = - (guard__h446196 == 2'b0) ? + (guard__h446197 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h446196 != 2'b01 && guard__h446196 != 2'b10 && - guard__h446196 != 2'b11 || + guard__h446197 != 2'b01 && guard__h446197 != 2'b10 && + guard__h446197 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = @@ -35446,34 +35446,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h455126 or + always@(guard__h455127 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01, 2'b10: - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = - guard__h455126 == 2'b11 && + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = + guard__h455127 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 or - guard__h455126) + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 or + guard__h455127) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129; + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = - (guard__h455126 == 2'b0) ? + (guard__h455127 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h455126 == 2'b01 || guard__h455126 == 2'b10 || - guard__h455126 == 2'b11) && + (guard__h455127 == 2'b01 || guard__h455127 == 2'b10 || + guard__h455127 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = @@ -35484,34 +35484,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h455126 or + always@(guard__h455127 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01, 2'b10: - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = - guard__h455126 != 2'b11 || + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = + guard__h455127 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 or - guard__h455126) + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 or + guard__h455127) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130; + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = - (guard__h455126 == 2'b0) ? + (guard__h455127 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h455126 != 2'b01 && guard__h455126 != 2'b10 && - guard__h455126 != 2'b11 || + guard__h455127 != 2'b01 && guard__h455127 != 2'b10 && + guard__h455127 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = @@ -35522,34 +35522,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h463962 or + always@(guard__h463963 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01, 2'b10: - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = - guard__h463962 == 2'b11 && + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = + guard__h463963 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 or - guard__h463962) + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 or + guard__h463963) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131; + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = - (guard__h463962 == 2'b0) ? + (guard__h463963 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h463962 == 2'b01 || guard__h463962 == 2'b10 || - guard__h463962 == 2'b11) && + (guard__h463963 == 2'b01 || guard__h463963 == 2'b10 || + guard__h463963 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = @@ -35560,34 +35560,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h463962 or + always@(guard__h463963 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01, 2'b10: - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = - guard__h463962 != 2'b11 || + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = + guard__h463963 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 or - guard__h463962) + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 or + guard__h463963) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132; + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = - (guard__h463962 == 2'b0) ? + (guard__h463963 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h463962 != 2'b01 && guard__h463962 != 2'b10 && - guard__h463962 != 2'b11 || + guard__h463963 != 2'b01 && guard__h463963 != 2'b10 && + guard__h463963 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = @@ -35644,28 +35644,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$RDY_request_put; endcase end - always@(guard__h493567 or - _theResult___fst_exp__h501528 or _theResult___exp__h502183) + always@(guard__h493568 or + _theResult___fst_exp__h501529 or _theResult___exp__h502184) begin - case (guard__h493567) + case (guard__h493568) 2'b0: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143 = - _theResult___fst_exp__h501528; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143 = + _theResult___fst_exp__h501529; 2'b01, 2'b10, 2'b11: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143 = - _theResult___exp__h502183; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143 = + _theResult___exp__h502184; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h501528 or + _theResult___fst_exp__h501529 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013 or - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143) + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = - _theResult___fst_exp__h501528; + _theResult___fst_exp__h501529; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015; @@ -35674,44 +35674,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = 11'd0; endcase end - always@(guard__h493567 or - _theResult___fst_exp__h501528 or - out_exp__h502186 or _theResult___exp__h502183) + always@(guard__h493568 or + _theResult___fst_exp__h501529 or + out_exp__h502187 or _theResult___exp__h502184) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - _theResult___fst_exp__h501528; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + _theResult___fst_exp__h501529; 2'b10: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - out_exp__h502186; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + out_exp__h502187; 2'b11: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - _theResult___exp__h502183; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + _theResult___exp__h502184; endcase end - always@(guard__h493567 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h493568 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01, 2'b10: - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = - guard__h493567 == 2'b11 && + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + guard__h493568 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h493567) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h493568) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35721,12 +35721,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146 = - (guard__h493567 == 2'b0) ? + (guard__h493568 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h493567 == 2'b01 || guard__h493567 == 2'b10 || - guard__h493567 == 2'b11) && + (guard__h493568 == 2'b01 || guard__h493568 == 2'b10 || + guard__h493568 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35737,23 +35737,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h511948 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h511949 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01, 2'b10: - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = - guard__h511948 == 2'b11 && + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + guard__h511949 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h511948) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h511949) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35763,12 +35763,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148 = - (guard__h511948 == 2'b0) ? + (guard__h511949 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h511948 == 2'b01 || guard__h511948 == 2'b10 || - guard__h511948 == 2'b11) && + (guard__h511949 == 2'b01 || guard__h511949 == 2'b10 || + guard__h511949 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35779,23 +35779,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h502879 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h502880 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01, 2'b10: - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = - guard__h502879 == 2'b11 && + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + guard__h502880 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h502879) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h502880) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35805,12 +35805,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150 = - (guard__h502879 == 2'b0) ? + (guard__h502880 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h502879 == 2'b01 || guard__h502879 == 2'b10 || - guard__h502879 == 2'b11) && + (guard__h502880 == 2'b01 || guard__h502880 == 2'b10 || + guard__h502880 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35821,28 +35821,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h571724 or - _theResult___fst_exp__h579685 or _theResult___exp__h580340) + always@(guard__h571725 or + _theResult___fst_exp__h579686 or _theResult___exp__h580341) begin - case (guard__h571724) + case (guard__h571725) 2'b0: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160 = - _theResult___fst_exp__h579685; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160 = + _theResult___fst_exp__h579686; 2'b01, 2'b10, 2'b11: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160 = - _theResult___exp__h580340; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160 = + _theResult___exp__h580341; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h579685 or + _theResult___fst_exp__h579686 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728 or - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160) + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = - _theResult___fst_exp__h579685; + _theResult___fst_exp__h579686; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730; @@ -35851,42 +35851,42 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = 11'd0; endcase end - always@(guard__h571724 or - _theResult___fst_exp__h579685 or - out_exp__h580343 or _theResult___exp__h580340) + always@(guard__h571725 or + _theResult___fst_exp__h579686 or + out_exp__h580344 or _theResult___exp__h580341) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - _theResult___fst_exp__h579685; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + _theResult___fst_exp__h579686; 2'b10: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - out_exp__h580343; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + out_exp__h580344; 2'b11: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - _theResult___exp__h580340; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + _theResult___exp__h580341; endcase end - always@(guard__h571724 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h571725 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01, 2'b10: - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = - guard__h571724 == 2'b11 && + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + guard__h571725 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571724) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571725) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35895,12 +35895,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163 = - (guard__h571724 == 2'b0) ? + (guard__h571725 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h571724 == 2'b01 || guard__h571724 == 2'b10 || - guard__h571724 == 2'b11) && + (guard__h571725 == 2'b01 || guard__h571725 == 2'b10 || + guard__h571725 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35911,21 +35911,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h581036 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h581037 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01, 2'b10: - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = - guard__h581036 == 2'b11 && + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + guard__h581037 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581036) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581037) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35934,12 +35934,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165 = - (guard__h581036 == 2'b0) ? + (guard__h581037 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h581036 == 2'b01 || guard__h581036 == 2'b10 || - guard__h581036 == 2'b11) && + (guard__h581037 == 2'b01 || guard__h581037 == 2'b10 || + guard__h581037 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35950,21 +35950,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h590105 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h590106 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01, 2'b10: - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = - guard__h590105 == 2'b11 && + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + guard__h590106 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590105) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590106) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35973,12 +35973,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167 = - (guard__h590105 == 2'b0) ? + (guard__h590106 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h590105 == 2'b01 || guard__h590105 == 2'b10 || - guard__h590105 == 2'b11) && + (guard__h590106 == 2'b01 || guard__h590106 == 2'b10 || + guard__h590106 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35989,21 +35989,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h581036 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h581037 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01, 2'b10: - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = - guard__h581036 != 2'b11 || + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + guard__h581037 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581036) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581037) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36012,12 +36012,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169 = - (guard__h581036 == 2'b0) ? + (guard__h581037 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h581036 != 2'b01 && guard__h581036 != 2'b10 && - guard__h581036 != 2'b11 || + guard__h581037 != 2'b01 && guard__h581037 != 2'b10 && + guard__h581037 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36028,21 +36028,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h590105 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h590106 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01, 2'b10: - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = - guard__h590105 != 2'b11 || + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + guard__h590106 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590105) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590106) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36051,12 +36051,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171 = - (guard__h590105 == 2'b0) ? + (guard__h590106 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h590105 != 2'b01 && guard__h590105 != 2'b10 && - guard__h590105 != 2'b11 || + guard__h590106 != 2'b01 && guard__h590106 != 2'b10 && + guard__h590106 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36067,21 +36067,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h571724 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h571725 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01, 2'b10: - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = - guard__h571724 != 2'b11 || + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + guard__h571725 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571724) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571725) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36090,12 +36090,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173 = - (guard__h571724 == 2'b0) ? + (guard__h571725 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h571724 != 2'b01 && guard__h571724 != 2'b10 && - guard__h571724 != 2'b11 || + guard__h571725 != 2'b01 && guard__h571725 != 2'b10 && + guard__h571725 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36106,28 +36106,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h532420 or - _theResult___fst_exp__h540381 or _theResult___exp__h541036) + always@(guard__h532421 or + _theResult___fst_exp__h540382 or _theResult___exp__h541037) begin - case (guard__h532420) + case (guard__h532421) 2'b0: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183 = - _theResult___fst_exp__h540381; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183 = + _theResult___fst_exp__h540382; 2'b01, 2'b10, 2'b11: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183 = - _theResult___exp__h541036; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183 = + _theResult___exp__h541037; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h540381 or + _theResult___fst_exp__h540382 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498 or - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183) + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = - _theResult___fst_exp__h540381; + _theResult___fst_exp__h540382; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500; @@ -36136,49 +36136,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = 11'd0; endcase end - always@(guard__h532420 or - _theResult___fst_exp__h540381 or - out_exp__h541039 or _theResult___exp__h541036) + always@(guard__h532421 or + _theResult___fst_exp__h540382 or + out_exp__h541040 or _theResult___exp__h541037) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - _theResult___fst_exp__h540381; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + _theResult___fst_exp__h540382; 2'b10: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - out_exp__h541039; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + out_exp__h541040; 2'b11: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - _theResult___exp__h541036; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + _theResult___exp__h541037; endcase end - always@(guard__h541732 or - _theResult___fst_exp__h549958 or _theResult___exp__h550687) + always@(guard__h541733 or + _theResult___fst_exp__h549959 or _theResult___exp__h550688) begin - case (guard__h541732) + case (guard__h541733) 2'b0: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185 = - _theResult___fst_exp__h549958; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185 = + _theResult___fst_exp__h549959; 2'b01, 2'b10, 2'b11: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185 = - _theResult___exp__h550687; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185 = + _theResult___exp__h550688; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h549958 or + _theResult___fst_exp__h549959 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536 or - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185) + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = - _theResult___fst_exp__h549958; + _theResult___fst_exp__h549959; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538; @@ -36187,49 +36187,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = 11'd0; endcase end - always@(guard__h541732 or - _theResult___fst_exp__h549958 or - out_exp__h550690 or _theResult___exp__h550687) + always@(guard__h541733 or + _theResult___fst_exp__h549959 or + out_exp__h550691 or _theResult___exp__h550688) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - _theResult___fst_exp__h549958; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + _theResult___fst_exp__h549959; 2'b10: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - out_exp__h550690; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + out_exp__h550691; 2'b11: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - _theResult___exp__h550687; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + _theResult___exp__h550688; endcase end - always@(guard__h550801 or - _theResult___fst_exp__h558791 or _theResult___exp__h559471) + always@(guard__h550802 or + _theResult___fst_exp__h558792 or _theResult___exp__h559472) begin - case (guard__h550801) + case (guard__h550802) 2'b0: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187 = - _theResult___fst_exp__h558791; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187 = + _theResult___fst_exp__h558792; 2'b01, 2'b10, 2'b11: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187 = - _theResult___exp__h559471; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187 = + _theResult___exp__h559472; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h558791 or + _theResult___fst_exp__h558792 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567 or - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187) + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = - _theResult___fst_exp__h558791; + _theResult___fst_exp__h558792; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569; @@ -36238,49 +36238,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = 11'd0; endcase end - always@(guard__h550801 or - _theResult___fst_exp__h558791 or - out_exp__h559474 or _theResult___exp__h559471) + always@(guard__h550802 or + _theResult___fst_exp__h558792 or + out_exp__h559475 or _theResult___exp__h559472) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - _theResult___fst_exp__h558791; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + _theResult___fst_exp__h558792; 2'b10: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - out_exp__h559474; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + out_exp__h559475; 2'b11: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - _theResult___exp__h559471; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + _theResult___exp__h559472; endcase end - always@(guard__h581036 or - _theResult___fst_exp__h589262 or _theResult___exp__h589991) + always@(guard__h581037 or + _theResult___fst_exp__h589263 or _theResult___exp__h589992) begin - case (guard__h581036) + case (guard__h581037) 2'b0: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189 = - _theResult___fst_exp__h589262; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189 = + _theResult___fst_exp__h589263; 2'b01, 2'b10, 2'b11: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189 = - _theResult___exp__h589991; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189 = + _theResult___exp__h589992; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h589262 or + _theResult___fst_exp__h589263 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766 or - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189) + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = - _theResult___fst_exp__h589262; + _theResult___fst_exp__h589263; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768; @@ -36289,49 +36289,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = 11'd0; endcase end - always@(guard__h581036 or - _theResult___fst_exp__h589262 or - out_exp__h589994 or _theResult___exp__h589991) + always@(guard__h581037 or + _theResult___fst_exp__h589263 or + out_exp__h589995 or _theResult___exp__h589992) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - _theResult___fst_exp__h589262; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + _theResult___fst_exp__h589263; 2'b10: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - out_exp__h589994; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + out_exp__h589995; 2'b11: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - _theResult___exp__h589991; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + _theResult___exp__h589992; endcase end - always@(guard__h590105 or - _theResult___fst_exp__h598095 or _theResult___exp__h598775) + always@(guard__h590106 or + _theResult___fst_exp__h598096 or _theResult___exp__h598776) begin - case (guard__h590105) + case (guard__h590106) 2'b0: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191 = - _theResult___fst_exp__h598095; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191 = + _theResult___fst_exp__h598096; 2'b01, 2'b10, 2'b11: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191 = - _theResult___exp__h598775; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191 = + _theResult___exp__h598776; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h598095 or + _theResult___fst_exp__h598096 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797 or - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191) + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = - _theResult___fst_exp__h598095; + _theResult___fst_exp__h598096; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799; @@ -36340,44 +36340,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = 11'd0; endcase end - always@(guard__h590105 or - _theResult___fst_exp__h598095 or - out_exp__h598778 or _theResult___exp__h598775) + always@(guard__h590106 or + _theResult___fst_exp__h598096 or + out_exp__h598779 or _theResult___exp__h598776) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - _theResult___fst_exp__h598095; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + _theResult___fst_exp__h598096; 2'b10: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - out_exp__h598778; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + out_exp__h598779; 2'b11: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - _theResult___exp__h598775; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + _theResult___exp__h598776; endcase end - always@(guard__h532420 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h532421 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01, 2'b10: - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = - guard__h532420 == 2'b11 && + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + guard__h532421 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532420) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532421) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36387,12 +36387,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194 = - (guard__h532420 == 2'b0) ? + (guard__h532421 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h532420 == 2'b01 || guard__h532420 == 2'b10 || - guard__h532420 == 2'b11) && + (guard__h532421 == 2'b01 || guard__h532421 == 2'b10 || + guard__h532421 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36403,23 +36403,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h541732 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h541733 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01, 2'b10: - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = - guard__h541732 == 2'b11 && + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + guard__h541733 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541732) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541733) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36429,12 +36429,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196 = - (guard__h541732 == 2'b0) ? + (guard__h541733 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h541732 == 2'b01 || guard__h541732 == 2'b10 || - guard__h541732 == 2'b11) && + (guard__h541733 == 2'b01 || guard__h541733 == 2'b10 || + guard__h541733 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36445,23 +36445,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h550801 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h550802 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01, 2'b10: - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = - guard__h550801 == 2'b11 && + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + guard__h550802 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550801) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550802) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36471,12 +36471,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198 = - (guard__h550801 == 2'b0) ? + (guard__h550802 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h550801 == 2'b01 || guard__h550801 == 2'b10 || - guard__h550801 == 2'b11) && + (guard__h550802 == 2'b01 || guard__h550802 == 2'b10 || + guard__h550802 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36487,23 +36487,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h541732 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h541733 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01, 2'b10: - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = - guard__h541732 != 2'b11 || + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + guard__h541733 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541732) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541733) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36513,12 +36513,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200 = - (guard__h541732 == 2'b0) ? + (guard__h541733 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h541732 != 2'b01 && guard__h541732 != 2'b10 && - guard__h541732 != 2'b11 || + guard__h541733 != 2'b01 && guard__h541733 != 2'b10 && + guard__h541733 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36529,23 +36529,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h550801 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h550802 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01, 2'b10: - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = - guard__h550801 != 2'b11 || + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + guard__h550802 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550801) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550802) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36555,12 +36555,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202 = - (guard__h550801 == 2'b0) ? + (guard__h550802 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h550801 != 2'b01 && guard__h550801 != 2'b10 && - guard__h550801 != 2'b11 || + guard__h550802 != 2'b01 && guard__h550802 != 2'b10 && + guard__h550802 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36571,23 +36571,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h532420 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h532421 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01, 2'b10: - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = - guard__h532420 != 2'b11 || + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + guard__h532421 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532420) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532421) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36597,12 +36597,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204 = - (guard__h532420 == 2'b0) ? + (guard__h532421 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h532420 != 2'b01 && guard__h532420 != 2'b10 && - guard__h532420 != 2'b11 || + guard__h532421 != 2'b01 && guard__h532421 != 2'b10 && + guard__h532421 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36613,28 +36613,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h532420 or - _theResult___snd__h540332 or _theResult___sfd__h541037) + always@(guard__h532421 or + _theResult___snd__h540333 or _theResult___sfd__h541038) begin - case (guard__h532420) + case (guard__h532421) 2'b0: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205 = - _theResult___snd__h540332[56:5]; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205 = + _theResult___snd__h540333[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205 = - _theResult___sfd__h541037; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205 = + _theResult___sfd__h541038; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h540332 or + _theResult___snd__h540333 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593 or - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205) + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = - _theResult___snd__h540332[56:5]; + _theResult___snd__h540333[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595; @@ -36643,48 +36643,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = 52'd0; endcase end - always@(guard__h532420 or - _theResult___snd__h540332 or - out_sfd__h541040 or _theResult___sfd__h541037) + always@(guard__h532421 or + _theResult___snd__h540333 or + out_sfd__h541041 or _theResult___sfd__h541038) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - _theResult___snd__h540332[56:5]; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + _theResult___snd__h540333[56:5]; 2'b10: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - out_sfd__h541040; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + out_sfd__h541041; 2'b11: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - _theResult___sfd__h541037; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + _theResult___sfd__h541038; endcase end - always@(guard__h541732 or sfdin__h549952 or _theResult___sfd__h550688) + always@(guard__h541733 or sfdin__h549953 or _theResult___sfd__h550689) begin - case (guard__h541732) + case (guard__h541733) 2'b0: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207 = - sfdin__h549952[56:5]; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207 = + sfdin__h549953[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207 = - _theResult___sfd__h550688; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207 = + _theResult___sfd__h550689; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h549952 or + sfdin__h549953 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619 or - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207) + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = - sfdin__h549952[56:5]; + sfdin__h549953[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621; @@ -36693,48 +36693,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = 52'd0; endcase end - always@(guard__h541732 or - sfdin__h549952 or out_sfd__h550691 or _theResult___sfd__h550688) + always@(guard__h541733 or + sfdin__h549953 or out_sfd__h550692 or _theResult___sfd__h550689) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - sfdin__h549952[56:5]; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + sfdin__h549953[56:5]; 2'b10: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - out_sfd__h550691; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + out_sfd__h550692; 2'b11: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - _theResult___sfd__h550688; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + _theResult___sfd__h550689; endcase end - always@(guard__h550801 or - _theResult___snd__h558737 or _theResult___sfd__h559472) + always@(guard__h550802 or + _theResult___snd__h558738 or _theResult___sfd__h559473) begin - case (guard__h550801) + case (guard__h550802) 2'b0: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209 = - _theResult___snd__h558737[56:5]; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209 = + _theResult___snd__h558738[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209 = - _theResult___sfd__h559472; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209 = + _theResult___sfd__h559473; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h558737 or + _theResult___snd__h558738 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638 or - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209) + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = - _theResult___snd__h558737[56:5]; + _theResult___snd__h558738[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640; @@ -36743,49 +36743,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = 52'd0; endcase end - always@(guard__h550801 or - _theResult___snd__h558737 or - out_sfd__h559475 or _theResult___sfd__h559472) + always@(guard__h550802 or + _theResult___snd__h558738 or + out_sfd__h559476 or _theResult___sfd__h559473) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - _theResult___snd__h558737[56:5]; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + _theResult___snd__h558738[56:5]; 2'b10: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - out_sfd__h559475; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + out_sfd__h559476; 2'b11: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - _theResult___sfd__h559472; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + _theResult___sfd__h559473; endcase end - always@(guard__h502879 or - _theResult___fst_exp__h511105 or _theResult___exp__h511834) + always@(guard__h502880 or + _theResult___fst_exp__h511106 or _theResult___exp__h511835) begin - case (guard__h502879) + case (guard__h502880) 2'b0: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211 = - _theResult___fst_exp__h511105; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211 = + _theResult___fst_exp__h511106; 2'b01, 2'b10, 2'b11: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211 = - _theResult___exp__h511834; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211 = + _theResult___exp__h511835; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h511105 or + _theResult___fst_exp__h511106 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056 or - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211) + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = - _theResult___fst_exp__h511105; + _theResult___fst_exp__h511106; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058; @@ -36794,49 +36794,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = 11'd0; endcase end - always@(guard__h502879 or - _theResult___fst_exp__h511105 or - out_exp__h511837 or _theResult___exp__h511834) + always@(guard__h502880 or + _theResult___fst_exp__h511106 or + out_exp__h511838 or _theResult___exp__h511835) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - _theResult___fst_exp__h511105; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + _theResult___fst_exp__h511106; 2'b10: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - out_exp__h511837; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + out_exp__h511838; 2'b11: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - _theResult___exp__h511834; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + _theResult___exp__h511835; endcase end - always@(guard__h511948 or - _theResult___fst_exp__h519938 or _theResult___exp__h520618) + always@(guard__h511949 or + _theResult___fst_exp__h519939 or _theResult___exp__h520619) begin - case (guard__h511948) + case (guard__h511949) 2'b0: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213 = - _theResult___fst_exp__h519938; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213 = + _theResult___fst_exp__h519939; 2'b01, 2'b10, 2'b11: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213 = - _theResult___exp__h520618; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213 = + _theResult___exp__h520619; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h519938 or + _theResult___fst_exp__h519939 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087 or - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213) + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = - _theResult___fst_exp__h519938; + _theResult___fst_exp__h519939; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089; @@ -36845,49 +36845,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = 11'd0; endcase end - always@(guard__h511948 or - _theResult___fst_exp__h519938 or - out_exp__h520621 or _theResult___exp__h520618) + always@(guard__h511949 or + _theResult___fst_exp__h519939 or + out_exp__h520622 or _theResult___exp__h520619) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - _theResult___fst_exp__h519938; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + _theResult___fst_exp__h519939; 2'b10: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - out_exp__h520621; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + out_exp__h520622; 2'b11: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - _theResult___exp__h520618; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + _theResult___exp__h520619; endcase end - always@(guard__h493567 or - _theResult___snd__h501479 or _theResult___sfd__h502184) + always@(guard__h493568 or + _theResult___snd__h501480 or _theResult___sfd__h502185) begin - case (guard__h493567) + case (guard__h493568) 2'b0: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215 = - _theResult___snd__h501479[56:5]; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215 = + _theResult___snd__h501480[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215 = - _theResult___sfd__h502184; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215 = + _theResult___sfd__h502185; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h501479 or + _theResult___snd__h501480 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113 or - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215) + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = - _theResult___snd__h501479[56:5]; + _theResult___snd__h501480[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115; @@ -36896,48 +36896,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = 52'd0; endcase end - always@(guard__h493567 or - _theResult___snd__h501479 or - out_sfd__h502187 or _theResult___sfd__h502184) + always@(guard__h493568 or + _theResult___snd__h501480 or + out_sfd__h502188 or _theResult___sfd__h502185) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - _theResult___snd__h501479[56:5]; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + _theResult___snd__h501480[56:5]; 2'b10: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - out_sfd__h502187; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + out_sfd__h502188; 2'b11: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - _theResult___sfd__h502184; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + _theResult___sfd__h502185; endcase end - always@(guard__h502879 or sfdin__h511099 or _theResult___sfd__h511835) + always@(guard__h502880 or sfdin__h511100 or _theResult___sfd__h511836) begin - case (guard__h502879) + case (guard__h502880) 2'b0: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217 = - sfdin__h511099[56:5]; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217 = + sfdin__h511100[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217 = - _theResult___sfd__h511835; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217 = + _theResult___sfd__h511836; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h511099 or + sfdin__h511100 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140 or - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217) + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = - sfdin__h511099[56:5]; + sfdin__h511100[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142; @@ -36946,48 +36946,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = 52'd0; endcase end - always@(guard__h502879 or - sfdin__h511099 or out_sfd__h511838 or _theResult___sfd__h511835) + always@(guard__h502880 or + sfdin__h511100 or out_sfd__h511839 or _theResult___sfd__h511836) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - sfdin__h511099[56:5]; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + sfdin__h511100[56:5]; 2'b10: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - out_sfd__h511838; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + out_sfd__h511839; 2'b11: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - _theResult___sfd__h511835; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + _theResult___sfd__h511836; endcase end - always@(guard__h511948 or - _theResult___snd__h519884 or _theResult___sfd__h520619) + always@(guard__h511949 or + _theResult___snd__h519885 or _theResult___sfd__h520620) begin - case (guard__h511948) + case (guard__h511949) 2'b0: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219 = - _theResult___snd__h519884[56:5]; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219 = + _theResult___snd__h519885[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219 = - _theResult___sfd__h520619; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219 = + _theResult___sfd__h520620; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h519884 or + _theResult___snd__h519885 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159 or - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219) + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = - _theResult___snd__h519884[56:5]; + _theResult___snd__h519885[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161; @@ -36996,49 +36996,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = 52'd0; endcase end - always@(guard__h511948 or - _theResult___snd__h519884 or - out_sfd__h520622 or _theResult___sfd__h520619) + always@(guard__h511949 or + _theResult___snd__h519885 or + out_sfd__h520623 or _theResult___sfd__h520620) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - _theResult___snd__h519884[56:5]; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + _theResult___snd__h519885[56:5]; 2'b10: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - out_sfd__h520622; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + out_sfd__h520623; 2'b11: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - _theResult___sfd__h520619; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + _theResult___sfd__h520620; endcase end - always@(guard__h571724 or - _theResult___snd__h579636 or _theResult___sfd__h580341) + always@(guard__h571725 or + _theResult___snd__h579637 or _theResult___sfd__h580342) begin - case (guard__h571724) + case (guard__h571725) 2'b0: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221 = - _theResult___snd__h579636[56:5]; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221 = + _theResult___snd__h579637[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221 = - _theResult___sfd__h580341; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221 = + _theResult___sfd__h580342; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h579636 or + _theResult___snd__h579637 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823 or - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221) + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = - _theResult___snd__h579636[56:5]; + _theResult___snd__h579637[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825; @@ -37047,48 +37047,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = 52'd0; endcase end - always@(guard__h571724 or - _theResult___snd__h579636 or - out_sfd__h580344 or _theResult___sfd__h580341) + always@(guard__h571725 or + _theResult___snd__h579637 or + out_sfd__h580345 or _theResult___sfd__h580342) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - _theResult___snd__h579636[56:5]; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + _theResult___snd__h579637[56:5]; 2'b10: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - out_sfd__h580344; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + out_sfd__h580345; 2'b11: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - _theResult___sfd__h580341; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + _theResult___sfd__h580342; endcase end - always@(guard__h581036 or sfdin__h589256 or _theResult___sfd__h589992) + always@(guard__h581037 or sfdin__h589257 or _theResult___sfd__h589993) begin - case (guard__h581036) + case (guard__h581037) 2'b0: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223 = - sfdin__h589256[56:5]; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223 = + sfdin__h589257[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223 = - _theResult___sfd__h589992; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223 = + _theResult___sfd__h589993; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h589256 or + sfdin__h589257 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849 or - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223) + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = - sfdin__h589256[56:5]; + sfdin__h589257[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851; @@ -37097,24 +37097,24 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = 52'd0; endcase end - always@(guard__h581036 or - sfdin__h589256 or out_sfd__h589995 or _theResult___sfd__h589992) + always@(guard__h581037 or + sfdin__h589257 or out_sfd__h589996 or _theResult___sfd__h589993) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - sfdin__h589256[56:5]; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + sfdin__h589257[56:5]; 2'b10: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - out_sfd__h589995; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + out_sfd__h589996; 2'b11: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - _theResult___sfd__h589992; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + _theResult___sfd__h589993; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -37149,28 +37149,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10852; endcase end - always@(guard__h590105 or - _theResult___snd__h598041 or _theResult___sfd__h598776) + always@(guard__h590106 or + _theResult___snd__h598042 or _theResult___sfd__h598777) begin - case (guard__h590105) + case (guard__h590106) 2'b0: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225 = - _theResult___snd__h598041[56:5]; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225 = + _theResult___snd__h598042[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225 = - _theResult___sfd__h598776; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225 = + _theResult___sfd__h598777; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h598041 or + _theResult___snd__h598042 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868 or - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225) + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = - _theResult___snd__h598041[56:5]; + _theResult___snd__h598042[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870; @@ -37179,25 +37179,25 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = 52'd0; endcase end - always@(guard__h590105 or - _theResult___snd__h598041 or - out_sfd__h598779 or _theResult___sfd__h598776) + always@(guard__h590106 or + _theResult___snd__h598042 or + out_sfd__h598780 or _theResult___sfd__h598777) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - _theResult___snd__h598041[56:5]; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + _theResult___snd__h598042[56:5]; 2'b10: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - out_sfd__h598779; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + out_sfd__h598780; 2'b11: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - _theResult___sfd__h598776; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + _theResult___sfd__h598777; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -38346,7 +38346,7 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[13:11], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[9:0] }; - 6'd21, 6'd22, 6'd29: + 6'd21: data_warl_xformed__h722429 = { 52'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], @@ -38356,6 +38356,21 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[5:3], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[1:0] }; + 6'd22, 6'd29: + data_warl_xformed__h722429 = + { 52'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[9], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[7], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[5], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[3], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[1], + 1'd0 }; 6'd32, 6'd33, 6'd34, 6'd35: data_warl_xformed__h722429 = 64'd0; 6'd37: data_warl_xformed__h722429 = @@ -41253,7 +41268,7 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] != 5'd19 && rob$deqPort_1_deq_data[329:325] != 5'd20) $write("instret:%0d PC:0x%0h instr:0x%08h", - commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, + commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, rob$deqPort_1_deq_data[425:362], rob$deqPort_1_deq_data[361:330], " iType:"); @@ -41412,7 +41427,7 @@ module mkCore(CLK, $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h603883 == 2'd0) + v__h603884 == 2'd0) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); end // synopsys translate_on diff --git a/src_SSITH_P3/Verilog_RTL/mkCoreW.v b/src_SSITH_P3/Verilog_RTL/mkCoreW.v index ea0a6ee..bb0d3be 100644 --- a/src_SSITH_P3/Verilog_RTL/mkCoreW.v +++ b/src_SSITH_P3/Verilog_RTL/mkCoreW.v @@ -2716,22 +2716,22 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_rl_dm_hart0_reset_wait assign CAN_FIRE_RL_rl_dm_hart0_reset_wait = (rg_hart0_reset_delay != 8'd1 || - debug_module$RDY_hart0_reset_client_response_put && - proc$RDY_start) && + proc$RDY_start && + debug_module$RDY_hart0_reset_client_response_put) && rg_hart0_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_dm_hart0_reset_wait = CAN_FIRE_RL_rl_dm_hart0_reset_wait && !EN_start ; // rule RL_ClientServerRequest assign CAN_FIRE_RL_ClientServerRequest = - debug_module$RDY_hart0_client_run_halt_request_get && - proc$RDY_hart0_run_halt_server_request_put ; + proc$RDY_hart0_run_halt_server_request_put && + debug_module$RDY_hart0_client_run_halt_request_get ; assign WILL_FIRE_RL_ClientServerRequest = CAN_FIRE_RL_ClientServerRequest ; // rule RL_ClientServerResponse assign CAN_FIRE_RL_ClientServerResponse = - debug_module$RDY_hart0_client_run_halt_response_put && - proc$RDY_hart0_run_halt_server_response_get ; + proc$RDY_hart0_run_halt_server_response_get && + debug_module$RDY_hart0_client_run_halt_response_put ; assign WILL_FIRE_RL_ClientServerResponse = CAN_FIRE_RL_ClientServerResponse ; @@ -2743,25 +2743,25 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_mkConnectionGetPut_1 assign CAN_FIRE_RL_mkConnectionGetPut_1 = - v_td2_to_td_0$RDY_in_put && proc$RDY_v_to_TV_0_get ; + proc$RDY_v_to_TV_0_get && v_td2_to_td_0$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_1 = CAN_FIRE_RL_mkConnectionGetPut_1 ; // rule RL_mkConnectionGetPut_2 assign CAN_FIRE_RL_mkConnectionGetPut_2 = - v_td2_to_td_0$RDY_out_get && tv_encode$RDY_v_cpu_in_0_put ; + tv_encode$RDY_v_cpu_in_0_put && v_td2_to_td_0$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_2 = CAN_FIRE_RL_mkConnectionGetPut_2 ; // rule RL_mkConnectionGetPut_3 assign CAN_FIRE_RL_mkConnectionGetPut_3 = - v_td2_to_td_1$RDY_in_put && proc$RDY_v_to_TV_1_get ; + proc$RDY_v_to_TV_1_get && v_td2_to_td_1$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_3 = CAN_FIRE_RL_mkConnectionGetPut_3 ; // rule RL_mkConnectionGetPut_4 assign CAN_FIRE_RL_mkConnectionGetPut_4 = - v_td2_to_td_1$RDY_out_get && tv_encode$RDY_v_cpu_in_1_put ; + tv_encode$RDY_v_cpu_in_1_put && v_td2_to_td_1$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_4 = CAN_FIRE_RL_mkConnectionGetPut_4 ; diff --git a/src_SSITH_P3/Verilog_RTL/mkP3_Core.v b/src_SSITH_P3/Verilog_RTL/mkP3_Core.v index 1b6b7c2..b1f7022 100644 --- a/src_SSITH_P3/Verilog_RTL/mkP3_Core.v +++ b/src_SSITH_P3/Verilog_RTL/mkP3_Core.v @@ -1434,7 +1434,7 @@ module mkP3_Core(CLK, // rule RL_rl_ndm_reset_wait assign CAN_FIRE_RL_rl_ndm_reset_wait = (rg_ndm_reset_delay != 8'd1 || - corew$RDY_ndm_reset_client_response_put && corew$RDY_start) && + corew$RDY_start && corew$RDY_ndm_reset_client_response_put) && rg_ndm_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_ndm_reset_wait = CAN_FIRE_RL_rl_ndm_reset_wait ; diff --git a/src_SSITH_P3/Verilog_RTL_sim/mkCore.v b/src_SSITH_P3/Verilog_RTL_sim/mkCore.v index 4003cc5..a81d1dc 100644 --- a/src_SSITH_P3/Verilog_RTL_sim/mkCore.v +++ b/src_SSITH_P3/Verilog_RTL_sim/mkCore.v @@ -4560,36 +4560,36 @@ module mkCore(CLK, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10059, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2972, - addr__h294421, - curData__h195853, - data_out__h747341, + addr__h294422, + curData__h195854, + data_out__h747098, data_warl_xformed__h731607, rVal1__h615388, rVal1__h640614, trap_val__h719427, - x__h200592, + x__h200593, x__h732275; reg [51 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q20, - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q217, - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q218, - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q219, - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q220, - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q205, - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q206, - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q207, - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q208, - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q209, - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q210, - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q221, - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q222, - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q223, - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q224, - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q225, - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q226, - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q215, - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q216, + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q217, + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q218, + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q219, + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q220, + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q205, + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q206, + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q207, + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q208, + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q209, + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q210, + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q221, + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q222, + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q223, + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q224, + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q225, + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q226, + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q215, + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q216, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759, @@ -4601,45 +4601,45 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989; reg [31 : 0] SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_073_ETC___d1356, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_31_TO_0_ETC___d1408; - reg [22 : 0] CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83, - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q84, - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87, - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q88, - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89, - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q90, - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120, - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q121, - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50, - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q51, - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118, - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q119, - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48, - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q49, - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122, - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q123, - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52, - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q53, - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124, - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q125, - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54, - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q55, - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85, - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q86, - _theResult___fst_sfd__h350489, - _theResult___fst_sfd__h359212, - _theResult___fst_sfd__h367794, - _theResult___fst_sfd__h376978, - _theResult___fst_sfd__h385614, - _theResult___fst_sfd__h396188, - _theResult___fst_sfd__h404909, - _theResult___fst_sfd__h413491, - _theResult___fst_sfd__h422675, - _theResult___fst_sfd__h431311, - _theResult___fst_sfd__h441883, - _theResult___fst_sfd__h450604, - _theResult___fst_sfd__h459186, - _theResult___fst_sfd__h468370, - _theResult___fst_sfd__h477006; + reg [22 : 0] CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83, + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q84, + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87, + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q88, + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89, + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q90, + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120, + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q121, + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50, + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q51, + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118, + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q119, + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48, + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q49, + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122, + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q123, + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52, + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q53, + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124, + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q125, + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54, + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q55, + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85, + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q86, + _theResult___fst_sfd__h350490, + _theResult___fst_sfd__h359213, + _theResult___fst_sfd__h367795, + _theResult___fst_sfd__h376979, + _theResult___fst_sfd__h385615, + _theResult___fst_sfd__h396189, + _theResult___fst_sfd__h404910, + _theResult___fst_sfd__h413492, + _theResult___fst_sfd__h422676, + _theResult___fst_sfd__h431312, + _theResult___fst_sfd__h441884, + _theResult___fst_sfd__h450605, + _theResult___fst_sfd__h459187, + _theResult___fst_sfd__h468371, + _theResult___fst_sfd__h477007; reg [20 : 0] CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_15_ETC__q286, CASE_coreFix_aluExe_0_regToExeQfirst_BITS_416_ETC__q231, CASE_coreFix_aluExe_0_rsAludispatchData_BITS__ETC__q283, @@ -4668,24 +4668,24 @@ module mkCore(CLK, reg [10 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19, - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q211, - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q212, - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q213, - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q214, - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q183, - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q184, - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q185, - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q186, - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q187, - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q188, - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q160, - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q161, - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q189, - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q190, - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q191, - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q192, - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q143, - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q144, + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q211, + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q212, + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q213, + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q214, + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q183, + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q184, + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q185, + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q186, + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q187, + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q188, + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q160, + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q161, + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q189, + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q190, + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q191, + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q192, + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q143, + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q144, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688, @@ -4695,47 +4695,47 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918; - reg [7 : 0] CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68, - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q69, - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76, - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q77, - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81, - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q82, - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105, - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q106, - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35, - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q36, - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103, - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q104, - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33, - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q34, - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111, - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q112, - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41, - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q42, - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116, - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q117, - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46, - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q47, - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70, - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q71, + reg [7 : 0] CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68, + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q69, + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76, + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q77, + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81, + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q82, + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105, + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q106, + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35, + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q36, + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103, + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q104, + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33, + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q34, + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111, + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q112, + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41, + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q42, + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116, + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q117, + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46, + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q47, + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70, + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q71, SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_073_ETC___d1381, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_7_TO_0__ETC___d1430, - _theResult___fst_exp__h350488, - _theResult___fst_exp__h359211, - _theResult___fst_exp__h367793, - _theResult___fst_exp__h376977, - _theResult___fst_exp__h385613, - _theResult___fst_exp__h396187, - _theResult___fst_exp__h404908, - _theResult___fst_exp__h413490, - _theResult___fst_exp__h422674, - _theResult___fst_exp__h431310, - _theResult___fst_exp__h441882, - _theResult___fst_exp__h450603, - _theResult___fst_exp__h459185, - _theResult___fst_exp__h468369, - _theResult___fst_exp__h477005; + _theResult___fst_exp__h350489, + _theResult___fst_exp__h359212, + _theResult___fst_exp__h367794, + _theResult___fst_exp__h376978, + _theResult___fst_exp__h385614, + _theResult___fst_exp__h396188, + _theResult___fst_exp__h404909, + _theResult___fst_exp__h413491, + _theResult___fst_exp__h422675, + _theResult___fst_exp__h431311, + _theResult___fst_exp__h441883, + _theResult___fst_exp__h450604, + _theResult___fst_exp__h459186, + _theResult___fst_exp__h468370, + _theResult___fst_exp__h477006; reg [5 : 0] CASE_mmioToPlatform_pRq_enq_x_BITS_37_TO_36_0__ETC__q281, CASE_mmio_cRqQ_data_0_BITS_77_TO_76_0_mmio_cRq_ETC__q9, CASE_mmio_dataReqQ_data_0_BITS_77_TO_76_0_mmio_ETC__q277, @@ -4773,8 +4773,8 @@ module mkCore(CLK, CASE_fetchStagepipelines_0_first_BITS_177_TO__ETC__q233, CASE_fetchStagepipelines_1_first_BITS_177_TO__ETC__q236, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10832, - x__h290200, - x__h295970; + x__h290201, + x__h295971; reg [1 : 0] CASE_commitStage_f_rob_dataD_OUT_BITS_97_TO_9_ETC__q249, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q300, @@ -4813,45 +4813,45 @@ module mkCore(CLK, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q237, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q238, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q242, - CASE_guard04922_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94, - CASE_guard04922_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93, - CASE_guard07808_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, - CASE_guard13852_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96, - CASE_guard13852_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95, - CASE_guard16877_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, - CASE_guard22688_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98, - CASE_guard22688_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97, - CASE_guard37349_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, - CASE_guard37349_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, - CASE_guard41910_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, - CASE_guard41910_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, - CASE_guard46661_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, - CASE_guard46661_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, - CASE_guard50516_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57, - CASE_guard50516_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56, - CASE_guard50617_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129, - CASE_guard50617_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128, - CASE_guard55730_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, - CASE_guard55730_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, - CASE_guard59225_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59, - CASE_guard59225_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58, - CASE_guard59547_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131, - CASE_guard59547_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130, - CASE_guard68155_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61, - CASE_guard68155_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60, - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133, - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132, - CASE_guard76653_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, - CASE_guard76653_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, - CASE_guard76991_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63, - CASE_guard76991_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62, - CASE_guard85965_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, - CASE_guard85965_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, - CASE_guard95034_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, - CASE_guard95034_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, - CASE_guard96215_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92, - CASE_guard96215_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91, - CASE_guard98496_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, + CASE_guard04923_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94, + CASE_guard04923_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93, + CASE_guard07809_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, + CASE_guard13853_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96, + CASE_guard13853_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95, + CASE_guard16878_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, + CASE_guard22689_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98, + CASE_guard22689_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97, + CASE_guard37350_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, + CASE_guard37350_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, + CASE_guard41911_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, + CASE_guard41911_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, + CASE_guard46662_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, + CASE_guard46662_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, + CASE_guard50517_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57, + CASE_guard50517_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56, + CASE_guard50618_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129, + CASE_guard50618_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128, + CASE_guard55731_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, + CASE_guard55731_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, + CASE_guard59226_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59, + CASE_guard59226_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58, + CASE_guard59548_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131, + CASE_guard59548_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130, + CASE_guard68156_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61, + CASE_guard68156_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60, + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133, + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132, + CASE_guard76654_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, + CASE_guard76654_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, + CASE_guard76992_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63, + CASE_guard76992_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62, + CASE_guard85966_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, + CASE_guard85966_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, + CASE_guard95035_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, + CASE_guard95035_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, + CASE_guard96216_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92, + CASE_guard96216_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91, + CASE_guard98497_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, CASE_k77211_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q239, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6546, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559, @@ -4923,25 +4923,25 @@ module mkCore(CLK, wire [517 : 0] SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3042; wire [511 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2240, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3035, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16394; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16400; wire [463 : 0] commitStage_f_rob_data_first__5067_BIT_167_516_ETC___d15239; - wire [457 : 0] rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15606; + wire [457 : 0] rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15612; wire [447 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2037; wire [393 : 0] IF_commitStage_f_rob_data_first__5067_BITS_97__ETC___d15238; wire [383 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2235, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3026, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16385; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16391; wire [321 : 0] basicExec___d12137, basicExec___d12839; wire [319 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2032; wire [255 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2230, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3017, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16376, + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16382, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11191, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11204, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d11197; wire [191 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2027; wire [144 : 0] coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1734; - wire [127 : 0] b__h608063, b__h608139, b__h608240, b__h608252, x__h609064; + wire [127 : 0] b__h608064, b__h608140, b__h608241, b__h608253, x__h609065; wire [68 : 0] execFpuSimple___d11171; wire [65 : 0] IF_IF_mmio_pRsQ_enqReq_lat_1_whas__82_THEN_NOT_ETC___d627, IF_rob_deqPort_0_deq_data__4646_BITS_97_TO_96__ETC___d14819; @@ -4977,24 +4977,24 @@ module mkCore(CLK, IF_coreFix_memExe_lsq_firstLd__285_BIT_96_350__ETC___d1435, IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8, IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15505, - _theResult___fst__h608463, - _theResult___snd__h608464, - a___1__h608077, - a___1__h608468, - a__h607915, + _theResult___fst__h608464, + _theResult___snd__h608465, + a___1__h608078, + a___1__h608469, + a__h607916, amoExec___d882, - b___1__h608078, - b___1__h608529, - b__h607916, + b___1__h608079, + b___1__h608530, + b__h607917, base__h721348, base__h721368, - commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15770, + commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15776, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11260, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divI_ETC___d11261, - data___1__h479506, - data___1__h480400, - data__h478994, - data__h479888, + data___1__h479507, + data___1__h480401, + data__h478995, + data__h479889, fallthrough_pc__h673432, fallthrough_pc__h689940, fcsr_csr__read__h615714, @@ -5008,60 +5008,60 @@ module mkCore(CLK, mip_csr__read__h617589, mstatus_csr__read__h616560, mtvec_csr__read__h617009, - n___1__h201995, - n__h197391, + n___1__h201996, + n__h197392, n__read__h617693, n__read__h617884, - n__read__h6759, - n__read__h736179, + n__read__h6760, + n__read__h735936, next_pc__h731630, pc__h721332, - q___1__h480475, - rVal1__h486685, - rVal2__h486686, - r___1__h480502, - res_data__h342290, - res_data__h342295, - res_data__h387992, - res_data__h387997, - res_data__h433687, - res_data__h433692, - resp_addr__h296398, + q___1__h480476, + rVal1__h486686, + rVal2__h486687, + r___1__h480503, + res_data__h342291, + res_data__h342296, + res_data__h387993, + res_data__h387998, + res_data__h433688, + res_data__h433693, + resp_addr__h296399, rg_tdata1__read__h618544, rob_deqPort_0_deq_data__4646_BITS_425_TO_362_4_ETC___d15496, robdeqPort_0_deq_data_BITS_95_TO_32__q245, satp_csr__read__h616417, scause_csr__read__h616214, scounteren_csr__read__h616076, - shiftData__h184460, + shiftData__h184461, sie_csr__read__h615980, sip_csr__read__h616354, sstatus_csr__read__h615910, stvec_csr__read__h616023, trap_val__h718389, - upd__h3993, - upd__h5310, - upd__h6873, - upd__h736290, + upd__h3994, + upd__h5311, + upd__h6874, + upd__h736047, v__h614197, v__h639578, - x__h155288, - x__h158835, - x__h161649, - x__h163497, - x__h18385, - x__h184367, + x__h155289, + x__h158836, + x__h161650, + x__h163498, + x__h18386, x__h184368, - x__h186792, - x__h20923, - x__h291645, - x__h293499, - x__h46292, - x__h486591, + x__h184369, + x__h186793, + x__h20924, + x__h291646, + x__h293500, + x__h46293, x__h486592, x__h486593, - x__h48828, - x__h608452, + x__h486594, + x__h48829, + x__h608453, x__h623643, x__h623644, x__h646650, @@ -5069,32 +5069,32 @@ module mkCore(CLK, x__h711187, x__h723590, x__h723782, - x__h735673, - x__h739476, - x__h742681, - x_addr__h318495, - x_quotient__h479690, + x__h735430, + x__h739233, + x__h742438, + x_addr__h318496, + x_quotient__h479691, x_reg_ifc__read__h615819, - x_remainder__h479691, + x_remainder__h479692, y__h626401, y__h649115, - y__h740368, - y__h743250, - y_avValue__h183533, - y_avValue__h184214, - y_avValue__h483730, - y_avValue__h484413, - y_avValue__h485090, + y__h740125, + y__h743007, + y_avValue__h183534, + y_avValue__h184215, + y_avValue__h483731, + y_avValue__h484414, + y_avValue__h485091, y_avValue__h615331, y_avValue__h621621, y_avValue__h640559, y_avValue__h644638, y_avValue_new_pc__h721124, y_avValue_new_pc__h721310, - y_avValue_snd_snd_snd_snd_snd_fst__h740391, - y_avValue_snd_snd_snd_snd_snd_fst__h743311, - y_avValue_snd_snd_snd_snd_snd_fst__h743347, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h742663; + y_avValue_snd_snd_snd_snd_snd_fst__h740148, + y_avValue_snd_snd_snd_snd_snd_fst__h743068, + y_avValue_snd_snd_snd_snd_snd_fst__h743104, + y_avValue_snd_snd_snd_snd_snd_snd_snd__h742420; wire [62 : 0] IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10767, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9997, IF_csrf_prv_reg_read__3022_ULE_1_5008_AND_IF_c_ETC___d15232, @@ -5145,7 +5145,7 @@ module mkCore(CLK, r1__read__h620704, r1__read__h620734, r1__read__h620851, - y__h258550; + y__h258551; wire [56 : 0] IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q29, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q64, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q99, @@ -5173,154 +5173,154 @@ module mkCore(CLK, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4658, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6050, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7442, - _theResult____h350506, - _theResult____h368145, - _theResult____h396205, - _theResult____h413842, - _theResult____h441900, - _theResult____h459537, - _theResult____h507798, - _theResult____h546651, - _theResult____h585955, - _theResult___snd__h358628, - _theResult___snd__h358639, - _theResult___snd__h358641, - _theResult___snd__h358651, - _theResult___snd__h358657, - _theResult___snd__h358680, - _theResult___snd__h367224, - _theResult___snd__h367226, - _theResult___snd__h367233, - _theResult___snd__h367239, - _theResult___snd__h367262, - _theResult___snd__h376394, - _theResult___snd__h376405, - _theResult___snd__h376407, - _theResult___snd__h376417, - _theResult___snd__h376423, - _theResult___snd__h376446, - _theResult___snd__h385014, - _theResult___snd__h385028, - _theResult___snd__h385034, - _theResult___snd__h385052, - _theResult___snd__h404325, - _theResult___snd__h404336, - _theResult___snd__h404338, - _theResult___snd__h404348, - _theResult___snd__h404354, - _theResult___snd__h404377, - _theResult___snd__h412921, - _theResult___snd__h412923, - _theResult___snd__h412930, - _theResult___snd__h412936, - _theResult___snd__h412959, - _theResult___snd__h422091, - _theResult___snd__h422102, - _theResult___snd__h422104, - _theResult___snd__h422114, - _theResult___snd__h422120, - _theResult___snd__h422143, - _theResult___snd__h430711, - _theResult___snd__h430725, - _theResult___snd__h430731, - _theResult___snd__h430749, - _theResult___snd__h450020, - _theResult___snd__h450031, - _theResult___snd__h450033, - _theResult___snd__h450043, - _theResult___snd__h450049, - _theResult___snd__h450072, - _theResult___snd__h458616, - _theResult___snd__h458618, - _theResult___snd__h458625, - _theResult___snd__h458631, - _theResult___snd__h458654, - _theResult___snd__h467786, - _theResult___snd__h467797, - _theResult___snd__h467799, - _theResult___snd__h467809, - _theResult___snd__h467815, - _theResult___snd__h467838, - _theResult___snd__h476406, - _theResult___snd__h476420, - _theResult___snd__h476426, - _theResult___snd__h476444, - _theResult___snd__h506408, - _theResult___snd__h506410, - _theResult___snd__h506417, - _theResult___snd__h506423, - _theResult___snd__h506446, - _theResult___snd__h516045, - _theResult___snd__h516056, - _theResult___snd__h516058, - _theResult___snd__h516068, - _theResult___snd__h516074, - _theResult___snd__h516097, - _theResult___snd__h524813, - _theResult___snd__h524827, - _theResult___snd__h524833, - _theResult___snd__h524851, - _theResult___snd__h545261, - _theResult___snd__h545263, - _theResult___snd__h545270, - _theResult___snd__h545276, - _theResult___snd__h545299, - _theResult___snd__h554898, - _theResult___snd__h554909, - _theResult___snd__h554911, - _theResult___snd__h554921, - _theResult___snd__h554927, - _theResult___snd__h554950, - _theResult___snd__h563666, - _theResult___snd__h563680, - _theResult___snd__h563686, - _theResult___snd__h563704, - _theResult___snd__h584565, - _theResult___snd__h584567, - _theResult___snd__h584574, - _theResult___snd__h584580, - _theResult___snd__h584603, - _theResult___snd__h594202, - _theResult___snd__h594213, - _theResult___snd__h594215, - _theResult___snd__h594225, - _theResult___snd__h594231, - _theResult___snd__h594254, - _theResult___snd__h602970, - _theResult___snd__h602984, - _theResult___snd__h602990, - _theResult___snd__h603008, + _theResult____h350507, + _theResult____h368146, + _theResult____h396206, + _theResult____h413843, + _theResult____h441901, + _theResult____h459538, + _theResult____h507799, + _theResult____h546652, + _theResult____h585956, + _theResult___snd__h358629, + _theResult___snd__h358640, + _theResult___snd__h358642, + _theResult___snd__h358652, + _theResult___snd__h358658, + _theResult___snd__h358681, + _theResult___snd__h367225, + _theResult___snd__h367227, + _theResult___snd__h367234, + _theResult___snd__h367240, + _theResult___snd__h367263, + _theResult___snd__h376395, + _theResult___snd__h376406, + _theResult___snd__h376408, + _theResult___snd__h376418, + _theResult___snd__h376424, + _theResult___snd__h376447, + _theResult___snd__h385015, + _theResult___snd__h385029, + _theResult___snd__h385035, + _theResult___snd__h385053, + _theResult___snd__h404326, + _theResult___snd__h404337, + _theResult___snd__h404339, + _theResult___snd__h404349, + _theResult___snd__h404355, + _theResult___snd__h404378, + _theResult___snd__h412922, + _theResult___snd__h412924, + _theResult___snd__h412931, + _theResult___snd__h412937, + _theResult___snd__h412960, + _theResult___snd__h422092, + _theResult___snd__h422103, + _theResult___snd__h422105, + _theResult___snd__h422115, + _theResult___snd__h422121, + _theResult___snd__h422144, + _theResult___snd__h430712, + _theResult___snd__h430726, + _theResult___snd__h430732, + _theResult___snd__h430750, + _theResult___snd__h450021, + _theResult___snd__h450032, + _theResult___snd__h450034, + _theResult___snd__h450044, + _theResult___snd__h450050, + _theResult___snd__h450073, + _theResult___snd__h458617, + _theResult___snd__h458619, + _theResult___snd__h458626, + _theResult___snd__h458632, + _theResult___snd__h458655, + _theResult___snd__h467787, + _theResult___snd__h467798, + _theResult___snd__h467800, + _theResult___snd__h467810, + _theResult___snd__h467816, + _theResult___snd__h467839, + _theResult___snd__h476407, + _theResult___snd__h476421, + _theResult___snd__h476427, + _theResult___snd__h476445, + _theResult___snd__h506409, + _theResult___snd__h506411, + _theResult___snd__h506418, + _theResult___snd__h506424, + _theResult___snd__h506447, + _theResult___snd__h516046, + _theResult___snd__h516057, + _theResult___snd__h516059, + _theResult___snd__h516069, + _theResult___snd__h516075, + _theResult___snd__h516098, + _theResult___snd__h524814, + _theResult___snd__h524828, + _theResult___snd__h524834, + _theResult___snd__h524852, + _theResult___snd__h545262, + _theResult___snd__h545264, + _theResult___snd__h545271, + _theResult___snd__h545277, + _theResult___snd__h545300, + _theResult___snd__h554899, + _theResult___snd__h554910, + _theResult___snd__h554912, + _theResult___snd__h554922, + _theResult___snd__h554928, + _theResult___snd__h554951, + _theResult___snd__h563667, + _theResult___snd__h563681, + _theResult___snd__h563687, + _theResult___snd__h563705, + _theResult___snd__h584566, + _theResult___snd__h584568, + _theResult___snd__h584575, + _theResult___snd__h584581, + _theResult___snd__h584604, + _theResult___snd__h594203, + _theResult___snd__h594214, + _theResult___snd__h594216, + _theResult___snd__h594226, + _theResult___snd__h594232, + _theResult___snd__h594255, + _theResult___snd__h602971, + _theResult___snd__h602985, + _theResult___snd__h602991, + _theResult___snd__h603009, r1__read__h620570, r1__read__h620706, r1__read__h620736, r1__read__h620853, - result__h368758, - result__h414455, - result__h460150, - result__h508411, - result__h547264, - result__h586568, - sfd__h342901, - sfd__h388603, - sfd__h434298, - sfd__h487431, - sfd__h526425, - sfd__h565729, - sfdin__h358611, - sfdin__h376377, - sfdin__h404308, - sfdin__h422074, - sfdin__h450003, - sfdin__h467769, - sfdin__h516028, - sfdin__h554881, - sfdin__h594185, - x__h368855, - x__h414552, - x__h460247, - x__h508506, - x__h547359, - x__h586663; + result__h368759, + result__h414456, + result__h460151, + result__h508412, + result__h547265, + result__h586569, + sfd__h342902, + sfd__h388604, + sfd__h434299, + sfd__h487432, + sfd__h526426, + sfd__h565730, + sfdin__h358612, + sfdin__h376378, + sfdin__h404309, + sfdin__h422075, + sfdin__h450004, + sfdin__h467770, + sfdin__h516029, + sfdin__h554882, + sfdin__h594186, + x__h368856, + x__h414553, + x__h460248, + x__h508507, + x__h547360, + x__h586664; wire [55 : 0] r1__read__h619397, r1__read__h619801, r1__read__h620335, @@ -5337,18 +5337,18 @@ module mkCore(CLK, r1__read__h620708, r1__read__h620742, r1__read__h620859, - sfd__h506475, - sfd__h516126, - sfd__h524886, - sfd__h545328, - sfd__h554979, - sfd__h563739, - sfd__h584632, - sfd__h594283, - sfd__h603043, - value__h351128, - value__h396825, - value__h442520; + sfd__h506476, + sfd__h516127, + sfd__h524887, + sfd__h545329, + sfd__h554980, + sfd__h563740, + sfd__h584633, + sfd__h594284, + sfd__h603044, + value__h351129, + value__h396826, + value__h442521; wire [52 : 0] r1__read__h620576, r1__read__h620685, r1__read__h620710, @@ -5375,66 +5375,66 @@ module mkCore(CLK, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10766, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9287, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9996, - _theResult___fst_sfd__h491385, - _theResult___fst_sfd__h507213, - _theResult___fst_sfd__h507216, - _theResult___fst_sfd__h516864, - _theResult___fst_sfd__h516867, - _theResult___fst_sfd__h525648, - _theResult___fst_sfd__h525651, - _theResult___fst_sfd__h525660, - _theResult___fst_sfd__h525666, - _theResult___fst_sfd__h530238, - _theResult___fst_sfd__h546066, - _theResult___fst_sfd__h546069, - _theResult___fst_sfd__h555717, - _theResult___fst_sfd__h555720, - _theResult___fst_sfd__h564501, - _theResult___fst_sfd__h564504, - _theResult___fst_sfd__h564513, - _theResult___fst_sfd__h564519, - _theResult___fst_sfd__h569542, - _theResult___fst_sfd__h585370, - _theResult___fst_sfd__h585373, - _theResult___fst_sfd__h595021, - _theResult___fst_sfd__h595024, - _theResult___fst_sfd__h603805, - _theResult___fst_sfd__h603808, - _theResult___fst_sfd__h603817, - _theResult___fst_sfd__h603823, - _theResult___sfd__h507113, - _theResult___sfd__h516764, - _theResult___sfd__h525548, - _theResult___sfd__h545966, - _theResult___sfd__h555617, - _theResult___sfd__h564401, - _theResult___sfd__h585270, - _theResult___sfd__h594921, - _theResult___sfd__h603705, - _theResult___snd_fst_sfd__h487385, - _theResult___snd_fst_sfd__h507219, - _theResult___snd_fst_sfd__h525654, - _theResult___snd_fst_sfd__h526379, - _theResult___snd_fst_sfd__h546072, - _theResult___snd_fst_sfd__h564507, - _theResult___snd_fst_sfd__h565683, - _theResult___snd_fst_sfd__h585376, - _theResult___snd_fst_sfd__h603811, - out___1_sfd__h487133, - out___1_sfd__h526127, - out___1_sfd__h565431, - out_sfd__h507116, - out_sfd__h516767, - out_sfd__h525551, - out_sfd__h545969, - out_sfd__h555620, - out_sfd__h564404, - out_sfd__h585273, - out_sfd__h594924, - out_sfd__h603708; + _theResult___fst_sfd__h491386, + _theResult___fst_sfd__h507214, + _theResult___fst_sfd__h507217, + _theResult___fst_sfd__h516865, + _theResult___fst_sfd__h516868, + _theResult___fst_sfd__h525649, + _theResult___fst_sfd__h525652, + _theResult___fst_sfd__h525661, + _theResult___fst_sfd__h525667, + _theResult___fst_sfd__h530239, + _theResult___fst_sfd__h546067, + _theResult___fst_sfd__h546070, + _theResult___fst_sfd__h555718, + _theResult___fst_sfd__h555721, + _theResult___fst_sfd__h564502, + _theResult___fst_sfd__h564505, + _theResult___fst_sfd__h564514, + _theResult___fst_sfd__h564520, + _theResult___fst_sfd__h569543, + _theResult___fst_sfd__h585371, + _theResult___fst_sfd__h585374, + _theResult___fst_sfd__h595022, + _theResult___fst_sfd__h595025, + _theResult___fst_sfd__h603806, + _theResult___fst_sfd__h603809, + _theResult___fst_sfd__h603818, + _theResult___fst_sfd__h603824, + _theResult___sfd__h507114, + _theResult___sfd__h516765, + _theResult___sfd__h525549, + _theResult___sfd__h545967, + _theResult___sfd__h555618, + _theResult___sfd__h564402, + _theResult___sfd__h585271, + _theResult___sfd__h594922, + _theResult___sfd__h603706, + _theResult___snd_fst_sfd__h487386, + _theResult___snd_fst_sfd__h507220, + _theResult___snd_fst_sfd__h525655, + _theResult___snd_fst_sfd__h526380, + _theResult___snd_fst_sfd__h546073, + _theResult___snd_fst_sfd__h564508, + _theResult___snd_fst_sfd__h565684, + _theResult___snd_fst_sfd__h585377, + _theResult___snd_fst_sfd__h603812, + out___1_sfd__h487134, + out___1_sfd__h526128, + out___1_sfd__h565432, + out_sfd__h507117, + out_sfd__h516768, + out_sfd__h525552, + out_sfd__h545970, + out_sfd__h555621, + out_sfd__h564405, + out_sfd__h585274, + out_sfd__h594925, + out_sfd__h603709; wire [50 : 0] r1__read__h619401, r1__read__h620578; wire [49 : 0] r1__read__h620687; - wire [48 : 0] r1__read_BITS_62_TO_14___h739496, + wire [48 : 0] r1__read_BITS_62_TO_14___h739253, r1__read__h619403, r1__read__h620689; wire [46 : 0] r1__read__h619405, r1__read__h620582; @@ -5449,37 +5449,37 @@ module mkCore(CLK, wire [31 : 0] coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q13, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q12, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10, - data78994_BITS_31_TO_0__q11, - data79888_BITS_31_TO_0__q14, + data78995_BITS_31_TO_0__q11, + data79889_BITS_31_TO_0__q14, imm__h662587, r1__read__h619413, r1__read__h620596, - x__h196616, - x__h342305, - x__h388007, - x__h433702, - x__h76237, - x_data__h66086, + x__h196617, + x__h342306, + x__h388008, + x__h433703, + x__h76238, + x_data__h66087, x_data_imm__h684505, x_data_imm__h701171; wire [29 : 0] r1__read__h619415, r1__read__h620598; wire [27 : 0] r1__read__h620600; wire [24 : 0] NOT_fetchStage_pipelines_0_first__2992_BITS_19_ETC___d14442, - sfd__h358709, - sfd__h367291, - sfd__h376475, - sfd__h385087, - sfd__h404406, - sfd__h412988, - sfd__h422172, - sfd__h430784, - sfd__h450101, - sfd__h458683, - sfd__h467867, - sfd__h476479, - value__h492014, - value__h530867, - value__h570171; + sfd__h358710, + sfd__h367292, + sfd__h376476, + sfd__h385088, + sfd__h404407, + sfd__h412989, + sfd__h422173, + sfd__h430785, + sfd__h450102, + sfd__h458684, + sfd__h467868, + sfd__h476480, + value__h492015, + value__h530868, + value__h570172; wire [22 : 0] IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5057, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5059, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6449, @@ -5504,66 +5504,66 @@ module mkCore(CLK, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7862, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7906, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7908, - _theResult___fst_sfd__h359215, - _theResult___fst_sfd__h367797, - _theResult___fst_sfd__h376981, - _theResult___fst_sfd__h385617, - _theResult___fst_sfd__h385626, - _theResult___fst_sfd__h385632, - _theResult___fst_sfd__h404912, - _theResult___fst_sfd__h413494, - _theResult___fst_sfd__h422678, - _theResult___fst_sfd__h431314, - _theResult___fst_sfd__h431323, - _theResult___fst_sfd__h431329, - _theResult___fst_sfd__h450607, - _theResult___fst_sfd__h459189, - _theResult___fst_sfd__h468373, - _theResult___fst_sfd__h477009, - _theResult___fst_sfd__h477018, - _theResult___fst_sfd__h477024, - _theResult___sfd__h359134, - _theResult___sfd__h367716, - _theResult___sfd__h376900, - _theResult___sfd__h385536, - _theResult___sfd__h385638, - _theResult___sfd__h404831, - _theResult___sfd__h413413, - _theResult___sfd__h422597, - _theResult___sfd__h431233, - _theResult___sfd__h431335, - _theResult___sfd__h450526, - _theResult___sfd__h459108, - _theResult___sfd__h468292, - _theResult___sfd__h476928, - _theResult___sfd__h477030, - _theResult___snd_fst_sfd__h342851, - _theResult___snd_fst_sfd__h367800, - _theResult___snd_fst_sfd__h385620, - _theResult___snd_fst_sfd__h388553, - _theResult___snd_fst_sfd__h413497, - _theResult___snd_fst_sfd__h431317, - _theResult___snd_fst_sfd__h434248, - _theResult___snd_fst_sfd__h459192, - _theResult___snd_fst_sfd__h477012, - f1_sfd__h487070, - f2_sfd__h526064, - f3_sfd__h565368, - out_f_sfd__h385915, - out_f_sfd__h431612, - out_f_sfd__h477307, - out_sfd__h359137, - out_sfd__h367719, - out_sfd__h376903, - out_sfd__h385539, - out_sfd__h404834, - out_sfd__h413416, - out_sfd__h422600, - out_sfd__h431236, - out_sfd__h450529, - out_sfd__h459111, - out_sfd__h468295, - out_sfd__h476931; + _theResult___fst_sfd__h359216, + _theResult___fst_sfd__h367798, + _theResult___fst_sfd__h376982, + _theResult___fst_sfd__h385618, + _theResult___fst_sfd__h385627, + _theResult___fst_sfd__h385633, + _theResult___fst_sfd__h404913, + _theResult___fst_sfd__h413495, + _theResult___fst_sfd__h422679, + _theResult___fst_sfd__h431315, + _theResult___fst_sfd__h431324, + _theResult___fst_sfd__h431330, + _theResult___fst_sfd__h450608, + _theResult___fst_sfd__h459190, + _theResult___fst_sfd__h468374, + _theResult___fst_sfd__h477010, + _theResult___fst_sfd__h477019, + _theResult___fst_sfd__h477025, + _theResult___sfd__h359135, + _theResult___sfd__h367717, + _theResult___sfd__h376901, + _theResult___sfd__h385537, + _theResult___sfd__h385639, + _theResult___sfd__h404832, + _theResult___sfd__h413414, + _theResult___sfd__h422598, + _theResult___sfd__h431234, + _theResult___sfd__h431336, + _theResult___sfd__h450527, + _theResult___sfd__h459109, + _theResult___sfd__h468293, + _theResult___sfd__h476929, + _theResult___sfd__h477031, + _theResult___snd_fst_sfd__h342852, + _theResult___snd_fst_sfd__h367801, + _theResult___snd_fst_sfd__h385621, + _theResult___snd_fst_sfd__h388554, + _theResult___snd_fst_sfd__h413498, + _theResult___snd_fst_sfd__h431318, + _theResult___snd_fst_sfd__h434249, + _theResult___snd_fst_sfd__h459193, + _theResult___snd_fst_sfd__h477013, + f1_sfd__h487071, + f2_sfd__h526065, + f3_sfd__h565369, + out_f_sfd__h385916, + out_f_sfd__h431613, + out_f_sfd__h477308, + out_sfd__h359138, + out_sfd__h367720, + out_sfd__h376904, + out_sfd__h385540, + out_sfd__h404835, + out_sfd__h413417, + out_sfd__h422601, + out_sfd__h431237, + out_sfd__h450530, + out_sfd__h459112, + out_sfd__h468296, + out_sfd__h476932; wire [19 : 0] r1__read__h620535; wire [15 : 0] IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_3023_30_ETC___d13059, _theResult____h658376, @@ -5572,7 +5572,7 @@ module mkCore(CLK, pend_ints__h658374, y__h658913; wire [13 : 0] r1__read_BITS_13_TO_0___h658923; - wire [12 : 0] IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15596, + wire [12 : 0] IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15602, fetchStage_pipelines_1_first__3001_BIT_173_383_ETC___d13921, rob_deqPort_0_deq_data__4646_BIT_181_4721_CONC_ETC___d14812; wire [11 : 0] IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10546, @@ -5610,12 +5610,12 @@ module mkCore(CLK, result__h654004, spec_bits__h696596, w__h653948, - x__h368888, - x__h414585, - x__h460280, - x__h508539, - x__h547392, - x__h586696, + x__h368889, + x__h414586, + x__h460281, + x__h508540, + x__h547393, + x__h586697, x__h653952, x__h654003, y__h653982, @@ -5644,102 +5644,102 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q140, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q157, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q180, - _theResult___exp__h507112, - _theResult___exp__h516763, - _theResult___exp__h525547, - _theResult___exp__h545965, - _theResult___exp__h555616, - _theResult___exp__h564400, - _theResult___exp__h585269, - _theResult___exp__h594920, - _theResult___exp__h603704, - _theResult___fst_exp__h491384, - _theResult___fst_exp__h506448, - _theResult___fst_exp__h506454, - _theResult___fst_exp__h506457, - _theResult___fst_exp__h507212, - _theResult___fst_exp__h507215, - _theResult___fst_exp__h516034, - _theResult___fst_exp__h516099, - _theResult___fst_exp__h516105, - _theResult___fst_exp__h516108, - _theResult___fst_exp__h516863, - _theResult___fst_exp__h516866, - _theResult___fst_exp__h524819, - _theResult___fst_exp__h524858, - _theResult___fst_exp__h524864, - _theResult___fst_exp__h524867, - _theResult___fst_exp__h525647, - _theResult___fst_exp__h525650, - _theResult___fst_exp__h525659, - _theResult___fst_exp__h525662, - _theResult___fst_exp__h530237, - _theResult___fst_exp__h545301, - _theResult___fst_exp__h545307, - _theResult___fst_exp__h545310, - _theResult___fst_exp__h546065, - _theResult___fst_exp__h546068, - _theResult___fst_exp__h554887, - _theResult___fst_exp__h554952, - _theResult___fst_exp__h554958, - _theResult___fst_exp__h554961, - _theResult___fst_exp__h555716, - _theResult___fst_exp__h555719, - _theResult___fst_exp__h563672, - _theResult___fst_exp__h563711, - _theResult___fst_exp__h563717, - _theResult___fst_exp__h563720, - _theResult___fst_exp__h564500, - _theResult___fst_exp__h564503, - _theResult___fst_exp__h564512, - _theResult___fst_exp__h564515, - _theResult___fst_exp__h569541, - _theResult___fst_exp__h584605, - _theResult___fst_exp__h584611, - _theResult___fst_exp__h584614, - _theResult___fst_exp__h585369, - _theResult___fst_exp__h585372, - _theResult___fst_exp__h594191, - _theResult___fst_exp__h594256, - _theResult___fst_exp__h594262, - _theResult___fst_exp__h594265, - _theResult___fst_exp__h595020, - _theResult___fst_exp__h595023, - _theResult___fst_exp__h602976, - _theResult___fst_exp__h603015, - _theResult___fst_exp__h603021, - _theResult___fst_exp__h603024, - _theResult___fst_exp__h603804, - _theResult___fst_exp__h603807, - _theResult___fst_exp__h603816, - _theResult___fst_exp__h603819, - _theResult___snd_fst_exp__h507218, - _theResult___snd_fst_exp__h525653, - _theResult___snd_fst_exp__h546071, - _theResult___snd_fst_exp__h564506, - _theResult___snd_fst_exp__h585375, - _theResult___snd_fst_exp__h603810, + _theResult___exp__h507113, + _theResult___exp__h516764, + _theResult___exp__h525548, + _theResult___exp__h545966, + _theResult___exp__h555617, + _theResult___exp__h564401, + _theResult___exp__h585270, + _theResult___exp__h594921, + _theResult___exp__h603705, + _theResult___fst_exp__h491385, + _theResult___fst_exp__h506449, + _theResult___fst_exp__h506455, + _theResult___fst_exp__h506458, + _theResult___fst_exp__h507213, + _theResult___fst_exp__h507216, + _theResult___fst_exp__h516035, + _theResult___fst_exp__h516100, + _theResult___fst_exp__h516106, + _theResult___fst_exp__h516109, + _theResult___fst_exp__h516864, + _theResult___fst_exp__h516867, + _theResult___fst_exp__h524820, + _theResult___fst_exp__h524859, + _theResult___fst_exp__h524865, + _theResult___fst_exp__h524868, + _theResult___fst_exp__h525648, + _theResult___fst_exp__h525651, + _theResult___fst_exp__h525660, + _theResult___fst_exp__h525663, + _theResult___fst_exp__h530238, + _theResult___fst_exp__h545302, + _theResult___fst_exp__h545308, + _theResult___fst_exp__h545311, + _theResult___fst_exp__h546066, + _theResult___fst_exp__h546069, + _theResult___fst_exp__h554888, + _theResult___fst_exp__h554953, + _theResult___fst_exp__h554959, + _theResult___fst_exp__h554962, + _theResult___fst_exp__h555717, + _theResult___fst_exp__h555720, + _theResult___fst_exp__h563673, + _theResult___fst_exp__h563712, + _theResult___fst_exp__h563718, + _theResult___fst_exp__h563721, + _theResult___fst_exp__h564501, + _theResult___fst_exp__h564504, + _theResult___fst_exp__h564513, + _theResult___fst_exp__h564516, + _theResult___fst_exp__h569542, + _theResult___fst_exp__h584606, + _theResult___fst_exp__h584612, + _theResult___fst_exp__h584615, + _theResult___fst_exp__h585370, + _theResult___fst_exp__h585373, + _theResult___fst_exp__h594192, + _theResult___fst_exp__h594257, + _theResult___fst_exp__h594263, + _theResult___fst_exp__h594266, + _theResult___fst_exp__h595021, + _theResult___fst_exp__h595024, + _theResult___fst_exp__h602977, + _theResult___fst_exp__h603016, + _theResult___fst_exp__h603022, + _theResult___fst_exp__h603025, + _theResult___fst_exp__h603805, + _theResult___fst_exp__h603808, + _theResult___fst_exp__h603817, + _theResult___fst_exp__h603820, + _theResult___snd_fst_exp__h507219, + _theResult___snd_fst_exp__h525654, + _theResult___snd_fst_exp__h546072, + _theResult___snd_fst_exp__h564507, + _theResult___snd_fst_exp__h585376, + _theResult___snd_fst_exp__h603811, coreFix_fpuMulDivExe_0_fpuExec_double_divresp_ETC__q72, coreFix_fpuMulDivExe_0_fpuExec_double_fmaresp_ETC__q37, coreFix_fpuMulDivExe_0_fpuExec_double_sqrtres_ETC__q107, - din_inc___2_exp__h525707, - din_inc___2_exp__h525742, - din_inc___2_exp__h525768, - din_inc___2_exp__h564560, - din_inc___2_exp__h564595, - din_inc___2_exp__h564621, - din_inc___2_exp__h603864, - din_inc___2_exp__h603899, - din_inc___2_exp__h603925, - out_exp__h507115, - out_exp__h516766, - out_exp__h525550, - out_exp__h545968, - out_exp__h555619, - out_exp__h564403, - out_exp__h585272, - out_exp__h594923, - out_exp__h603707; + din_inc___2_exp__h525708, + din_inc___2_exp__h525743, + din_inc___2_exp__h525769, + din_inc___2_exp__h564561, + din_inc___2_exp__h564596, + din_inc___2_exp__h564622, + din_inc___2_exp__h603865, + din_inc___2_exp__h603900, + din_inc___2_exp__h603926, + out_exp__h507116, + out_exp__h516767, + out_exp__h525551, + out_exp__h545969, + out_exp__h555620, + out_exp__h564404, + out_exp__h585273, + out_exp__h594924, + out_exp__h603708; wire [8 : 0] IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4972, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6364, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7756; @@ -5770,123 +5770,123 @@ module mkCore(CLK, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q78, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q43, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q113, - _theResult___exp__h359133, - _theResult___exp__h367715, - _theResult___exp__h376899, - _theResult___exp__h385535, - _theResult___exp__h385637, - _theResult___exp__h404830, - _theResult___exp__h413412, - _theResult___exp__h422596, - _theResult___exp__h431232, - _theResult___exp__h431334, - _theResult___exp__h450525, - _theResult___exp__h459107, - _theResult___exp__h468291, - _theResult___exp__h476927, - _theResult___exp__h477029, - _theResult___fst_exp__h358617, - _theResult___fst_exp__h358682, - _theResult___fst_exp__h358688, - _theResult___fst_exp__h358691, - _theResult___fst_exp__h359214, - _theResult___fst_exp__h367264, - _theResult___fst_exp__h367270, - _theResult___fst_exp__h367273, - _theResult___fst_exp__h367796, - _theResult___fst_exp__h376383, - _theResult___fst_exp__h376448, - _theResult___fst_exp__h376454, - _theResult___fst_exp__h376457, - _theResult___fst_exp__h376980, - _theResult___fst_exp__h385020, - _theResult___fst_exp__h385059, - _theResult___fst_exp__h385065, - _theResult___fst_exp__h385068, - _theResult___fst_exp__h385616, - _theResult___fst_exp__h385625, - _theResult___fst_exp__h385628, - _theResult___fst_exp__h404314, - _theResult___fst_exp__h404379, - _theResult___fst_exp__h404385, - _theResult___fst_exp__h404388, - _theResult___fst_exp__h404911, - _theResult___fst_exp__h412961, - _theResult___fst_exp__h412967, - _theResult___fst_exp__h412970, - _theResult___fst_exp__h413493, - _theResult___fst_exp__h422080, - _theResult___fst_exp__h422145, - _theResult___fst_exp__h422151, - _theResult___fst_exp__h422154, - _theResult___fst_exp__h422677, - _theResult___fst_exp__h430717, - _theResult___fst_exp__h430756, - _theResult___fst_exp__h430762, - _theResult___fst_exp__h430765, - _theResult___fst_exp__h431313, - _theResult___fst_exp__h431322, - _theResult___fst_exp__h431325, - _theResult___fst_exp__h450009, - _theResult___fst_exp__h450074, - _theResult___fst_exp__h450080, - _theResult___fst_exp__h450083, - _theResult___fst_exp__h450606, - _theResult___fst_exp__h458656, - _theResult___fst_exp__h458662, - _theResult___fst_exp__h458665, - _theResult___fst_exp__h459188, - _theResult___fst_exp__h467775, - _theResult___fst_exp__h467840, - _theResult___fst_exp__h467846, - _theResult___fst_exp__h467849, - _theResult___fst_exp__h468372, - _theResult___fst_exp__h476412, - _theResult___fst_exp__h476451, - _theResult___fst_exp__h476457, - _theResult___fst_exp__h476460, - _theResult___fst_exp__h477008, - _theResult___fst_exp__h477017, - _theResult___fst_exp__h477020, - _theResult___snd_fst_exp__h367799, - _theResult___snd_fst_exp__h385619, - _theResult___snd_fst_exp__h413496, - _theResult___snd_fst_exp__h431316, - _theResult___snd_fst_exp__h459191, - _theResult___snd_fst_exp__h477011, - din_inc___2_exp__h385650, - din_inc___2_exp__h385674, - din_inc___2_exp__h385704, - din_inc___2_exp__h385728, - din_inc___2_exp__h431347, - din_inc___2_exp__h431371, - din_inc___2_exp__h431401, - din_inc___2_exp__h431425, - din_inc___2_exp__h477042, - din_inc___2_exp__h477066, - din_inc___2_exp__h477096, - din_inc___2_exp__h477120, - f1_exp87069_MINUS_127__q136, - f1_exp__h487069, - f2_exp26063_MINUS_127__q176, - f2_exp__h526063, - f3_exp65367_MINUS_127__q153, - f3_exp__h565367, - out_exp__h359136, - out_exp__h367718, - out_exp__h376902, - out_exp__h385538, - out_exp__h404833, - out_exp__h413415, - out_exp__h422599, - out_exp__h431235, - out_exp__h450528, - out_exp__h459110, - out_exp__h468294, - out_exp__h476930, - out_f_exp__h385914, - out_f_exp__h431611, - out_f_exp__h477306, + _theResult___exp__h359134, + _theResult___exp__h367716, + _theResult___exp__h376900, + _theResult___exp__h385536, + _theResult___exp__h385638, + _theResult___exp__h404831, + _theResult___exp__h413413, + _theResult___exp__h422597, + _theResult___exp__h431233, + _theResult___exp__h431335, + _theResult___exp__h450526, + _theResult___exp__h459108, + _theResult___exp__h468292, + _theResult___exp__h476928, + _theResult___exp__h477030, + _theResult___fst_exp__h358618, + _theResult___fst_exp__h358683, + _theResult___fst_exp__h358689, + _theResult___fst_exp__h358692, + _theResult___fst_exp__h359215, + _theResult___fst_exp__h367265, + _theResult___fst_exp__h367271, + _theResult___fst_exp__h367274, + _theResult___fst_exp__h367797, + _theResult___fst_exp__h376384, + _theResult___fst_exp__h376449, + _theResult___fst_exp__h376455, + _theResult___fst_exp__h376458, + _theResult___fst_exp__h376981, + _theResult___fst_exp__h385021, + _theResult___fst_exp__h385060, + _theResult___fst_exp__h385066, + _theResult___fst_exp__h385069, + _theResult___fst_exp__h385617, + _theResult___fst_exp__h385626, + _theResult___fst_exp__h385629, + _theResult___fst_exp__h404315, + _theResult___fst_exp__h404380, + _theResult___fst_exp__h404386, + _theResult___fst_exp__h404389, + _theResult___fst_exp__h404912, + _theResult___fst_exp__h412962, + _theResult___fst_exp__h412968, + _theResult___fst_exp__h412971, + _theResult___fst_exp__h413494, + _theResult___fst_exp__h422081, + _theResult___fst_exp__h422146, + _theResult___fst_exp__h422152, + _theResult___fst_exp__h422155, + _theResult___fst_exp__h422678, + _theResult___fst_exp__h430718, + _theResult___fst_exp__h430757, + _theResult___fst_exp__h430763, + _theResult___fst_exp__h430766, + _theResult___fst_exp__h431314, + _theResult___fst_exp__h431323, + _theResult___fst_exp__h431326, + _theResult___fst_exp__h450010, + _theResult___fst_exp__h450075, + _theResult___fst_exp__h450081, + _theResult___fst_exp__h450084, + _theResult___fst_exp__h450607, + _theResult___fst_exp__h458657, + _theResult___fst_exp__h458663, + _theResult___fst_exp__h458666, + _theResult___fst_exp__h459189, + _theResult___fst_exp__h467776, + _theResult___fst_exp__h467841, + _theResult___fst_exp__h467847, + _theResult___fst_exp__h467850, + _theResult___fst_exp__h468373, + _theResult___fst_exp__h476413, + _theResult___fst_exp__h476452, + _theResult___fst_exp__h476458, + _theResult___fst_exp__h476461, + _theResult___fst_exp__h477009, + _theResult___fst_exp__h477018, + _theResult___fst_exp__h477021, + _theResult___snd_fst_exp__h367800, + _theResult___snd_fst_exp__h385620, + _theResult___snd_fst_exp__h413497, + _theResult___snd_fst_exp__h431317, + _theResult___snd_fst_exp__h459192, + _theResult___snd_fst_exp__h477012, + din_inc___2_exp__h385651, + din_inc___2_exp__h385675, + din_inc___2_exp__h385705, + din_inc___2_exp__h385729, + din_inc___2_exp__h431348, + din_inc___2_exp__h431372, + din_inc___2_exp__h431402, + din_inc___2_exp__h431426, + din_inc___2_exp__h477043, + din_inc___2_exp__h477067, + din_inc___2_exp__h477097, + din_inc___2_exp__h477121, + f1_exp87070_MINUS_127__q136, + f1_exp__h487070, + f2_exp26064_MINUS_127__q176, + f2_exp__h526064, + f3_exp65368_MINUS_127__q153, + f3_exp__h565368, + out_exp__h359137, + out_exp__h367719, + out_exp__h376903, + out_exp__h385539, + out_exp__h404834, + out_exp__h413416, + out_exp__h422600, + out_exp__h431236, + out_exp__h450529, + out_exp__h459111, + out_exp__h468295, + out_exp__h476931, + out_f_exp__h385915, + out_f_exp__h431612, + out_f_exp__h477307, x__h619372; wire [5 : 0] IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4347, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5739, @@ -5907,11 +5907,11 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4578, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7362, IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2176, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16420, - x__h184589, + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16426, + x__h184590, x__h721363; wire [4 : 0] IF_fetchStage_pipelines_1_first__3001_BITS_194_ETC___d14613, - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d15988, + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d15994, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5269, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6661, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d8053, @@ -5929,25 +5929,25 @@ module mkCore(CLK, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d8065, checkForException___d13243, checkForException___d13943, - fflags__h737833, - fflags__h740546, - fflags__h743227, - old_fflags__h742653, - po_fflags__h737818, - po_fflags__h740531, + fflags__h737590, + fflags__h740303, + fflags__h742984, + old_fflags__h742410, + po_fflags__h737575, + po_fflags__h740288, r1__read__h620938, - res_fflags__h342291, - res_fflags__h387993, - res_fflags__h433688, + res_fflags__h342292, + res_fflags__h387994, + res_fflags__h433689, rob_deqPort_0_deq_data__4646_BIT_166_4662_CONC_ETC___d14711, rs1__h662586, - x__h155282, - x__h158829, - x__h161645, - x__h291633, - y_avValue_fst__h739906, - y_avValue_fst__h743132, - y_avValue_fst__h743164; + x__h155283, + x__h158830, + x__h161646, + x__h291634, + y_avValue_fst__h739663, + y_avValue_fst__h742889, + y_avValue_fst__h742921; wire [3 : 0] IF_IF_coreFix_memExe_dTlb_procResp__742_BIT_18_ETC___d1879, IF_IF_coreFix_memExe_dTlb_procResp__742_BIT_18_ETC___d1881, IF_IF_coreFix_memExe_dTlb_procResp__742_BIT_18_ETC___d1883, @@ -5979,72 +5979,72 @@ module mkCore(CLK, wire [2 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2571, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2890, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1220, - _theResult_____2__h300942, + _theResult_____2__h300943, dcsr_cause__h717907, - next_deqP___1__h301221, - v__h300362, - v__h300593, - x__h306572, + next_deqP___1__h301222, + v__h300363, + v__h300594, + x__h306573, x_decodeInfo_frm__h662270; wire [1 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2886, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1216, - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d16007, - IF_sfdin04308_BIT_33_THEN_2_ELSE_0__q65, - IF_sfdin16028_BIT_4_THEN_2_ELSE_0__q139, - IF_sfdin22074_BIT_33_THEN_2_ELSE_0__q75, - IF_sfdin50003_BIT_33_THEN_2_ELSE_0__q100, - IF_sfdin54881_BIT_4_THEN_2_ELSE_0__q179, - IF_sfdin58611_BIT_33_THEN_2_ELSE_0__q30, - IF_sfdin67769_BIT_33_THEN_2_ELSE_0__q110, - IF_sfdin76377_BIT_33_THEN_2_ELSE_0__q40, - IF_sfdin94185_BIT_4_THEN_2_ELSE_0__q156, - IF_theResult___snd02970_BIT_4_THEN_2_ELSE_0__q159, - IF_theResult___snd06408_BIT_4_THEN_2_ELSE_0__q135, - IF_theResult___snd12921_BIT_33_THEN_2_ELSE_0__q67, - IF_theResult___snd24813_BIT_4_THEN_2_ELSE_0__q142, - IF_theResult___snd30711_BIT_33_THEN_2_ELSE_0__q80, - IF_theResult___snd45261_BIT_4_THEN_2_ELSE_0__q175, - IF_theResult___snd58616_BIT_33_THEN_2_ELSE_0__q102, - IF_theResult___snd63666_BIT_4_THEN_2_ELSE_0__q182, - IF_theResult___snd67224_BIT_33_THEN_2_ELSE_0__q32, - IF_theResult___snd76406_BIT_33_THEN_2_ELSE_0__q115, - IF_theResult___snd84565_BIT_4_THEN_2_ELSE_0__q152, - IF_theResult___snd85014_BIT_33_THEN_2_ELSE_0__q45, - guard__h350516, - guard__h359225, - guard__h368155, - guard__h376991, - guard__h396215, - guard__h404922, - guard__h413852, - guard__h422688, - guard__h441910, - guard__h450617, - guard__h459547, - guard__h468383, - guard__h498496, - guard__h507808, - guard__h516877, - guard__h537349, - guard__h546661, - guard__h555730, - guard__h576653, - guard__h585965, - guard__h595034, - prv__h744896, - prv__h744940, + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d16013, + IF_sfdin04309_BIT_33_THEN_2_ELSE_0__q65, + IF_sfdin16029_BIT_4_THEN_2_ELSE_0__q139, + IF_sfdin22075_BIT_33_THEN_2_ELSE_0__q75, + IF_sfdin50004_BIT_33_THEN_2_ELSE_0__q100, + IF_sfdin54882_BIT_4_THEN_2_ELSE_0__q179, + IF_sfdin58612_BIT_33_THEN_2_ELSE_0__q30, + IF_sfdin67770_BIT_33_THEN_2_ELSE_0__q110, + IF_sfdin76378_BIT_33_THEN_2_ELSE_0__q40, + IF_sfdin94186_BIT_4_THEN_2_ELSE_0__q156, + IF_theResult___snd02971_BIT_4_THEN_2_ELSE_0__q159, + IF_theResult___snd06409_BIT_4_THEN_2_ELSE_0__q135, + IF_theResult___snd12922_BIT_33_THEN_2_ELSE_0__q67, + IF_theResult___snd24814_BIT_4_THEN_2_ELSE_0__q142, + IF_theResult___snd30712_BIT_33_THEN_2_ELSE_0__q80, + IF_theResult___snd45262_BIT_4_THEN_2_ELSE_0__q175, + IF_theResult___snd58617_BIT_33_THEN_2_ELSE_0__q102, + IF_theResult___snd63667_BIT_4_THEN_2_ELSE_0__q182, + IF_theResult___snd67225_BIT_33_THEN_2_ELSE_0__q32, + IF_theResult___snd76407_BIT_33_THEN_2_ELSE_0__q115, + IF_theResult___snd84566_BIT_4_THEN_2_ELSE_0__q152, + IF_theResult___snd85015_BIT_33_THEN_2_ELSE_0__q45, + guard__h350517, + guard__h359226, + guard__h368156, + guard__h376992, + guard__h396216, + guard__h404923, + guard__h413853, + guard__h422689, + guard__h441911, + guard__h450618, + guard__h459548, + guard__h468384, + guard__h498497, + guard__h507809, + guard__h516878, + guard__h537350, + guard__h546662, + guard__h555731, + guard__h576654, + guard__h585966, + guard__h595035, + prv__h744653, + prv__h744697, r1__read_BITS_13_TO_12___h662455, - sbIdx__h158708, - v__h609134, - v__h609144, - v__h610175, + sbIdx__h158709, + v__h609135, + v__h609145, + v__h610176, x__h731805, - x__h743491, + x__h743248, x_prv__h721432, x_prv__h732255, - y_avValue_snd_snd_snd_fst__h740381, - y_avValue_snd_snd_snd_fst__h743301, - y_avValue_snd_snd_snd_fst__h743337; + y_avValue_snd_snd_snd_fst__h740138, + y_avValue_snd_snd_snd_fst__h743058, + y_avValue_snd_snd_snd_fst__h743094; wire IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5169, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5219, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6561, @@ -6124,7 +6124,7 @@ module mkCore(CLK, IF_NOT_fetchStage_pipelines_0_canDeq__2990_299_ETC___d14161, IF_NOT_fetchStage_pipelines_1_first__3001_BITS_ETC___d14076, IF_NOT_fetchStage_pipelines_1_first__3001_BITS_ETC___d14160, - IF_NOT_rob_deqPort_1_deq_data__5642_BIT_25_564_ETC___d15998, + IF_NOT_rob_deqPort_1_deq_data__5648_BIT_25_564_ETC___d16004, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10051, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10587, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10820, @@ -6247,7 +6247,7 @@ module mkCore(CLK, IF_mmio_dataRespQ_enqReq_lat_1_whas__92_THEN_m_ETC___d201, IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmio_p_ETC___d642, IF_mmio_pRsQ_enqReq_lat_1_whas__82_THEN_mmio_p_ETC___d491, - IF_rob_deqPort_1_canDeq__5639_THEN_IF_NOT_rob__ETC___d15999, + IF_rob_deqPort_1_canDeq__5645_THEN_IF_NOT_rob__ETC___d16005, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5321, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5349, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d6713, @@ -6257,7 +6257,7 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_302_ETC___d13579, NOT_IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_302_ETC___d13668, NOT_IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_302_ETC___d13970, - NOT_IF_NOT_rob_deqPort_0_canDeq__5634_5635_OR__ETC___d16004, + NOT_IF_NOT_rob_deqPort_0_canDeq__5640_5641_OR__ETC___d16010, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10880, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10922, @@ -6277,7 +6277,7 @@ module mkCore(CLK, NOT_commitStage_commitTrap_4654_BIT_36_4901_49_ETC___d15007, NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15316, NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15327, - NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15688, + NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15694, NOT_coreFix_aluExe_0_bypassWire_0_whas__2410_2_ETC___d12437, NOT_coreFix_aluExe_0_bypassWire_0_whas__2410_2_ETC___d12467, NOT_coreFix_aluExe_1_bypassWire_0_whas__1522_1_ETC___d11549, @@ -6393,10 +6393,10 @@ module mkCore(CLK, NOT_renameStage_rg_m_halt_req_3019_BIT_4_3020__ETC___d13981, NOT_renameStage_rg_m_halt_req_3019_BIT_4_3020__ETC___d14123, NOT_renameStage_rg_m_halt_req_3019_BIT_4_3020__ETC___d14141, - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_RDY_ETC___d15676, - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_deq_ETC___d15982, + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_RDY_ETC___d15682, + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_deq_ETC___d15988, NOT_rob_deqPort_0_deq_data__4646_BITS_329_TO_3_ETC___d15305, - NOT_rob_deqPort_1_deq_data__5642_BIT_25_5643_5_ETC___d15673, + NOT_rob_deqPort_1_deq_data__5648_BIT_25_5649_5_ETC___d15679, NOT_specTagManager_canClaim__3651_3737_OR_NOT__ETC___d14252, NOT_specTagManager_canClaim__3651_3737_OR_NOT__ETC___d14319, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247, @@ -6492,11 +6492,11 @@ module mkCore(CLK, _dor1sbAggr$EN_setReady_3_put, _dor1sbCons$EN_setReady_0_put, _dor1sbCons$EN_setReady_1_put, - _theResult_____2__h308938, - _theResult_____2__h314932, - _theResult_____2__h322786, - _theResult_____2__h333130, - _theResult_____2__h336355, + _theResult_____2__h308939, + _theResult_____2__h314933, + _theResult_____2__h322787, + _theResult_____2__h333131, + _theResult_____2__h336356, commitStage_commitTrap_4654_BIT_36_4901_AND_co_ETC___d14966, coreFix_aluExe_0_bypassWire_0_wget__2411_BITS__ETC___d12413, coreFix_aluExe_0_bypassWire_0_wget__2411_BITS__ETC___d12454, @@ -6623,7 +6623,7 @@ module mkCore(CLK, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13979, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d14121, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d14139, - f_csr_rsps_i_notFull__6114_AND_f_csr_reqs_firs_ETC___d16217, + f_csr_rsps_i_notFull__6120_AND_f_csr_reqs_firs_ETC___d16223, fetchStage_RDY_pipelines_1_deq__3004_AND_NOT_f_ETC___d14323, fetchStage_pipelines_0_canDeq__2990_AND_NOT_fe_ETC___d14263, fetchStage_pipelines_0_canDeq__2990_AND_NOT_fe_ETC___d14345, @@ -6648,12 +6648,12 @@ module mkCore(CLK, fetchStage_pipelines_0_first__2992_BIT_68_3021_ETC___d14080, fetchStage_pipelines_1_first__3001_BITS_194_TO_ETC___d14218, fetchStage_pipelines_1_first__3001_BITS_199_TO_ETC___d14230, - guard__h368753, - guard__h414450, - guard__h460145, - guard__h508406, - guard__h547259, - guard__h586563, + guard__h368754, + guard__h414451, + guard__h460146, + guard__h508407, + guard__h547260, + guard__h586564, idx__h693568, k__h677211, mmio_cRqQ_enqReq_dummy2_2_read__32_AND_IF_mmio_ETC___d444, @@ -6668,12 +6668,12 @@ module mkCore(CLK, mmio_pRqQ_empty_53_AND_epochManager_checkEpoch_ETC___d14339, mmio_pRqQ_enqReq_dummy2_2_read__35_AND_IF_mmio_ETC___d747, mmio_pRsQ_enqReq_dummy2_2_read__94_AND_IF_mmio_ETC___d606, - msip__h76122, - next_deqP___1__h309217, - next_deqP___1__h315498, - next_deqP___1__h323352, - next_deqP___1__h333409, - next_deqP___1__h336634, + msip__h76123, + next_deqP___1__h309218, + next_deqP___1__h315499, + next_deqP___1__h323353, + next_deqP___1__h333410, + next_deqP___1__h336635, r1__read_BIT_20___h663151, regRenamingTable_RDY_rename_0_getRename__3535__ETC___d13544, regRenamingTable_RDY_rename_0_getRename__3535__ETC___d14186, @@ -6703,21 +6703,21 @@ module mkCore(CLK, renameStage_rg_m_halt_req_3019_BIT_4_3020_OR_f_ETC___d14044, renameStage_rg_m_halt_req_3019_BIT_4_3020_OR_f_ETC___d14085, renameStage_rg_m_halt_req_3019_BIT_4_3020_OR_f_ETC___d14165, - rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16053, + rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16059, rob_RDY_deqPort_0_deq__4643_AND_rob_RDY_deqPor_ETC___d15310, - tsr_val__h735793, - tvm_val__h735795, - v__h303707, - v__h304225, - v__h314221, - v__h314452, - v__h318097, - v__h318328, - v__h332698, - v__h332929, - v__h335923, - v__h336154, - x__h608478; + tsr_val__h735550, + tvm_val__h735552, + v__h303708, + v__h304226, + v__h314222, + v__h314453, + v__h318098, + v__h318329, + v__h332699, + v__h332930, + v__h335924, + v__h336155, + x__h608479; // action method coreReq_start assign RDY_coreReq_start = 1'd1 ; @@ -6758,7 +6758,7 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q265, !CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q266, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16394 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16400 } ; assign RDY_dCacheToParent_rsToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_empty ; @@ -6778,7 +6778,7 @@ module mkCore(CLK, assign dCacheToParent_rqToP_first = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q273, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q274, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16420 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16426 } ; assign RDY_dCacheToParent_rqToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_empty ; @@ -9978,7 +9978,7 @@ module mkCore(CLK, // rule RL_readyToFetch assign CAN_FIRE_RL_readyToFetch = fetchStage$RDY_done_flushing && - rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16053 && + rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16059 && !flush_brpred && fetchStage$iMemIfc_flush_done && fetchStage$flush_predictors_done ; @@ -10075,7 +10075,7 @@ module mkCore(CLK, // rule RL_rl_debug_csr_write assign CAN_FIRE_RL_rl_debug_csr_write = f_csr_reqs$EMPTY_N && - f_csr_rsps_i_notFull__6114_AND_f_csr_reqs_firs_ETC___d16217 && + f_csr_rsps_i_notFull__6120_AND_f_csr_reqs_firs_ETC___d16223 && rg_core_run_state == 2'd1 && f_csr_reqs$D_OUT[76] ; assign WILL_FIRE_RL_rl_debug_csr_write = CAN_FIRE_RL_rl_debug_csr_write ; @@ -10537,8 +10537,8 @@ module mkCore(CLK, // rule RL_commitStage_doCommitNormalInst assign CAN_FIRE_RL_commitStage_doCommitNormalInst = rob$RDY_deqPort_0_deq_data && - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_RDY_ETC___d15676 && - NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15688 ; + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_RDY_ETC___d15682 && + NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15694 ; assign WILL_FIRE_RL_commitStage_doCommitNormalInst = CAN_FIRE_RL_commitStage_doCommitNormalInst && !WILL_FIRE_RL_commitStage_rl_send_tv_reset ; @@ -11859,7 +11859,7 @@ module mkCore(CLK, f_csr_reqs$D_OUT[75:64] == 12'd836 ; assign MUX_csrf_fflags_reg$write_1__SEL_1 = WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5634_5635_OR__ETC___d16004 ; + NOT_IF_NOT_rob_deqPort_0_canDeq__5640_5641_OR__ETC___d16010 ; assign MUX_csrf_fflags_reg$write_1__SEL_2 = WILL_FIRE_RL_commitStage_doCommitSystemInst && rob$deqPort_0_deq_data[329:325] == 5'd13 && @@ -12149,7 +12149,7 @@ module mkCore(CLK, assign MUX_commitStage_rg_serial_num$write_1__VAL_1 = commitStage_rg_serial_num + 64'd1 ; assign MUX_commitStage_rg_serial_num$write_1__VAL_3 = - commitStage_rg_serial_num + y__h743250 ; + commitStage_rg_serial_num + y__h743007 ; assign MUX_coreFix_aluExe_0_rsAlu$enq_1__VAL_1 = { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2992_BITS_194_ETC___d13118, @@ -12275,7 +12275,7 @@ module mkCore(CLK, IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2037, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd0) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$deqWrite_2__VAL_4 = { IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2791, @@ -12289,10 +12289,10 @@ module mkCore(CLK, assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_1 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq[147:84], - x__h290200 } ; + x__h290201 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_2 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, - x__h291645, + x__h291646, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_3 = { 518'h1AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, @@ -12300,7 +12300,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_4 = { 2'd2, - addr__h294421, + addr__h294422, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3042 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_processAmo$write_1__VAL_1 = { 1'd1, @@ -12313,12 +12313,12 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getSucc } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_1 = - { x__h155282, x__h155288, 84'h82AAAAAAAAAAAAAAAAAAA } ; + { x__h155283, x__h155289, 84'h82AAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_2 = - { x__h158829, x__h158835, 84'hCAAAAAAAAAAAAAAAAAAAA } ; + { x__h158830, x__h158836, 84'hCAAAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_3 = - { x__h161645, - x__h161649, + { x__h161646, + x__h161650, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1216, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1220, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1224, @@ -12329,7 +12329,7 @@ module mkCore(CLK, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1246, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1250, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1255, - x__h163497, + x__h163498, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1263, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1267, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1271, @@ -12342,7 +12342,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[576:574] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, - resp_addr__h296398, + resp_addr__h296399, 2'd0, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getData } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_2 = @@ -12350,8 +12350,8 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getRq, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getData } ; assign MUX_coreFix_memExe_dTlb$updateVMInfo_1__VAL_1 = - { prv__h744940, - prv__h744940 != 2'd3 && csrf_vm_mode_sv39_reg, + { prv__h744697, + prv__h744697 != 2'd3 && csrf_vm_mode_sv39_reg, csrf_mxr_reg, csrf_sum_reg, csrf_ppn_reg } ; @@ -12428,7 +12428,7 @@ module mkCore(CLK, assign MUX_coreFix_memExe_memRespLdQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[152:148], - x__h200592 } ; + x__h200593 } ; assign MUX_coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wset_1__VAL_1 = { 5'd0, coreFix_memExe_lsq$firstSt[141:78], @@ -12463,8 +12463,8 @@ module mkCore(CLK, assign MUX_coreFix_memExe_respLrScAmoQ_enqReq_lat_0$wset_1__VAL_3 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_processAmo[6] ? - curData__h195853 : - { {32{x__h196616[31]}}, x__h196616 } } ; + curData__h195854 : + { {32{x__h196617[31]}}, x__h196617 } } ; assign MUX_coreFix_trainBPQ_0$enq_1__VAL_1 = { coreFix_aluExe_0_exeToFinQ$first[146:19], coreFix_aluExe_0_exeToFinQ$first[326:322], @@ -12497,7 +12497,7 @@ module mkCore(CLK, MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_1 || MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_2 ; assign MUX_csrf_fflags_reg$write_1__VAL_1 = - csrf_fflags_reg | fflags__h743227 ; + csrf_fflags_reg | fflags__h742984 ; assign MUX_csrf_frm_reg$write_1__VAL_1 = (IF_rob_deqPort_0_deq_data__4646_BIT_181_4721_T_ETC___d15295 == 6'd1) ? @@ -12540,9 +12540,9 @@ module mkCore(CLK, assign MUX_csrf_minstret_ehr_data_lat_0$wset_1__VAL_2 = rob$deqPort_0_deq_data[95:32] ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 = - n__read__h736179 + 64'd1 ; + n__read__h735936 + 64'd1 ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 = - n__read__h736179 + { 62'd0, x__h743491 } ; + n__read__h735936 + { 62'd0, x__h743248 } ; assign MUX_csrf_mpp_reg$write_1__VAL_1 = (rob$deqPort_0_deq_data[329:325] == 5'd13 && IF_rob_deqPort_0_deq_data__4646_BIT_181_4721_T_ETC___d15295 == @@ -12589,7 +12589,7 @@ module mkCore(CLK, 6'd18) && MUX_csrf_sepc_csr$write_1__VAL_1[8] ; assign MUX_csrf_stval_csr$write_1__VAL_1 = rob$deqPort_0_deq_data[95:32] ; - assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h747341 } ; + assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h747098 } ; assign MUX_f_fpr_rsps$enq_1__VAL_3 = { 1'd1, rf$read_4_rd1 } ; assign MUX_fetchStage$iTlbIfc_updateVMInfo_1__VAL_1 = { csrf_prv_reg, @@ -12638,24 +12638,24 @@ module mkCore(CLK, 56'hAAAAAAAAAAAAAA } ; assign MUX_rf$write_2_wr_2__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? - res_data__h342295 : - res_data__h342290 ; + res_data__h342296 : + res_data__h342291 ; assign MUX_rf$write_2_wr_2__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? - res_data__h387997 : - res_data__h387992 ; + res_data__h387998 : + res_data__h387993 ; assign MUX_rf$write_2_wr_2__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? - res_data__h433692 : - res_data__h433687 ; + res_data__h433693 : + res_data__h433688 ; assign MUX_rf$write_2_wr_2__VAL_5 = coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[33] ? - data___1__h479506 : - data__h478994 ; + data___1__h479507 : + data__h478995 ; assign MUX_rf$write_2_wr_2__VAL_6 = coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[33] ? - data___1__h480400 : - data__h479888 ; + data___1__h480401 : + data__h479889 ; assign MUX_rf$write_3_wr_2__VAL_4 = coreFix_memExe_lsq$firstLd[100] ? coreFix_memExe_respLrScAmoQ_data_0 : @@ -12724,15 +12724,15 @@ module mkCore(CLK, assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] : - res_fflags__h342291 ; + res_fflags__h342292 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] : - res_fflags__h387993 ; + res_fflags__h387994 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] : - res_fflags__h433688 ; + res_fflags__h433689 ; assign MUX_v_f_to_TV_0$enq_1__VAL_1 = { commitStage_rg_serial_num, 77'h0AAAAAAAAAAAAAAAAAAA, @@ -12748,9 +12748,9 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4646_BIT_166_4662_CONC_ETC___d14711, rob$deqPort_0_deq_data[161:98], IF_rob_deqPort_0_deq_data__4646_BITS_97_TO_96__ETC___d14819, - fflags__h737833, + fflags__h737590, rob$deqPort_0_deq_data[26], - x__h739476, + x__h739233, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign MUX_v_f_to_TV_0$enq_1__VAL_4 = { commitStage_rg_serial_num, @@ -12765,7 +12765,7 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4646_BIT_181_4721_CONC_ETC___d14812, rob$deqPort_0_deq_data[167], rob_deqPort_0_deq_data__4646_BIT_166_4662_CONC_ETC___d14711, - rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15606 } ; + rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15612 } ; // inlined wires assign csrf_minstret_ehr_data_lat_0$whas = @@ -13139,8 +13139,8 @@ module mkCore(CLK, // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$D_IN = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas ? - v__h610175 : - v__h609134 ; + v__h610176 : + v__h609135 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$EN = 1'd1 ; // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned_pipe_0 @@ -13286,7 +13286,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - _theResult_____2__h300942 ; + _theResult_____2__h300943 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl @@ -13308,7 +13308,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - v__h300362 ; + v__h300363 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_rl @@ -13354,7 +13354,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3227 && - _theResult_____2__h308938 ; + _theResult_____2__h308939 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl @@ -13372,7 +13372,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3227 && - v__h303707 ; + v__h303708 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl @@ -13472,7 +13472,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3398 && - _theResult_____2__h314932 ; + _theResult_____2__h314933 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl @@ -13490,7 +13490,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3398 && - v__h314221 ; + v__h314222 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_rl @@ -13511,7 +13511,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0 assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0$D_IN = - { x_addr__h318495, + { x_addr__h318496, coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[514:513] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[514:513], @@ -13541,7 +13541,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3494 && - _theResult_____2__h322786 ; + _theResult_____2__h322787 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl @@ -13559,7 +13559,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3494 && - v__h318097 ; + v__h318098 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl @@ -13636,7 +13636,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_deqP assign coreFix_memExe_forwardQ_deqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3817 && - _theResult_____2__h336355 ; + _theResult_____2__h336356 ; assign coreFix_memExe_forwardQ_deqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_deqReq_rl @@ -13654,7 +13654,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_enqP assign coreFix_memExe_forwardQ_enqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3817 && - v__h335923 ; + v__h335924 ; assign coreFix_memExe_forwardQ_enqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_enqReq_rl @@ -13697,7 +13697,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_deqP assign coreFix_memExe_memRespLdQ_deqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3723 && - _theResult_____2__h333130 ; + _theResult_____2__h333131 ; assign coreFix_memExe_memRespLdQ_deqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_deqReq_rl @@ -13715,7 +13715,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_enqP assign coreFix_memExe_memRespLdQ_enqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3723 && - v__h332698 ; + v__h332699 ; assign coreFix_memExe_memRespLdQ_enqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_enqReq_rl @@ -13971,7 +13971,7 @@ module mkCore(CLK, IF_rob_deqPort_0_deq_data__4646_BIT_181_4721_T_ETC___d15295 == 6'd2) || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5634_5635_OR__ETC___d16004 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5640_5641_OR__ETC___d16010 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd3) ; @@ -14008,7 +14008,7 @@ module mkCore(CLK, assign csrf_fs_reg$EN = MUX_csrf_fs_reg$write_1__SEL_2 || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5634_5635_OR__ETC___d16004 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5640_5641_OR__ETC___d16010 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd2 || @@ -14163,7 +14163,7 @@ module mkCore(CLK, 6'd24 ; // register csrf_mcycle_ehr_data_rl - assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5310 ; + assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5311 ; assign csrf_mcycle_ehr_data_rl$EN = 1'd1 ; // register csrf_medeleg_13_11_reg @@ -14287,7 +14287,7 @@ module mkCore(CLK, // register csrf_minstret_ehr_data_rl assign csrf_minstret_ehr_data_rl$D_IN = csrf_minstret_ehr_data_lat_1$whas ? - upd__h3993 : + upd__h3994 : IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 ; assign csrf_minstret_ehr_data_rl$EN = 1'd1 ; @@ -15071,7 +15071,7 @@ module mkCore(CLK, // register mmio_cRqQ_data_0 assign mmio_cRqQ_data_0$D_IN = - { x__h46292, + { x__h46293, (mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_cRqQ_enqReq_rl[77:76] == 2'd0) ? @@ -15083,7 +15083,7 @@ module mkCore(CLK, mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[71:64] : mmio_cRqQ_enqReq_rl[71:64], - x__h48828 } ; + x__h48829 } ; assign mmio_cRqQ_data_0$EN = NOT_mmio_cRqQ_clearReq_dummy2_1_read__26_27_OR_ETC___d431 && mmio_cRqQ_enqReq_dummy2_2$Q_OUT && @@ -15176,7 +15176,7 @@ module mkCore(CLK, // register mmio_dataReqQ_data_0 assign mmio_dataReqQ_data_0$D_IN = - { x__h18385, + { x__h18386, (mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_dataReqQ_enqReq_rl[77:76] == 2'd0) ? @@ -15188,7 +15188,7 @@ module mkCore(CLK, mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[71:64] : mmio_dataReqQ_enqReq_rl[71:64], - x__h20923 } ; + x__h20924 } ; assign mmio_dataReqQ_data_0$EN = NOT_mmio_dataReqQ_clearReq_dummy2_1_read__35_3_ETC___d140 && mmio_dataReqQ_enqReq_dummy2_2$Q_OUT && @@ -15272,7 +15272,7 @@ module mkCore(CLK, mmio_pRqQ_enqReq_lat_0$wget[32] : mmio_pRqQ_enqReq_rl[32] } : IF_IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmi_ETC___d766, - x_data__h66086 } ; + x_data__h66087 } ; assign mmio_pRqQ_data_0$EN = NOT_mmio_pRqQ_clearReq_dummy2_1_read__29_30_OR_ETC___d734 && mmio_pRqQ_enqReq_dummy2_2$Q_OUT && @@ -16348,12 +16348,12 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$D_IN = - { x__h608452, - b__h607916 == 64'd0, - a__h607915, + { x__h608453, + b__h607917 == 64'd0, + a__h607916, coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0, - x__h608478, - a__h607915[63], + x__h608479, + a__h607916[63], 8'd0 } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$ENQ = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && @@ -16368,8 +16368,8 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$D_IN = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___snd__h608464 : - b__h607916 ; + _theResult___snd__h608465 : + b__h607917 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$ENQ = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && coreFix_fpuMulDivExe_0_regToExeQ$first[245:243] == 3'd3 && @@ -16382,7 +16382,7 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_IN = - { x__h609064, + { x__h609065, coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_dividendQ$D_OUT[75:0] } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$ENQ = CAN_FIRE_RL_coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_compute ; @@ -16463,9 +16463,9 @@ module mkCore(CLK, assign coreFix_fpuMulDivExe_0_regToExeQ$enq_x = { CASE_coreFix_fpuMulDivExe_0_dispToRegQfirst_B_ETC__q299, coreFix_fpuMulDivExe_0_dispToRegQ$first[32:12], - x__h486591, x__h486592, x__h486593, + x__h486594, coreFix_fpuMulDivExe_0_dispToRegQ$first[11:0] } ; assign coreFix_fpuMulDivExe_0_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12933 ; @@ -16675,8 +16675,8 @@ module mkCore(CLK, // submodule coreFix_memExe_dMem_cache_m_banks_0_cRqMshr assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit_r = - { x__h291633, - x__h291645, + { x__h291634, + x__h291646, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2886, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2890, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2894, @@ -16687,13 +16687,13 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2916, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2920, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2925, - x__h293499, + x__h293500, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2933, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2937, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2941, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2945 } ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq_n = - x__h290200 ; + x__h290201 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq_n = (coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[578:577] == 2'd0) ? @@ -17587,7 +17587,7 @@ module mkCore(CLK, assign coreFix_memExe_lsq$updateData_d = (coreFix_memExe_regToExeQ$first[192:190] == 3'd4) ? coreFix_memExe_regToExeQ$first[75:12] : - shiftData__h184460 ; + shiftData__h184461 ; assign coreFix_memExe_lsq$updateData_t = coreFix_memExe_regToExeQ$first[143:140] ; assign coreFix_memExe_lsq$wakeupLdStalledBySB_sbIdx = @@ -17687,8 +17687,8 @@ module mkCore(CLK, assign coreFix_memExe_regToExeQ$enq_x = { coreFix_memExe_dispToRegQ$first[97:63], coreFix_memExe_dispToRegQ$first[29:12], - x__h184367, x__h184368, + x__h184369, coreFix_memExe_dispToRegQ$first[11:0] } ; assign coreFix_memExe_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12933 ; @@ -19757,7 +19757,7 @@ module mkCore(CLK, // submodule v_f_to_TV_1 assign v_f_to_TV_1$D_IN = - { commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15770, + { commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15776, 77'h0AAAAAAAAAAAAAAAAAAA, rob$deqPort_1_deq_data[425:181], CASE_robdeqPort_1_deq_data_BITS_180_TO_169_1__ETC__q301, @@ -19765,9 +19765,9 @@ module mkCore(CLK, rob$deqPort_1_deq_data[161:98], CASE_robdeqPort_1_deq_data_BITS_97_TO_96_0_ro_ETC__q302, rob$deqPort_1_deq_data[95:32], - fflags__h740546, + fflags__h740303, rob$deqPort_1_deq_data[26], - x__h742681, + x__h742438, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign v_f_to_TV_1$ENQ = WILL_FIRE_RL_commitStage_doCommitNormalInst && @@ -19789,15 +19789,15 @@ module mkCore(CLK, // remaining internal signals module_amoExec instance_amoExec_2(.amoExec_amo_inst(coreFix_memExe_dMem_cache_m_banks_0_processAmo[10:4]), - .amoExec_current_data(curData__h195853), + .amoExec_current_data(curData__h195854), .amoExec_in_data(coreFix_memExe_dMem_cache_m_banks_0_processAmo[74:11]), .amoExec_upper_32_bits(coreFix_memExe_dMem_cache_m_banks_0_processAmo[90]), - .amoExec(n__h197391)); + .amoExec(n__h197392)); module_amoExec instance_amoExec_3(.amoExec_amo_inst({ mmio_pRqQ_data_0[35:32], 3'd0 }), .amoExec_current_data({ 63'd0, - msip__h76122 }), - .amoExec_in_data({ 32'd0, x__h76237 }), + msip__h76123 }), + .amoExec_in_data({ 32'd0, x__h76238 }), .amoExec_upper_32_bits(1'd0), .amoExec(amoExec___d882)); module_basicExec instance_basicExec_6(.basicExec_dInst({ coreFix_aluExe_1_regToExeQ$first[421:417], @@ -19841,10 +19841,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h662270, r1__read_BITS_13_TO_12___h662455 != 2'd0, - { prv__h744896, - tvm_val__h735795, + { prv__h744653, + tvm_val__h735552, { r1__read_BIT_20___h663151, - tsr_val__h735793, + tsr_val__h735550, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19871,10 +19871,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h662270, r1__read_BITS_13_TO_12___h662455 != 2'd0, - { prv__h744896, - tvm_val__h735795, + { prv__h744653, + tvm_val__h735552, { r1__read_BIT_20___h663151, - tsr_val__h735793, + tsr_val__h735550, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19888,1196 +19888,1196 @@ module mkCore(CLK, module_execFpuSimple instance_execFpuSimple_4(.execFpuSimple_fpu_inst({ coreFix_fpuMulDivExe_0_regToExeQ$first[233:229], CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q259, coreFix_fpuMulDivExe_0_regToExeQ$first[225] }), - .execFpuSimple_rVal1(rVal1__h486685), - .execFpuSimple_rVal2(rVal2__h486686), + .execFpuSimple_rVal1(rVal1__h486686), + .execFpuSimple_rVal2(rVal2__h486687), .execFpuSimple(execFpuSimple___d11171)); assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q29 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4349 ? - _theResult___snd__h358680 : - _theResult____h350506 ; + _theResult___snd__h358681 : + _theResult____h350507 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q64 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5741 ? - _theResult___snd__h404377 : - _theResult____h396205 ; + _theResult___snd__h404378 : + _theResult____h396206 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q99 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7133 ? - _theResult___snd__h450072 : - _theResult____h441900 ; + _theResult___snd__h450073 : + _theResult____h441901 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9012 ? - _theResult___snd__h516097 : - _theResult____h507798 ; + _theResult___snd__h516098 : + _theResult____h507799 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9727 ? - _theResult___snd__h594254 : - _theResult____h585955 ; + _theResult___snd__h594255 : + _theResult____h585956 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10497 ? - _theResult___snd__h554950 : - _theResult____h546651 ; + _theResult___snd__h554951 : + _theResult____h546652 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q109 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7684 ? - _theResult___snd__h467838 : - _theResult____h459537 ; + _theResult___snd__h467839 : + _theResult____h459538 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q39 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4900 ? - _theResult___snd__h376446 : - _theResult____h368145 ; + _theResult___snd__h376447 : + _theResult____h368146 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q74 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6292 ? - _theResult___snd__h422143 : - _theResult____h413842 ; + _theResult___snd__h422144 : + _theResult____h413843 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8700 ? - _theResult___snd__h506446 : + _theResult___snd__h506447 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9062 ? - _theResult___snd__h506446 : - _theResult___snd__h524851 ; + _theResult___snd__h506447 : + _theResult___snd__h524852 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9430 ? - _theResult___snd__h584603 : + _theResult___snd__h584604 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9777 ? - _theResult___snd__h584603 : - _theResult___snd__h603008 ; + _theResult___snd__h584604 : + _theResult___snd__h603009 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10200 ? - _theResult___snd__h545299 : + _theResult___snd__h545300 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10547 ? - _theResult___snd__h545299 : - _theResult___snd__h563704 ; + _theResult___snd__h545300 : + _theResult___snd__h563705 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q101 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7364 ? - _theResult___snd__h458654 : + _theResult___snd__h458655 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q114 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7757 ? - _theResult___snd__h458654 : - _theResult___snd__h476444 ; + _theResult___snd__h458655 : + _theResult___snd__h476445 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q31 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4580 ? - _theResult___snd__h367262 : + _theResult___snd__h367263 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q44 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4973 ? - _theResult___snd__h367262 : - _theResult___snd__h385052 ; + _theResult___snd__h367263 : + _theResult___snd__h385053 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q66 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5972 ? - _theResult___snd__h412959 : + _theResult___snd__h412960 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q79 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6365 ? - _theResult___snd__h412959 : - _theResult___snd__h430749 ; + _theResult___snd__h412960 : + _theResult___snd__h430750 ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5169 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4113 ? - ((_theResult___fst_exp__h358617 == 8'd255) ? + ((_theResult___fst_exp__h358618 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5154) : - ((_theResult___fst_exp__h367273 == 8'd255) ? + ((_theResult___fst_exp__h367274 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5167) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5219 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4113 ? - ((_theResult___fst_exp__h358617 == 8'd255) ? + ((_theResult___fst_exp__h358618 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5210) : - ((_theResult___fst_exp__h367273 == 8'd255) ? + ((_theResult___fst_exp__h367274 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5217) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6561 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5505 ? - ((_theResult___fst_exp__h404314 == 8'd255) ? + ((_theResult___fst_exp__h404315 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6546) : - ((_theResult___fst_exp__h412970 == 8'd255) ? + ((_theResult___fst_exp__h412971 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6611 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5505 ? - ((_theResult___fst_exp__h404314 == 8'd255) ? + ((_theResult___fst_exp__h404315 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6602) : - ((_theResult___fst_exp__h412970 == 8'd255) ? + ((_theResult___fst_exp__h412971 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6609) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7953 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6897 ? - ((_theResult___fst_exp__h450009 == 8'd255) ? + ((_theResult___fst_exp__h450010 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7938) : - ((_theResult___fst_exp__h458665 == 8'd255) ? + ((_theResult___fst_exp__h458666 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7951) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d8003 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6897 ? - ((_theResult___fst_exp__h450009 == 8'd255) ? + ((_theResult___fst_exp__h450010 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7994) : - ((_theResult___fst_exp__h458665 == 8'd255) ? + ((_theResult___fst_exp__h458666 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8001) ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4347 = - (_theResult____h350506[56] ? + (_theResult____h350507[56] ? 6'd0 : - (_theResult____h350506[55] ? + (_theResult____h350507[55] ? 6'd1 : - (_theResult____h350506[54] ? + (_theResult____h350507[54] ? 6'd2 : - (_theResult____h350506[53] ? + (_theResult____h350507[53] ? 6'd3 : - (_theResult____h350506[52] ? + (_theResult____h350507[52] ? 6'd4 : - (_theResult____h350506[51] ? + (_theResult____h350507[51] ? 6'd5 : - (_theResult____h350506[50] ? + (_theResult____h350507[50] ? 6'd6 : - (_theResult____h350506[49] ? + (_theResult____h350507[49] ? 6'd7 : - (_theResult____h350506[48] ? + (_theResult____h350507[48] ? 6'd8 : - (_theResult____h350506[47] ? + (_theResult____h350507[47] ? 6'd9 : - (_theResult____h350506[46] ? + (_theResult____h350507[46] ? 6'd10 : - (_theResult____h350506[45] ? + (_theResult____h350507[45] ? 6'd11 : - (_theResult____h350506[44] ? + (_theResult____h350507[44] ? 6'd12 : - (_theResult____h350506[43] ? + (_theResult____h350507[43] ? 6'd13 : - (_theResult____h350506[42] ? + (_theResult____h350507[42] ? 6'd14 : - (_theResult____h350506[41] ? + (_theResult____h350507[41] ? 6'd15 : - (_theResult____h350506[40] ? + (_theResult____h350507[40] ? 6'd16 : - (_theResult____h350506[39] ? + (_theResult____h350507[39] ? 6'd17 : - (_theResult____h350506[38] ? + (_theResult____h350507[38] ? 6'd18 : - (_theResult____h350506[37] ? + (_theResult____h350507[37] ? 6'd19 : - (_theResult____h350506[36] ? + (_theResult____h350507[36] ? 6'd20 : - (_theResult____h350506[35] ? + (_theResult____h350507[35] ? 6'd21 : - (_theResult____h350506[34] ? + (_theResult____h350507[34] ? 6'd22 : - (_theResult____h350506[33] ? + (_theResult____h350507[33] ? 6'd23 : - (_theResult____h350506[32] ? + (_theResult____h350507[32] ? 6'd24 : - (_theResult____h350506[31] ? + (_theResult____h350507[31] ? 6'd25 : - (_theResult____h350506[30] ? + (_theResult____h350507[30] ? 6'd26 : - (_theResult____h350506[29] ? + (_theResult____h350507[29] ? 6'd27 : - (_theResult____h350506[28] ? + (_theResult____h350507[28] ? 6'd28 : - (_theResult____h350506[27] ? + (_theResult____h350507[27] ? 6'd29 : - (_theResult____h350506[26] ? + (_theResult____h350507[26] ? 6'd30 : - (_theResult____h350506[25] ? + (_theResult____h350507[25] ? 6'd31 : - (_theResult____h350506[24] ? + (_theResult____h350507[24] ? 6'd32 : - (_theResult____h350506[23] ? + (_theResult____h350507[23] ? 6'd33 : - (_theResult____h350506[22] ? + (_theResult____h350507[22] ? 6'd34 : - (_theResult____h350506[21] ? + (_theResult____h350507[21] ? 6'd35 : - (_theResult____h350506[20] ? + (_theResult____h350507[20] ? 6'd36 : - (_theResult____h350506[19] ? + (_theResult____h350507[19] ? 6'd37 : - (_theResult____h350506[18] ? + (_theResult____h350507[18] ? 6'd38 : - (_theResult____h350506[17] ? + (_theResult____h350507[17] ? 6'd39 : - (_theResult____h350506[16] ? + (_theResult____h350507[16] ? 6'd40 : - (_theResult____h350506[15] ? + (_theResult____h350507[15] ? 6'd41 : - (_theResult____h350506[14] ? + (_theResult____h350507[14] ? 6'd42 : - (_theResult____h350506[13] ? + (_theResult____h350507[13] ? 6'd43 : - (_theResult____h350506[12] ? + (_theResult____h350507[12] ? 6'd44 : - (_theResult____h350506[11] ? + (_theResult____h350507[11] ? 6'd45 : - (_theResult____h350506[10] ? + (_theResult____h350507[10] ? 6'd46 : - (_theResult____h350506[9] ? + (_theResult____h350507[9] ? 6'd47 : - (_theResult____h350506[8] ? + (_theResult____h350507[8] ? 6'd48 : - (_theResult____h350506[7] ? + (_theResult____h350507[7] ? 6'd49 : - (_theResult____h350506[6] ? + (_theResult____h350507[6] ? 6'd50 : - (_theResult____h350506[5] ? + (_theResult____h350507[5] ? 6'd51 : - (_theResult____h350506[4] ? + (_theResult____h350507[4] ? 6'd52 : - (_theResult____h350506[3] ? + (_theResult____h350507[3] ? 6'd53 : - (_theResult____h350506[2] ? + (_theResult____h350507[2] ? 6'd54 : - (_theResult____h350506[1] ? + (_theResult____h350507[1] ? 6'd55 : - (_theResult____h350506[0] ? + (_theResult____h350507[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5739 = - (_theResult____h396205[56] ? + (_theResult____h396206[56] ? 6'd0 : - (_theResult____h396205[55] ? + (_theResult____h396206[55] ? 6'd1 : - (_theResult____h396205[54] ? + (_theResult____h396206[54] ? 6'd2 : - (_theResult____h396205[53] ? + (_theResult____h396206[53] ? 6'd3 : - (_theResult____h396205[52] ? + (_theResult____h396206[52] ? 6'd4 : - (_theResult____h396205[51] ? + (_theResult____h396206[51] ? 6'd5 : - (_theResult____h396205[50] ? + (_theResult____h396206[50] ? 6'd6 : - (_theResult____h396205[49] ? + (_theResult____h396206[49] ? 6'd7 : - (_theResult____h396205[48] ? + (_theResult____h396206[48] ? 6'd8 : - (_theResult____h396205[47] ? + (_theResult____h396206[47] ? 6'd9 : - (_theResult____h396205[46] ? + (_theResult____h396206[46] ? 6'd10 : - (_theResult____h396205[45] ? + (_theResult____h396206[45] ? 6'd11 : - (_theResult____h396205[44] ? + (_theResult____h396206[44] ? 6'd12 : - (_theResult____h396205[43] ? + (_theResult____h396206[43] ? 6'd13 : - (_theResult____h396205[42] ? + (_theResult____h396206[42] ? 6'd14 : - (_theResult____h396205[41] ? + (_theResult____h396206[41] ? 6'd15 : - (_theResult____h396205[40] ? + (_theResult____h396206[40] ? 6'd16 : - (_theResult____h396205[39] ? + (_theResult____h396206[39] ? 6'd17 : - (_theResult____h396205[38] ? + (_theResult____h396206[38] ? 6'd18 : - (_theResult____h396205[37] ? + (_theResult____h396206[37] ? 6'd19 : - (_theResult____h396205[36] ? + (_theResult____h396206[36] ? 6'd20 : - (_theResult____h396205[35] ? + (_theResult____h396206[35] ? 6'd21 : - (_theResult____h396205[34] ? + (_theResult____h396206[34] ? 6'd22 : - (_theResult____h396205[33] ? + (_theResult____h396206[33] ? 6'd23 : - (_theResult____h396205[32] ? + (_theResult____h396206[32] ? 6'd24 : - (_theResult____h396205[31] ? + (_theResult____h396206[31] ? 6'd25 : - (_theResult____h396205[30] ? + (_theResult____h396206[30] ? 6'd26 : - (_theResult____h396205[29] ? + (_theResult____h396206[29] ? 6'd27 : - (_theResult____h396205[28] ? + (_theResult____h396206[28] ? 6'd28 : - (_theResult____h396205[27] ? + (_theResult____h396206[27] ? 6'd29 : - (_theResult____h396205[26] ? + (_theResult____h396206[26] ? 6'd30 : - (_theResult____h396205[25] ? + (_theResult____h396206[25] ? 6'd31 : - (_theResult____h396205[24] ? + (_theResult____h396206[24] ? 6'd32 : - (_theResult____h396205[23] ? + (_theResult____h396206[23] ? 6'd33 : - (_theResult____h396205[22] ? + (_theResult____h396206[22] ? 6'd34 : - (_theResult____h396205[21] ? + (_theResult____h396206[21] ? 6'd35 : - (_theResult____h396205[20] ? + (_theResult____h396206[20] ? 6'd36 : - (_theResult____h396205[19] ? + (_theResult____h396206[19] ? 6'd37 : - (_theResult____h396205[18] ? + (_theResult____h396206[18] ? 6'd38 : - (_theResult____h396205[17] ? + (_theResult____h396206[17] ? 6'd39 : - (_theResult____h396205[16] ? + (_theResult____h396206[16] ? 6'd40 : - (_theResult____h396205[15] ? + (_theResult____h396206[15] ? 6'd41 : - (_theResult____h396205[14] ? + (_theResult____h396206[14] ? 6'd42 : - (_theResult____h396205[13] ? + (_theResult____h396206[13] ? 6'd43 : - (_theResult____h396205[12] ? + (_theResult____h396206[12] ? 6'd44 : - (_theResult____h396205[11] ? + (_theResult____h396206[11] ? 6'd45 : - (_theResult____h396205[10] ? + (_theResult____h396206[10] ? 6'd46 : - (_theResult____h396205[9] ? + (_theResult____h396206[9] ? 6'd47 : - (_theResult____h396205[8] ? + (_theResult____h396206[8] ? 6'd48 : - (_theResult____h396205[7] ? + (_theResult____h396206[7] ? 6'd49 : - (_theResult____h396205[6] ? + (_theResult____h396206[6] ? 6'd50 : - (_theResult____h396205[5] ? + (_theResult____h396206[5] ? 6'd51 : - (_theResult____h396205[4] ? + (_theResult____h396206[4] ? 6'd52 : - (_theResult____h396205[3] ? + (_theResult____h396206[3] ? 6'd53 : - (_theResult____h396205[2] ? + (_theResult____h396206[2] ? 6'd54 : - (_theResult____h396205[1] ? + (_theResult____h396206[1] ? 6'd55 : - (_theResult____h396205[0] ? + (_theResult____h396206[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7131 = - (_theResult____h441900[56] ? + (_theResult____h441901[56] ? 6'd0 : - (_theResult____h441900[55] ? + (_theResult____h441901[55] ? 6'd1 : - (_theResult____h441900[54] ? + (_theResult____h441901[54] ? 6'd2 : - (_theResult____h441900[53] ? + (_theResult____h441901[53] ? 6'd3 : - (_theResult____h441900[52] ? + (_theResult____h441901[52] ? 6'd4 : - (_theResult____h441900[51] ? + (_theResult____h441901[51] ? 6'd5 : - (_theResult____h441900[50] ? + (_theResult____h441901[50] ? 6'd6 : - (_theResult____h441900[49] ? + (_theResult____h441901[49] ? 6'd7 : - (_theResult____h441900[48] ? + (_theResult____h441901[48] ? 6'd8 : - (_theResult____h441900[47] ? + (_theResult____h441901[47] ? 6'd9 : - (_theResult____h441900[46] ? + (_theResult____h441901[46] ? 6'd10 : - (_theResult____h441900[45] ? + (_theResult____h441901[45] ? 6'd11 : - (_theResult____h441900[44] ? + (_theResult____h441901[44] ? 6'd12 : - (_theResult____h441900[43] ? + (_theResult____h441901[43] ? 6'd13 : - (_theResult____h441900[42] ? + (_theResult____h441901[42] ? 6'd14 : - (_theResult____h441900[41] ? + (_theResult____h441901[41] ? 6'd15 : - (_theResult____h441900[40] ? + (_theResult____h441901[40] ? 6'd16 : - (_theResult____h441900[39] ? + (_theResult____h441901[39] ? 6'd17 : - (_theResult____h441900[38] ? + (_theResult____h441901[38] ? 6'd18 : - (_theResult____h441900[37] ? + (_theResult____h441901[37] ? 6'd19 : - (_theResult____h441900[36] ? + (_theResult____h441901[36] ? 6'd20 : - (_theResult____h441900[35] ? + (_theResult____h441901[35] ? 6'd21 : - (_theResult____h441900[34] ? + (_theResult____h441901[34] ? 6'd22 : - (_theResult____h441900[33] ? + (_theResult____h441901[33] ? 6'd23 : - (_theResult____h441900[32] ? + (_theResult____h441901[32] ? 6'd24 : - (_theResult____h441900[31] ? + (_theResult____h441901[31] ? 6'd25 : - (_theResult____h441900[30] ? + (_theResult____h441901[30] ? 6'd26 : - (_theResult____h441900[29] ? + (_theResult____h441901[29] ? 6'd27 : - (_theResult____h441900[28] ? + (_theResult____h441901[28] ? 6'd28 : - (_theResult____h441900[27] ? + (_theResult____h441901[27] ? 6'd29 : - (_theResult____h441900[26] ? + (_theResult____h441901[26] ? 6'd30 : - (_theResult____h441900[25] ? + (_theResult____h441901[25] ? 6'd31 : - (_theResult____h441900[24] ? + (_theResult____h441901[24] ? 6'd32 : - (_theResult____h441900[23] ? + (_theResult____h441901[23] ? 6'd33 : - (_theResult____h441900[22] ? + (_theResult____h441901[22] ? 6'd34 : - (_theResult____h441900[21] ? + (_theResult____h441901[21] ? 6'd35 : - (_theResult____h441900[20] ? + (_theResult____h441901[20] ? 6'd36 : - (_theResult____h441900[19] ? + (_theResult____h441901[19] ? 6'd37 : - (_theResult____h441900[18] ? + (_theResult____h441901[18] ? 6'd38 : - (_theResult____h441900[17] ? + (_theResult____h441901[17] ? 6'd39 : - (_theResult____h441900[16] ? + (_theResult____h441901[16] ? 6'd40 : - (_theResult____h441900[15] ? + (_theResult____h441901[15] ? 6'd41 : - (_theResult____h441900[14] ? + (_theResult____h441901[14] ? 6'd42 : - (_theResult____h441900[13] ? + (_theResult____h441901[13] ? 6'd43 : - (_theResult____h441900[12] ? + (_theResult____h441901[12] ? 6'd44 : - (_theResult____h441900[11] ? + (_theResult____h441901[11] ? 6'd45 : - (_theResult____h441900[10] ? + (_theResult____h441901[10] ? 6'd46 : - (_theResult____h441900[9] ? + (_theResult____h441901[9] ? 6'd47 : - (_theResult____h441900[8] ? + (_theResult____h441901[8] ? 6'd48 : - (_theResult____h441900[7] ? + (_theResult____h441901[7] ? 6'd49 : - (_theResult____h441900[6] ? + (_theResult____h441901[6] ? 6'd50 : - (_theResult____h441900[5] ? + (_theResult____h441901[5] ? 6'd51 : - (_theResult____h441900[4] ? + (_theResult____h441901[4] ? 6'd52 : - (_theResult____h441900[3] ? + (_theResult____h441901[3] ? 6'd53 : - (_theResult____h441900[2] ? + (_theResult____h441901[2] ? 6'd54 : - (_theResult____h441900[1] ? + (_theResult____h441901[1] ? 6'd55 : - (_theResult____h441900[0] ? + (_theResult____h441901[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10495 = - (_theResult____h546651[56] ? + (_theResult____h546652[56] ? 6'd0 : - (_theResult____h546651[55] ? + (_theResult____h546652[55] ? 6'd1 : - (_theResult____h546651[54] ? + (_theResult____h546652[54] ? 6'd2 : - (_theResult____h546651[53] ? + (_theResult____h546652[53] ? 6'd3 : - (_theResult____h546651[52] ? + (_theResult____h546652[52] ? 6'd4 : - (_theResult____h546651[51] ? + (_theResult____h546652[51] ? 6'd5 : - (_theResult____h546651[50] ? + (_theResult____h546652[50] ? 6'd6 : - (_theResult____h546651[49] ? + (_theResult____h546652[49] ? 6'd7 : - (_theResult____h546651[48] ? + (_theResult____h546652[48] ? 6'd8 : - (_theResult____h546651[47] ? + (_theResult____h546652[47] ? 6'd9 : - (_theResult____h546651[46] ? + (_theResult____h546652[46] ? 6'd10 : - (_theResult____h546651[45] ? + (_theResult____h546652[45] ? 6'd11 : - (_theResult____h546651[44] ? + (_theResult____h546652[44] ? 6'd12 : - (_theResult____h546651[43] ? + (_theResult____h546652[43] ? 6'd13 : - (_theResult____h546651[42] ? + (_theResult____h546652[42] ? 6'd14 : - (_theResult____h546651[41] ? + (_theResult____h546652[41] ? 6'd15 : - (_theResult____h546651[40] ? + (_theResult____h546652[40] ? 6'd16 : - (_theResult____h546651[39] ? + (_theResult____h546652[39] ? 6'd17 : - (_theResult____h546651[38] ? + (_theResult____h546652[38] ? 6'd18 : - (_theResult____h546651[37] ? + (_theResult____h546652[37] ? 6'd19 : - (_theResult____h546651[36] ? + (_theResult____h546652[36] ? 6'd20 : - (_theResult____h546651[35] ? + (_theResult____h546652[35] ? 6'd21 : - (_theResult____h546651[34] ? + (_theResult____h546652[34] ? 6'd22 : - (_theResult____h546651[33] ? + (_theResult____h546652[33] ? 6'd23 : - (_theResult____h546651[32] ? + (_theResult____h546652[32] ? 6'd24 : - (_theResult____h546651[31] ? + (_theResult____h546652[31] ? 6'd25 : - (_theResult____h546651[30] ? + (_theResult____h546652[30] ? 6'd26 : - (_theResult____h546651[29] ? + (_theResult____h546652[29] ? 6'd27 : - (_theResult____h546651[28] ? + (_theResult____h546652[28] ? 6'd28 : - (_theResult____h546651[27] ? + (_theResult____h546652[27] ? 6'd29 : - (_theResult____h546651[26] ? + (_theResult____h546652[26] ? 6'd30 : - (_theResult____h546651[25] ? + (_theResult____h546652[25] ? 6'd31 : - (_theResult____h546651[24] ? + (_theResult____h546652[24] ? 6'd32 : - (_theResult____h546651[23] ? + (_theResult____h546652[23] ? 6'd33 : - (_theResult____h546651[22] ? + (_theResult____h546652[22] ? 6'd34 : - (_theResult____h546651[21] ? + (_theResult____h546652[21] ? 6'd35 : - (_theResult____h546651[20] ? + (_theResult____h546652[20] ? 6'd36 : - (_theResult____h546651[19] ? + (_theResult____h546652[19] ? 6'd37 : - (_theResult____h546651[18] ? + (_theResult____h546652[18] ? 6'd38 : - (_theResult____h546651[17] ? + (_theResult____h546652[17] ? 6'd39 : - (_theResult____h546651[16] ? + (_theResult____h546652[16] ? 6'd40 : - (_theResult____h546651[15] ? + (_theResult____h546652[15] ? 6'd41 : - (_theResult____h546651[14] ? + (_theResult____h546652[14] ? 6'd42 : - (_theResult____h546651[13] ? + (_theResult____h546652[13] ? 6'd43 : - (_theResult____h546651[12] ? + (_theResult____h546652[12] ? 6'd44 : - (_theResult____h546651[11] ? + (_theResult____h546652[11] ? 6'd45 : - (_theResult____h546651[10] ? + (_theResult____h546652[10] ? 6'd46 : - (_theResult____h546651[9] ? + (_theResult____h546652[9] ? 6'd47 : - (_theResult____h546651[8] ? + (_theResult____h546652[8] ? 6'd48 : - (_theResult____h546651[7] ? + (_theResult____h546652[7] ? 6'd49 : - (_theResult____h546651[6] ? + (_theResult____h546652[6] ? 6'd50 : - (_theResult____h546651[5] ? + (_theResult____h546652[5] ? 6'd51 : - (_theResult____h546651[4] ? + (_theResult____h546652[4] ? 6'd52 : - (_theResult____h546651[3] ? + (_theResult____h546652[3] ? 6'd53 : - (_theResult____h546651[2] ? + (_theResult____h546652[2] ? 6'd54 : - (_theResult____h546651[1] ? + (_theResult____h546652[1] ? 6'd55 : - (_theResult____h546651[0] ? + (_theResult____h546652[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9010 = - (_theResult____h507798[56] ? + (_theResult____h507799[56] ? 6'd0 : - (_theResult____h507798[55] ? + (_theResult____h507799[55] ? 6'd1 : - (_theResult____h507798[54] ? + (_theResult____h507799[54] ? 6'd2 : - (_theResult____h507798[53] ? + (_theResult____h507799[53] ? 6'd3 : - (_theResult____h507798[52] ? + (_theResult____h507799[52] ? 6'd4 : - (_theResult____h507798[51] ? + (_theResult____h507799[51] ? 6'd5 : - (_theResult____h507798[50] ? + (_theResult____h507799[50] ? 6'd6 : - (_theResult____h507798[49] ? + (_theResult____h507799[49] ? 6'd7 : - (_theResult____h507798[48] ? + (_theResult____h507799[48] ? 6'd8 : - (_theResult____h507798[47] ? + (_theResult____h507799[47] ? 6'd9 : - (_theResult____h507798[46] ? + (_theResult____h507799[46] ? 6'd10 : - (_theResult____h507798[45] ? + (_theResult____h507799[45] ? 6'd11 : - (_theResult____h507798[44] ? + (_theResult____h507799[44] ? 6'd12 : - (_theResult____h507798[43] ? + (_theResult____h507799[43] ? 6'd13 : - (_theResult____h507798[42] ? + (_theResult____h507799[42] ? 6'd14 : - (_theResult____h507798[41] ? + (_theResult____h507799[41] ? 6'd15 : - (_theResult____h507798[40] ? + (_theResult____h507799[40] ? 6'd16 : - (_theResult____h507798[39] ? + (_theResult____h507799[39] ? 6'd17 : - (_theResult____h507798[38] ? + (_theResult____h507799[38] ? 6'd18 : - (_theResult____h507798[37] ? + (_theResult____h507799[37] ? 6'd19 : - (_theResult____h507798[36] ? + (_theResult____h507799[36] ? 6'd20 : - (_theResult____h507798[35] ? + (_theResult____h507799[35] ? 6'd21 : - (_theResult____h507798[34] ? + (_theResult____h507799[34] ? 6'd22 : - (_theResult____h507798[33] ? + (_theResult____h507799[33] ? 6'd23 : - (_theResult____h507798[32] ? + (_theResult____h507799[32] ? 6'd24 : - (_theResult____h507798[31] ? + (_theResult____h507799[31] ? 6'd25 : - (_theResult____h507798[30] ? + (_theResult____h507799[30] ? 6'd26 : - (_theResult____h507798[29] ? + (_theResult____h507799[29] ? 6'd27 : - (_theResult____h507798[28] ? + (_theResult____h507799[28] ? 6'd28 : - (_theResult____h507798[27] ? + (_theResult____h507799[27] ? 6'd29 : - (_theResult____h507798[26] ? + (_theResult____h507799[26] ? 6'd30 : - (_theResult____h507798[25] ? + (_theResult____h507799[25] ? 6'd31 : - (_theResult____h507798[24] ? + (_theResult____h507799[24] ? 6'd32 : - (_theResult____h507798[23] ? + (_theResult____h507799[23] ? 6'd33 : - (_theResult____h507798[22] ? + (_theResult____h507799[22] ? 6'd34 : - (_theResult____h507798[21] ? + (_theResult____h507799[21] ? 6'd35 : - (_theResult____h507798[20] ? + (_theResult____h507799[20] ? 6'd36 : - (_theResult____h507798[19] ? + (_theResult____h507799[19] ? 6'd37 : - (_theResult____h507798[18] ? + (_theResult____h507799[18] ? 6'd38 : - (_theResult____h507798[17] ? + (_theResult____h507799[17] ? 6'd39 : - (_theResult____h507798[16] ? + (_theResult____h507799[16] ? 6'd40 : - (_theResult____h507798[15] ? + (_theResult____h507799[15] ? 6'd41 : - (_theResult____h507798[14] ? + (_theResult____h507799[14] ? 6'd42 : - (_theResult____h507798[13] ? + (_theResult____h507799[13] ? 6'd43 : - (_theResult____h507798[12] ? + (_theResult____h507799[12] ? 6'd44 : - (_theResult____h507798[11] ? + (_theResult____h507799[11] ? 6'd45 : - (_theResult____h507798[10] ? + (_theResult____h507799[10] ? 6'd46 : - (_theResult____h507798[9] ? + (_theResult____h507799[9] ? 6'd47 : - (_theResult____h507798[8] ? + (_theResult____h507799[8] ? 6'd48 : - (_theResult____h507798[7] ? + (_theResult____h507799[7] ? 6'd49 : - (_theResult____h507798[6] ? + (_theResult____h507799[6] ? 6'd50 : - (_theResult____h507798[5] ? + (_theResult____h507799[5] ? 6'd51 : - (_theResult____h507798[4] ? + (_theResult____h507799[4] ? 6'd52 : - (_theResult____h507798[3] ? + (_theResult____h507799[3] ? 6'd53 : - (_theResult____h507798[2] ? + (_theResult____h507799[2] ? 6'd54 : - (_theResult____h507798[1] ? + (_theResult____h507799[1] ? 6'd55 : - (_theResult____h507798[0] ? + (_theResult____h507799[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9725 = - (_theResult____h585955[56] ? + (_theResult____h585956[56] ? 6'd0 : - (_theResult____h585955[55] ? + (_theResult____h585956[55] ? 6'd1 : - (_theResult____h585955[54] ? + (_theResult____h585956[54] ? 6'd2 : - (_theResult____h585955[53] ? + (_theResult____h585956[53] ? 6'd3 : - (_theResult____h585955[52] ? + (_theResult____h585956[52] ? 6'd4 : - (_theResult____h585955[51] ? + (_theResult____h585956[51] ? 6'd5 : - (_theResult____h585955[50] ? + (_theResult____h585956[50] ? 6'd6 : - (_theResult____h585955[49] ? + (_theResult____h585956[49] ? 6'd7 : - (_theResult____h585955[48] ? + (_theResult____h585956[48] ? 6'd8 : - (_theResult____h585955[47] ? + (_theResult____h585956[47] ? 6'd9 : - (_theResult____h585955[46] ? + (_theResult____h585956[46] ? 6'd10 : - (_theResult____h585955[45] ? + (_theResult____h585956[45] ? 6'd11 : - (_theResult____h585955[44] ? + (_theResult____h585956[44] ? 6'd12 : - (_theResult____h585955[43] ? + (_theResult____h585956[43] ? 6'd13 : - (_theResult____h585955[42] ? + (_theResult____h585956[42] ? 6'd14 : - (_theResult____h585955[41] ? + (_theResult____h585956[41] ? 6'd15 : - (_theResult____h585955[40] ? + (_theResult____h585956[40] ? 6'd16 : - (_theResult____h585955[39] ? + (_theResult____h585956[39] ? 6'd17 : - (_theResult____h585955[38] ? + (_theResult____h585956[38] ? 6'd18 : - (_theResult____h585955[37] ? + (_theResult____h585956[37] ? 6'd19 : - (_theResult____h585955[36] ? + (_theResult____h585956[36] ? 6'd20 : - (_theResult____h585955[35] ? + (_theResult____h585956[35] ? 6'd21 : - (_theResult____h585955[34] ? + (_theResult____h585956[34] ? 6'd22 : - (_theResult____h585955[33] ? + (_theResult____h585956[33] ? 6'd23 : - (_theResult____h585955[32] ? + (_theResult____h585956[32] ? 6'd24 : - (_theResult____h585955[31] ? + (_theResult____h585956[31] ? 6'd25 : - (_theResult____h585955[30] ? + (_theResult____h585956[30] ? 6'd26 : - (_theResult____h585955[29] ? + (_theResult____h585956[29] ? 6'd27 : - (_theResult____h585955[28] ? + (_theResult____h585956[28] ? 6'd28 : - (_theResult____h585955[27] ? + (_theResult____h585956[27] ? 6'd29 : - (_theResult____h585955[26] ? + (_theResult____h585956[26] ? 6'd30 : - (_theResult____h585955[25] ? + (_theResult____h585956[25] ? 6'd31 : - (_theResult____h585955[24] ? + (_theResult____h585956[24] ? 6'd32 : - (_theResult____h585955[23] ? + (_theResult____h585956[23] ? 6'd33 : - (_theResult____h585955[22] ? + (_theResult____h585956[22] ? 6'd34 : - (_theResult____h585955[21] ? + (_theResult____h585956[21] ? 6'd35 : - (_theResult____h585955[20] ? + (_theResult____h585956[20] ? 6'd36 : - (_theResult____h585955[19] ? + (_theResult____h585956[19] ? 6'd37 : - (_theResult____h585955[18] ? + (_theResult____h585956[18] ? 6'd38 : - (_theResult____h585955[17] ? + (_theResult____h585956[17] ? 6'd39 : - (_theResult____h585955[16] ? + (_theResult____h585956[16] ? 6'd40 : - (_theResult____h585955[15] ? + (_theResult____h585956[15] ? 6'd41 : - (_theResult____h585955[14] ? + (_theResult____h585956[14] ? 6'd42 : - (_theResult____h585955[13] ? + (_theResult____h585956[13] ? 6'd43 : - (_theResult____h585955[12] ? + (_theResult____h585956[12] ? 6'd44 : - (_theResult____h585955[11] ? + (_theResult____h585956[11] ? 6'd45 : - (_theResult____h585955[10] ? + (_theResult____h585956[10] ? 6'd46 : - (_theResult____h585955[9] ? + (_theResult____h585956[9] ? 6'd47 : - (_theResult____h585955[8] ? + (_theResult____h585956[8] ? 6'd48 : - (_theResult____h585955[7] ? + (_theResult____h585956[7] ? 6'd49 : - (_theResult____h585955[6] ? + (_theResult____h585956[6] ? 6'd50 : - (_theResult____h585955[5] ? + (_theResult____h585956[5] ? 6'd51 : - (_theResult____h585955[4] ? + (_theResult____h585956[4] ? 6'd52 : - (_theResult____h585955[3] ? + (_theResult____h585956[3] ? 6'd53 : - (_theResult____h585955[2] ? + (_theResult____h585956[2] ? 6'd54 : - (_theResult____h585955[1] ? + (_theResult____h585956[1] ? 6'd55 : - (_theResult____h585955[0] ? + (_theResult____h585956[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4898 = - (_theResult____h368145[56] ? + (_theResult____h368146[56] ? 6'd0 : - (_theResult____h368145[55] ? + (_theResult____h368146[55] ? 6'd1 : - (_theResult____h368145[54] ? + (_theResult____h368146[54] ? 6'd2 : - (_theResult____h368145[53] ? + (_theResult____h368146[53] ? 6'd3 : - (_theResult____h368145[52] ? + (_theResult____h368146[52] ? 6'd4 : - (_theResult____h368145[51] ? + (_theResult____h368146[51] ? 6'd5 : - (_theResult____h368145[50] ? + (_theResult____h368146[50] ? 6'd6 : - (_theResult____h368145[49] ? + (_theResult____h368146[49] ? 6'd7 : - (_theResult____h368145[48] ? + (_theResult____h368146[48] ? 6'd8 : - (_theResult____h368145[47] ? + (_theResult____h368146[47] ? 6'd9 : - (_theResult____h368145[46] ? + (_theResult____h368146[46] ? 6'd10 : - (_theResult____h368145[45] ? + (_theResult____h368146[45] ? 6'd11 : - (_theResult____h368145[44] ? + (_theResult____h368146[44] ? 6'd12 : - (_theResult____h368145[43] ? + (_theResult____h368146[43] ? 6'd13 : - (_theResult____h368145[42] ? + (_theResult____h368146[42] ? 6'd14 : - (_theResult____h368145[41] ? + (_theResult____h368146[41] ? 6'd15 : - (_theResult____h368145[40] ? + (_theResult____h368146[40] ? 6'd16 : - (_theResult____h368145[39] ? + (_theResult____h368146[39] ? 6'd17 : - (_theResult____h368145[38] ? + (_theResult____h368146[38] ? 6'd18 : - (_theResult____h368145[37] ? + (_theResult____h368146[37] ? 6'd19 : - (_theResult____h368145[36] ? + (_theResult____h368146[36] ? 6'd20 : - (_theResult____h368145[35] ? + (_theResult____h368146[35] ? 6'd21 : - (_theResult____h368145[34] ? + (_theResult____h368146[34] ? 6'd22 : - (_theResult____h368145[33] ? + (_theResult____h368146[33] ? 6'd23 : - (_theResult____h368145[32] ? + (_theResult____h368146[32] ? 6'd24 : - (_theResult____h368145[31] ? + (_theResult____h368146[31] ? 6'd25 : - (_theResult____h368145[30] ? + (_theResult____h368146[30] ? 6'd26 : - (_theResult____h368145[29] ? + (_theResult____h368146[29] ? 6'd27 : - (_theResult____h368145[28] ? + (_theResult____h368146[28] ? 6'd28 : - (_theResult____h368145[27] ? + (_theResult____h368146[27] ? 6'd29 : - (_theResult____h368145[26] ? + (_theResult____h368146[26] ? 6'd30 : - (_theResult____h368145[25] ? + (_theResult____h368146[25] ? 6'd31 : - (_theResult____h368145[24] ? + (_theResult____h368146[24] ? 6'd32 : - (_theResult____h368145[23] ? + (_theResult____h368146[23] ? 6'd33 : - (_theResult____h368145[22] ? + (_theResult____h368146[22] ? 6'd34 : - (_theResult____h368145[21] ? + (_theResult____h368146[21] ? 6'd35 : - (_theResult____h368145[20] ? + (_theResult____h368146[20] ? 6'd36 : - (_theResult____h368145[19] ? + (_theResult____h368146[19] ? 6'd37 : - (_theResult____h368145[18] ? + (_theResult____h368146[18] ? 6'd38 : - (_theResult____h368145[17] ? + (_theResult____h368146[17] ? 6'd39 : - (_theResult____h368145[16] ? + (_theResult____h368146[16] ? 6'd40 : - (_theResult____h368145[15] ? + (_theResult____h368146[15] ? 6'd41 : - (_theResult____h368145[14] ? + (_theResult____h368146[14] ? 6'd42 : - (_theResult____h368145[13] ? + (_theResult____h368146[13] ? 6'd43 : - (_theResult____h368145[12] ? + (_theResult____h368146[12] ? 6'd44 : - (_theResult____h368145[11] ? + (_theResult____h368146[11] ? 6'd45 : - (_theResult____h368145[10] ? + (_theResult____h368146[10] ? 6'd46 : - (_theResult____h368145[9] ? + (_theResult____h368146[9] ? 6'd47 : - (_theResult____h368145[8] ? + (_theResult____h368146[8] ? 6'd48 : - (_theResult____h368145[7] ? + (_theResult____h368146[7] ? 6'd49 : - (_theResult____h368145[6] ? + (_theResult____h368146[6] ? 6'd50 : - (_theResult____h368145[5] ? + (_theResult____h368146[5] ? 6'd51 : - (_theResult____h368145[4] ? + (_theResult____h368146[4] ? 6'd52 : - (_theResult____h368145[3] ? + (_theResult____h368146[3] ? 6'd53 : - (_theResult____h368145[2] ? + (_theResult____h368146[2] ? 6'd54 : - (_theResult____h368145[1] ? + (_theResult____h368146[1] ? 6'd55 : - (_theResult____h368145[0] ? + (_theResult____h368146[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6290 = - (_theResult____h413842[56] ? + (_theResult____h413843[56] ? 6'd0 : - (_theResult____h413842[55] ? + (_theResult____h413843[55] ? 6'd1 : - (_theResult____h413842[54] ? + (_theResult____h413843[54] ? 6'd2 : - (_theResult____h413842[53] ? + (_theResult____h413843[53] ? 6'd3 : - (_theResult____h413842[52] ? + (_theResult____h413843[52] ? 6'd4 : - (_theResult____h413842[51] ? + (_theResult____h413843[51] ? 6'd5 : - (_theResult____h413842[50] ? + (_theResult____h413843[50] ? 6'd6 : - (_theResult____h413842[49] ? + (_theResult____h413843[49] ? 6'd7 : - (_theResult____h413842[48] ? + (_theResult____h413843[48] ? 6'd8 : - (_theResult____h413842[47] ? + (_theResult____h413843[47] ? 6'd9 : - (_theResult____h413842[46] ? + (_theResult____h413843[46] ? 6'd10 : - (_theResult____h413842[45] ? + (_theResult____h413843[45] ? 6'd11 : - (_theResult____h413842[44] ? + (_theResult____h413843[44] ? 6'd12 : - (_theResult____h413842[43] ? + (_theResult____h413843[43] ? 6'd13 : - (_theResult____h413842[42] ? + (_theResult____h413843[42] ? 6'd14 : - (_theResult____h413842[41] ? + (_theResult____h413843[41] ? 6'd15 : - (_theResult____h413842[40] ? + (_theResult____h413843[40] ? 6'd16 : - (_theResult____h413842[39] ? + (_theResult____h413843[39] ? 6'd17 : - (_theResult____h413842[38] ? + (_theResult____h413843[38] ? 6'd18 : - (_theResult____h413842[37] ? + (_theResult____h413843[37] ? 6'd19 : - (_theResult____h413842[36] ? + (_theResult____h413843[36] ? 6'd20 : - (_theResult____h413842[35] ? + (_theResult____h413843[35] ? 6'd21 : - (_theResult____h413842[34] ? + (_theResult____h413843[34] ? 6'd22 : - (_theResult____h413842[33] ? + (_theResult____h413843[33] ? 6'd23 : - (_theResult____h413842[32] ? + (_theResult____h413843[32] ? 6'd24 : - (_theResult____h413842[31] ? + (_theResult____h413843[31] ? 6'd25 : - (_theResult____h413842[30] ? + (_theResult____h413843[30] ? 6'd26 : - (_theResult____h413842[29] ? + (_theResult____h413843[29] ? 6'd27 : - (_theResult____h413842[28] ? + (_theResult____h413843[28] ? 6'd28 : - (_theResult____h413842[27] ? + (_theResult____h413843[27] ? 6'd29 : - (_theResult____h413842[26] ? + (_theResult____h413843[26] ? 6'd30 : - (_theResult____h413842[25] ? + (_theResult____h413843[25] ? 6'd31 : - (_theResult____h413842[24] ? + (_theResult____h413843[24] ? 6'd32 : - (_theResult____h413842[23] ? + (_theResult____h413843[23] ? 6'd33 : - (_theResult____h413842[22] ? + (_theResult____h413843[22] ? 6'd34 : - (_theResult____h413842[21] ? + (_theResult____h413843[21] ? 6'd35 : - (_theResult____h413842[20] ? + (_theResult____h413843[20] ? 6'd36 : - (_theResult____h413842[19] ? + (_theResult____h413843[19] ? 6'd37 : - (_theResult____h413842[18] ? + (_theResult____h413843[18] ? 6'd38 : - (_theResult____h413842[17] ? + (_theResult____h413843[17] ? 6'd39 : - (_theResult____h413842[16] ? + (_theResult____h413843[16] ? 6'd40 : - (_theResult____h413842[15] ? + (_theResult____h413843[15] ? 6'd41 : - (_theResult____h413842[14] ? + (_theResult____h413843[14] ? 6'd42 : - (_theResult____h413842[13] ? + (_theResult____h413843[13] ? 6'd43 : - (_theResult____h413842[12] ? + (_theResult____h413843[12] ? 6'd44 : - (_theResult____h413842[11] ? + (_theResult____h413843[11] ? 6'd45 : - (_theResult____h413842[10] ? + (_theResult____h413843[10] ? 6'd46 : - (_theResult____h413842[9] ? + (_theResult____h413843[9] ? 6'd47 : - (_theResult____h413842[8] ? + (_theResult____h413843[8] ? 6'd48 : - (_theResult____h413842[7] ? + (_theResult____h413843[7] ? 6'd49 : - (_theResult____h413842[6] ? + (_theResult____h413843[6] ? 6'd50 : - (_theResult____h413842[5] ? + (_theResult____h413843[5] ? 6'd51 : - (_theResult____h413842[4] ? + (_theResult____h413843[4] ? 6'd52 : - (_theResult____h413842[3] ? + (_theResult____h413843[3] ? 6'd53 : - (_theResult____h413842[2] ? + (_theResult____h413843[2] ? 6'd54 : - (_theResult____h413842[1] ? + (_theResult____h413843[1] ? 6'd55 : - (_theResult____h413842[0] ? + (_theResult____h413843[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7682 = - (_theResult____h459537[56] ? + (_theResult____h459538[56] ? 6'd0 : - (_theResult____h459537[55] ? + (_theResult____h459538[55] ? 6'd1 : - (_theResult____h459537[54] ? + (_theResult____h459538[54] ? 6'd2 : - (_theResult____h459537[53] ? + (_theResult____h459538[53] ? 6'd3 : - (_theResult____h459537[52] ? + (_theResult____h459538[52] ? 6'd4 : - (_theResult____h459537[51] ? + (_theResult____h459538[51] ? 6'd5 : - (_theResult____h459537[50] ? + (_theResult____h459538[50] ? 6'd6 : - (_theResult____h459537[49] ? + (_theResult____h459538[49] ? 6'd7 : - (_theResult____h459537[48] ? + (_theResult____h459538[48] ? 6'd8 : - (_theResult____h459537[47] ? + (_theResult____h459538[47] ? 6'd9 : - (_theResult____h459537[46] ? + (_theResult____h459538[46] ? 6'd10 : - (_theResult____h459537[45] ? + (_theResult____h459538[45] ? 6'd11 : - (_theResult____h459537[44] ? + (_theResult____h459538[44] ? 6'd12 : - (_theResult____h459537[43] ? + (_theResult____h459538[43] ? 6'd13 : - (_theResult____h459537[42] ? + (_theResult____h459538[42] ? 6'd14 : - (_theResult____h459537[41] ? + (_theResult____h459538[41] ? 6'd15 : - (_theResult____h459537[40] ? + (_theResult____h459538[40] ? 6'd16 : - (_theResult____h459537[39] ? + (_theResult____h459538[39] ? 6'd17 : - (_theResult____h459537[38] ? + (_theResult____h459538[38] ? 6'd18 : - (_theResult____h459537[37] ? + (_theResult____h459538[37] ? 6'd19 : - (_theResult____h459537[36] ? + (_theResult____h459538[36] ? 6'd20 : - (_theResult____h459537[35] ? + (_theResult____h459538[35] ? 6'd21 : - (_theResult____h459537[34] ? + (_theResult____h459538[34] ? 6'd22 : - (_theResult____h459537[33] ? + (_theResult____h459538[33] ? 6'd23 : - (_theResult____h459537[32] ? + (_theResult____h459538[32] ? 6'd24 : - (_theResult____h459537[31] ? + (_theResult____h459538[31] ? 6'd25 : - (_theResult____h459537[30] ? + (_theResult____h459538[30] ? 6'd26 : - (_theResult____h459537[29] ? + (_theResult____h459538[29] ? 6'd27 : - (_theResult____h459537[28] ? + (_theResult____h459538[28] ? 6'd28 : - (_theResult____h459537[27] ? + (_theResult____h459538[27] ? 6'd29 : - (_theResult____h459537[26] ? + (_theResult____h459538[26] ? 6'd30 : - (_theResult____h459537[25] ? + (_theResult____h459538[25] ? 6'd31 : - (_theResult____h459537[24] ? + (_theResult____h459538[24] ? 6'd32 : - (_theResult____h459537[23] ? + (_theResult____h459538[23] ? 6'd33 : - (_theResult____h459537[22] ? + (_theResult____h459538[22] ? 6'd34 : - (_theResult____h459537[21] ? + (_theResult____h459538[21] ? 6'd35 : - (_theResult____h459537[20] ? + (_theResult____h459538[20] ? 6'd36 : - (_theResult____h459537[19] ? + (_theResult____h459538[19] ? 6'd37 : - (_theResult____h459537[18] ? + (_theResult____h459538[18] ? 6'd38 : - (_theResult____h459537[17] ? + (_theResult____h459538[17] ? 6'd39 : - (_theResult____h459537[16] ? + (_theResult____h459538[16] ? 6'd40 : - (_theResult____h459537[15] ? + (_theResult____h459538[15] ? 6'd41 : - (_theResult____h459537[14] ? + (_theResult____h459538[14] ? 6'd42 : - (_theResult____h459537[13] ? + (_theResult____h459538[13] ? 6'd43 : - (_theResult____h459537[12] ? + (_theResult____h459538[12] ? 6'd44 : - (_theResult____h459537[11] ? + (_theResult____h459538[11] ? 6'd45 : - (_theResult____h459537[10] ? + (_theResult____h459538[10] ? 6'd46 : - (_theResult____h459537[9] ? + (_theResult____h459538[9] ? 6'd47 : - (_theResult____h459537[8] ? + (_theResult____h459538[8] ? 6'd48 : - (_theResult____h459537[7] ? + (_theResult____h459538[7] ? 6'd49 : - (_theResult____h459537[6] ? + (_theResult____h459538[6] ? 6'd50 : - (_theResult____h459537[5] ? + (_theResult____h459538[5] ? 6'd51 : - (_theResult____h459537[4] ? + (_theResult____h459538[4] ? 6'd52 : - (_theResult____h459537[3] ? + (_theResult____h459538[3] ? 6'd53 : - (_theResult____h459537[2] ? + (_theResult____h459538[2] ? 6'd54 : - (_theResult____h459537[1] ? + (_theResult____h459538[1] ? 6'd55 : - (_theResult____h459537[0] ? + (_theResult____h459538[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10037 = - (_theResult___fst_exp__h594191 == 11'd2047) ? + (_theResult___fst_exp__h594192 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21085,10 +21085,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard85965_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : + CASE_guard85966_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10539 = - (_theResult___fst_exp__h554887 == 11'd2047) ? + (_theResult___fst_exp__h554888 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21096,10 +21096,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard46661_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : + CASE_guard46662_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10806 = - (_theResult___fst_exp__h554887 == 11'd2047) ? + (_theResult___fst_exp__h554888 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21107,10 +21107,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard46661_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : + CASE_guard46662_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9054 = - (_theResult___fst_exp__h516034 == 11'd2047) ? + (_theResult___fst_exp__h516035 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -21118,10 +21118,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard07808_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : + CASE_guard07809_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9769 = - (_theResult___fst_exp__h594191 == 11'd2047) ? + (_theResult___fst_exp__h594192 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21129,538 +21129,538 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard85965_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : + CASE_guard85966_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4410 = - (guard__h350516 == 2'b0 || + (guard__h350517 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h358617 : - _theResult___exp__h359133 ; + _theResult___fst_exp__h358618 : + _theResult___exp__h359134 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4413 = - (guard__h350516 == 2'b0) ? - _theResult___fst_exp__h358617 : + (guard__h350517 == 2'b0) ? + _theResult___fst_exp__h358618 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h359133 : - _theResult___fst_exp__h358617) ; + _theResult___exp__h359134 : + _theResult___fst_exp__h358618) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5057 = - (guard__h350516 == 2'b0 || + (guard__h350517 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h358611[56:34] : - _theResult___sfd__h359134 ; + sfdin__h358612[56:34] : + _theResult___sfd__h359135 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5059 = - (guard__h350516 == 2'b0) ? - sfdin__h358611[56:34] : + (guard__h350517 == 2'b0) ? + sfdin__h358612[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h359134 : - sfdin__h358611[56:34]) ; + _theResult___sfd__h359135 : + sfdin__h358612[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5802 = - (guard__h396215 == 2'b0 || + (guard__h396216 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h404314 : - _theResult___exp__h404830 ; + _theResult___fst_exp__h404315 : + _theResult___exp__h404831 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5805 = - (guard__h396215 == 2'b0) ? - _theResult___fst_exp__h404314 : + (guard__h396216 == 2'b0) ? + _theResult___fst_exp__h404315 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h404830 : - _theResult___fst_exp__h404314) ; + _theResult___exp__h404831 : + _theResult___fst_exp__h404315) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6449 = - (guard__h396215 == 2'b0 || + (guard__h396216 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h404308[56:34] : - _theResult___sfd__h404831 ; + sfdin__h404309[56:34] : + _theResult___sfd__h404832 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6451 = - (guard__h396215 == 2'b0) ? - sfdin__h404308[56:34] : + (guard__h396216 == 2'b0) ? + sfdin__h404309[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h404831 : - sfdin__h404308[56:34]) ; + _theResult___sfd__h404832 : + sfdin__h404309[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7194 = - (guard__h441910 == 2'b0 || + (guard__h441911 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h450009 : - _theResult___exp__h450525 ; + _theResult___fst_exp__h450010 : + _theResult___exp__h450526 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7197 = - (guard__h441910 == 2'b0) ? - _theResult___fst_exp__h450009 : + (guard__h441911 == 2'b0) ? + _theResult___fst_exp__h450010 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h450525 : - _theResult___fst_exp__h450009) ; + _theResult___exp__h450526 : + _theResult___fst_exp__h450010) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7841 = - (guard__h441910 == 2'b0 || + (guard__h441911 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h450003[56:34] : - _theResult___sfd__h450526 ; + sfdin__h450004[56:34] : + _theResult___sfd__h450527 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7843 = - (guard__h441910 == 2'b0) ? - sfdin__h450003[56:34] : + (guard__h441911 == 2'b0) ? + sfdin__h450004[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h450526 : - sfdin__h450003[56:34]) ; + _theResult___sfd__h450527 : + sfdin__h450004[56:34]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10651 = - (guard__h546661 == 2'b0 || + (guard__h546662 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h554887 : - _theResult___exp__h555616 ; + _theResult___fst_exp__h554888 : + _theResult___exp__h555617 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10653 = - (guard__h546661 == 2'b0) ? - _theResult___fst_exp__h554887 : + (guard__h546662 == 2'b0) ? + _theResult___fst_exp__h554888 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h555616 : - _theResult___fst_exp__h554887) ; + _theResult___exp__h555617 : + _theResult___fst_exp__h554888) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10734 = - (guard__h546661 == 2'b0 || + (guard__h546662 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - sfdin__h554881[56:5] : - _theResult___sfd__h555617 ; + sfdin__h554882[56:5] : + _theResult___sfd__h555618 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10736 = - (guard__h546661 == 2'b0) ? - sfdin__h554881[56:5] : + (guard__h546662 == 2'b0) ? + sfdin__h554882[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h555617 : - sfdin__h554881[56:5]) ; + _theResult___sfd__h555618 : + sfdin__h554882[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9171 = - (guard__h507808 == 2'b0 || + (guard__h507809 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h516034 : - _theResult___exp__h516763 ; + _theResult___fst_exp__h516035 : + _theResult___exp__h516764 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9173 = - (guard__h507808 == 2'b0) ? - _theResult___fst_exp__h516034 : + (guard__h507809 == 2'b0) ? + _theResult___fst_exp__h516035 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h516763 : - _theResult___fst_exp__h516034) ; + _theResult___exp__h516764 : + _theResult___fst_exp__h516035) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9255 = - (guard__h507808 == 2'b0 || + (guard__h507809 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - sfdin__h516028[56:5] : - _theResult___sfd__h516764 ; + sfdin__h516029[56:5] : + _theResult___sfd__h516765 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9257 = - (guard__h507808 == 2'b0) ? - sfdin__h516028[56:5] : + (guard__h507809 == 2'b0) ? + sfdin__h516029[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h516764 : - sfdin__h516028[56:5]) ; + _theResult___sfd__h516765 : + sfdin__h516029[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9881 = - (guard__h585965 == 2'b0 || + (guard__h585966 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h594191 : - _theResult___exp__h594920 ; + _theResult___fst_exp__h594192 : + _theResult___exp__h594921 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9883 = - (guard__h585965 == 2'b0) ? - _theResult___fst_exp__h594191 : + (guard__h585966 == 2'b0) ? + _theResult___fst_exp__h594192 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h594920 : - _theResult___fst_exp__h594191) ; + _theResult___exp__h594921 : + _theResult___fst_exp__h594192) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9964 = - (guard__h585965 == 2'b0 || + (guard__h585966 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - sfdin__h594185[56:5] : - _theResult___sfd__h594921 ; + sfdin__h594186[56:5] : + _theResult___sfd__h594922 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9966 = - (guard__h585965 == 2'b0) ? - sfdin__h594185[56:5] : + (guard__h585966 == 2'b0) ? + sfdin__h594186[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h594921 : - sfdin__h594185[56:5]) ; + _theResult___sfd__h594922 : + sfdin__h594186[56:5]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4957 = - (guard__h368155 == 2'b0 || + (guard__h368156 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h376383 : - _theResult___exp__h376899 ; + _theResult___fst_exp__h376384 : + _theResult___exp__h376900 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4959 = - (guard__h368155 == 2'b0) ? - _theResult___fst_exp__h376383 : + (guard__h368156 == 2'b0) ? + _theResult___fst_exp__h376384 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h376899 : - _theResult___fst_exp__h376383) ; + _theResult___exp__h376900 : + _theResult___fst_exp__h376384) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5103 = - (guard__h368155 == 2'b0 || + (guard__h368156 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h376377[56:34] : - _theResult___sfd__h376900 ; + sfdin__h376378[56:34] : + _theResult___sfd__h376901 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5105 = - (guard__h368155 == 2'b0) ? - sfdin__h376377[56:34] : + (guard__h368156 == 2'b0) ? + sfdin__h376378[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h376900 : - sfdin__h376377[56:34]) ; + _theResult___sfd__h376901 : + sfdin__h376378[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6349 = - (guard__h413852 == 2'b0 || + (guard__h413853 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h422080 : - _theResult___exp__h422596 ; + _theResult___fst_exp__h422081 : + _theResult___exp__h422597 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6351 = - (guard__h413852 == 2'b0) ? - _theResult___fst_exp__h422080 : + (guard__h413853 == 2'b0) ? + _theResult___fst_exp__h422081 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h422596 : - _theResult___fst_exp__h422080) ; + _theResult___exp__h422597 : + _theResult___fst_exp__h422081) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6495 = - (guard__h413852 == 2'b0 || + (guard__h413853 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h422074[56:34] : - _theResult___sfd__h422597 ; + sfdin__h422075[56:34] : + _theResult___sfd__h422598 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6497 = - (guard__h413852 == 2'b0) ? - sfdin__h422074[56:34] : + (guard__h413853 == 2'b0) ? + sfdin__h422075[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h422597 : - sfdin__h422074[56:34]) ; + _theResult___sfd__h422598 : + sfdin__h422075[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7741 = - (guard__h459547 == 2'b0 || + (guard__h459548 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h467775 : - _theResult___exp__h468291 ; + _theResult___fst_exp__h467776 : + _theResult___exp__h468292 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7743 = - (guard__h459547 == 2'b0) ? - _theResult___fst_exp__h467775 : + (guard__h459548 == 2'b0) ? + _theResult___fst_exp__h467776 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h468291 : - _theResult___fst_exp__h467775) ; + _theResult___exp__h468292 : + _theResult___fst_exp__h467776) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7887 = - (guard__h459547 == 2'b0 || + (guard__h459548 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h467769[56:34] : - _theResult___sfd__h468292 ; + sfdin__h467770[56:34] : + _theResult___sfd__h468293 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7889 = - (guard__h459547 == 2'b0) ? - sfdin__h467769[56:34] : + (guard__h459548 == 2'b0) ? + sfdin__h467770[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h468292 : - sfdin__h467769[56:34]) ; + _theResult___sfd__h468293 : + sfdin__h467770[56:34]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10613 = - (guard__h537349 == 2'b0 || + (guard__h537350 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h545310 : - _theResult___exp__h545965 ; + _theResult___fst_exp__h545311 : + _theResult___exp__h545966 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10615 = - (guard__h537349 == 2'b0) ? - _theResult___fst_exp__h545310 : + (guard__h537350 == 2'b0) ? + _theResult___fst_exp__h545311 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h545965 : - _theResult___fst_exp__h545310) ; + _theResult___exp__h545966 : + _theResult___fst_exp__h545311) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10682 = - (guard__h555730 == 2'b0 || + (guard__h555731 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h563720 : - _theResult___exp__h564400 ; + _theResult___fst_exp__h563721 : + _theResult___exp__h564401 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10684 = - (guard__h555730 == 2'b0) ? - _theResult___fst_exp__h563720 : + (guard__h555731 == 2'b0) ? + _theResult___fst_exp__h563721 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h564400 : - _theResult___fst_exp__h563720) ; + _theResult___exp__h564401 : + _theResult___fst_exp__h563721) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10708 = - (guard__h537349 == 2'b0 || + (guard__h537350 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h545261[56:5] : - _theResult___sfd__h545966 ; + _theResult___snd__h545262[56:5] : + _theResult___sfd__h545967 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10710 = - (guard__h537349 == 2'b0) ? - _theResult___snd__h545261[56:5] : + (guard__h537350 == 2'b0) ? + _theResult___snd__h545262[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h545966 : - _theResult___snd__h545261[56:5]) ; + _theResult___sfd__h545967 : + _theResult___snd__h545262[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10753 = - (guard__h555730 == 2'b0 || + (guard__h555731 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h563666[56:5] : - _theResult___sfd__h564401 ; + _theResult___snd__h563667[56:5] : + _theResult___sfd__h564402 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10755 = - (guard__h555730 == 2'b0) ? - _theResult___snd__h563666[56:5] : + (guard__h555731 == 2'b0) ? + _theResult___snd__h563667[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h564401 : - _theResult___snd__h563666[56:5]) ; + _theResult___sfd__h564402 : + _theResult___snd__h563667[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9128 = - (guard__h498496 == 2'b0 || + (guard__h498497 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h506457 : - _theResult___exp__h507112 ; + _theResult___fst_exp__h506458 : + _theResult___exp__h507113 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9130 = - (guard__h498496 == 2'b0) ? - _theResult___fst_exp__h506457 : + (guard__h498497 == 2'b0) ? + _theResult___fst_exp__h506458 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h507112 : - _theResult___fst_exp__h506457) ; + _theResult___exp__h507113 : + _theResult___fst_exp__h506458) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9202 = - (guard__h516877 == 2'b0 || + (guard__h516878 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h524867 : - _theResult___exp__h525547 ; + _theResult___fst_exp__h524868 : + _theResult___exp__h525548 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9204 = - (guard__h516877 == 2'b0) ? - _theResult___fst_exp__h524867 : + (guard__h516878 == 2'b0) ? + _theResult___fst_exp__h524868 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h525547 : - _theResult___fst_exp__h524867) ; + _theResult___exp__h525548 : + _theResult___fst_exp__h524868) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9228 = - (guard__h498496 == 2'b0 || + (guard__h498497 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h506408[56:5] : - _theResult___sfd__h507113 ; + _theResult___snd__h506409[56:5] : + _theResult___sfd__h507114 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9230 = - (guard__h498496 == 2'b0) ? - _theResult___snd__h506408[56:5] : + (guard__h498497 == 2'b0) ? + _theResult___snd__h506409[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h507113 : - _theResult___snd__h506408[56:5]) ; + _theResult___sfd__h507114 : + _theResult___snd__h506409[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9274 = - (guard__h516877 == 2'b0 || + (guard__h516878 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h524813[56:5] : - _theResult___sfd__h525548 ; + _theResult___snd__h524814[56:5] : + _theResult___sfd__h525549 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9276 = - (guard__h516877 == 2'b0) ? - _theResult___snd__h524813[56:5] : + (guard__h516878 == 2'b0) ? + _theResult___snd__h524814[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h525548 : - _theResult___snd__h524813[56:5]) ; + _theResult___sfd__h525549 : + _theResult___snd__h524814[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9843 = - (guard__h576653 == 2'b0 || + (guard__h576654 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h584614 : - _theResult___exp__h585269 ; + _theResult___fst_exp__h584615 : + _theResult___exp__h585270 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9845 = - (guard__h576653 == 2'b0) ? - _theResult___fst_exp__h584614 : + (guard__h576654 == 2'b0) ? + _theResult___fst_exp__h584615 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h585269 : - _theResult___fst_exp__h584614) ; + _theResult___exp__h585270 : + _theResult___fst_exp__h584615) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9912 = - (guard__h595034 == 2'b0 || + (guard__h595035 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h603024 : - _theResult___exp__h603704 ; + _theResult___fst_exp__h603025 : + _theResult___exp__h603705 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9914 = - (guard__h595034 == 2'b0) ? - _theResult___fst_exp__h603024 : + (guard__h595035 == 2'b0) ? + _theResult___fst_exp__h603025 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h603704 : - _theResult___fst_exp__h603024) ; + _theResult___exp__h603705 : + _theResult___fst_exp__h603025) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9938 = - (guard__h576653 == 2'b0 || + (guard__h576654 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h584565[56:5] : - _theResult___sfd__h585270 ; + _theResult___snd__h584566[56:5] : + _theResult___sfd__h585271 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9940 = - (guard__h576653 == 2'b0) ? - _theResult___snd__h584565[56:5] : + (guard__h576654 == 2'b0) ? + _theResult___snd__h584566[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h585270 : - _theResult___snd__h584565[56:5]) ; + _theResult___sfd__h585271 : + _theResult___snd__h584566[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9983 = - (guard__h595034 == 2'b0 || + (guard__h595035 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h602970[56:5] : - _theResult___sfd__h603705 ; + _theResult___snd__h602971[56:5] : + _theResult___sfd__h603706 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9985 = - (guard__h595034 == 2'b0) ? - _theResult___snd__h602970[56:5] : + (guard__h595035 == 2'b0) ? + _theResult___snd__h602971[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h603705 : - _theResult___snd__h602970[56:5]) ; + _theResult___sfd__h603706 : + _theResult___snd__h602971[56:5]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4632 = - (guard__h359225 == 2'b0 || + (guard__h359226 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h367273 : - _theResult___exp__h367715 ; + _theResult___fst_exp__h367274 : + _theResult___exp__h367716 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4634 = - (guard__h359225 == 2'b0) ? - _theResult___fst_exp__h367273 : + (guard__h359226 == 2'b0) ? + _theResult___fst_exp__h367274 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h367715 : - _theResult___fst_exp__h367273) ; + _theResult___exp__h367716 : + _theResult___fst_exp__h367274) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5026 = - (guard__h376991 == 2'b0 || + (guard__h376992 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h385068 : - _theResult___exp__h385535 ; + _theResult___fst_exp__h385069 : + _theResult___exp__h385536 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5028 = - (guard__h376991 == 2'b0) ? - _theResult___fst_exp__h385068 : + (guard__h376992 == 2'b0) ? + _theResult___fst_exp__h385069 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h385535 : - _theResult___fst_exp__h385068) ; + _theResult___exp__h385536 : + _theResult___fst_exp__h385069) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5076 = - (guard__h359225 == 2'b0 || + (guard__h359226 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h367224[56:34] : - _theResult___sfd__h367716 ; + _theResult___snd__h367225[56:34] : + _theResult___sfd__h367717 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5078 = - (guard__h359225 == 2'b0) ? - _theResult___snd__h367224[56:34] : + (guard__h359226 == 2'b0) ? + _theResult___snd__h367225[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h367716 : - _theResult___snd__h367224[56:34]) ; + _theResult___sfd__h367717 : + _theResult___snd__h367225[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5122 = - (guard__h376991 == 2'b0 || + (guard__h376992 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h385014[56:34] : - _theResult___sfd__h385536 ; + _theResult___snd__h385015[56:34] : + _theResult___sfd__h385537 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5124 = - (guard__h376991 == 2'b0) ? - _theResult___snd__h385014[56:34] : + (guard__h376992 == 2'b0) ? + _theResult___snd__h385015[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h385536 : - _theResult___snd__h385014[56:34]) ; + _theResult___sfd__h385537 : + _theResult___snd__h385015[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6024 = - (guard__h404922 == 2'b0 || + (guard__h404923 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h412970 : - _theResult___exp__h413412 ; + _theResult___fst_exp__h412971 : + _theResult___exp__h413413 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6026 = - (guard__h404922 == 2'b0) ? - _theResult___fst_exp__h412970 : + (guard__h404923 == 2'b0) ? + _theResult___fst_exp__h412971 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h413412 : - _theResult___fst_exp__h412970) ; + _theResult___exp__h413413 : + _theResult___fst_exp__h412971) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6418 = - (guard__h422688 == 2'b0 || + (guard__h422689 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h430765 : - _theResult___exp__h431232 ; + _theResult___fst_exp__h430766 : + _theResult___exp__h431233 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6420 = - (guard__h422688 == 2'b0) ? - _theResult___fst_exp__h430765 : + (guard__h422689 == 2'b0) ? + _theResult___fst_exp__h430766 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h431232 : - _theResult___fst_exp__h430765) ; + _theResult___exp__h431233 : + _theResult___fst_exp__h430766) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6468 = - (guard__h404922 == 2'b0 || + (guard__h404923 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h412921[56:34] : - _theResult___sfd__h413413 ; + _theResult___snd__h412922[56:34] : + _theResult___sfd__h413414 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6470 = - (guard__h404922 == 2'b0) ? - _theResult___snd__h412921[56:34] : + (guard__h404923 == 2'b0) ? + _theResult___snd__h412922[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h413413 : - _theResult___snd__h412921[56:34]) ; + _theResult___sfd__h413414 : + _theResult___snd__h412922[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6514 = - (guard__h422688 == 2'b0 || + (guard__h422689 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h430711[56:34] : - _theResult___sfd__h431233 ; + _theResult___snd__h430712[56:34] : + _theResult___sfd__h431234 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6516 = - (guard__h422688 == 2'b0) ? - _theResult___snd__h430711[56:34] : + (guard__h422689 == 2'b0) ? + _theResult___snd__h430712[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h431233 : - _theResult___snd__h430711[56:34]) ; + _theResult___sfd__h431234 : + _theResult___snd__h430712[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7416 = - (guard__h450617 == 2'b0 || + (guard__h450618 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h458665 : - _theResult___exp__h459107 ; + _theResult___fst_exp__h458666 : + _theResult___exp__h459108 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7418 = - (guard__h450617 == 2'b0) ? - _theResult___fst_exp__h458665 : + (guard__h450618 == 2'b0) ? + _theResult___fst_exp__h458666 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h459107 : - _theResult___fst_exp__h458665) ; + _theResult___exp__h459108 : + _theResult___fst_exp__h458666) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7810 = - (guard__h468383 == 2'b0 || + (guard__h468384 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h476460 : - _theResult___exp__h476927 ; + _theResult___fst_exp__h476461 : + _theResult___exp__h476928 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7812 = - (guard__h468383 == 2'b0) ? - _theResult___fst_exp__h476460 : + (guard__h468384 == 2'b0) ? + _theResult___fst_exp__h476461 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h476927 : - _theResult___fst_exp__h476460) ; + _theResult___exp__h476928 : + _theResult___fst_exp__h476461) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7860 = - (guard__h450617 == 2'b0 || + (guard__h450618 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h458616[56:34] : - _theResult___sfd__h459108 ; + _theResult___snd__h458617[56:34] : + _theResult___sfd__h459109 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7862 = - (guard__h450617 == 2'b0) ? - _theResult___snd__h458616[56:34] : + (guard__h450618 == 2'b0) ? + _theResult___snd__h458617[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h459108 : - _theResult___snd__h458616[56:34]) ; + _theResult___sfd__h459109 : + _theResult___snd__h458617[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7906 = - (guard__h468383 == 2'b0 || + (guard__h468384 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h476406[56:34] : - _theResult___sfd__h476928 ; + _theResult___snd__h476407[56:34] : + _theResult___sfd__h476929 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7908 = - (guard__h468383 == 2'b0) ? - _theResult___snd__h476406[56:34] : + (guard__h468384 == 2'b0) ? + _theResult___snd__h476407[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h476928 : - _theResult___snd__h476406[56:34]) ; + _theResult___sfd__h476929 : + _theResult___snd__h476407[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10022 = - (_theResult___fst_exp__h584614 == 11'd2047) ? + (_theResult___fst_exp__h584615 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21668,10 +21668,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard76653_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : + CASE_guard76654_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10049 = - (_theResult___fst_exp__h603024 == 11'd2047) ? + (_theResult___fst_exp__h603025 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21679,10 +21679,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95034_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : + CASE_guard95035_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10585 = - (_theResult___fst_exp__h563720 == 11'd2047) ? + (_theResult___fst_exp__h563721 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21690,10 +21690,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard55730_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : + CASE_guard55731_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10791 = - (_theResult___fst_exp__h545310 == 11'd2047) ? + (_theResult___fst_exp__h545311 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21701,10 +21701,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37349_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : + CASE_guard37350_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10818 = - (_theResult___fst_exp__h563720 == 11'd2047) ? + (_theResult___fst_exp__h563721 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21712,10 +21712,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard55730_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : + CASE_guard55731_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9100 = - (_theResult___fst_exp__h524867 == 11'd2047) ? + (_theResult___fst_exp__h524868 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -21723,10 +21723,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard16877_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : + CASE_guard16878_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9815 = - (_theResult___fst_exp__h603024 == 11'd2047) ? + (_theResult___fst_exp__h603025 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21734,7 +21734,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95034_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : + CASE_guard95035_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165) ; assign IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_3023_30_ETC___d13059 = (_theResult____h658376 == 16'd0 && @@ -21803,7 +21803,7 @@ module mkCore(CLK, checkForException___d13943[4] || csrf_fs_reg_read__1746_EQ_0_3232_AND_fetchStag_ETC___d14036 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10052 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != @@ -21813,85 +21813,85 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10024) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10051 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10053 = - (f3_exp__h565367 == 8'd255 && f3_sfd__h565368 != 23'd0 || - (f3_exp__h565367 == 8'd255 || f3_exp__h565367 == 8'd0) && - f3_sfd__h565368 == 23'd0) ? + (f3_exp__h565368 == 8'd255 && f3_sfd__h565369 != 23'd0 || + (f3_exp__h565368 == 8'd255 || f3_exp__h565368 == 8'd0) && + f3_sfd__h565369 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10052 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10198 = - ((f2_exp__h526063 == 8'd0) ? - (f2_sfd__h526064[22] ? + ((f2_exp__h526064 == 8'd0) ? + (f2_sfd__h526065[22] ? 6'd2 : - (f2_sfd__h526064[21] ? + (f2_sfd__h526065[21] ? 6'd3 : - (f2_sfd__h526064[20] ? + (f2_sfd__h526065[20] ? 6'd4 : - (f2_sfd__h526064[19] ? + (f2_sfd__h526065[19] ? 6'd5 : - (f2_sfd__h526064[18] ? + (f2_sfd__h526065[18] ? 6'd6 : - (f2_sfd__h526064[17] ? + (f2_sfd__h526065[17] ? 6'd7 : - (f2_sfd__h526064[16] ? + (f2_sfd__h526065[16] ? 6'd8 : - (f2_sfd__h526064[15] ? + (f2_sfd__h526065[15] ? 6'd9 : - (f2_sfd__h526064[14] ? + (f2_sfd__h526065[14] ? 6'd10 : - (f2_sfd__h526064[13] ? + (f2_sfd__h526065[13] ? 6'd11 : - (f2_sfd__h526064[12] ? + (f2_sfd__h526065[12] ? 6'd12 : - (f2_sfd__h526064[11] ? + (f2_sfd__h526065[11] ? 6'd13 : - (f2_sfd__h526064[10] ? + (f2_sfd__h526065[10] ? 6'd14 : - (f2_sfd__h526064[9] ? + (f2_sfd__h526065[9] ? 6'd15 : - (f2_sfd__h526064[8] ? + (f2_sfd__h526065[8] ? 6'd16 : - (f2_sfd__h526064[7] ? + (f2_sfd__h526065[7] ? 6'd17 : - (f2_sfd__h526064[6] ? + (f2_sfd__h526065[6] ? 6'd18 : - (f2_sfd__h526064[5] ? + (f2_sfd__h526065[5] ? 6'd19 : - (f2_sfd__h526064[4] ? + (f2_sfd__h526065[4] ? 6'd20 : - (f2_sfd__h526064[3] ? + (f2_sfd__h526065[3] ? 6'd21 : - (f2_sfd__h526064[2] ? + (f2_sfd__h526065[2] ? 6'd22 : - (f2_sfd__h526064[1] ? + (f2_sfd__h526065[1] ? 6'd23 : - (f2_sfd__h526064[0] ? + (f2_sfd__h526065[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10589 = - (f2_exp__h526063 == 8'd255 && f2_sfd__h526064 != 23'd0 || - (f2_exp__h526063 == 8'd255 || f2_exp__h526063 == 8'd0) && - f2_sfd__h526064 == 23'd0) ? + (f2_exp__h526064 == 8'd255 && f2_sfd__h526065 != 23'd0 || + (f2_exp__h526064 == 8'd255 || f2_exp__h526064 == 8'd0) && + f2_sfd__h526065 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - ((f2_exp__h526063 == 8'd0) ? + ((f2_exp__h526064 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10244 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10587) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10766 = - (f2_exp__h526063 == 8'd255 && f2_sfd__h526064 != 23'd0) ? - _theResult___snd_fst_sfd__h526379 : - _theResult___fst_sfd__h564519 ; + (f2_exp__h526064 == 8'd255 && f2_sfd__h526065 != 23'd0) ? + _theResult___snd_fst_sfd__h526380 : + _theResult___fst_sfd__h564520 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10767 = - { (f2_exp__h526063 == 8'd255) ? + { (f2_exp__h526064 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h564515, + _theResult___fst_exp__h564516, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10766 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10821 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != @@ -21901,15 +21901,15 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10793) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10820 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10822 = - (f2_exp__h526063 == 8'd255 && f2_sfd__h526064 != 23'd0 || - (f2_exp__h526063 == 8'd255 || f2_exp__h526063 == 8'd0) && - f2_sfd__h526064 == 23'd0) ? + (f2_exp__h526064 == 8'd255 && f2_sfd__h526065 != 23'd0 || + (f2_exp__h526064 == 8'd255 || f2_exp__h526064 == 8'd0) && + f2_sfd__h526065 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10821 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10877 = - (f1_exp__h487069 == 8'd0) ? + (f1_exp__h487070 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856[4] : @@ -21917,7 +21917,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10918 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897[4] : @@ -21925,7 +21925,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10962 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941[4] : @@ -21933,7 +21933,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10977 = - (f1_exp__h487069 == 8'd0) ? + (f1_exp__h487070 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856[3] : @@ -21941,7 +21941,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10987 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897[3] : @@ -21949,7 +21949,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10998 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941[3] : @@ -21957,208 +21957,208 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11017 = - (f1_exp__h487069 == 8'd0) ? + (f1_exp__h487070 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11015 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11031 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11029 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11046 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11044 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11063 = - (f1_exp__h487069 == 8'd0) ? + (f1_exp__h487070 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11061 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11075 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11073 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11088 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11086 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11105 = - (f1_exp__h487069 == 8'd0) ? + (f1_exp__h487070 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11103 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11117 = - (f2_exp__h526063 == 8'd0) ? + (f2_exp__h526064 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11115 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11130 = - (f3_exp__h565367 == 8'd0) ? + (f3_exp__h565368 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11128 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8698 = - ((f1_exp__h487069 == 8'd0) ? - (f1_sfd__h487070[22] ? + ((f1_exp__h487070 == 8'd0) ? + (f1_sfd__h487071[22] ? 6'd2 : - (f1_sfd__h487070[21] ? + (f1_sfd__h487071[21] ? 6'd3 : - (f1_sfd__h487070[20] ? + (f1_sfd__h487071[20] ? 6'd4 : - (f1_sfd__h487070[19] ? + (f1_sfd__h487071[19] ? 6'd5 : - (f1_sfd__h487070[18] ? + (f1_sfd__h487071[18] ? 6'd6 : - (f1_sfd__h487070[17] ? + (f1_sfd__h487071[17] ? 6'd7 : - (f1_sfd__h487070[16] ? + (f1_sfd__h487071[16] ? 6'd8 : - (f1_sfd__h487070[15] ? + (f1_sfd__h487071[15] ? 6'd9 : - (f1_sfd__h487070[14] ? + (f1_sfd__h487071[14] ? 6'd10 : - (f1_sfd__h487070[13] ? + (f1_sfd__h487071[13] ? 6'd11 : - (f1_sfd__h487070[12] ? + (f1_sfd__h487071[12] ? 6'd12 : - (f1_sfd__h487070[11] ? + (f1_sfd__h487071[11] ? 6'd13 : - (f1_sfd__h487070[10] ? + (f1_sfd__h487071[10] ? 6'd14 : - (f1_sfd__h487070[9] ? + (f1_sfd__h487071[9] ? 6'd15 : - (f1_sfd__h487070[8] ? + (f1_sfd__h487071[8] ? 6'd16 : - (f1_sfd__h487070[7] ? + (f1_sfd__h487071[7] ? 6'd17 : - (f1_sfd__h487070[6] ? + (f1_sfd__h487071[6] ? 6'd18 : - (f1_sfd__h487070[5] ? + (f1_sfd__h487071[5] ? 6'd19 : - (f1_sfd__h487070[4] ? + (f1_sfd__h487071[4] ? 6'd20 : - (f1_sfd__h487070[3] ? + (f1_sfd__h487071[3] ? 6'd21 : - (f1_sfd__h487070[2] ? + (f1_sfd__h487071[2] ? 6'd22 : - (f1_sfd__h487070[1] ? + (f1_sfd__h487071[1] ? 6'd23 : - (f1_sfd__h487070[0] ? + (f1_sfd__h487071[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9104 = - (f1_exp__h487069 == 8'd255 && f1_sfd__h487070 != 23'd0 || - (f1_exp__h487069 == 8'd255 || f1_exp__h487069 == 8'd0) && - f1_sfd__h487070 == 23'd0) ? + (f1_exp__h487070 == 8'd255 && f1_sfd__h487071 != 23'd0 || + (f1_exp__h487070 == 8'd255 || f1_exp__h487070 == 8'd0) && + f1_sfd__h487071 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - ((f1_exp__h487069 == 8'd0) ? + ((f1_exp__h487070 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8759 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9102) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9287 = - (f1_exp__h487069 == 8'd255 && f1_sfd__h487070 != 23'd0) ? - _theResult___snd_fst_sfd__h487385 : - _theResult___fst_sfd__h525666 ; + (f1_exp__h487070 == 8'd255 && f1_sfd__h487071 != 23'd0) ? + _theResult___snd_fst_sfd__h487386 : + _theResult___fst_sfd__h525667 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9288 = { IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9104, - (f1_exp__h487069 == 8'd255) ? + (f1_exp__h487070 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h525662, + _theResult___fst_exp__h525663, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9287 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9428 = - ((f3_exp__h565367 == 8'd0) ? - (f3_sfd__h565368[22] ? + ((f3_exp__h565368 == 8'd0) ? + (f3_sfd__h565369[22] ? 6'd2 : - (f3_sfd__h565368[21] ? + (f3_sfd__h565369[21] ? 6'd3 : - (f3_sfd__h565368[20] ? + (f3_sfd__h565369[20] ? 6'd4 : - (f3_sfd__h565368[19] ? + (f3_sfd__h565369[19] ? 6'd5 : - (f3_sfd__h565368[18] ? + (f3_sfd__h565369[18] ? 6'd6 : - (f3_sfd__h565368[17] ? + (f3_sfd__h565369[17] ? 6'd7 : - (f3_sfd__h565368[16] ? + (f3_sfd__h565369[16] ? 6'd8 : - (f3_sfd__h565368[15] ? + (f3_sfd__h565369[15] ? 6'd9 : - (f3_sfd__h565368[14] ? + (f3_sfd__h565369[14] ? 6'd10 : - (f3_sfd__h565368[13] ? + (f3_sfd__h565369[13] ? 6'd11 : - (f3_sfd__h565368[12] ? + (f3_sfd__h565369[12] ? 6'd12 : - (f3_sfd__h565368[11] ? + (f3_sfd__h565369[11] ? 6'd13 : - (f3_sfd__h565368[10] ? + (f3_sfd__h565369[10] ? 6'd14 : - (f3_sfd__h565368[9] ? + (f3_sfd__h565369[9] ? 6'd15 : - (f3_sfd__h565368[8] ? + (f3_sfd__h565369[8] ? 6'd16 : - (f3_sfd__h565368[7] ? + (f3_sfd__h565369[7] ? 6'd17 : - (f3_sfd__h565368[6] ? + (f3_sfd__h565369[6] ? 6'd18 : - (f3_sfd__h565368[5] ? + (f3_sfd__h565369[5] ? 6'd19 : - (f3_sfd__h565368[4] ? + (f3_sfd__h565369[4] ? 6'd20 : - (f3_sfd__h565368[3] ? + (f3_sfd__h565369[3] ? 6'd21 : - (f3_sfd__h565368[2] ? + (f3_sfd__h565369[2] ? 6'd22 : - (f3_sfd__h565368[1] ? + (f3_sfd__h565369[1] ? 6'd23 : - (f3_sfd__h565368[0] ? + (f3_sfd__h565369[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9819 = - (f3_exp__h565367 == 8'd255 && f3_sfd__h565368 != 23'd0 || - (f3_exp__h565367 == 8'd255 || f3_exp__h565367 == 8'd0) && - f3_sfd__h565368 == 23'd0) ? + (f3_exp__h565368 == 8'd255 && f3_sfd__h565369 != 23'd0 || + (f3_exp__h565368 == 8'd255 || f3_exp__h565368 == 8'd0) && + f3_sfd__h565369 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - ((f3_exp__h565367 == 8'd0) ? + ((f3_exp__h565368 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9474 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9817) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9996 = - (f3_exp__h565367 == 8'd255 && f3_sfd__h565368 != 23'd0) ? - _theResult___snd_fst_sfd__h565683 : - _theResult___fst_sfd__h603823 ; + (f3_exp__h565368 == 8'd255 && f3_sfd__h565369 != 23'd0) ? + _theResult___snd_fst_sfd__h565684 : + _theResult___fst_sfd__h603824 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9997 = - { (f3_exp__h565367 == 8'd255) ? + { (f3_exp__h565368 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h603819, + _theResult___fst_exp__h603820, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9996 } ; assign IF_IF_coreFix_memExe_dTlb_procResp__742_BIT_18_ETC___d1879 = IF_coreFix_memExe_dTlb_procResp__742_BIT_182_7_ETC___d1868 ? @@ -22364,7 +22364,7 @@ module mkCore(CLK, assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10244 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 || - _theResult___fst_exp__h545310 == 11'd2047) ? + _theResult___fst_exp__h545311 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -22372,12 +22372,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37349_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : + CASE_guard37350_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8759 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 || - _theResult___fst_exp__h506457 == 11'd2047) ? + _theResult___fst_exp__h506458 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -22385,12 +22385,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98496_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : + CASE_guard98497_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9474 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 || - _theResult___fst_exp__h584614 == 11'd2047) ? + _theResult___fst_exp__h584615 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -22398,7 +22398,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard76653_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : + CASE_guard76654_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163) ; assign IF_NOT_IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3__ETC___d13478 = IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_3023_30_ETC___d13059[0] ? @@ -22874,7 +22874,7 @@ module mkCore(CLK, 4'd9) ? 4'd14 : 4'd15)))))))))) ; - assign IF_NOT_rob_deqPort_1_deq_data__5642_BIT_25_564_ETC___d15998 = + assign IF_NOT_rob_deqPort_1_deq_data__5648_BIT_25_564_ETC___d16004 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -22919,48 +22919,48 @@ module mkCore(CLK, assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11015 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873[2] : - _theResult___fst_exp__h525650 == 11'd2047 && - _theResult___fst_sfd__h525651 == 52'd0 ; + _theResult___fst_exp__h525651 == 11'd2047 && + _theResult___fst_sfd__h525652 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11029 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914[2] : - _theResult___fst_exp__h564503 == 11'd2047 && - _theResult___fst_sfd__h564504 == 52'd0 ; + _theResult___fst_exp__h564504 == 11'd2047 && + _theResult___fst_sfd__h564505 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11044 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958[2] : - _theResult___fst_exp__h603807 == 11'd2047 && - _theResult___fst_sfd__h603808 == 52'd0 ; + _theResult___fst_exp__h603808 == 11'd2047 && + _theResult___fst_sfd__h603809 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11061 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873[1] : - _theResult___fst_exp__h524867 == 11'd0 && - guard__h516877 != 2'b0 ; + _theResult___fst_exp__h524868 == 11'd0 && + guard__h516878 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11073 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914[1] : - _theResult___fst_exp__h563720 == 11'd0 && - guard__h555730 != 2'b0 ; + _theResult___fst_exp__h563721 == 11'd0 && + guard__h555731 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11086 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958[1] : - _theResult___fst_exp__h603024 == 11'd0 && - guard__h595034 != 2'b0 ; + _theResult___fst_exp__h603025 == 11'd0 && + guard__h595035 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11103 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873[0] : - _theResult___fst_exp__h524867 != 11'd2047 && - guard__h516877 != 2'b0 ; + _theResult___fst_exp__h524868 != 11'd2047 && + guard__h516878 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11115 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914[0] : - _theResult___fst_exp__h563720 != 11'd2047 && - guard__h555730 != 2'b0 ; + _theResult___fst_exp__h563721 != 11'd2047 && + guard__h555731 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11128 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958[0] : - _theResult___fst_exp__h603024 != 11'd2047 && - guard__h595034 != 2'b0 ; + _theResult___fst_exp__h603025 != 11'd2047 && + guard__h595035 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9061 = ((SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? @@ -23000,35 +23000,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5199 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? - ((_theResult___fst_exp__h376383 == 8'd255) ? + ((_theResult___fst_exp__h376384 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5184) : - ((_theResult___fst_exp__h385068 == 8'd255) ? + ((_theResult___fst_exp__h385069 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5197) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5236 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? - ((_theResult___fst_exp__h376383 == 8'd255) ? + ((_theResult___fst_exp__h376384 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5227) : - ((_theResult___fst_exp__h385068 == 8'd255) ? + ((_theResult___fst_exp__h385069 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5234) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5327 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5298[2] : - _theResult___fst_exp__h385616 == 8'd255 && - _theResult___fst_sfd__h385617 == 23'd0 ; + _theResult___fst_exp__h385617 == 8'd255 && + _theResult___fst_sfd__h385618 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5340 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5298[1] : - _theResult___fst_exp__h385068 == 8'd0 && - guard__h376991 != 2'b0 ; + _theResult___fst_exp__h385069 == 8'd0 && + guard__h376992 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5353 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5298[0] : - _theResult___fst_exp__h385068 != 8'd255 && - guard__h376991 != 2'b0 ; + _theResult___fst_exp__h385069 != 8'd255 && + guard__h376992 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6364 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q73[7:0] == 8'd0) ? @@ -23038,35 +23038,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6591 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? - ((_theResult___fst_exp__h422080 == 8'd255) ? + ((_theResult___fst_exp__h422081 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6576) : - ((_theResult___fst_exp__h430765 == 8'd255) ? + ((_theResult___fst_exp__h430766 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6589) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6628 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? - ((_theResult___fst_exp__h422080 == 8'd255) ? + ((_theResult___fst_exp__h422081 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6619) : - ((_theResult___fst_exp__h430765 == 8'd255) ? + ((_theResult___fst_exp__h430766 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6626) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6719 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6690[2] : - _theResult___fst_exp__h431313 == 8'd255 && - _theResult___fst_sfd__h431314 == 23'd0 ; + _theResult___fst_exp__h431314 == 8'd255 && + _theResult___fst_sfd__h431315 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6732 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6690[1] : - _theResult___fst_exp__h430765 == 8'd0 && - guard__h422688 != 2'b0 ; + _theResult___fst_exp__h430766 == 8'd0 && + guard__h422689 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6745 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6690[0] : - _theResult___fst_exp__h430765 != 8'd255 && - guard__h422688 != 2'b0 ; + _theResult___fst_exp__h430766 != 8'd255 && + guard__h422689 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7756 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q108[7:0] == 8'd0) ? @@ -23076,35 +23076,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7983 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? - ((_theResult___fst_exp__h467775 == 8'd255) ? + ((_theResult___fst_exp__h467776 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7968) : - ((_theResult___fst_exp__h476460 == 8'd255) ? + ((_theResult___fst_exp__h476461 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7981) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8020 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? - ((_theResult___fst_exp__h467775 == 8'd255) ? + ((_theResult___fst_exp__h467776 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8011) : - ((_theResult___fst_exp__h476460 == 8'd255) ? + ((_theResult___fst_exp__h476461 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8018) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8111 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8082[2] : - _theResult___fst_exp__h477008 == 8'd255 && - _theResult___fst_sfd__h477009 == 23'd0 ; + _theResult___fst_exp__h477009 == 8'd255 && + _theResult___fst_sfd__h477010 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8124 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8082[1] : - _theResult___fst_exp__h476460 == 8'd0 && - guard__h468383 != 2'b0 ; + _theResult___fst_exp__h476461 == 8'd0 && + guard__h468384 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8137 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8082[0] : - _theResult___fst_exp__h476460 != 8'd255 && - guard__h468383 != 2'b0 ; + _theResult___fst_exp__h476461 != 8'd255 && + guard__h468384 != 2'b0 ; assign IF_checkForException_3243_BIT_4_3244_THEN_IF_c_ETC___d13394 = checkForException___d13243[4] ? CASE_checkForException_3243_BITS_3_TO_0_0_chec_ETC__q234 : @@ -23796,39 +23796,39 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2230 = { (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd7) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd6) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd5) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd4) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2235 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2230, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd3) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd2) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2240 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2235, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd1) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd0) ? - n___1__h201995 : + n___1__h201996 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2553 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == @@ -23881,7 +23881,7 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2599 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == 3'd2) ? - x__h200592 : + x__h200593 : (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEh_ETC___d2182 ? 64'd0 : 64'd1) ; @@ -23893,7 +23893,7 @@ module mkCore(CLK, WILL_FIRE_RL_coreFix_memExe_dMem_cache_m_banks_0_cRqTransfer_retry || coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3158 = - _theResult_____2__h300942 == v__h300362 ; + _theResult_____2__h300943 == v__h300363 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3238 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23902,7 +23902,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_lat_0$whas || coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3260 = - _theResult_____2__h308938 == v__h303707 ; + _theResult_____2__h308939 == v__h303708 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3280 = EN_dCacheToParent_fromP_enq ? !coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23931,7 +23931,7 @@ module mkCore(CLK, EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[514:3] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[514:3], - x__h306572 } ; + x__h306573 } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_linkAdd_ETC___d3104 = !MUX_flush_reservation$write_1__SEL_1 && (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_lat_0$whas ? @@ -24029,35 +24029,35 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2027 = { (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd7) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd6) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd5) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2032 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2027, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd4) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd3) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2037 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2032, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd2) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd1) ? - n__h197391 : + n__h197392 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2886 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? @@ -24085,7 +24085,7 @@ module mkCore(CLK, EN_dCacheToParent_rqToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3432 = - _theResult_____2__h314932 == v__h314221 ; + _theResult_____2__h314933 == v__h314222 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3505 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -24094,7 +24094,7 @@ module mkCore(CLK, EN_dCacheToParent_rsToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3528 = - _theResult_____2__h322786 == v__h318097 ; + _theResult_____2__h322787 == v__h318098 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3547 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -24246,7 +24246,7 @@ module mkCore(CLK, !coreFix_aluExe_0_bypassWire_1$whas || coreFix_memExe_dispToRegQ$RDY_first ; assign IF_coreFix_memExe_forwardQ_deqReq_dummy2_2_rea_ETC___d3850 = - _theResult_____2__h336355 == v__h335923 ; + _theResult_____2__h336356 == v__h335924 ; assign IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3843 = WILL_FIRE_RL_coreFix_memExe_doRespLdForward || coreFix_memExe_forwardQ_deqReq_rl ; @@ -24295,7 +24295,7 @@ module mkCore(CLK, SEL_ARR_mmio_dataRespQ_data_0_109_BITS_31_TO_0_ETC___d1408 }) : IF_coreFix_memExe_lsq_firstLd__285_BIT_94_360__ETC___d1434 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_dummy2_2_r_ETC___d3756 = - _theResult_____2__h333130 == v__h332698 ; + _theResult_____2__h333131 == v__h332699 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3749 = WILL_FIRE_RL_coreFix_memExe_doRespLdMem || coreFix_memExe_memRespLdQ_deqReq_rl ; @@ -24327,7 +24327,7 @@ module mkCore(CLK, coreFix_memExe_respLrScAmoQ_enqReq_rl[64] ; assign IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 = csrf_minstret_ehr_data_lat_0$whas ? - upd__h736290 : + upd__h736047 : csrf_minstret_ehr_data_rl ; assign IF_csrf_prv_reg_read__3022_ULE_1_5008_AND_IF_c_ETC___d15232 = csrf_prv_reg_read__3022_ULE_1_5008_AND_IF_comm_ETC___d15030 ? @@ -24453,17 +24453,17 @@ module mkCore(CLK, EN_mmioToPlatform_pRs_enq ? mmio_pRsQ_enqReq_lat_0$wget[67] : mmio_pRsQ_enqReq_rl[67] ; - assign IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d15988 = - rob$deqPort_0_canDeq ? y_avValue_fst__h739906 : 5'd0 ; - assign IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d16007 = + assign IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d15994 = + rob$deqPort_0_canDeq ? y_avValue_fst__h739663 : 5'd0 ; + assign IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d16013 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_fst__h740381 : + y_avValue_snd_snd_snd_fst__h740138 : 2'd0 ; assign IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15505 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? csrf_sepc_csr : csrf_mepc_csr ; - assign IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15596 = + assign IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15602 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? { csrf_mpp_reg, 3'd0, @@ -24486,52 +24486,52 @@ module mkCore(CLK, assign IF_rob_deqPort_0_deq_data__4646_BITS_97_TO_96__ETC___d14819 = { CASE_robdeqPort_0_deq_data_BITS_97_TO_96_0_ro_ETC__q252, rob$deqPort_0_deq_data[95:32] } ; - assign IF_rob_deqPort_1_canDeq__5639_THEN_IF_NOT_rob__ETC___d15999 = + assign IF_rob_deqPort_1_canDeq__5645_THEN_IF_NOT_rob__ETC___d16005 = rob$deqPort_1_canDeq ? - IF_NOT_rob_deqPort_1_deq_data__5642_BIT_25_564_ETC___d15998 : + IF_NOT_rob_deqPort_1_deq_data__5648_BIT_25_564_ETC___d16004 : rob$deqPort_0_canDeq && rob$deqPort_0_deq_data[26] ; - assign IF_sfdin04308_BIT_33_THEN_2_ELSE_0__q65 = - sfdin__h404308[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin16028_BIT_4_THEN_2_ELSE_0__q139 = - sfdin__h516028[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin22074_BIT_33_THEN_2_ELSE_0__q75 = - sfdin__h422074[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin50003_BIT_33_THEN_2_ELSE_0__q100 = - sfdin__h450003[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin54881_BIT_4_THEN_2_ELSE_0__q179 = - sfdin__h554881[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin58611_BIT_33_THEN_2_ELSE_0__q30 = - sfdin__h358611[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin67769_BIT_33_THEN_2_ELSE_0__q110 = - sfdin__h467769[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin76377_BIT_33_THEN_2_ELSE_0__q40 = - sfdin__h376377[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin94185_BIT_4_THEN_2_ELSE_0__q156 = - sfdin__h594185[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd02970_BIT_4_THEN_2_ELSE_0__q159 = - _theResult___snd__h602970[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd06408_BIT_4_THEN_2_ELSE_0__q135 = - _theResult___snd__h506408[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd12921_BIT_33_THEN_2_ELSE_0__q67 = - _theResult___snd__h412921[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd24813_BIT_4_THEN_2_ELSE_0__q142 = - _theResult___snd__h524813[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd30711_BIT_33_THEN_2_ELSE_0__q80 = - _theResult___snd__h430711[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd45261_BIT_4_THEN_2_ELSE_0__q175 = - _theResult___snd__h545261[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd58616_BIT_33_THEN_2_ELSE_0__q102 = - _theResult___snd__h458616[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd63666_BIT_4_THEN_2_ELSE_0__q182 = - _theResult___snd__h563666[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd67224_BIT_33_THEN_2_ELSE_0__q32 = - _theResult___snd__h367224[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd76406_BIT_33_THEN_2_ELSE_0__q115 = - _theResult___snd__h476406[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd84565_BIT_4_THEN_2_ELSE_0__q152 = - _theResult___snd__h584565[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd85014_BIT_33_THEN_2_ELSE_0__q45 = - _theResult___snd__h385014[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin04309_BIT_33_THEN_2_ELSE_0__q65 = + sfdin__h404309[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin16029_BIT_4_THEN_2_ELSE_0__q139 = + sfdin__h516029[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin22075_BIT_33_THEN_2_ELSE_0__q75 = + sfdin__h422075[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin50004_BIT_33_THEN_2_ELSE_0__q100 = + sfdin__h450004[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin54882_BIT_4_THEN_2_ELSE_0__q179 = + sfdin__h554882[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin58612_BIT_33_THEN_2_ELSE_0__q30 = + sfdin__h358612[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin67770_BIT_33_THEN_2_ELSE_0__q110 = + sfdin__h467770[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin76378_BIT_33_THEN_2_ELSE_0__q40 = + sfdin__h376378[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin94186_BIT_4_THEN_2_ELSE_0__q156 = + sfdin__h594186[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd02971_BIT_4_THEN_2_ELSE_0__q159 = + _theResult___snd__h602971[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd06409_BIT_4_THEN_2_ELSE_0__q135 = + _theResult___snd__h506409[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd12922_BIT_33_THEN_2_ELSE_0__q67 = + _theResult___snd__h412922[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd24814_BIT_4_THEN_2_ELSE_0__q142 = + _theResult___snd__h524814[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd30712_BIT_33_THEN_2_ELSE_0__q80 = + _theResult___snd__h430712[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd45262_BIT_4_THEN_2_ELSE_0__q175 = + _theResult___snd__h545262[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd58617_BIT_33_THEN_2_ELSE_0__q102 = + _theResult___snd__h458617[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd63667_BIT_4_THEN_2_ELSE_0__q182 = + _theResult___snd__h563667[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd67225_BIT_33_THEN_2_ELSE_0__q32 = + _theResult___snd__h367225[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd76407_BIT_33_THEN_2_ELSE_0__q115 = + _theResult___snd__h476407[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd84566_BIT_4_THEN_2_ELSE_0__q152 = + _theResult___snd__h584566[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd85015_BIT_33_THEN_2_ELSE_0__q45 = + _theResult___snd__h385015[33] ? 2'd2 : 2'd0 ; assign NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5321 = !_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4112 || (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4113 ? @@ -24622,132 +24622,132 @@ module mkCore(CLK, !IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_3023_30_ETC___d13059[15] && !checkForException___d13943[4] && NOT_csrf_fs_reg_read__1746_EQ_0_3232_3233_OR_N_ETC___d13968 ; - assign NOT_IF_NOT_rob_deqPort_0_canDeq__5634_5635_OR__ETC___d16004 = - (fflags__h743227 & csrf_fflags_reg) != fflags__h743227 || + assign NOT_IF_NOT_rob_deqPort_0_canDeq__5640_5641_OR__ETC___d16010 = + (fflags__h742984 & csrf_fflags_reg) != fflags__h742984 || csrf_fs_reg != 2'b11 && - (IF_rob_deqPort_1_canDeq__5639_THEN_IF_NOT_rob__ETC___d15999 || - fflags__h743227 != 5'd0) ; + (IF_rob_deqPort_1_canDeq__5645_THEN_IF_NOT_rob__ETC___d16005 || + fflags__h742984 != 5'd0) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171 = - !f2_sfd__h526064[21] && !f2_sfd__h526064[20] && - !f2_sfd__h526064[19] && - !f2_sfd__h526064[18] && - !f2_sfd__h526064[17] && - !f2_sfd__h526064[16] && - !f2_sfd__h526064[15] && - !f2_sfd__h526064[14] && - !f2_sfd__h526064[13] && - !f2_sfd__h526064[12] && - !f2_sfd__h526064[11] && - !f2_sfd__h526064[10] && - !f2_sfd__h526064[9] && - !f2_sfd__h526064[8] && - !f2_sfd__h526064[7] && - !f2_sfd__h526064[6] && - !f2_sfd__h526064[5] && - !f2_sfd__h526064[4] && - !f2_sfd__h526064[3] && - !f2_sfd__h526064[2] && - !f2_sfd__h526064[1] && - !f2_sfd__h526064[0] ; + !f2_sfd__h526065[21] && !f2_sfd__h526065[20] && + !f2_sfd__h526065[19] && + !f2_sfd__h526065[18] && + !f2_sfd__h526065[17] && + !f2_sfd__h526065[16] && + !f2_sfd__h526065[15] && + !f2_sfd__h526065[14] && + !f2_sfd__h526065[13] && + !f2_sfd__h526065[12] && + !f2_sfd__h526065[11] && + !f2_sfd__h526065[10] && + !f2_sfd__h526065[9] && + !f2_sfd__h526065[8] && + !f2_sfd__h526065[7] && + !f2_sfd__h526065[6] && + !f2_sfd__h526065[5] && + !f2_sfd__h526065[4] && + !f2_sfd__h526065[3] && + !f2_sfd__h526065[2] && + !f2_sfd__h526065[1] && + !f2_sfd__h526065[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10880 = - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 == 23'd0) && - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 != 23'd0) && - (f1_exp__h487069 != 8'd0 || f1_sfd__h487070 != 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 == 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 != 23'd0) && + (f1_exp__h487070 != 8'd0 || f1_sfd__h487071 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10877 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10922 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10880 | - ((f2_exp__h526063 != 8'd255 || f2_sfd__h526064 == 23'd0) && - (f2_exp__h526063 != 8'd255 || f2_sfd__h526064 != 23'd0) && - (f2_exp__h526063 != 8'd0 || f2_sfd__h526064 != 23'd0) && + ((f2_exp__h526064 != 8'd255 || f2_sfd__h526065 == 23'd0) && + (f2_exp__h526064 != 8'd255 || f2_sfd__h526065 != 23'd0) && + (f2_exp__h526064 != 8'd0 || f2_sfd__h526065 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10918) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10980 = - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 == 23'd0) && - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 != 23'd0) && - (f1_exp__h487069 != 8'd0 || f1_sfd__h487070 != 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 == 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 != 23'd0) && + (f1_exp__h487070 != 8'd0 || f1_sfd__h487071 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10977 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10991 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10980 | - ((f2_exp__h526063 != 8'd255 || f2_sfd__h526064 == 23'd0) && - (f2_exp__h526063 != 8'd255 || f2_sfd__h526064 != 23'd0) && - (f2_exp__h526063 != 8'd0 || f2_sfd__h526064 != 23'd0) && + ((f2_exp__h526064 != 8'd255 || f2_sfd__h526065 == 23'd0) && + (f2_exp__h526064 != 8'd255 || f2_sfd__h526065 != 23'd0) && + (f2_exp__h526064 != 8'd0 || f2_sfd__h526065 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10987) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11020 = - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 == 23'd0) && - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 != 23'd0) && - (f1_exp__h487069 != 8'd0 || f1_sfd__h487070 != 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 == 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 != 23'd0) && + (f1_exp__h487070 != 8'd0 || f1_sfd__h487071 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11017 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11035 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11020 | - ((f2_exp__h526063 != 8'd255 || f2_sfd__h526064 == 23'd0) && - (f2_exp__h526063 != 8'd255 || f2_sfd__h526064 != 23'd0) && - (f2_exp__h526063 != 8'd0 || f2_sfd__h526064 != 23'd0) && + ((f2_exp__h526064 != 8'd255 || f2_sfd__h526065 == 23'd0) && + (f2_exp__h526064 != 8'd255 || f2_sfd__h526065 != 23'd0) && + (f2_exp__h526064 != 8'd0 || f2_sfd__h526065 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11031) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11066 = - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 == 23'd0) && - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 != 23'd0) && - (f1_exp__h487069 != 8'd0 || f1_sfd__h487070 != 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 == 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 != 23'd0) && + (f1_exp__h487070 != 8'd0 || f1_sfd__h487071 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11063 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11079 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11066 | - ((f2_exp__h526063 != 8'd255 || f2_sfd__h526064 == 23'd0) && - (f2_exp__h526063 != 8'd255 || f2_sfd__h526064 != 23'd0) && - (f2_exp__h526063 != 8'd0 || f2_sfd__h526064 != 23'd0) && + ((f2_exp__h526064 != 8'd255 || f2_sfd__h526065 == 23'd0) && + (f2_exp__h526064 != 8'd255 || f2_sfd__h526065 != 23'd0) && + (f2_exp__h526064 != 8'd0 || f2_sfd__h526065 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11075) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11108 = - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 == 23'd0) && - (f1_exp__h487069 != 8'd255 || f1_sfd__h487070 != 23'd0) && - (f1_exp__h487069 != 8'd0 || f1_sfd__h487070 != 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 == 23'd0) && + (f1_exp__h487070 != 8'd255 || f1_sfd__h487071 != 23'd0) && + (f1_exp__h487070 != 8'd0 || f1_sfd__h487071 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11105 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11121 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11108 | - ((f2_exp__h526063 != 8'd255 || f2_sfd__h526064 == 23'd0) && - (f2_exp__h526063 != 8'd255 || f2_sfd__h526064 != 23'd0) && - (f2_exp__h526063 != 8'd0 || f2_sfd__h526064 != 23'd0) && + ((f2_exp__h526064 != 8'd255 || f2_sfd__h526065 == 23'd0) && + (f2_exp__h526064 != 8'd255 || f2_sfd__h526065 != 23'd0) && + (f2_exp__h526064 != 8'd0 || f2_sfd__h526065 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11117) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8671 = - !f1_sfd__h487070[21] && !f1_sfd__h487070[20] && - !f1_sfd__h487070[19] && - !f1_sfd__h487070[18] && - !f1_sfd__h487070[17] && - !f1_sfd__h487070[16] && - !f1_sfd__h487070[15] && - !f1_sfd__h487070[14] && - !f1_sfd__h487070[13] && - !f1_sfd__h487070[12] && - !f1_sfd__h487070[11] && - !f1_sfd__h487070[10] && - !f1_sfd__h487070[9] && - !f1_sfd__h487070[8] && - !f1_sfd__h487070[7] && - !f1_sfd__h487070[6] && - !f1_sfd__h487070[5] && - !f1_sfd__h487070[4] && - !f1_sfd__h487070[3] && - !f1_sfd__h487070[2] && - !f1_sfd__h487070[1] && - !f1_sfd__h487070[0] ; + !f1_sfd__h487071[21] && !f1_sfd__h487071[20] && + !f1_sfd__h487071[19] && + !f1_sfd__h487071[18] && + !f1_sfd__h487071[17] && + !f1_sfd__h487071[16] && + !f1_sfd__h487071[15] && + !f1_sfd__h487071[14] && + !f1_sfd__h487071[13] && + !f1_sfd__h487071[12] && + !f1_sfd__h487071[11] && + !f1_sfd__h487071[10] && + !f1_sfd__h487071[9] && + !f1_sfd__h487071[8] && + !f1_sfd__h487071[7] && + !f1_sfd__h487071[6] && + !f1_sfd__h487071[5] && + !f1_sfd__h487071[4] && + !f1_sfd__h487071[3] && + !f1_sfd__h487071[2] && + !f1_sfd__h487071[1] && + !f1_sfd__h487071[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9401 = - !f3_sfd__h565368[21] && !f3_sfd__h565368[20] && - !f3_sfd__h565368[19] && - !f3_sfd__h565368[18] && - !f3_sfd__h565368[17] && - !f3_sfd__h565368[16] && - !f3_sfd__h565368[15] && - !f3_sfd__h565368[14] && - !f3_sfd__h565368[13] && - !f3_sfd__h565368[12] && - !f3_sfd__h565368[11] && - !f3_sfd__h565368[10] && - !f3_sfd__h565368[9] && - !f3_sfd__h565368[8] && - !f3_sfd__h565368[7] && - !f3_sfd__h565368[6] && - !f3_sfd__h565368[5] && - !f3_sfd__h565368[4] && - !f3_sfd__h565368[3] && - !f3_sfd__h565368[2] && - !f3_sfd__h565368[1] && - !f3_sfd__h565368[0] ; + !f3_sfd__h565369[21] && !f3_sfd__h565369[20] && + !f3_sfd__h565369[19] && + !f3_sfd__h565369[18] && + !f3_sfd__h565369[17] && + !f3_sfd__h565369[16] && + !f3_sfd__h565369[15] && + !f3_sfd__h565369[14] && + !f3_sfd__h565369[13] && + !f3_sfd__h565369[12] && + !f3_sfd__h565369[11] && + !f3_sfd__h565369[10] && + !f3_sfd__h565369[9] && + !f3_sfd__h565369[8] && + !f3_sfd__h565369[7] && + !f3_sfd__h565369[6] && + !f3_sfd__h565369[5] && + !f3_sfd__h565369[4] && + !f3_sfd__h565369[3] && + !f3_sfd__h565369[2] && + !f3_sfd__h565369[1] && + !f3_sfd__h565369[0] ; assign NOT_SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__ETC___d13729 = !SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__368_ETC___d13727 && (fetchStage$pipelines_0_first[194:192] != 3'd1 || @@ -24806,7 +24806,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd19 || rob$deqPort_0_deq_data[329:325] == 5'd20) && _0b0_CONCAT_csrf_external_int_pend_vec_3_read___ETC___d14631 ; - assign NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15688 = + assign NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15694 = NOT_commitStage_rg_run_state_4652_4653_AND_NOT_ETC___d15316 && rob$deqPort_0_deq_data[329:325] != 5'd0 && rob$deqPort_0_deq_data[329:325] != 5'd21 && @@ -25757,14 +25757,14 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__3022_EQ_3_302_ETC___d13970 && rob$enqPort_1_canEnq && epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d14139 ; - assign NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_RDY_ETC___d15676 = + assign NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_RDY_ETC___d15682 = (!rob$deqPort_0_canDeq || rob$RDY_deqPort_0_deq && regRenamingTable$RDY_commit_0_commit && v_f_to_TV_0$FULL_N) && (!rob$deqPort_1_canDeq || rob$RDY_deqPort_1_deq_data && - NOT_rob_deqPort_1_deq_data__5642_BIT_25_5643_5_ETC___d15673) ; - assign NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_deq_ETC___d15982 = + NOT_rob_deqPort_1_deq_data__5648_BIT_25_5649_5_ETC___d15679) ; + assign NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_deq_ETC___d15988 = (!rob$deqPort_0_canDeq || rob$deqPort_0_deq_data[25] && !rob$deqPort_0_deq_data[18] && !rob$deqPort_0_deq_data[167] && @@ -25786,7 +25786,7 @@ module mkCore(CLK, (IF_rob_deqPort_0_deq_data__4646_BIT_181_4721_T_ETC___d15295 != 6'd6 || csrf_terminate_module_terminateQ$FULL_N) ; - assign NOT_rob_deqPort_1_deq_data__5642_BIT_25_5643_5_ETC___d15673 = + assign NOT_rob_deqPort_1_deq_data__5648_BIT_25_5649_5_ETC___d15679 = !rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -25831,27 +25831,27 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, !CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q268, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d3035, - x__h295970 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16420 = + x__h295971 } ; + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16426 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q270, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q271, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q272 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16376 = + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16382 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q253, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q254, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q255, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q256 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16385 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16376, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16391 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16382, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q257, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q258 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16394 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16385, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16400 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16391, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q262, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q263 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10246 = - { {4{f2_exp26063_MINUS_127__q176[7]}}, - f2_exp26063_MINUS_127__q176 } ; + { {4{f2_exp26064_MINUS_127__q176[7]}}, + f2_exp26064_MINUS_127__q176 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10246 ^ 12'h800) <= @@ -25861,12 +25861,12 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11191 = - b__h608063 * b__h608139 ; + b__h608064 * b__h608140 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d11204 = - b__h608063 * b__h608252 ; + b__h608064 * b__h608253 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8761 = - { {4{f1_exp87069_MINUS_127__q136[7]}}, - f1_exp87069_MINUS_127__q136 } ; + { {4{f1_exp87070_MINUS_127__q136[7]}}, + f1_exp87070_MINUS_127__q136 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8761 ^ 12'h800) <= @@ -25876,8 +25876,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9476 = - { {4{f3_exp65367_MINUS_127__q153[7]}}, - f3_exp65367_MINUS_127__q153 } ; + { {4{f3_exp65368_MINUS_127__q153[7]}}, + f3_exp65368_MINUS_127__q153 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9476 ^ 12'h800) <= @@ -25962,15 +25962,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5269 = { 3'd0, - _theResult___fst_exp__h358617 == 8'd0 && - (sfdin__h358611[56:34] == 23'd0 || guard__h350516 != 2'b0), + _theResult___fst_exp__h358618 == 8'd0 && + (sfdin__h358612[56:34] == 23'd0 || guard__h350517 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h359214 == 8'd255 && - _theResult___fst_sfd__h359215 == 23'd0, + _theResult___fst_exp__h359215 == 8'd255 && + _theResult___fst_sfd__h359216 == 23'd0, 1'd0, - _theResult___fst_exp__h358617 != 8'd255 && - guard__h350516 != 2'b0 } ; + _theResult___fst_exp__h358618 != 8'd255 && + guard__h350517 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5741 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5739 } ^ @@ -25978,15 +25978,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6661 = { 3'd0, - _theResult___fst_exp__h404314 == 8'd0 && - (sfdin__h404308[56:34] == 23'd0 || guard__h396215 != 2'b0), + _theResult___fst_exp__h404315 == 8'd0 && + (sfdin__h404309[56:34] == 23'd0 || guard__h396216 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h404911 == 8'd255 && - _theResult___fst_sfd__h404912 == 23'd0, + _theResult___fst_exp__h404912 == 8'd255 && + _theResult___fst_sfd__h404913 == 23'd0, 1'd0, - _theResult___fst_exp__h404314 != 8'd255 && - guard__h396215 != 2'b0 } ; + _theResult___fst_exp__h404315 != 8'd255 && + guard__h396216 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7133 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7131 } ^ @@ -25994,15 +25994,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d8053 = { 3'd0, - _theResult___fst_exp__h450009 == 8'd0 && - (sfdin__h450003[56:34] == 23'd0 || guard__h441910 != 2'b0), + _theResult___fst_exp__h450010 == 8'd0 && + (sfdin__h450004[56:34] == 23'd0 || guard__h441911 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h450606 == 8'd255 && - _theResult___fst_sfd__h450607 == 23'd0, + _theResult___fst_exp__h450607 == 8'd255 && + _theResult___fst_sfd__h450608 == 23'd0, 1'd0, - _theResult___fst_exp__h450009 != 8'd255 && - guard__h441910 != 2'b0 } ; + _theResult___fst_exp__h450010 != 8'd255 && + guard__h441911 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10497 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10495 } ^ @@ -26010,37 +26010,37 @@ module mkCore(CLK, 12'd2048 ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10873 = { 3'd0, - _theResult___fst_exp__h516034 == 11'd0 && - (sfdin__h516028[56:5] == 52'd0 || guard__h507808 != 2'b0), + _theResult___fst_exp__h516035 == 11'd0 && + (sfdin__h516029[56:5] == 52'd0 || guard__h507809 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h516866 == 11'd2047 && - _theResult___fst_sfd__h516867 == 52'd0, + _theResult___fst_exp__h516867 == 11'd2047 && + _theResult___fst_sfd__h516868 == 52'd0, 1'd0, - _theResult___fst_exp__h516034 != 11'd2047 && - guard__h507808 != 2'b0 } ; + _theResult___fst_exp__h516035 != 11'd2047 && + guard__h507809 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10914 = { 3'd0, - _theResult___fst_exp__h554887 == 11'd0 && - (sfdin__h554881[56:5] == 52'd0 || guard__h546661 != 2'b0), + _theResult___fst_exp__h554888 == 11'd0 && + (sfdin__h554882[56:5] == 52'd0 || guard__h546662 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h555719 == 11'd2047 && - _theResult___fst_sfd__h555720 == 52'd0, + _theResult___fst_exp__h555720 == 11'd2047 && + _theResult___fst_sfd__h555721 == 52'd0, 1'd0, - _theResult___fst_exp__h554887 != 11'd2047 && - guard__h546661 != 2'b0 } ; + _theResult___fst_exp__h554888 != 11'd2047 && + guard__h546662 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10958 = { 3'd0, - _theResult___fst_exp__h594191 == 11'd0 && - (sfdin__h594185[56:5] == 52'd0 || guard__h585965 != 2'b0), + _theResult___fst_exp__h594192 == 11'd0 && + (sfdin__h594186[56:5] == 52'd0 || guard__h585966 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h595023 == 11'd2047 && - _theResult___fst_sfd__h595024 == 52'd0, + _theResult___fst_exp__h595024 == 11'd2047 && + _theResult___fst_sfd__h595025 == 52'd0, 1'd0, - _theResult___fst_exp__h594191 != 11'd2047 && - guard__h585965 != 2'b0 } ; + _theResult___fst_exp__h594192 != 11'd2047 && + guard__h585966 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9012 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9010 } ^ @@ -26058,15 +26058,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5298 = { 3'd0, - _theResult___fst_exp__h376383 == 8'd0 && - (sfdin__h376377[56:34] == 23'd0 || guard__h368155 != 2'b0), + _theResult___fst_exp__h376384 == 8'd0 && + (sfdin__h376378[56:34] == 23'd0 || guard__h368156 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h376980 == 8'd255 && - _theResult___fst_sfd__h376981 == 23'd0, + _theResult___fst_exp__h376981 == 8'd255 && + _theResult___fst_sfd__h376982 == 23'd0, 1'd0, - _theResult___fst_exp__h376383 != 8'd255 && - guard__h368155 != 2'b0 } ; + _theResult___fst_exp__h376384 != 8'd255 && + guard__h368156 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6292 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6290 } ^ @@ -26074,15 +26074,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6690 = { 3'd0, - _theResult___fst_exp__h422080 == 8'd0 && - (sfdin__h422074[56:34] == 23'd0 || guard__h413852 != 2'b0), + _theResult___fst_exp__h422081 == 8'd0 && + (sfdin__h422075[56:34] == 23'd0 || guard__h413853 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h422677 == 8'd255 && - _theResult___fst_sfd__h422678 == 23'd0, + _theResult___fst_exp__h422678 == 8'd255 && + _theResult___fst_sfd__h422679 == 23'd0, 1'd0, - _theResult___fst_exp__h422080 != 8'd255 && - guard__h413852 != 2'b0 } ; + _theResult___fst_exp__h422081 != 8'd255 && + guard__h413853 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7684 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7682 } ^ @@ -26090,15 +26090,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d8082 = { 3'd0, - _theResult___fst_exp__h467775 == 8'd0 && - (sfdin__h467769[56:34] == 23'd0 || guard__h459547 != 2'b0), + _theResult___fst_exp__h467776 == 8'd0 && + (sfdin__h467770[56:34] == 23'd0 || guard__h459548 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h468372 == 8'd255 && - _theResult___fst_sfd__h468373 == 23'd0, + _theResult___fst_exp__h468373 == 8'd255 && + _theResult___fst_sfd__h468374 == 23'd0, 1'd0, - _theResult___fst_exp__h467775 != 8'd255 && - guard__h459547 != 2'b0 } ; + _theResult___fst_exp__h467776 != 8'd255 && + guard__h459548 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10200 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10198 } ^ @@ -26112,37 +26112,37 @@ module mkCore(CLK, 12'h800) ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10856 = { 3'd0, - _theResult___fst_exp__h506457 == 11'd0 && - guard__h498496 != 2'b0, + _theResult___fst_exp__h506458 == 11'd0 && + guard__h498497 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h507215 == 11'd2047 && - _theResult___fst_sfd__h507216 == 52'd0, + _theResult___fst_exp__h507216 == 11'd2047 && + _theResult___fst_sfd__h507217 == 52'd0, 1'd0, - _theResult___fst_exp__h506457 != 11'd2047 && - guard__h498496 != 2'b0 } ; + _theResult___fst_exp__h506458 != 11'd2047 && + guard__h498497 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10897 = { 3'd0, - _theResult___fst_exp__h545310 == 11'd0 && - guard__h537349 != 2'b0, + _theResult___fst_exp__h545311 == 11'd0 && + guard__h537350 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h546068 == 11'd2047 && - _theResult___fst_sfd__h546069 == 52'd0, + _theResult___fst_exp__h546069 == 11'd2047 && + _theResult___fst_sfd__h546070 == 52'd0, 1'd0, - _theResult___fst_exp__h545310 != 11'd2047 && - guard__h537349 != 2'b0 } ; + _theResult___fst_exp__h545311 != 11'd2047 && + guard__h537350 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10941 = { 3'd0, - _theResult___fst_exp__h584614 == 11'd0 && - guard__h576653 != 2'b0, + _theResult___fst_exp__h584615 == 11'd0 && + guard__h576654 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h585372 == 11'd2047 && - _theResult___fst_sfd__h585373 == 52'd0, + _theResult___fst_exp__h585373 == 11'd2047 && + _theResult___fst_sfd__h585374 == 52'd0, 1'd0, - _theResult___fst_exp__h584614 != 11'd2047 && - guard__h576653 != 2'b0 } ; + _theResult___fst_exp__h584615 != 11'd2047 && + guard__h576654 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8700 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8698 } ^ @@ -26178,15 +26178,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5281 = { 3'd0, - _theResult___fst_exp__h367273 == 8'd0 && - guard__h359225 != 2'b0, + _theResult___fst_exp__h367274 == 8'd0 && + guard__h359226 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h367796 == 8'd255 && - _theResult___fst_sfd__h367797 == 23'd0, + _theResult___fst_exp__h367797 == 8'd255 && + _theResult___fst_sfd__h367798 == 23'd0, 1'd0, - _theResult___fst_exp__h367273 != 8'd255 && - guard__h359225 != 2'b0 } ; + _theResult___fst_exp__h367274 != 8'd255 && + guard__h359226 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5972 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5970 } ^ @@ -26200,15 +26200,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6673 = { 3'd0, - _theResult___fst_exp__h412970 == 8'd0 && - guard__h404922 != 2'b0, + _theResult___fst_exp__h412971 == 8'd0 && + guard__h404923 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h413493 == 8'd255 && - _theResult___fst_sfd__h413494 == 23'd0, + _theResult___fst_exp__h413494 == 8'd255 && + _theResult___fst_sfd__h413495 == 23'd0, 1'd0, - _theResult___fst_exp__h412970 != 8'd255 && - guard__h404922 != 2'b0 } ; + _theResult___fst_exp__h412971 != 8'd255 && + guard__h404923 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7364 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7362 } ^ @@ -26222,17 +26222,17 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d8065 = { 3'd0, - _theResult___fst_exp__h458665 == 8'd0 && - guard__h450617 != 2'b0, + _theResult___fst_exp__h458666 == 8'd0 && + guard__h450618 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h459188 == 8'd255 && - _theResult___fst_sfd__h459189 == 23'd0, + _theResult___fst_exp__h459189 == 8'd255 && + _theResult___fst_sfd__h459190 == 23'd0, 1'd0, - _theResult___fst_exp__h458665 != 8'd255 && - guard__h450617 != 2'b0 } ; + _theResult___fst_exp__h458666 != 8'd255 && + guard__h450618 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d11197 = - b__h608240 * b__h608252 ; + b__h608241 * b__h608253 ; assign _0_CONCAT_csrf_external_int_en_vec_3_read__1864_ETC___d13033 = { 4'd0, csrf_external_int_en_vec_3 & csrf_external_int_pend_vec_3, @@ -26260,26 +26260,26 @@ module mkCore(CLK, specTagManager$RDY_nextSpecTag) && CASE_fetchStage_pipelines_0_canDeq__2990_AND_N_ETC__q241 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10253 = - sfd__h526425 >> + sfd__h526426 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10249 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8768 = - sfd__h487431 >> + sfd__h487432 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8764 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9483 = - sfd__h565729 >> + sfd__h565730 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9479 ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4658 = - sfd__h342901 >> + sfd__h342902 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4654[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4654) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6050 = - sfd__h388603 >> + sfd__h388604 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6046[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6046) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7442 = - sfd__h434298 >> + sfd__h434299 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7438[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7438) ; @@ -26694,51 +26694,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10124 = 12'd3970 - { 7'd0, - f2_sfd__h526064[22] ? + f2_sfd__h526065[22] ? 5'd0 : - (f2_sfd__h526064[21] ? + (f2_sfd__h526065[21] ? 5'd1 : - (f2_sfd__h526064[20] ? + (f2_sfd__h526065[20] ? 5'd2 : - (f2_sfd__h526064[19] ? + (f2_sfd__h526065[19] ? 5'd3 : - (f2_sfd__h526064[18] ? + (f2_sfd__h526065[18] ? 5'd4 : - (f2_sfd__h526064[17] ? + (f2_sfd__h526065[17] ? 5'd5 : - (f2_sfd__h526064[16] ? + (f2_sfd__h526065[16] ? 5'd6 : - (f2_sfd__h526064[15] ? + (f2_sfd__h526065[15] ? 5'd7 : - (f2_sfd__h526064[14] ? + (f2_sfd__h526065[14] ? 5'd8 : - (f2_sfd__h526064[13] ? + (f2_sfd__h526065[13] ? 5'd9 : - (f2_sfd__h526064[12] ? + (f2_sfd__h526065[12] ? 5'd10 : - (f2_sfd__h526064[11] ? + (f2_sfd__h526065[11] ? 5'd11 : - (f2_sfd__h526064[10] ? + (f2_sfd__h526065[10] ? 5'd12 : - (f2_sfd__h526064[9] ? + (f2_sfd__h526065[9] ? 5'd13 : - (f2_sfd__h526064[8] ? + (f2_sfd__h526065[8] ? 5'd14 : - (f2_sfd__h526064[7] ? + (f2_sfd__h526065[7] ? 5'd15 : - (f2_sfd__h526064[6] ? + (f2_sfd__h526065[6] ? 5'd16 : - (f2_sfd__h526064[5] ? + (f2_sfd__h526065[5] ? 5'd17 : - (f2_sfd__h526064[4] ? + (f2_sfd__h526065[4] ? 5'd18 : - (f2_sfd__h526064[3] ? + (f2_sfd__h526065[3] ? 5'd19 : - (f2_sfd__h526064[2] ? + (f2_sfd__h526065[2] ? 5'd20 : - (f2_sfd__h526064[1] ? + (f2_sfd__h526065[1] ? 5'd21 : - (f2_sfd__h526064[0] ? + (f2_sfd__h526065[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 = @@ -26752,51 +26752,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8624 = 12'd3970 - { 7'd0, - f1_sfd__h487070[22] ? + f1_sfd__h487071[22] ? 5'd0 : - (f1_sfd__h487070[21] ? + (f1_sfd__h487071[21] ? 5'd1 : - (f1_sfd__h487070[20] ? + (f1_sfd__h487071[20] ? 5'd2 : - (f1_sfd__h487070[19] ? + (f1_sfd__h487071[19] ? 5'd3 : - (f1_sfd__h487070[18] ? + (f1_sfd__h487071[18] ? 5'd4 : - (f1_sfd__h487070[17] ? + (f1_sfd__h487071[17] ? 5'd5 : - (f1_sfd__h487070[16] ? + (f1_sfd__h487071[16] ? 5'd6 : - (f1_sfd__h487070[15] ? + (f1_sfd__h487071[15] ? 5'd7 : - (f1_sfd__h487070[14] ? + (f1_sfd__h487071[14] ? 5'd8 : - (f1_sfd__h487070[13] ? + (f1_sfd__h487071[13] ? 5'd9 : - (f1_sfd__h487070[12] ? + (f1_sfd__h487071[12] ? 5'd10 : - (f1_sfd__h487070[11] ? + (f1_sfd__h487071[11] ? 5'd11 : - (f1_sfd__h487070[10] ? + (f1_sfd__h487071[10] ? 5'd12 : - (f1_sfd__h487070[9] ? + (f1_sfd__h487071[9] ? 5'd13 : - (f1_sfd__h487070[8] ? + (f1_sfd__h487071[8] ? 5'd14 : - (f1_sfd__h487070[7] ? + (f1_sfd__h487071[7] ? 5'd15 : - (f1_sfd__h487070[6] ? + (f1_sfd__h487071[6] ? 5'd16 : - (f1_sfd__h487070[5] ? + (f1_sfd__h487071[5] ? 5'd17 : - (f1_sfd__h487070[4] ? + (f1_sfd__h487071[4] ? 5'd18 : - (f1_sfd__h487070[3] ? + (f1_sfd__h487071[3] ? 5'd19 : - (f1_sfd__h487070[2] ? + (f1_sfd__h487071[2] ? 5'd20 : - (f1_sfd__h487070[1] ? + (f1_sfd__h487071[1] ? 5'd21 : - (f1_sfd__h487070[0] ? + (f1_sfd__h487071[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 = @@ -26810,51 +26810,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9354 = 12'd3970 - { 7'd0, - f3_sfd__h565368[22] ? + f3_sfd__h565369[22] ? 5'd0 : - (f3_sfd__h565368[21] ? + (f3_sfd__h565369[21] ? 5'd1 : - (f3_sfd__h565368[20] ? + (f3_sfd__h565369[20] ? 5'd2 : - (f3_sfd__h565368[19] ? + (f3_sfd__h565369[19] ? 5'd3 : - (f3_sfd__h565368[18] ? + (f3_sfd__h565369[18] ? 5'd4 : - (f3_sfd__h565368[17] ? + (f3_sfd__h565369[17] ? 5'd5 : - (f3_sfd__h565368[16] ? + (f3_sfd__h565369[16] ? 5'd6 : - (f3_sfd__h565368[15] ? + (f3_sfd__h565369[15] ? 5'd7 : - (f3_sfd__h565368[14] ? + (f3_sfd__h565369[14] ? 5'd8 : - (f3_sfd__h565368[13] ? + (f3_sfd__h565369[13] ? 5'd9 : - (f3_sfd__h565368[12] ? + (f3_sfd__h565369[12] ? 5'd10 : - (f3_sfd__h565368[11] ? + (f3_sfd__h565369[11] ? 5'd11 : - (f3_sfd__h565368[10] ? + (f3_sfd__h565369[10] ? 5'd12 : - (f3_sfd__h565368[9] ? + (f3_sfd__h565369[9] ? 5'd13 : - (f3_sfd__h565368[8] ? + (f3_sfd__h565369[8] ? 5'd14 : - (f3_sfd__h565368[7] ? + (f3_sfd__h565369[7] ? 5'd15 : - (f3_sfd__h565368[6] ? + (f3_sfd__h565369[6] ? 5'd16 : - (f3_sfd__h565368[5] ? + (f3_sfd__h565369[5] ? 5'd17 : - (f3_sfd__h565368[4] ? + (f3_sfd__h565369[4] ? 5'd18 : - (f3_sfd__h565368[3] ? + (f3_sfd__h565369[3] ? 5'd19 : - (f3_sfd__h565368[2] ? + (f3_sfd__h565369[2] ? 5'd20 : - (f3_sfd__h565368[1] ? + (f3_sfd__h565369[1] ? 5'd21 : - (f3_sfd__h565368[0] ? + (f3_sfd__h565369[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 = @@ -27007,1421 +27007,1421 @@ module mkCore(CLK, assign _dor1sbCons$EN_setReady_1_put = WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_F || WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_T ; - assign _theResult_____2__h300942 = + assign _theResult_____2__h300943 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3146) ? - next_deqP___1__h301221 : + next_deqP___1__h301222 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP ; - assign _theResult_____2__h308938 = + assign _theResult_____2__h308939 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3253) ? - next_deqP___1__h309217 : + next_deqP___1__h309218 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP ; - assign _theResult_____2__h314932 = + assign _theResult_____2__h314933 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3424) ? - next_deqP___1__h315498 : + next_deqP___1__h315499 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP ; - assign _theResult_____2__h322786 = + assign _theResult_____2__h322787 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3520) ? - next_deqP___1__h323352 : + next_deqP___1__h323353 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP ; - assign _theResult_____2__h333130 = + assign _theResult_____2__h333131 = (coreFix_memExe_memRespLdQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3749) ? - next_deqP___1__h333409 : + next_deqP___1__h333410 : coreFix_memExe_memRespLdQ_deqP ; - assign _theResult_____2__h336355 = + assign _theResult_____2__h336356 = (coreFix_memExe_forwardQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3843) ? - next_deqP___1__h336634 : + next_deqP___1__h336635 : coreFix_memExe_forwardQ_deqP ; - assign _theResult____h350506 = - (value__h351128 == 54'd0) ? sfd__h342901 : 57'd1 ; - assign _theResult____h368145 = + assign _theResult____h350507 = + (value__h351129 == 54'd0) ? sfd__h342902 : 57'd1 ; + assign _theResult____h368146 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4654 ^ 12'h800) < 12'd2105) ? - result__h368758 : - _theResult____h350506 ; - assign _theResult____h396205 = - (value__h396825 == 54'd0) ? sfd__h388603 : 57'd1 ; - assign _theResult____h413842 = + result__h368759 : + _theResult____h350507 ; + assign _theResult____h396206 = + (value__h396826 == 54'd0) ? sfd__h388604 : 57'd1 ; + assign _theResult____h413843 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6046 ^ 12'h800) < 12'd2105) ? - result__h414455 : - _theResult____h396205 ; - assign _theResult____h441900 = - (value__h442520 == 54'd0) ? sfd__h434298 : 57'd1 ; - assign _theResult____h459537 = + result__h414456 : + _theResult____h396206 ; + assign _theResult____h441901 = + (value__h442521 == 54'd0) ? sfd__h434299 : 57'd1 ; + assign _theResult____h459538 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7438 ^ 12'h800) < 12'd2105) ? - result__h460150 : - _theResult____h441900 ; - assign _theResult____h507798 = + result__h460151 : + _theResult____h441901 ; + assign _theResult____h507799 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8764 ^ 12'h800) < 12'd2105) ? - result__h508411 : - ((value__h492014 == 25'd0) ? sfd__h487431 : 57'd1) ; - assign _theResult____h546651 = + result__h508412 : + ((value__h492015 == 25'd0) ? sfd__h487432 : 57'd1) ; + assign _theResult____h546652 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10249 ^ 12'h800) < 12'd2105) ? - result__h547264 : - ((value__h530867 == 25'd0) ? sfd__h526425 : 57'd1) ; - assign _theResult____h585955 = + result__h547265 : + ((value__h530868 == 25'd0) ? sfd__h526426 : 57'd1) ; + assign _theResult____h585956 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9479 ^ 12'h800) < 12'd2105) ? - result__h586568 : - ((value__h570171 == 25'd0) ? sfd__h565729 : 57'd1) ; + result__h586569 : + ((value__h570172 == 25'd0) ? sfd__h565730 : 57'd1) ; assign _theResult____h658376 = (csrf_prv_reg != 2'd3 || csrf_ie_vec_3) ? enabled_ints___1__h658901 : 16'd0 ; - assign _theResult___exp__h359133 = - sfd__h358709[24] ? - ((_theResult___fst_exp__h358617 == 8'd254) ? + assign _theResult___exp__h359134 = + sfd__h358710[24] ? + ((_theResult___fst_exp__h358618 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385650) : - ((_theResult___fst_exp__h358617 == 8'd0 && - sfd__h358709[24:23] == 2'b01) ? + din_inc___2_exp__h385651) : + ((_theResult___fst_exp__h358618 == 8'd0 && + sfd__h358710[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h358617) ; - assign _theResult___exp__h367715 = - sfd__h367291[24] ? - ((_theResult___fst_exp__h367273 == 8'd254) ? + _theResult___fst_exp__h358618) ; + assign _theResult___exp__h367716 = + sfd__h367292[24] ? + ((_theResult___fst_exp__h367274 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385674) : - ((_theResult___fst_exp__h367273 == 8'd0 && - sfd__h367291[24:23] == 2'b01) ? + din_inc___2_exp__h385675) : + ((_theResult___fst_exp__h367274 == 8'd0 && + sfd__h367292[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h367273) ; - assign _theResult___exp__h376899 = - sfd__h376475[24] ? - ((_theResult___fst_exp__h376383 == 8'd254) ? + _theResult___fst_exp__h367274) ; + assign _theResult___exp__h376900 = + sfd__h376476[24] ? + ((_theResult___fst_exp__h376384 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385704) : - ((_theResult___fst_exp__h376383 == 8'd0 && - sfd__h376475[24:23] == 2'b01) ? + din_inc___2_exp__h385705) : + ((_theResult___fst_exp__h376384 == 8'd0 && + sfd__h376476[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h376383) ; - assign _theResult___exp__h385535 = - sfd__h385087[24] ? - ((_theResult___fst_exp__h385068 == 8'd254) ? + _theResult___fst_exp__h376384) ; + assign _theResult___exp__h385536 = + sfd__h385088[24] ? + ((_theResult___fst_exp__h385069 == 8'd254) ? 8'd255 : - din_inc___2_exp__h385728) : - ((_theResult___fst_exp__h385068 == 8'd0 && - sfd__h385087[24:23] == 2'b01) ? + din_inc___2_exp__h385729) : + ((_theResult___fst_exp__h385069 == 8'd0 && + sfd__h385088[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h385068) ; - assign _theResult___exp__h385637 = + _theResult___fst_exp__h385069) ; + assign _theResult___exp__h385638 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h385628 ; - assign _theResult___exp__h404830 = - sfd__h404406[24] ? - ((_theResult___fst_exp__h404314 == 8'd254) ? + _theResult___fst_exp__h385629 ; + assign _theResult___exp__h404831 = + sfd__h404407[24] ? + ((_theResult___fst_exp__h404315 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431347) : - ((_theResult___fst_exp__h404314 == 8'd0 && - sfd__h404406[24:23] == 2'b01) ? + din_inc___2_exp__h431348) : + ((_theResult___fst_exp__h404315 == 8'd0 && + sfd__h404407[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h404314) ; - assign _theResult___exp__h413412 = - sfd__h412988[24] ? - ((_theResult___fst_exp__h412970 == 8'd254) ? + _theResult___fst_exp__h404315) ; + assign _theResult___exp__h413413 = + sfd__h412989[24] ? + ((_theResult___fst_exp__h412971 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431371) : - ((_theResult___fst_exp__h412970 == 8'd0 && - sfd__h412988[24:23] == 2'b01) ? + din_inc___2_exp__h431372) : + ((_theResult___fst_exp__h412971 == 8'd0 && + sfd__h412989[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h412970) ; - assign _theResult___exp__h422596 = - sfd__h422172[24] ? - ((_theResult___fst_exp__h422080 == 8'd254) ? + _theResult___fst_exp__h412971) ; + assign _theResult___exp__h422597 = + sfd__h422173[24] ? + ((_theResult___fst_exp__h422081 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431401) : - ((_theResult___fst_exp__h422080 == 8'd0 && - sfd__h422172[24:23] == 2'b01) ? + din_inc___2_exp__h431402) : + ((_theResult___fst_exp__h422081 == 8'd0 && + sfd__h422173[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h422080) ; - assign _theResult___exp__h431232 = - sfd__h430784[24] ? - ((_theResult___fst_exp__h430765 == 8'd254) ? + _theResult___fst_exp__h422081) ; + assign _theResult___exp__h431233 = + sfd__h430785[24] ? + ((_theResult___fst_exp__h430766 == 8'd254) ? 8'd255 : - din_inc___2_exp__h431425) : - ((_theResult___fst_exp__h430765 == 8'd0 && - sfd__h430784[24:23] == 2'b01) ? + din_inc___2_exp__h431426) : + ((_theResult___fst_exp__h430766 == 8'd0 && + sfd__h430785[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h430765) ; - assign _theResult___exp__h431334 = + _theResult___fst_exp__h430766) ; + assign _theResult___exp__h431335 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h431325 ; - assign _theResult___exp__h450525 = - sfd__h450101[24] ? - ((_theResult___fst_exp__h450009 == 8'd254) ? + _theResult___fst_exp__h431326 ; + assign _theResult___exp__h450526 = + sfd__h450102[24] ? + ((_theResult___fst_exp__h450010 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477042) : - ((_theResult___fst_exp__h450009 == 8'd0 && - sfd__h450101[24:23] == 2'b01) ? + din_inc___2_exp__h477043) : + ((_theResult___fst_exp__h450010 == 8'd0 && + sfd__h450102[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h450009) ; - assign _theResult___exp__h459107 = - sfd__h458683[24] ? - ((_theResult___fst_exp__h458665 == 8'd254) ? + _theResult___fst_exp__h450010) ; + assign _theResult___exp__h459108 = + sfd__h458684[24] ? + ((_theResult___fst_exp__h458666 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477066) : - ((_theResult___fst_exp__h458665 == 8'd0 && - sfd__h458683[24:23] == 2'b01) ? + din_inc___2_exp__h477067) : + ((_theResult___fst_exp__h458666 == 8'd0 && + sfd__h458684[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h458665) ; - assign _theResult___exp__h468291 = - sfd__h467867[24] ? - ((_theResult___fst_exp__h467775 == 8'd254) ? + _theResult___fst_exp__h458666) ; + assign _theResult___exp__h468292 = + sfd__h467868[24] ? + ((_theResult___fst_exp__h467776 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477096) : - ((_theResult___fst_exp__h467775 == 8'd0 && - sfd__h467867[24:23] == 2'b01) ? + din_inc___2_exp__h477097) : + ((_theResult___fst_exp__h467776 == 8'd0 && + sfd__h467868[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h467775) ; - assign _theResult___exp__h476927 = - sfd__h476479[24] ? - ((_theResult___fst_exp__h476460 == 8'd254) ? + _theResult___fst_exp__h467776) ; + assign _theResult___exp__h476928 = + sfd__h476480[24] ? + ((_theResult___fst_exp__h476461 == 8'd254) ? 8'd255 : - din_inc___2_exp__h477120) : - ((_theResult___fst_exp__h476460 == 8'd0 && - sfd__h476479[24:23] == 2'b01) ? + din_inc___2_exp__h477121) : + ((_theResult___fst_exp__h476461 == 8'd0 && + sfd__h476480[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h476460) ; - assign _theResult___exp__h477029 = + _theResult___fst_exp__h476461) ; + assign _theResult___exp__h477030 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h477020 ; - assign _theResult___exp__h507112 = - sfd__h506475[53] ? - ((_theResult___fst_exp__h506457 == 11'd2046) ? + _theResult___fst_exp__h477021 ; + assign _theResult___exp__h507113 = + sfd__h506476[53] ? + ((_theResult___fst_exp__h506458 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h525707) : - ((_theResult___fst_exp__h506457 == 11'd0 && - sfd__h506475[53:52] == 2'b01) ? + din_inc___2_exp__h525708) : + ((_theResult___fst_exp__h506458 == 11'd0 && + sfd__h506476[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h506457) ; - assign _theResult___exp__h516763 = - sfd__h516126[53] ? - ((_theResult___fst_exp__h516034 == 11'd2046) ? + _theResult___fst_exp__h506458) ; + assign _theResult___exp__h516764 = + sfd__h516127[53] ? + ((_theResult___fst_exp__h516035 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h525742) : - ((_theResult___fst_exp__h516034 == 11'd0 && - sfd__h516126[53:52] == 2'b01) ? + din_inc___2_exp__h525743) : + ((_theResult___fst_exp__h516035 == 11'd0 && + sfd__h516127[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h516034) ; - assign _theResult___exp__h525547 = - sfd__h524886[53] ? - ((_theResult___fst_exp__h524867 == 11'd2046) ? + _theResult___fst_exp__h516035) ; + assign _theResult___exp__h525548 = + sfd__h524887[53] ? + ((_theResult___fst_exp__h524868 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h525768) : - ((_theResult___fst_exp__h524867 == 11'd0 && - sfd__h524886[53:52] == 2'b01) ? + din_inc___2_exp__h525769) : + ((_theResult___fst_exp__h524868 == 11'd0 && + sfd__h524887[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h524867) ; - assign _theResult___exp__h545965 = - sfd__h545328[53] ? - ((_theResult___fst_exp__h545310 == 11'd2046) ? + _theResult___fst_exp__h524868) ; + assign _theResult___exp__h545966 = + sfd__h545329[53] ? + ((_theResult___fst_exp__h545311 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h564560) : - ((_theResult___fst_exp__h545310 == 11'd0 && - sfd__h545328[53:52] == 2'b01) ? + din_inc___2_exp__h564561) : + ((_theResult___fst_exp__h545311 == 11'd0 && + sfd__h545329[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h545310) ; - assign _theResult___exp__h555616 = - sfd__h554979[53] ? - ((_theResult___fst_exp__h554887 == 11'd2046) ? + _theResult___fst_exp__h545311) ; + assign _theResult___exp__h555617 = + sfd__h554980[53] ? + ((_theResult___fst_exp__h554888 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h564595) : - ((_theResult___fst_exp__h554887 == 11'd0 && - sfd__h554979[53:52] == 2'b01) ? + din_inc___2_exp__h564596) : + ((_theResult___fst_exp__h554888 == 11'd0 && + sfd__h554980[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h554887) ; - assign _theResult___exp__h564400 = - sfd__h563739[53] ? - ((_theResult___fst_exp__h563720 == 11'd2046) ? + _theResult___fst_exp__h554888) ; + assign _theResult___exp__h564401 = + sfd__h563740[53] ? + ((_theResult___fst_exp__h563721 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h564621) : - ((_theResult___fst_exp__h563720 == 11'd0 && - sfd__h563739[53:52] == 2'b01) ? + din_inc___2_exp__h564622) : + ((_theResult___fst_exp__h563721 == 11'd0 && + sfd__h563740[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h563720) ; - assign _theResult___exp__h585269 = - sfd__h584632[53] ? - ((_theResult___fst_exp__h584614 == 11'd2046) ? + _theResult___fst_exp__h563721) ; + assign _theResult___exp__h585270 = + sfd__h584633[53] ? + ((_theResult___fst_exp__h584615 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h603864) : - ((_theResult___fst_exp__h584614 == 11'd0 && - sfd__h584632[53:52] == 2'b01) ? + din_inc___2_exp__h603865) : + ((_theResult___fst_exp__h584615 == 11'd0 && + sfd__h584633[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h584614) ; - assign _theResult___exp__h594920 = - sfd__h594283[53] ? - ((_theResult___fst_exp__h594191 == 11'd2046) ? + _theResult___fst_exp__h584615) ; + assign _theResult___exp__h594921 = + sfd__h594284[53] ? + ((_theResult___fst_exp__h594192 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h603899) : - ((_theResult___fst_exp__h594191 == 11'd0 && - sfd__h594283[53:52] == 2'b01) ? + din_inc___2_exp__h603900) : + ((_theResult___fst_exp__h594192 == 11'd0 && + sfd__h594284[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h594191) ; - assign _theResult___exp__h603704 = - sfd__h603043[53] ? - ((_theResult___fst_exp__h603024 == 11'd2046) ? + _theResult___fst_exp__h594192) ; + assign _theResult___exp__h603705 = + sfd__h603044[53] ? + ((_theResult___fst_exp__h603025 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h603925) : - ((_theResult___fst_exp__h603024 == 11'd0 && - sfd__h603043[53:52] == 2'b01) ? + din_inc___2_exp__h603926) : + ((_theResult___fst_exp__h603025 == 11'd0 && + sfd__h603044[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h603024) ; - assign _theResult___fst__h608463 = - a__h607915[63] ? a___1__h608468 : a__h607915 ; - assign _theResult___fst_exp__h358617 = - _theResult____h350506[56] ? + _theResult___fst_exp__h603025) ; + assign _theResult___fst__h608464 = + a__h607916[63] ? a___1__h608469 : a__h607916 ; + assign _theResult___fst_exp__h358618 = + _theResult____h350507[56] ? 8'd2 : - _theResult___fst_exp__h358691 ; - assign _theResult___fst_exp__h358682 = + _theResult___fst_exp__h358692 ; + assign _theResult___fst_exp__h358683 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4347 } ; - assign _theResult___fst_exp__h358688 = - (!_theResult____h350506[56] && !_theResult____h350506[55] && - !_theResult____h350506[54] && - !_theResult____h350506[53] && - !_theResult____h350506[52] && - !_theResult____h350506[51] && - !_theResult____h350506[50] && - !_theResult____h350506[49] && - !_theResult____h350506[48] && - !_theResult____h350506[47] && - !_theResult____h350506[46] && - !_theResult____h350506[45] && - !_theResult____h350506[44] && - !_theResult____h350506[43] && - !_theResult____h350506[42] && - !_theResult____h350506[41] && - !_theResult____h350506[40] && - !_theResult____h350506[39] && - !_theResult____h350506[38] && - !_theResult____h350506[37] && - !_theResult____h350506[36] && - !_theResult____h350506[35] && - !_theResult____h350506[34] && - !_theResult____h350506[33] && - !_theResult____h350506[32] && - !_theResult____h350506[31] && - !_theResult____h350506[30] && - !_theResult____h350506[29] && - !_theResult____h350506[28] && - !_theResult____h350506[27] && - !_theResult____h350506[26] && - !_theResult____h350506[25] && - !_theResult____h350506[24] && - !_theResult____h350506[23] && - !_theResult____h350506[22] && - !_theResult____h350506[21] && - !_theResult____h350506[20] && - !_theResult____h350506[19] && - !_theResult____h350506[18] && - !_theResult____h350506[17] && - !_theResult____h350506[16] && - !_theResult____h350506[15] && - !_theResult____h350506[14] && - !_theResult____h350506[13] && - !_theResult____h350506[12] && - !_theResult____h350506[11] && - !_theResult____h350506[10] && - !_theResult____h350506[9] && - !_theResult____h350506[8] && - !_theResult____h350506[7] && - !_theResult____h350506[6] && - !_theResult____h350506[5] && - !_theResult____h350506[4] && - !_theResult____h350506[3] && - !_theResult____h350506[2] && - !_theResult____h350506[1] && - !_theResult____h350506[0] || + assign _theResult___fst_exp__h358689 = + (!_theResult____h350507[56] && !_theResult____h350507[55] && + !_theResult____h350507[54] && + !_theResult____h350507[53] && + !_theResult____h350507[52] && + !_theResult____h350507[51] && + !_theResult____h350507[50] && + !_theResult____h350507[49] && + !_theResult____h350507[48] && + !_theResult____h350507[47] && + !_theResult____h350507[46] && + !_theResult____h350507[45] && + !_theResult____h350507[44] && + !_theResult____h350507[43] && + !_theResult____h350507[42] && + !_theResult____h350507[41] && + !_theResult____h350507[40] && + !_theResult____h350507[39] && + !_theResult____h350507[38] && + !_theResult____h350507[37] && + !_theResult____h350507[36] && + !_theResult____h350507[35] && + !_theResult____h350507[34] && + !_theResult____h350507[33] && + !_theResult____h350507[32] && + !_theResult____h350507[31] && + !_theResult____h350507[30] && + !_theResult____h350507[29] && + !_theResult____h350507[28] && + !_theResult____h350507[27] && + !_theResult____h350507[26] && + !_theResult____h350507[25] && + !_theResult____h350507[24] && + !_theResult____h350507[23] && + !_theResult____h350507[22] && + !_theResult____h350507[21] && + !_theResult____h350507[20] && + !_theResult____h350507[19] && + !_theResult____h350507[18] && + !_theResult____h350507[17] && + !_theResult____h350507[16] && + !_theResult____h350507[15] && + !_theResult____h350507[14] && + !_theResult____h350507[13] && + !_theResult____h350507[12] && + !_theResult____h350507[11] && + !_theResult____h350507[10] && + !_theResult____h350507[9] && + !_theResult____h350507[8] && + !_theResult____h350507[7] && + !_theResult____h350507[6] && + !_theResult____h350507[5] && + !_theResult____h350507[4] && + !_theResult____h350507[3] && + !_theResult____h350507[2] && + !_theResult____h350507[1] && + !_theResult____h350507[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4349) ? 8'd0 : - _theResult___fst_exp__h358682 ; - assign _theResult___fst_exp__h358691 = - (!_theResult____h350506[56] && _theResult____h350506[55]) ? + _theResult___fst_exp__h358683 ; + assign _theResult___fst_exp__h358692 = + (!_theResult____h350507[56] && _theResult____h350507[55]) ? 8'd1 : - _theResult___fst_exp__h358688 ; - assign _theResult___fst_exp__h359214 = - (_theResult___fst_exp__h358617 == 8'd255) ? - _theResult___fst_exp__h358617 : - _theResult___fst_exp__h359211 ; - assign _theResult___fst_exp__h367264 = + _theResult___fst_exp__h358689 ; + assign _theResult___fst_exp__h359215 = + (_theResult___fst_exp__h358618 == 8'd255) ? + _theResult___fst_exp__h358618 : + _theResult___fst_exp__h359212 ; + assign _theResult___fst_exp__h367265 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4578 } ; - assign _theResult___fst_exp__h367270 = + assign _theResult___fst_exp__h367271 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4523 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4580) ? 8'd0 : - _theResult___fst_exp__h367264 ; - assign _theResult___fst_exp__h367273 = + _theResult___fst_exp__h367265 ; + assign _theResult___fst_exp__h367274 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h367270 : + _theResult___fst_exp__h367271 : 8'd129 ; - assign _theResult___fst_exp__h367796 = - (_theResult___fst_exp__h367273 == 8'd255) ? - _theResult___fst_exp__h367273 : - _theResult___fst_exp__h367793 ; - assign _theResult___fst_exp__h376383 = - _theResult____h368145[56] ? + assign _theResult___fst_exp__h367797 = + (_theResult___fst_exp__h367274 == 8'd255) ? + _theResult___fst_exp__h367274 : + _theResult___fst_exp__h367794 ; + assign _theResult___fst_exp__h376384 = + _theResult____h368146[56] ? 8'd2 : - _theResult___fst_exp__h376457 ; - assign _theResult___fst_exp__h376448 = + _theResult___fst_exp__h376458 ; + assign _theResult___fst_exp__h376449 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4898 } ; - assign _theResult___fst_exp__h376454 = - (!_theResult____h368145[56] && !_theResult____h368145[55] && - !_theResult____h368145[54] && - !_theResult____h368145[53] && - !_theResult____h368145[52] && - !_theResult____h368145[51] && - !_theResult____h368145[50] && - !_theResult____h368145[49] && - !_theResult____h368145[48] && - !_theResult____h368145[47] && - !_theResult____h368145[46] && - !_theResult____h368145[45] && - !_theResult____h368145[44] && - !_theResult____h368145[43] && - !_theResult____h368145[42] && - !_theResult____h368145[41] && - !_theResult____h368145[40] && - !_theResult____h368145[39] && - !_theResult____h368145[38] && - !_theResult____h368145[37] && - !_theResult____h368145[36] && - !_theResult____h368145[35] && - !_theResult____h368145[34] && - !_theResult____h368145[33] && - !_theResult____h368145[32] && - !_theResult____h368145[31] && - !_theResult____h368145[30] && - !_theResult____h368145[29] && - !_theResult____h368145[28] && - !_theResult____h368145[27] && - !_theResult____h368145[26] && - !_theResult____h368145[25] && - !_theResult____h368145[24] && - !_theResult____h368145[23] && - !_theResult____h368145[22] && - !_theResult____h368145[21] && - !_theResult____h368145[20] && - !_theResult____h368145[19] && - !_theResult____h368145[18] && - !_theResult____h368145[17] && - !_theResult____h368145[16] && - !_theResult____h368145[15] && - !_theResult____h368145[14] && - !_theResult____h368145[13] && - !_theResult____h368145[12] && - !_theResult____h368145[11] && - !_theResult____h368145[10] && - !_theResult____h368145[9] && - !_theResult____h368145[8] && - !_theResult____h368145[7] && - !_theResult____h368145[6] && - !_theResult____h368145[5] && - !_theResult____h368145[4] && - !_theResult____h368145[3] && - !_theResult____h368145[2] && - !_theResult____h368145[1] && - !_theResult____h368145[0] || + assign _theResult___fst_exp__h376455 = + (!_theResult____h368146[56] && !_theResult____h368146[55] && + !_theResult____h368146[54] && + !_theResult____h368146[53] && + !_theResult____h368146[52] && + !_theResult____h368146[51] && + !_theResult____h368146[50] && + !_theResult____h368146[49] && + !_theResult____h368146[48] && + !_theResult____h368146[47] && + !_theResult____h368146[46] && + !_theResult____h368146[45] && + !_theResult____h368146[44] && + !_theResult____h368146[43] && + !_theResult____h368146[42] && + !_theResult____h368146[41] && + !_theResult____h368146[40] && + !_theResult____h368146[39] && + !_theResult____h368146[38] && + !_theResult____h368146[37] && + !_theResult____h368146[36] && + !_theResult____h368146[35] && + !_theResult____h368146[34] && + !_theResult____h368146[33] && + !_theResult____h368146[32] && + !_theResult____h368146[31] && + !_theResult____h368146[30] && + !_theResult____h368146[29] && + !_theResult____h368146[28] && + !_theResult____h368146[27] && + !_theResult____h368146[26] && + !_theResult____h368146[25] && + !_theResult____h368146[24] && + !_theResult____h368146[23] && + !_theResult____h368146[22] && + !_theResult____h368146[21] && + !_theResult____h368146[20] && + !_theResult____h368146[19] && + !_theResult____h368146[18] && + !_theResult____h368146[17] && + !_theResult____h368146[16] && + !_theResult____h368146[15] && + !_theResult____h368146[14] && + !_theResult____h368146[13] && + !_theResult____h368146[12] && + !_theResult____h368146[11] && + !_theResult____h368146[10] && + !_theResult____h368146[9] && + !_theResult____h368146[8] && + !_theResult____h368146[7] && + !_theResult____h368146[6] && + !_theResult____h368146[5] && + !_theResult____h368146[4] && + !_theResult____h368146[3] && + !_theResult____h368146[2] && + !_theResult____h368146[1] && + !_theResult____h368146[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4900) ? 8'd0 : - _theResult___fst_exp__h376448 ; - assign _theResult___fst_exp__h376457 = - (!_theResult____h368145[56] && _theResult____h368145[55]) ? + _theResult___fst_exp__h376449 ; + assign _theResult___fst_exp__h376458 = + (!_theResult____h368146[56] && _theResult____h368146[55]) ? 8'd1 : - _theResult___fst_exp__h376454 ; - assign _theResult___fst_exp__h376980 = - (_theResult___fst_exp__h376383 == 8'd255) ? - _theResult___fst_exp__h376383 : - _theResult___fst_exp__h376977 ; - assign _theResult___fst_exp__h385020 = + _theResult___fst_exp__h376455 ; + assign _theResult___fst_exp__h376981 = + (_theResult___fst_exp__h376384 == 8'd255) ? + _theResult___fst_exp__h376384 : + _theResult___fst_exp__h376978 ; + assign _theResult___fst_exp__h385021 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q38[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q38[7:0] ; - assign _theResult___fst_exp__h385059 = + assign _theResult___fst_exp__h385060 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q38[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4578 } ; - assign _theResult___fst_exp__h385065 = + assign _theResult___fst_exp__h385066 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4523 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4973) ? 8'd0 : - _theResult___fst_exp__h385059 ; - assign _theResult___fst_exp__h385068 = + _theResult___fst_exp__h385060 ; + assign _theResult___fst_exp__h385069 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h385065 : - _theResult___fst_exp__h385020 ; - assign _theResult___fst_exp__h385616 = - (_theResult___fst_exp__h385068 == 8'd255) ? - _theResult___fst_exp__h385068 : - _theResult___fst_exp__h385613 ; - assign _theResult___fst_exp__h385625 = + _theResult___fst_exp__h385066 : + _theResult___fst_exp__h385021 ; + assign _theResult___fst_exp__h385617 = + (_theResult___fst_exp__h385069 == 8'd255) ? + _theResult___fst_exp__h385069 : + _theResult___fst_exp__h385614 ; + assign _theResult___fst_exp__h385626 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4112 ? - _theResult___snd_fst_exp__h367799 : - _theResult___fst_exp__h350488) : + _theResult___snd_fst_exp__h367800 : + _theResult___fst_exp__h350489) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4652 ? - _theResult___snd_fst_exp__h385619 : - _theResult___fst_exp__h350488) ; - assign _theResult___fst_exp__h385628 = + _theResult___snd_fst_exp__h385620 : + _theResult___fst_exp__h350489) ; + assign _theResult___fst_exp__h385629 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h385625 ; - assign _theResult___fst_exp__h404314 = - _theResult____h396205[56] ? + _theResult___fst_exp__h385626 ; + assign _theResult___fst_exp__h404315 = + _theResult____h396206[56] ? 8'd2 : - _theResult___fst_exp__h404388 ; - assign _theResult___fst_exp__h404379 = + _theResult___fst_exp__h404389 ; + assign _theResult___fst_exp__h404380 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5739 } ; - assign _theResult___fst_exp__h404385 = - (!_theResult____h396205[56] && !_theResult____h396205[55] && - !_theResult____h396205[54] && - !_theResult____h396205[53] && - !_theResult____h396205[52] && - !_theResult____h396205[51] && - !_theResult____h396205[50] && - !_theResult____h396205[49] && - !_theResult____h396205[48] && - !_theResult____h396205[47] && - !_theResult____h396205[46] && - !_theResult____h396205[45] && - !_theResult____h396205[44] && - !_theResult____h396205[43] && - !_theResult____h396205[42] && - !_theResult____h396205[41] && - !_theResult____h396205[40] && - !_theResult____h396205[39] && - !_theResult____h396205[38] && - !_theResult____h396205[37] && - !_theResult____h396205[36] && - !_theResult____h396205[35] && - !_theResult____h396205[34] && - !_theResult____h396205[33] && - !_theResult____h396205[32] && - !_theResult____h396205[31] && - !_theResult____h396205[30] && - !_theResult____h396205[29] && - !_theResult____h396205[28] && - !_theResult____h396205[27] && - !_theResult____h396205[26] && - !_theResult____h396205[25] && - !_theResult____h396205[24] && - !_theResult____h396205[23] && - !_theResult____h396205[22] && - !_theResult____h396205[21] && - !_theResult____h396205[20] && - !_theResult____h396205[19] && - !_theResult____h396205[18] && - !_theResult____h396205[17] && - !_theResult____h396205[16] && - !_theResult____h396205[15] && - !_theResult____h396205[14] && - !_theResult____h396205[13] && - !_theResult____h396205[12] && - !_theResult____h396205[11] && - !_theResult____h396205[10] && - !_theResult____h396205[9] && - !_theResult____h396205[8] && - !_theResult____h396205[7] && - !_theResult____h396205[6] && - !_theResult____h396205[5] && - !_theResult____h396205[4] && - !_theResult____h396205[3] && - !_theResult____h396205[2] && - !_theResult____h396205[1] && - !_theResult____h396205[0] || + assign _theResult___fst_exp__h404386 = + (!_theResult____h396206[56] && !_theResult____h396206[55] && + !_theResult____h396206[54] && + !_theResult____h396206[53] && + !_theResult____h396206[52] && + !_theResult____h396206[51] && + !_theResult____h396206[50] && + !_theResult____h396206[49] && + !_theResult____h396206[48] && + !_theResult____h396206[47] && + !_theResult____h396206[46] && + !_theResult____h396206[45] && + !_theResult____h396206[44] && + !_theResult____h396206[43] && + !_theResult____h396206[42] && + !_theResult____h396206[41] && + !_theResult____h396206[40] && + !_theResult____h396206[39] && + !_theResult____h396206[38] && + !_theResult____h396206[37] && + !_theResult____h396206[36] && + !_theResult____h396206[35] && + !_theResult____h396206[34] && + !_theResult____h396206[33] && + !_theResult____h396206[32] && + !_theResult____h396206[31] && + !_theResult____h396206[30] && + !_theResult____h396206[29] && + !_theResult____h396206[28] && + !_theResult____h396206[27] && + !_theResult____h396206[26] && + !_theResult____h396206[25] && + !_theResult____h396206[24] && + !_theResult____h396206[23] && + !_theResult____h396206[22] && + !_theResult____h396206[21] && + !_theResult____h396206[20] && + !_theResult____h396206[19] && + !_theResult____h396206[18] && + !_theResult____h396206[17] && + !_theResult____h396206[16] && + !_theResult____h396206[15] && + !_theResult____h396206[14] && + !_theResult____h396206[13] && + !_theResult____h396206[12] && + !_theResult____h396206[11] && + !_theResult____h396206[10] && + !_theResult____h396206[9] && + !_theResult____h396206[8] && + !_theResult____h396206[7] && + !_theResult____h396206[6] && + !_theResult____h396206[5] && + !_theResult____h396206[4] && + !_theResult____h396206[3] && + !_theResult____h396206[2] && + !_theResult____h396206[1] && + !_theResult____h396206[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5741) ? 8'd0 : - _theResult___fst_exp__h404379 ; - assign _theResult___fst_exp__h404388 = - (!_theResult____h396205[56] && _theResult____h396205[55]) ? + _theResult___fst_exp__h404380 ; + assign _theResult___fst_exp__h404389 = + (!_theResult____h396206[56] && _theResult____h396206[55]) ? 8'd1 : - _theResult___fst_exp__h404385 ; - assign _theResult___fst_exp__h404911 = - (_theResult___fst_exp__h404314 == 8'd255) ? - _theResult___fst_exp__h404314 : - _theResult___fst_exp__h404908 ; - assign _theResult___fst_exp__h412961 = + _theResult___fst_exp__h404386 ; + assign _theResult___fst_exp__h404912 = + (_theResult___fst_exp__h404315 == 8'd255) ? + _theResult___fst_exp__h404315 : + _theResult___fst_exp__h404909 ; + assign _theResult___fst_exp__h412962 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5970 } ; - assign _theResult___fst_exp__h412967 = + assign _theResult___fst_exp__h412968 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5915 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5972) ? 8'd0 : - _theResult___fst_exp__h412961 ; - assign _theResult___fst_exp__h412970 = + _theResult___fst_exp__h412962 ; + assign _theResult___fst_exp__h412971 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h412967 : + _theResult___fst_exp__h412968 : 8'd129 ; - assign _theResult___fst_exp__h413493 = - (_theResult___fst_exp__h412970 == 8'd255) ? - _theResult___fst_exp__h412970 : - _theResult___fst_exp__h413490 ; - assign _theResult___fst_exp__h422080 = - _theResult____h413842[56] ? + assign _theResult___fst_exp__h413494 = + (_theResult___fst_exp__h412971 == 8'd255) ? + _theResult___fst_exp__h412971 : + _theResult___fst_exp__h413491 ; + assign _theResult___fst_exp__h422081 = + _theResult____h413843[56] ? 8'd2 : - _theResult___fst_exp__h422154 ; - assign _theResult___fst_exp__h422145 = + _theResult___fst_exp__h422155 ; + assign _theResult___fst_exp__h422146 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6290 } ; - assign _theResult___fst_exp__h422151 = - (!_theResult____h413842[56] && !_theResult____h413842[55] && - !_theResult____h413842[54] && - !_theResult____h413842[53] && - !_theResult____h413842[52] && - !_theResult____h413842[51] && - !_theResult____h413842[50] && - !_theResult____h413842[49] && - !_theResult____h413842[48] && - !_theResult____h413842[47] && - !_theResult____h413842[46] && - !_theResult____h413842[45] && - !_theResult____h413842[44] && - !_theResult____h413842[43] && - !_theResult____h413842[42] && - !_theResult____h413842[41] && - !_theResult____h413842[40] && - !_theResult____h413842[39] && - !_theResult____h413842[38] && - !_theResult____h413842[37] && - !_theResult____h413842[36] && - !_theResult____h413842[35] && - !_theResult____h413842[34] && - !_theResult____h413842[33] && - !_theResult____h413842[32] && - !_theResult____h413842[31] && - !_theResult____h413842[30] && - !_theResult____h413842[29] && - !_theResult____h413842[28] && - !_theResult____h413842[27] && - !_theResult____h413842[26] && - !_theResult____h413842[25] && - !_theResult____h413842[24] && - !_theResult____h413842[23] && - !_theResult____h413842[22] && - !_theResult____h413842[21] && - !_theResult____h413842[20] && - !_theResult____h413842[19] && - !_theResult____h413842[18] && - !_theResult____h413842[17] && - !_theResult____h413842[16] && - !_theResult____h413842[15] && - !_theResult____h413842[14] && - !_theResult____h413842[13] && - !_theResult____h413842[12] && - !_theResult____h413842[11] && - !_theResult____h413842[10] && - !_theResult____h413842[9] && - !_theResult____h413842[8] && - !_theResult____h413842[7] && - !_theResult____h413842[6] && - !_theResult____h413842[5] && - !_theResult____h413842[4] && - !_theResult____h413842[3] && - !_theResult____h413842[2] && - !_theResult____h413842[1] && - !_theResult____h413842[0] || + assign _theResult___fst_exp__h422152 = + (!_theResult____h413843[56] && !_theResult____h413843[55] && + !_theResult____h413843[54] && + !_theResult____h413843[53] && + !_theResult____h413843[52] && + !_theResult____h413843[51] && + !_theResult____h413843[50] && + !_theResult____h413843[49] && + !_theResult____h413843[48] && + !_theResult____h413843[47] && + !_theResult____h413843[46] && + !_theResult____h413843[45] && + !_theResult____h413843[44] && + !_theResult____h413843[43] && + !_theResult____h413843[42] && + !_theResult____h413843[41] && + !_theResult____h413843[40] && + !_theResult____h413843[39] && + !_theResult____h413843[38] && + !_theResult____h413843[37] && + !_theResult____h413843[36] && + !_theResult____h413843[35] && + !_theResult____h413843[34] && + !_theResult____h413843[33] && + !_theResult____h413843[32] && + !_theResult____h413843[31] && + !_theResult____h413843[30] && + !_theResult____h413843[29] && + !_theResult____h413843[28] && + !_theResult____h413843[27] && + !_theResult____h413843[26] && + !_theResult____h413843[25] && + !_theResult____h413843[24] && + !_theResult____h413843[23] && + !_theResult____h413843[22] && + !_theResult____h413843[21] && + !_theResult____h413843[20] && + !_theResult____h413843[19] && + !_theResult____h413843[18] && + !_theResult____h413843[17] && + !_theResult____h413843[16] && + !_theResult____h413843[15] && + !_theResult____h413843[14] && + !_theResult____h413843[13] && + !_theResult____h413843[12] && + !_theResult____h413843[11] && + !_theResult____h413843[10] && + !_theResult____h413843[9] && + !_theResult____h413843[8] && + !_theResult____h413843[7] && + !_theResult____h413843[6] && + !_theResult____h413843[5] && + !_theResult____h413843[4] && + !_theResult____h413843[3] && + !_theResult____h413843[2] && + !_theResult____h413843[1] && + !_theResult____h413843[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6292) ? 8'd0 : - _theResult___fst_exp__h422145 ; - assign _theResult___fst_exp__h422154 = - (!_theResult____h413842[56] && _theResult____h413842[55]) ? + _theResult___fst_exp__h422146 ; + assign _theResult___fst_exp__h422155 = + (!_theResult____h413843[56] && _theResult____h413843[55]) ? 8'd1 : - _theResult___fst_exp__h422151 ; - assign _theResult___fst_exp__h422677 = - (_theResult___fst_exp__h422080 == 8'd255) ? - _theResult___fst_exp__h422080 : - _theResult___fst_exp__h422674 ; - assign _theResult___fst_exp__h430717 = + _theResult___fst_exp__h422152 ; + assign _theResult___fst_exp__h422678 = + (_theResult___fst_exp__h422081 == 8'd255) ? + _theResult___fst_exp__h422081 : + _theResult___fst_exp__h422675 ; + assign _theResult___fst_exp__h430718 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q73[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q73[7:0] ; - assign _theResult___fst_exp__h430756 = + assign _theResult___fst_exp__h430757 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q73[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5970 } ; - assign _theResult___fst_exp__h430762 = + assign _theResult___fst_exp__h430763 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5915 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6365) ? 8'd0 : - _theResult___fst_exp__h430756 ; - assign _theResult___fst_exp__h430765 = + _theResult___fst_exp__h430757 ; + assign _theResult___fst_exp__h430766 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h430762 : - _theResult___fst_exp__h430717 ; - assign _theResult___fst_exp__h431313 = - (_theResult___fst_exp__h430765 == 8'd255) ? - _theResult___fst_exp__h430765 : - _theResult___fst_exp__h431310 ; - assign _theResult___fst_exp__h431322 = + _theResult___fst_exp__h430763 : + _theResult___fst_exp__h430718 ; + assign _theResult___fst_exp__h431314 = + (_theResult___fst_exp__h430766 == 8'd255) ? + _theResult___fst_exp__h430766 : + _theResult___fst_exp__h431311 ; + assign _theResult___fst_exp__h431323 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5504 ? - _theResult___snd_fst_exp__h413496 : - _theResult___fst_exp__h396187) : + _theResult___snd_fst_exp__h413497 : + _theResult___fst_exp__h396188) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6044 ? - _theResult___snd_fst_exp__h431316 : - _theResult___fst_exp__h396187) ; - assign _theResult___fst_exp__h431325 = + _theResult___snd_fst_exp__h431317 : + _theResult___fst_exp__h396188) ; + assign _theResult___fst_exp__h431326 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h431322 ; - assign _theResult___fst_exp__h450009 = - _theResult____h441900[56] ? + _theResult___fst_exp__h431323 ; + assign _theResult___fst_exp__h450010 = + _theResult____h441901[56] ? 8'd2 : - _theResult___fst_exp__h450083 ; - assign _theResult___fst_exp__h450074 = + _theResult___fst_exp__h450084 ; + assign _theResult___fst_exp__h450075 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7131 } ; - assign _theResult___fst_exp__h450080 = - (!_theResult____h441900[56] && !_theResult____h441900[55] && - !_theResult____h441900[54] && - !_theResult____h441900[53] && - !_theResult____h441900[52] && - !_theResult____h441900[51] && - !_theResult____h441900[50] && - !_theResult____h441900[49] && - !_theResult____h441900[48] && - !_theResult____h441900[47] && - !_theResult____h441900[46] && - !_theResult____h441900[45] && - !_theResult____h441900[44] && - !_theResult____h441900[43] && - !_theResult____h441900[42] && - !_theResult____h441900[41] && - !_theResult____h441900[40] && - !_theResult____h441900[39] && - !_theResult____h441900[38] && - !_theResult____h441900[37] && - !_theResult____h441900[36] && - !_theResult____h441900[35] && - !_theResult____h441900[34] && - !_theResult____h441900[33] && - !_theResult____h441900[32] && - !_theResult____h441900[31] && - !_theResult____h441900[30] && - !_theResult____h441900[29] && - !_theResult____h441900[28] && - !_theResult____h441900[27] && - !_theResult____h441900[26] && - !_theResult____h441900[25] && - !_theResult____h441900[24] && - !_theResult____h441900[23] && - !_theResult____h441900[22] && - !_theResult____h441900[21] && - !_theResult____h441900[20] && - !_theResult____h441900[19] && - !_theResult____h441900[18] && - !_theResult____h441900[17] && - !_theResult____h441900[16] && - !_theResult____h441900[15] && - !_theResult____h441900[14] && - !_theResult____h441900[13] && - !_theResult____h441900[12] && - !_theResult____h441900[11] && - !_theResult____h441900[10] && - !_theResult____h441900[9] && - !_theResult____h441900[8] && - !_theResult____h441900[7] && - !_theResult____h441900[6] && - !_theResult____h441900[5] && - !_theResult____h441900[4] && - !_theResult____h441900[3] && - !_theResult____h441900[2] && - !_theResult____h441900[1] && - !_theResult____h441900[0] || + assign _theResult___fst_exp__h450081 = + (!_theResult____h441901[56] && !_theResult____h441901[55] && + !_theResult____h441901[54] && + !_theResult____h441901[53] && + !_theResult____h441901[52] && + !_theResult____h441901[51] && + !_theResult____h441901[50] && + !_theResult____h441901[49] && + !_theResult____h441901[48] && + !_theResult____h441901[47] && + !_theResult____h441901[46] && + !_theResult____h441901[45] && + !_theResult____h441901[44] && + !_theResult____h441901[43] && + !_theResult____h441901[42] && + !_theResult____h441901[41] && + !_theResult____h441901[40] && + !_theResult____h441901[39] && + !_theResult____h441901[38] && + !_theResult____h441901[37] && + !_theResult____h441901[36] && + !_theResult____h441901[35] && + !_theResult____h441901[34] && + !_theResult____h441901[33] && + !_theResult____h441901[32] && + !_theResult____h441901[31] && + !_theResult____h441901[30] && + !_theResult____h441901[29] && + !_theResult____h441901[28] && + !_theResult____h441901[27] && + !_theResult____h441901[26] && + !_theResult____h441901[25] && + !_theResult____h441901[24] && + !_theResult____h441901[23] && + !_theResult____h441901[22] && + !_theResult____h441901[21] && + !_theResult____h441901[20] && + !_theResult____h441901[19] && + !_theResult____h441901[18] && + !_theResult____h441901[17] && + !_theResult____h441901[16] && + !_theResult____h441901[15] && + !_theResult____h441901[14] && + !_theResult____h441901[13] && + !_theResult____h441901[12] && + !_theResult____h441901[11] && + !_theResult____h441901[10] && + !_theResult____h441901[9] && + !_theResult____h441901[8] && + !_theResult____h441901[7] && + !_theResult____h441901[6] && + !_theResult____h441901[5] && + !_theResult____h441901[4] && + !_theResult____h441901[3] && + !_theResult____h441901[2] && + !_theResult____h441901[1] && + !_theResult____h441901[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7133) ? 8'd0 : - _theResult___fst_exp__h450074 ; - assign _theResult___fst_exp__h450083 = - (!_theResult____h441900[56] && _theResult____h441900[55]) ? + _theResult___fst_exp__h450075 ; + assign _theResult___fst_exp__h450084 = + (!_theResult____h441901[56] && _theResult____h441901[55]) ? 8'd1 : - _theResult___fst_exp__h450080 ; - assign _theResult___fst_exp__h450606 = - (_theResult___fst_exp__h450009 == 8'd255) ? - _theResult___fst_exp__h450009 : - _theResult___fst_exp__h450603 ; - assign _theResult___fst_exp__h458656 = + _theResult___fst_exp__h450081 ; + assign _theResult___fst_exp__h450607 = + (_theResult___fst_exp__h450010 == 8'd255) ? + _theResult___fst_exp__h450010 : + _theResult___fst_exp__h450604 ; + assign _theResult___fst_exp__h458657 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7362 } ; - assign _theResult___fst_exp__h458662 = + assign _theResult___fst_exp__h458663 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7307 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7364) ? 8'd0 : - _theResult___fst_exp__h458656 ; - assign _theResult___fst_exp__h458665 = + _theResult___fst_exp__h458657 ; + assign _theResult___fst_exp__h458666 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h458662 : + _theResult___fst_exp__h458663 : 8'd129 ; - assign _theResult___fst_exp__h459188 = - (_theResult___fst_exp__h458665 == 8'd255) ? - _theResult___fst_exp__h458665 : - _theResult___fst_exp__h459185 ; - assign _theResult___fst_exp__h467775 = - _theResult____h459537[56] ? + assign _theResult___fst_exp__h459189 = + (_theResult___fst_exp__h458666 == 8'd255) ? + _theResult___fst_exp__h458666 : + _theResult___fst_exp__h459186 ; + assign _theResult___fst_exp__h467776 = + _theResult____h459538[56] ? 8'd2 : - _theResult___fst_exp__h467849 ; - assign _theResult___fst_exp__h467840 = + _theResult___fst_exp__h467850 ; + assign _theResult___fst_exp__h467841 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7682 } ; - assign _theResult___fst_exp__h467846 = - (!_theResult____h459537[56] && !_theResult____h459537[55] && - !_theResult____h459537[54] && - !_theResult____h459537[53] && - !_theResult____h459537[52] && - !_theResult____h459537[51] && - !_theResult____h459537[50] && - !_theResult____h459537[49] && - !_theResult____h459537[48] && - !_theResult____h459537[47] && - !_theResult____h459537[46] && - !_theResult____h459537[45] && - !_theResult____h459537[44] && - !_theResult____h459537[43] && - !_theResult____h459537[42] && - !_theResult____h459537[41] && - !_theResult____h459537[40] && - !_theResult____h459537[39] && - !_theResult____h459537[38] && - !_theResult____h459537[37] && - !_theResult____h459537[36] && - !_theResult____h459537[35] && - !_theResult____h459537[34] && - !_theResult____h459537[33] && - !_theResult____h459537[32] && - !_theResult____h459537[31] && - !_theResult____h459537[30] && - !_theResult____h459537[29] && - !_theResult____h459537[28] && - !_theResult____h459537[27] && - !_theResult____h459537[26] && - !_theResult____h459537[25] && - !_theResult____h459537[24] && - !_theResult____h459537[23] && - !_theResult____h459537[22] && - !_theResult____h459537[21] && - !_theResult____h459537[20] && - !_theResult____h459537[19] && - !_theResult____h459537[18] && - !_theResult____h459537[17] && - !_theResult____h459537[16] && - !_theResult____h459537[15] && - !_theResult____h459537[14] && - !_theResult____h459537[13] && - !_theResult____h459537[12] && - !_theResult____h459537[11] && - !_theResult____h459537[10] && - !_theResult____h459537[9] && - !_theResult____h459537[8] && - !_theResult____h459537[7] && - !_theResult____h459537[6] && - !_theResult____h459537[5] && - !_theResult____h459537[4] && - !_theResult____h459537[3] && - !_theResult____h459537[2] && - !_theResult____h459537[1] && - !_theResult____h459537[0] || + assign _theResult___fst_exp__h467847 = + (!_theResult____h459538[56] && !_theResult____h459538[55] && + !_theResult____h459538[54] && + !_theResult____h459538[53] && + !_theResult____h459538[52] && + !_theResult____h459538[51] && + !_theResult____h459538[50] && + !_theResult____h459538[49] && + !_theResult____h459538[48] && + !_theResult____h459538[47] && + !_theResult____h459538[46] && + !_theResult____h459538[45] && + !_theResult____h459538[44] && + !_theResult____h459538[43] && + !_theResult____h459538[42] && + !_theResult____h459538[41] && + !_theResult____h459538[40] && + !_theResult____h459538[39] && + !_theResult____h459538[38] && + !_theResult____h459538[37] && + !_theResult____h459538[36] && + !_theResult____h459538[35] && + !_theResult____h459538[34] && + !_theResult____h459538[33] && + !_theResult____h459538[32] && + !_theResult____h459538[31] && + !_theResult____h459538[30] && + !_theResult____h459538[29] && + !_theResult____h459538[28] && + !_theResult____h459538[27] && + !_theResult____h459538[26] && + !_theResult____h459538[25] && + !_theResult____h459538[24] && + !_theResult____h459538[23] && + !_theResult____h459538[22] && + !_theResult____h459538[21] && + !_theResult____h459538[20] && + !_theResult____h459538[19] && + !_theResult____h459538[18] && + !_theResult____h459538[17] && + !_theResult____h459538[16] && + !_theResult____h459538[15] && + !_theResult____h459538[14] && + !_theResult____h459538[13] && + !_theResult____h459538[12] && + !_theResult____h459538[11] && + !_theResult____h459538[10] && + !_theResult____h459538[9] && + !_theResult____h459538[8] && + !_theResult____h459538[7] && + !_theResult____h459538[6] && + !_theResult____h459538[5] && + !_theResult____h459538[4] && + !_theResult____h459538[3] && + !_theResult____h459538[2] && + !_theResult____h459538[1] && + !_theResult____h459538[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7684) ? 8'd0 : - _theResult___fst_exp__h467840 ; - assign _theResult___fst_exp__h467849 = - (!_theResult____h459537[56] && _theResult____h459537[55]) ? + _theResult___fst_exp__h467841 ; + assign _theResult___fst_exp__h467850 = + (!_theResult____h459538[56] && _theResult____h459538[55]) ? 8'd1 : - _theResult___fst_exp__h467846 ; - assign _theResult___fst_exp__h468372 = - (_theResult___fst_exp__h467775 == 8'd255) ? - _theResult___fst_exp__h467775 : - _theResult___fst_exp__h468369 ; - assign _theResult___fst_exp__h476412 = + _theResult___fst_exp__h467847 ; + assign _theResult___fst_exp__h468373 = + (_theResult___fst_exp__h467776 == 8'd255) ? + _theResult___fst_exp__h467776 : + _theResult___fst_exp__h468370 ; + assign _theResult___fst_exp__h476413 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q108[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q108[7:0] ; - assign _theResult___fst_exp__h476451 = + assign _theResult___fst_exp__h476452 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q108[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7362 } ; - assign _theResult___fst_exp__h476457 = + assign _theResult___fst_exp__h476458 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7307 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7757) ? 8'd0 : - _theResult___fst_exp__h476451 ; - assign _theResult___fst_exp__h476460 = + _theResult___fst_exp__h476452 ; + assign _theResult___fst_exp__h476461 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h476457 : - _theResult___fst_exp__h476412 ; - assign _theResult___fst_exp__h477008 = - (_theResult___fst_exp__h476460 == 8'd255) ? - _theResult___fst_exp__h476460 : - _theResult___fst_exp__h477005 ; - assign _theResult___fst_exp__h477017 = + _theResult___fst_exp__h476458 : + _theResult___fst_exp__h476413 ; + assign _theResult___fst_exp__h477009 = + (_theResult___fst_exp__h476461 == 8'd255) ? + _theResult___fst_exp__h476461 : + _theResult___fst_exp__h477006 ; + assign _theResult___fst_exp__h477018 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6896 ? - _theResult___snd_fst_exp__h459191 : - _theResult___fst_exp__h441882) : + _theResult___snd_fst_exp__h459192 : + _theResult___fst_exp__h441883) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7436 ? - _theResult___snd_fst_exp__h477011 : - _theResult___fst_exp__h441882) ; - assign _theResult___fst_exp__h477020 = + _theResult___snd_fst_exp__h477012 : + _theResult___fst_exp__h441883) ; + assign _theResult___fst_exp__h477021 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h477017 ; - assign _theResult___fst_exp__h491384 = + _theResult___fst_exp__h477018 ; + assign _theResult___fst_exp__h491385 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15 ; - assign _theResult___fst_exp__h506448 = + assign _theResult___fst_exp__h506449 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8698 } ; - assign _theResult___fst_exp__h506454 = - (f1_exp__h487069 == 8'd0 && !f1_sfd__h487070[22] && + assign _theResult___fst_exp__h506455 = + (f1_exp__h487070 == 8'd0 && !f1_sfd__h487071[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8671 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8700) ? 11'd0 : - _theResult___fst_exp__h506448 ; - assign _theResult___fst_exp__h506457 = - (f1_exp__h487069 == 8'd0) ? - _theResult___fst_exp__h506454 : + _theResult___fst_exp__h506449 ; + assign _theResult___fst_exp__h506458 = + (f1_exp__h487070 == 8'd0) ? + _theResult___fst_exp__h506455 : 11'd897 ; - assign _theResult___fst_exp__h507212 = + assign _theResult___fst_exp__h507213 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q144 : + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q144 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9134 ; - assign _theResult___fst_exp__h507215 = - (_theResult___fst_exp__h506457 == 11'd2047) ? - _theResult___fst_exp__h506457 : - _theResult___fst_exp__h507212 ; - assign _theResult___fst_exp__h516034 = - _theResult____h507798[56] ? + assign _theResult___fst_exp__h507216 = + (_theResult___fst_exp__h506458 == 11'd2047) ? + _theResult___fst_exp__h506458 : + _theResult___fst_exp__h507213 ; + assign _theResult___fst_exp__h516035 = + _theResult____h507799[56] ? 11'd2 : - _theResult___fst_exp__h516108 ; - assign _theResult___fst_exp__h516099 = + _theResult___fst_exp__h516109 ; + assign _theResult___fst_exp__h516100 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9010 } ; - assign _theResult___fst_exp__h516105 = - (!_theResult____h507798[56] && !_theResult____h507798[55] && - !_theResult____h507798[54] && - !_theResult____h507798[53] && - !_theResult____h507798[52] && - !_theResult____h507798[51] && - !_theResult____h507798[50] && - !_theResult____h507798[49] && - !_theResult____h507798[48] && - !_theResult____h507798[47] && - !_theResult____h507798[46] && - !_theResult____h507798[45] && - !_theResult____h507798[44] && - !_theResult____h507798[43] && - !_theResult____h507798[42] && - !_theResult____h507798[41] && - !_theResult____h507798[40] && - !_theResult____h507798[39] && - !_theResult____h507798[38] && - !_theResult____h507798[37] && - !_theResult____h507798[36] && - !_theResult____h507798[35] && - !_theResult____h507798[34] && - !_theResult____h507798[33] && - !_theResult____h507798[32] && - !_theResult____h507798[31] && - !_theResult____h507798[30] && - !_theResult____h507798[29] && - !_theResult____h507798[28] && - !_theResult____h507798[27] && - !_theResult____h507798[26] && - !_theResult____h507798[25] && - !_theResult____h507798[24] && - !_theResult____h507798[23] && - !_theResult____h507798[22] && - !_theResult____h507798[21] && - !_theResult____h507798[20] && - !_theResult____h507798[19] && - !_theResult____h507798[18] && - !_theResult____h507798[17] && - !_theResult____h507798[16] && - !_theResult____h507798[15] && - !_theResult____h507798[14] && - !_theResult____h507798[13] && - !_theResult____h507798[12] && - !_theResult____h507798[11] && - !_theResult____h507798[10] && - !_theResult____h507798[9] && - !_theResult____h507798[8] && - !_theResult____h507798[7] && - !_theResult____h507798[6] && - !_theResult____h507798[5] && - !_theResult____h507798[4] && - !_theResult____h507798[3] && - !_theResult____h507798[2] && - !_theResult____h507798[1] && - !_theResult____h507798[0] || + assign _theResult___fst_exp__h516106 = + (!_theResult____h507799[56] && !_theResult____h507799[55] && + !_theResult____h507799[54] && + !_theResult____h507799[53] && + !_theResult____h507799[52] && + !_theResult____h507799[51] && + !_theResult____h507799[50] && + !_theResult____h507799[49] && + !_theResult____h507799[48] && + !_theResult____h507799[47] && + !_theResult____h507799[46] && + !_theResult____h507799[45] && + !_theResult____h507799[44] && + !_theResult____h507799[43] && + !_theResult____h507799[42] && + !_theResult____h507799[41] && + !_theResult____h507799[40] && + !_theResult____h507799[39] && + !_theResult____h507799[38] && + !_theResult____h507799[37] && + !_theResult____h507799[36] && + !_theResult____h507799[35] && + !_theResult____h507799[34] && + !_theResult____h507799[33] && + !_theResult____h507799[32] && + !_theResult____h507799[31] && + !_theResult____h507799[30] && + !_theResult____h507799[29] && + !_theResult____h507799[28] && + !_theResult____h507799[27] && + !_theResult____h507799[26] && + !_theResult____h507799[25] && + !_theResult____h507799[24] && + !_theResult____h507799[23] && + !_theResult____h507799[22] && + !_theResult____h507799[21] && + !_theResult____h507799[20] && + !_theResult____h507799[19] && + !_theResult____h507799[18] && + !_theResult____h507799[17] && + !_theResult____h507799[16] && + !_theResult____h507799[15] && + !_theResult____h507799[14] && + !_theResult____h507799[13] && + !_theResult____h507799[12] && + !_theResult____h507799[11] && + !_theResult____h507799[10] && + !_theResult____h507799[9] && + !_theResult____h507799[8] && + !_theResult____h507799[7] && + !_theResult____h507799[6] && + !_theResult____h507799[5] && + !_theResult____h507799[4] && + !_theResult____h507799[3] && + !_theResult____h507799[2] && + !_theResult____h507799[1] && + !_theResult____h507799[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9012) ? 11'd0 : - _theResult___fst_exp__h516099 ; - assign _theResult___fst_exp__h516108 = - (!_theResult____h507798[56] && _theResult____h507798[55]) ? + _theResult___fst_exp__h516100 ; + assign _theResult___fst_exp__h516109 = + (!_theResult____h507799[56] && _theResult____h507799[55]) ? 11'd1 : - _theResult___fst_exp__h516105 ; - assign _theResult___fst_exp__h516863 = + _theResult___fst_exp__h516106 ; + assign _theResult___fst_exp__h516864 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q212 : + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q212 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9177 ; - assign _theResult___fst_exp__h516866 = - (_theResult___fst_exp__h516034 == 11'd2047) ? - _theResult___fst_exp__h516034 : - _theResult___fst_exp__h516863 ; - assign _theResult___fst_exp__h524819 = + assign _theResult___fst_exp__h516867 = + (_theResult___fst_exp__h516035 == 11'd2047) ? + _theResult___fst_exp__h516035 : + _theResult___fst_exp__h516864 ; + assign _theResult___fst_exp__h524820 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] ; - assign _theResult___fst_exp__h524858 = + assign _theResult___fst_exp__h524859 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8698 } ; - assign _theResult___fst_exp__h524864 = - (f1_exp__h487069 == 8'd0 && !f1_sfd__h487070[22] && + assign _theResult___fst_exp__h524865 = + (f1_exp__h487070 == 8'd0 && !f1_sfd__h487071[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8671 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9062) ? 11'd0 : - _theResult___fst_exp__h524858 ; - assign _theResult___fst_exp__h524867 = - (f1_exp__h487069 == 8'd0) ? - _theResult___fst_exp__h524864 : - _theResult___fst_exp__h524819 ; - assign _theResult___fst_exp__h525647 = + _theResult___fst_exp__h524859 ; + assign _theResult___fst_exp__h524868 = + (f1_exp__h487070 == 8'd0) ? + _theResult___fst_exp__h524865 : + _theResult___fst_exp__h524820 ; + assign _theResult___fst_exp__h525648 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q214 : + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q214 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9208 ; - assign _theResult___fst_exp__h525650 = - (_theResult___fst_exp__h524867 == 11'd2047) ? - _theResult___fst_exp__h524867 : - _theResult___fst_exp__h525647 ; - assign _theResult___fst_exp__h525659 = - (f1_exp__h487069 == 8'd0) ? + assign _theResult___fst_exp__h525651 = + (_theResult___fst_exp__h524868 == 11'd2047) ? + _theResult___fst_exp__h524868 : + _theResult___fst_exp__h525648 ; + assign _theResult___fst_exp__h525660 = + (f1_exp__h487070 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 ? - _theResult___snd_fst_exp__h507218 : - _theResult___fst_exp__h491384) : + _theResult___snd_fst_exp__h507219 : + _theResult___fst_exp__h491385) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 ? - _theResult___snd_fst_exp__h525653 : - _theResult___fst_exp__h491384) ; - assign _theResult___fst_exp__h525662 = - (f1_exp__h487069 == 8'd0 && f1_sfd__h487070 == 23'd0) ? + _theResult___snd_fst_exp__h525654 : + _theResult___fst_exp__h491385) ; + assign _theResult___fst_exp__h525663 = + (f1_exp__h487070 == 8'd0 && f1_sfd__h487071 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h525659 ; - assign _theResult___fst_exp__h530237 = + _theResult___fst_exp__h525660 ; + assign _theResult___fst_exp__h530238 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17 ; - assign _theResult___fst_exp__h545301 = + assign _theResult___fst_exp__h545302 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10198 } ; - assign _theResult___fst_exp__h545307 = - (f2_exp__h526063 == 8'd0 && !f2_sfd__h526064[22] && + assign _theResult___fst_exp__h545308 = + (f2_exp__h526064 == 8'd0 && !f2_sfd__h526065[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10200) ? 11'd0 : - _theResult___fst_exp__h545301 ; - assign _theResult___fst_exp__h545310 = - (f2_exp__h526063 == 8'd0) ? - _theResult___fst_exp__h545307 : + _theResult___fst_exp__h545302 ; + assign _theResult___fst_exp__h545311 = + (f2_exp__h526064 == 8'd0) ? + _theResult___fst_exp__h545308 : 11'd897 ; - assign _theResult___fst_exp__h546065 = + assign _theResult___fst_exp__h546066 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q184 : + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q184 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619 ; - assign _theResult___fst_exp__h546068 = - (_theResult___fst_exp__h545310 == 11'd2047) ? - _theResult___fst_exp__h545310 : - _theResult___fst_exp__h546065 ; - assign _theResult___fst_exp__h554887 = - _theResult____h546651[56] ? + assign _theResult___fst_exp__h546069 = + (_theResult___fst_exp__h545311 == 11'd2047) ? + _theResult___fst_exp__h545311 : + _theResult___fst_exp__h546066 ; + assign _theResult___fst_exp__h554888 = + _theResult____h546652[56] ? 11'd2 : - _theResult___fst_exp__h554961 ; - assign _theResult___fst_exp__h554952 = + _theResult___fst_exp__h554962 ; + assign _theResult___fst_exp__h554953 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10495 } ; - assign _theResult___fst_exp__h554958 = - (!_theResult____h546651[56] && !_theResult____h546651[55] && - !_theResult____h546651[54] && - !_theResult____h546651[53] && - !_theResult____h546651[52] && - !_theResult____h546651[51] && - !_theResult____h546651[50] && - !_theResult____h546651[49] && - !_theResult____h546651[48] && - !_theResult____h546651[47] && - !_theResult____h546651[46] && - !_theResult____h546651[45] && - !_theResult____h546651[44] && - !_theResult____h546651[43] && - !_theResult____h546651[42] && - !_theResult____h546651[41] && - !_theResult____h546651[40] && - !_theResult____h546651[39] && - !_theResult____h546651[38] && - !_theResult____h546651[37] && - !_theResult____h546651[36] && - !_theResult____h546651[35] && - !_theResult____h546651[34] && - !_theResult____h546651[33] && - !_theResult____h546651[32] && - !_theResult____h546651[31] && - !_theResult____h546651[30] && - !_theResult____h546651[29] && - !_theResult____h546651[28] && - !_theResult____h546651[27] && - !_theResult____h546651[26] && - !_theResult____h546651[25] && - !_theResult____h546651[24] && - !_theResult____h546651[23] && - !_theResult____h546651[22] && - !_theResult____h546651[21] && - !_theResult____h546651[20] && - !_theResult____h546651[19] && - !_theResult____h546651[18] && - !_theResult____h546651[17] && - !_theResult____h546651[16] && - !_theResult____h546651[15] && - !_theResult____h546651[14] && - !_theResult____h546651[13] && - !_theResult____h546651[12] && - !_theResult____h546651[11] && - !_theResult____h546651[10] && - !_theResult____h546651[9] && - !_theResult____h546651[8] && - !_theResult____h546651[7] && - !_theResult____h546651[6] && - !_theResult____h546651[5] && - !_theResult____h546651[4] && - !_theResult____h546651[3] && - !_theResult____h546651[2] && - !_theResult____h546651[1] && - !_theResult____h546651[0] || + assign _theResult___fst_exp__h554959 = + (!_theResult____h546652[56] && !_theResult____h546652[55] && + !_theResult____h546652[54] && + !_theResult____h546652[53] && + !_theResult____h546652[52] && + !_theResult____h546652[51] && + !_theResult____h546652[50] && + !_theResult____h546652[49] && + !_theResult____h546652[48] && + !_theResult____h546652[47] && + !_theResult____h546652[46] && + !_theResult____h546652[45] && + !_theResult____h546652[44] && + !_theResult____h546652[43] && + !_theResult____h546652[42] && + !_theResult____h546652[41] && + !_theResult____h546652[40] && + !_theResult____h546652[39] && + !_theResult____h546652[38] && + !_theResult____h546652[37] && + !_theResult____h546652[36] && + !_theResult____h546652[35] && + !_theResult____h546652[34] && + !_theResult____h546652[33] && + !_theResult____h546652[32] && + !_theResult____h546652[31] && + !_theResult____h546652[30] && + !_theResult____h546652[29] && + !_theResult____h546652[28] && + !_theResult____h546652[27] && + !_theResult____h546652[26] && + !_theResult____h546652[25] && + !_theResult____h546652[24] && + !_theResult____h546652[23] && + !_theResult____h546652[22] && + !_theResult____h546652[21] && + !_theResult____h546652[20] && + !_theResult____h546652[19] && + !_theResult____h546652[18] && + !_theResult____h546652[17] && + !_theResult____h546652[16] && + !_theResult____h546652[15] && + !_theResult____h546652[14] && + !_theResult____h546652[13] && + !_theResult____h546652[12] && + !_theResult____h546652[11] && + !_theResult____h546652[10] && + !_theResult____h546652[9] && + !_theResult____h546652[8] && + !_theResult____h546652[7] && + !_theResult____h546652[6] && + !_theResult____h546652[5] && + !_theResult____h546652[4] && + !_theResult____h546652[3] && + !_theResult____h546652[2] && + !_theResult____h546652[1] && + !_theResult____h546652[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10497) ? 11'd0 : - _theResult___fst_exp__h554952 ; - assign _theResult___fst_exp__h554961 = - (!_theResult____h546651[56] && _theResult____h546651[55]) ? + _theResult___fst_exp__h554953 ; + assign _theResult___fst_exp__h554962 = + (!_theResult____h546652[56] && _theResult____h546652[55]) ? 11'd1 : - _theResult___fst_exp__h554958 ; - assign _theResult___fst_exp__h555716 = + _theResult___fst_exp__h554959 ; + assign _theResult___fst_exp__h555717 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q186 : + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q186 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657 ; - assign _theResult___fst_exp__h555719 = - (_theResult___fst_exp__h554887 == 11'd2047) ? - _theResult___fst_exp__h554887 : - _theResult___fst_exp__h555716 ; - assign _theResult___fst_exp__h563672 = + assign _theResult___fst_exp__h555720 = + (_theResult___fst_exp__h554888 == 11'd2047) ? + _theResult___fst_exp__h554888 : + _theResult___fst_exp__h555717 ; + assign _theResult___fst_exp__h563673 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] ; - assign _theResult___fst_exp__h563711 = + assign _theResult___fst_exp__h563712 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10198 } ; - assign _theResult___fst_exp__h563717 = - (f2_exp__h526063 == 8'd0 && !f2_sfd__h526064[22] && + assign _theResult___fst_exp__h563718 = + (f2_exp__h526064 == 8'd0 && !f2_sfd__h526065[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10547) ? 11'd0 : - _theResult___fst_exp__h563711 ; - assign _theResult___fst_exp__h563720 = - (f2_exp__h526063 == 8'd0) ? - _theResult___fst_exp__h563717 : - _theResult___fst_exp__h563672 ; - assign _theResult___fst_exp__h564500 = + _theResult___fst_exp__h563712 ; + assign _theResult___fst_exp__h563721 = + (f2_exp__h526064 == 8'd0) ? + _theResult___fst_exp__h563718 : + _theResult___fst_exp__h563673 ; + assign _theResult___fst_exp__h564501 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q188 : + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q188 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688 ; - assign _theResult___fst_exp__h564503 = - (_theResult___fst_exp__h563720 == 11'd2047) ? - _theResult___fst_exp__h563720 : - _theResult___fst_exp__h564500 ; - assign _theResult___fst_exp__h564512 = - (f2_exp__h526063 == 8'd0) ? + assign _theResult___fst_exp__h564504 = + (_theResult___fst_exp__h563721 == 11'd2047) ? + _theResult___fst_exp__h563721 : + _theResult___fst_exp__h564501 ; + assign _theResult___fst_exp__h564513 = + (f2_exp__h526064 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 ? - _theResult___snd_fst_exp__h546071 : - _theResult___fst_exp__h530237) : + _theResult___snd_fst_exp__h546072 : + _theResult___fst_exp__h530238) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 ? - _theResult___snd_fst_exp__h564506 : - _theResult___fst_exp__h530237) ; - assign _theResult___fst_exp__h564515 = - (f2_exp__h526063 == 8'd0 && f2_sfd__h526064 == 23'd0) ? + _theResult___snd_fst_exp__h564507 : + _theResult___fst_exp__h530238) ; + assign _theResult___fst_exp__h564516 = + (f2_exp__h526064 == 8'd0 && f2_sfd__h526065 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h564512 ; - assign _theResult___fst_exp__h569541 = + _theResult___fst_exp__h564513 ; + assign _theResult___fst_exp__h569542 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19 ; - assign _theResult___fst_exp__h584605 = + assign _theResult___fst_exp__h584606 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9428 } ; - assign _theResult___fst_exp__h584611 = - (f3_exp__h565367 == 8'd0 && !f3_sfd__h565368[22] && + assign _theResult___fst_exp__h584612 = + (f3_exp__h565368 == 8'd0 && !f3_sfd__h565369[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9401 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9430) ? 11'd0 : - _theResult___fst_exp__h584605 ; - assign _theResult___fst_exp__h584614 = - (f3_exp__h565367 == 8'd0) ? - _theResult___fst_exp__h584611 : + _theResult___fst_exp__h584606 ; + assign _theResult___fst_exp__h584615 = + (f3_exp__h565368 == 8'd0) ? + _theResult___fst_exp__h584612 : 11'd897 ; - assign _theResult___fst_exp__h585369 = + assign _theResult___fst_exp__h585370 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q161 : + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q161 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849 ; - assign _theResult___fst_exp__h585372 = - (_theResult___fst_exp__h584614 == 11'd2047) ? - _theResult___fst_exp__h584614 : - _theResult___fst_exp__h585369 ; - assign _theResult___fst_exp__h594191 = - _theResult____h585955[56] ? + assign _theResult___fst_exp__h585373 = + (_theResult___fst_exp__h584615 == 11'd2047) ? + _theResult___fst_exp__h584615 : + _theResult___fst_exp__h585370 ; + assign _theResult___fst_exp__h594192 = + _theResult____h585956[56] ? 11'd2 : - _theResult___fst_exp__h594265 ; - assign _theResult___fst_exp__h594256 = + _theResult___fst_exp__h594266 ; + assign _theResult___fst_exp__h594257 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9725 } ; - assign _theResult___fst_exp__h594262 = - (!_theResult____h585955[56] && !_theResult____h585955[55] && - !_theResult____h585955[54] && - !_theResult____h585955[53] && - !_theResult____h585955[52] && - !_theResult____h585955[51] && - !_theResult____h585955[50] && - !_theResult____h585955[49] && - !_theResult____h585955[48] && - !_theResult____h585955[47] && - !_theResult____h585955[46] && - !_theResult____h585955[45] && - !_theResult____h585955[44] && - !_theResult____h585955[43] && - !_theResult____h585955[42] && - !_theResult____h585955[41] && - !_theResult____h585955[40] && - !_theResult____h585955[39] && - !_theResult____h585955[38] && - !_theResult____h585955[37] && - !_theResult____h585955[36] && - !_theResult____h585955[35] && - !_theResult____h585955[34] && - !_theResult____h585955[33] && - !_theResult____h585955[32] && - !_theResult____h585955[31] && - !_theResult____h585955[30] && - !_theResult____h585955[29] && - !_theResult____h585955[28] && - !_theResult____h585955[27] && - !_theResult____h585955[26] && - !_theResult____h585955[25] && - !_theResult____h585955[24] && - !_theResult____h585955[23] && - !_theResult____h585955[22] && - !_theResult____h585955[21] && - !_theResult____h585955[20] && - !_theResult____h585955[19] && - !_theResult____h585955[18] && - !_theResult____h585955[17] && - !_theResult____h585955[16] && - !_theResult____h585955[15] && - !_theResult____h585955[14] && - !_theResult____h585955[13] && - !_theResult____h585955[12] && - !_theResult____h585955[11] && - !_theResult____h585955[10] && - !_theResult____h585955[9] && - !_theResult____h585955[8] && - !_theResult____h585955[7] && - !_theResult____h585955[6] && - !_theResult____h585955[5] && - !_theResult____h585955[4] && - !_theResult____h585955[3] && - !_theResult____h585955[2] && - !_theResult____h585955[1] && - !_theResult____h585955[0] || + assign _theResult___fst_exp__h594263 = + (!_theResult____h585956[56] && !_theResult____h585956[55] && + !_theResult____h585956[54] && + !_theResult____h585956[53] && + !_theResult____h585956[52] && + !_theResult____h585956[51] && + !_theResult____h585956[50] && + !_theResult____h585956[49] && + !_theResult____h585956[48] && + !_theResult____h585956[47] && + !_theResult____h585956[46] && + !_theResult____h585956[45] && + !_theResult____h585956[44] && + !_theResult____h585956[43] && + !_theResult____h585956[42] && + !_theResult____h585956[41] && + !_theResult____h585956[40] && + !_theResult____h585956[39] && + !_theResult____h585956[38] && + !_theResult____h585956[37] && + !_theResult____h585956[36] && + !_theResult____h585956[35] && + !_theResult____h585956[34] && + !_theResult____h585956[33] && + !_theResult____h585956[32] && + !_theResult____h585956[31] && + !_theResult____h585956[30] && + !_theResult____h585956[29] && + !_theResult____h585956[28] && + !_theResult____h585956[27] && + !_theResult____h585956[26] && + !_theResult____h585956[25] && + !_theResult____h585956[24] && + !_theResult____h585956[23] && + !_theResult____h585956[22] && + !_theResult____h585956[21] && + !_theResult____h585956[20] && + !_theResult____h585956[19] && + !_theResult____h585956[18] && + !_theResult____h585956[17] && + !_theResult____h585956[16] && + !_theResult____h585956[15] && + !_theResult____h585956[14] && + !_theResult____h585956[13] && + !_theResult____h585956[12] && + !_theResult____h585956[11] && + !_theResult____h585956[10] && + !_theResult____h585956[9] && + !_theResult____h585956[8] && + !_theResult____h585956[7] && + !_theResult____h585956[6] && + !_theResult____h585956[5] && + !_theResult____h585956[4] && + !_theResult____h585956[3] && + !_theResult____h585956[2] && + !_theResult____h585956[1] && + !_theResult____h585956[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9727) ? 11'd0 : - _theResult___fst_exp__h594256 ; - assign _theResult___fst_exp__h594265 = - (!_theResult____h585955[56] && _theResult____h585955[55]) ? + _theResult___fst_exp__h594257 ; + assign _theResult___fst_exp__h594266 = + (!_theResult____h585956[56] && _theResult____h585956[55]) ? 11'd1 : - _theResult___fst_exp__h594262 ; - assign _theResult___fst_exp__h595020 = + _theResult___fst_exp__h594263 ; + assign _theResult___fst_exp__h595021 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q190 : + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q190 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887 ; - assign _theResult___fst_exp__h595023 = - (_theResult___fst_exp__h594191 == 11'd2047) ? - _theResult___fst_exp__h594191 : - _theResult___fst_exp__h595020 ; - assign _theResult___fst_exp__h602976 = + assign _theResult___fst_exp__h595024 = + (_theResult___fst_exp__h594192 == 11'd2047) ? + _theResult___fst_exp__h594192 : + _theResult___fst_exp__h595021 ; + assign _theResult___fst_exp__h602977 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] ; - assign _theResult___fst_exp__h603015 = + assign _theResult___fst_exp__h603016 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9428 } ; - assign _theResult___fst_exp__h603021 = - (f3_exp__h565367 == 8'd0 && !f3_sfd__h565368[22] && + assign _theResult___fst_exp__h603022 = + (f3_exp__h565368 == 8'd0 && !f3_sfd__h565369[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9401 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9777) ? 11'd0 : - _theResult___fst_exp__h603015 ; - assign _theResult___fst_exp__h603024 = - (f3_exp__h565367 == 8'd0) ? - _theResult___fst_exp__h603021 : - _theResult___fst_exp__h602976 ; - assign _theResult___fst_exp__h603804 = + _theResult___fst_exp__h603016 ; + assign _theResult___fst_exp__h603025 = + (f3_exp__h565368 == 8'd0) ? + _theResult___fst_exp__h603022 : + _theResult___fst_exp__h602977 ; + assign _theResult___fst_exp__h603805 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q192 : + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q192 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918 ; - assign _theResult___fst_exp__h603807 = - (_theResult___fst_exp__h603024 == 11'd2047) ? - _theResult___fst_exp__h603024 : - _theResult___fst_exp__h603804 ; - assign _theResult___fst_exp__h603816 = - (f3_exp__h565367 == 8'd0) ? + assign _theResult___fst_exp__h603808 = + (_theResult___fst_exp__h603025 == 11'd2047) ? + _theResult___fst_exp__h603025 : + _theResult___fst_exp__h603805 ; + assign _theResult___fst_exp__h603817 = + (f3_exp__h565368 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 ? - _theResult___snd_fst_exp__h585375 : - _theResult___fst_exp__h569541) : + _theResult___snd_fst_exp__h585376 : + _theResult___fst_exp__h569542) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 ? - _theResult___snd_fst_exp__h603810 : - _theResult___fst_exp__h569541) ; - assign _theResult___fst_exp__h603819 = - (f3_exp__h565367 == 8'd0 && f3_sfd__h565368 == 23'd0) ? + _theResult___snd_fst_exp__h603811 : + _theResult___fst_exp__h569542) ; + assign _theResult___fst_exp__h603820 = + (f3_exp__h565368 == 8'd0 && f3_sfd__h565369 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h603816 ; - assign _theResult___fst_sfd__h359215 = - (_theResult___fst_exp__h358617 == 8'd255) ? - sfdin__h358611[56:34] : - _theResult___fst_sfd__h359212 ; - assign _theResult___fst_sfd__h367797 = - (_theResult___fst_exp__h367273 == 8'd255) ? - _theResult___snd__h367224[56:34] : - _theResult___fst_sfd__h367794 ; - assign _theResult___fst_sfd__h376981 = - (_theResult___fst_exp__h376383 == 8'd255) ? - sfdin__h376377[56:34] : - _theResult___fst_sfd__h376978 ; - assign _theResult___fst_sfd__h385617 = - (_theResult___fst_exp__h385068 == 8'd255) ? - _theResult___snd__h385014[56:34] : - _theResult___fst_sfd__h385614 ; - assign _theResult___fst_sfd__h385626 = + _theResult___fst_exp__h603817 ; + assign _theResult___fst_sfd__h359216 = + (_theResult___fst_exp__h358618 == 8'd255) ? + sfdin__h358612[56:34] : + _theResult___fst_sfd__h359213 ; + assign _theResult___fst_sfd__h367798 = + (_theResult___fst_exp__h367274 == 8'd255) ? + _theResult___snd__h367225[56:34] : + _theResult___fst_sfd__h367795 ; + assign _theResult___fst_sfd__h376982 = + (_theResult___fst_exp__h376384 == 8'd255) ? + sfdin__h376378[56:34] : + _theResult___fst_sfd__h376979 ; + assign _theResult___fst_sfd__h385618 = + (_theResult___fst_exp__h385069 == 8'd255) ? + _theResult___snd__h385015[56:34] : + _theResult___fst_sfd__h385615 ; + assign _theResult___fst_sfd__h385627 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4112 ? - _theResult___snd_fst_sfd__h367800 : - _theResult___fst_sfd__h350489) : + _theResult___snd_fst_sfd__h367801 : + _theResult___fst_sfd__h350490) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4652 ? - _theResult___snd_fst_sfd__h385620 : - _theResult___fst_sfd__h350489) ; - assign _theResult___fst_sfd__h385632 = + _theResult___snd_fst_sfd__h385621 : + _theResult___fst_sfd__h350490) ; + assign _theResult___fst_sfd__h385633 = ((coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == @@ -28429,33 +28429,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h385626 ; - assign _theResult___fst_sfd__h404912 = - (_theResult___fst_exp__h404314 == 8'd255) ? - sfdin__h404308[56:34] : - _theResult___fst_sfd__h404909 ; - assign _theResult___fst_sfd__h413494 = - (_theResult___fst_exp__h412970 == 8'd255) ? - _theResult___snd__h412921[56:34] : - _theResult___fst_sfd__h413491 ; - assign _theResult___fst_sfd__h422678 = - (_theResult___fst_exp__h422080 == 8'd255) ? - sfdin__h422074[56:34] : - _theResult___fst_sfd__h422675 ; - assign _theResult___fst_sfd__h431314 = - (_theResult___fst_exp__h430765 == 8'd255) ? - _theResult___snd__h430711[56:34] : - _theResult___fst_sfd__h431311 ; - assign _theResult___fst_sfd__h431323 = + _theResult___fst_sfd__h385627 ; + assign _theResult___fst_sfd__h404913 = + (_theResult___fst_exp__h404315 == 8'd255) ? + sfdin__h404309[56:34] : + _theResult___fst_sfd__h404910 ; + assign _theResult___fst_sfd__h413495 = + (_theResult___fst_exp__h412971 == 8'd255) ? + _theResult___snd__h412922[56:34] : + _theResult___fst_sfd__h413492 ; + assign _theResult___fst_sfd__h422679 = + (_theResult___fst_exp__h422081 == 8'd255) ? + sfdin__h422075[56:34] : + _theResult___fst_sfd__h422676 ; + assign _theResult___fst_sfd__h431315 = + (_theResult___fst_exp__h430766 == 8'd255) ? + _theResult___snd__h430712[56:34] : + _theResult___fst_sfd__h431312 ; + assign _theResult___fst_sfd__h431324 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5504 ? - _theResult___snd_fst_sfd__h413497 : - _theResult___fst_sfd__h396188) : + _theResult___snd_fst_sfd__h413498 : + _theResult___fst_sfd__h396189) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6044 ? - _theResult___snd_fst_sfd__h431317 : - _theResult___fst_sfd__h396188) ; - assign _theResult___fst_sfd__h431329 = + _theResult___snd_fst_sfd__h431318 : + _theResult___fst_sfd__h396189) ; + assign _theResult___fst_sfd__h431330 = ((coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == @@ -28463,33 +28463,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h431323 ; - assign _theResult___fst_sfd__h450607 = - (_theResult___fst_exp__h450009 == 8'd255) ? - sfdin__h450003[56:34] : - _theResult___fst_sfd__h450604 ; - assign _theResult___fst_sfd__h459189 = - (_theResult___fst_exp__h458665 == 8'd255) ? - _theResult___snd__h458616[56:34] : - _theResult___fst_sfd__h459186 ; - assign _theResult___fst_sfd__h468373 = - (_theResult___fst_exp__h467775 == 8'd255) ? - sfdin__h467769[56:34] : - _theResult___fst_sfd__h468370 ; - assign _theResult___fst_sfd__h477009 = - (_theResult___fst_exp__h476460 == 8'd255) ? - _theResult___snd__h476406[56:34] : - _theResult___fst_sfd__h477006 ; - assign _theResult___fst_sfd__h477018 = + _theResult___fst_sfd__h431324 ; + assign _theResult___fst_sfd__h450608 = + (_theResult___fst_exp__h450010 == 8'd255) ? + sfdin__h450004[56:34] : + _theResult___fst_sfd__h450605 ; + assign _theResult___fst_sfd__h459190 = + (_theResult___fst_exp__h458666 == 8'd255) ? + _theResult___snd__h458617[56:34] : + _theResult___fst_sfd__h459187 ; + assign _theResult___fst_sfd__h468374 = + (_theResult___fst_exp__h467776 == 8'd255) ? + sfdin__h467770[56:34] : + _theResult___fst_sfd__h468371 ; + assign _theResult___fst_sfd__h477010 = + (_theResult___fst_exp__h476461 == 8'd255) ? + _theResult___snd__h476407[56:34] : + _theResult___fst_sfd__h477007 ; + assign _theResult___fst_sfd__h477019 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6896 ? - _theResult___snd_fst_sfd__h459192 : - _theResult___fst_sfd__h441883) : + _theResult___snd_fst_sfd__h459193 : + _theResult___fst_sfd__h441884) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7436 ? - _theResult___snd_fst_sfd__h477012 : - _theResult___fst_sfd__h441883) ; - assign _theResult___fst_sfd__h477024 = + _theResult___snd_fst_sfd__h477013 : + _theResult___fst_sfd__h441884) ; + assign _theResult___fst_sfd__h477025 = ((coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == @@ -28497,1308 +28497,1308 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h477018 ; - assign _theResult___fst_sfd__h491385 = + _theResult___fst_sfd__h477019 ; + assign _theResult___fst_sfd__h491386 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16 ; - assign _theResult___fst_sfd__h507213 = + assign _theResult___fst_sfd__h507214 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q216 : + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q216 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9234 ; - assign _theResult___fst_sfd__h507216 = - (_theResult___fst_exp__h506457 == 11'd2047) ? - _theResult___snd__h506408[56:5] : - _theResult___fst_sfd__h507213 ; - assign _theResult___fst_sfd__h516864 = + assign _theResult___fst_sfd__h507217 = + (_theResult___fst_exp__h506458 == 11'd2047) ? + _theResult___snd__h506409[56:5] : + _theResult___fst_sfd__h507214 ; + assign _theResult___fst_sfd__h516865 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q218 : + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q218 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9261 ; - assign _theResult___fst_sfd__h516867 = - (_theResult___fst_exp__h516034 == 11'd2047) ? - sfdin__h516028[56:5] : - _theResult___fst_sfd__h516864 ; - assign _theResult___fst_sfd__h525648 = + assign _theResult___fst_sfd__h516868 = + (_theResult___fst_exp__h516035 == 11'd2047) ? + sfdin__h516029[56:5] : + _theResult___fst_sfd__h516865 ; + assign _theResult___fst_sfd__h525649 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q220 : + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q220 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9280 ; - assign _theResult___fst_sfd__h525651 = - (_theResult___fst_exp__h524867 == 11'd2047) ? - _theResult___snd__h524813[56:5] : - _theResult___fst_sfd__h525648 ; - assign _theResult___fst_sfd__h525660 = - (f1_exp__h487069 == 8'd0) ? + assign _theResult___fst_sfd__h525652 = + (_theResult___fst_exp__h524868 == 11'd2047) ? + _theResult___snd__h524814[56:5] : + _theResult___fst_sfd__h525649 ; + assign _theResult___fst_sfd__h525661 = + (f1_exp__h487070 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8625 ? - _theResult___snd_fst_sfd__h507219 : - _theResult___fst_sfd__h491385) : + _theResult___snd_fst_sfd__h507220 : + _theResult___fst_sfd__h491386) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8762 ? - _theResult___snd_fst_sfd__h525654 : - _theResult___fst_sfd__h491385) ; - assign _theResult___fst_sfd__h525666 = - ((f1_exp__h487069 == 8'd255 || f1_exp__h487069 == 8'd0) && - f1_sfd__h487070 == 23'd0) ? + _theResult___snd_fst_sfd__h525655 : + _theResult___fst_sfd__h491386) ; + assign _theResult___fst_sfd__h525667 = + ((f1_exp__h487070 == 8'd255 || f1_exp__h487070 == 8'd0) && + f1_sfd__h487071 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h525660 ; - assign _theResult___fst_sfd__h530238 = + _theResult___fst_sfd__h525661 ; + assign _theResult___fst_sfd__h530239 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18 ; - assign _theResult___fst_sfd__h546066 = + assign _theResult___fst_sfd__h546067 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q206 : + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q206 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714 ; - assign _theResult___fst_sfd__h546069 = - (_theResult___fst_exp__h545310 == 11'd2047) ? - _theResult___snd__h545261[56:5] : - _theResult___fst_sfd__h546066 ; - assign _theResult___fst_sfd__h555717 = + assign _theResult___fst_sfd__h546070 = + (_theResult___fst_exp__h545311 == 11'd2047) ? + _theResult___snd__h545262[56:5] : + _theResult___fst_sfd__h546067 ; + assign _theResult___fst_sfd__h555718 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q208 : + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q208 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740 ; - assign _theResult___fst_sfd__h555720 = - (_theResult___fst_exp__h554887 == 11'd2047) ? - sfdin__h554881[56:5] : - _theResult___fst_sfd__h555717 ; - assign _theResult___fst_sfd__h564501 = + assign _theResult___fst_sfd__h555721 = + (_theResult___fst_exp__h554888 == 11'd2047) ? + sfdin__h554882[56:5] : + _theResult___fst_sfd__h555718 ; + assign _theResult___fst_sfd__h564502 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q210 : + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q210 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759 ; - assign _theResult___fst_sfd__h564504 = - (_theResult___fst_exp__h563720 == 11'd2047) ? - _theResult___snd__h563666[56:5] : - _theResult___fst_sfd__h564501 ; - assign _theResult___fst_sfd__h564513 = - (f2_exp__h526063 == 8'd0) ? + assign _theResult___fst_sfd__h564505 = + (_theResult___fst_exp__h563721 == 11'd2047) ? + _theResult___snd__h563667[56:5] : + _theResult___fst_sfd__h564502 ; + assign _theResult___fst_sfd__h564514 = + (f2_exp__h526064 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10125 ? - _theResult___snd_fst_sfd__h546072 : - _theResult___fst_sfd__h530238) : + _theResult___snd_fst_sfd__h546073 : + _theResult___fst_sfd__h530239) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10247 ? - _theResult___snd_fst_sfd__h564507 : - _theResult___fst_sfd__h530238) ; - assign _theResult___fst_sfd__h564519 = - ((f2_exp__h526063 == 8'd255 || f2_exp__h526063 == 8'd0) && - f2_sfd__h526064 == 23'd0) ? + _theResult___snd_fst_sfd__h564508 : + _theResult___fst_sfd__h530239) ; + assign _theResult___fst_sfd__h564520 = + ((f2_exp__h526064 == 8'd255 || f2_exp__h526064 == 8'd0) && + f2_sfd__h526065 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h564513 ; - assign _theResult___fst_sfd__h569542 = + _theResult___fst_sfd__h564514 ; + assign _theResult___fst_sfd__h569543 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q20 ; - assign _theResult___fst_sfd__h585370 = + assign _theResult___fst_sfd__h585371 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q222 : + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q222 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9944 ; - assign _theResult___fst_sfd__h585373 = - (_theResult___fst_exp__h584614 == 11'd2047) ? - _theResult___snd__h584565[56:5] : - _theResult___fst_sfd__h585370 ; - assign _theResult___fst_sfd__h595021 = + assign _theResult___fst_sfd__h585374 = + (_theResult___fst_exp__h584615 == 11'd2047) ? + _theResult___snd__h584566[56:5] : + _theResult___fst_sfd__h585371 ; + assign _theResult___fst_sfd__h595022 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q224 : + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q224 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9970 ; - assign _theResult___fst_sfd__h595024 = - (_theResult___fst_exp__h594191 == 11'd2047) ? - sfdin__h594185[56:5] : - _theResult___fst_sfd__h595021 ; - assign _theResult___fst_sfd__h603805 = + assign _theResult___fst_sfd__h595025 = + (_theResult___fst_exp__h594192 == 11'd2047) ? + sfdin__h594186[56:5] : + _theResult___fst_sfd__h595022 ; + assign _theResult___fst_sfd__h603806 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q226 : + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q226 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989 ; - assign _theResult___fst_sfd__h603808 = - (_theResult___fst_exp__h603024 == 11'd2047) ? - _theResult___snd__h602970[56:5] : - _theResult___fst_sfd__h603805 ; - assign _theResult___fst_sfd__h603817 = - (f3_exp__h565367 == 8'd0) ? + assign _theResult___fst_sfd__h603809 = + (_theResult___fst_exp__h603025 == 11'd2047) ? + _theResult___snd__h602971[56:5] : + _theResult___fst_sfd__h603806 ; + assign _theResult___fst_sfd__h603818 = + (f3_exp__h565368 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9355 ? - _theResult___snd_fst_sfd__h585376 : - _theResult___fst_sfd__h569542) : + _theResult___snd_fst_sfd__h585377 : + _theResult___fst_sfd__h569543) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9477 ? - _theResult___snd_fst_sfd__h603811 : - _theResult___fst_sfd__h569542) ; - assign _theResult___fst_sfd__h603823 = - ((f3_exp__h565367 == 8'd255 || f3_exp__h565367 == 8'd0) && - f3_sfd__h565368 == 23'd0) ? + _theResult___snd_fst_sfd__h603812 : + _theResult___fst_sfd__h569543) ; + assign _theResult___fst_sfd__h603824 = + ((f3_exp__h565368 == 8'd255 || f3_exp__h565368 == 8'd0) && + f3_sfd__h565369 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h603817 ; - assign _theResult___sfd__h359134 = - sfd__h358709[24] ? - ((_theResult___fst_exp__h358617 == 8'd254) ? + _theResult___fst_sfd__h603818 ; + assign _theResult___sfd__h359135 = + sfd__h358710[24] ? + ((_theResult___fst_exp__h358618 == 8'd254) ? 23'd0 : - sfd__h358709[23:1]) : - sfd__h358709[22:0] ; - assign _theResult___sfd__h367716 = - sfd__h367291[24] ? - ((_theResult___fst_exp__h367273 == 8'd254) ? + sfd__h358710[23:1]) : + sfd__h358710[22:0] ; + assign _theResult___sfd__h367717 = + sfd__h367292[24] ? + ((_theResult___fst_exp__h367274 == 8'd254) ? 23'd0 : - sfd__h367291[23:1]) : - sfd__h367291[22:0] ; - assign _theResult___sfd__h376900 = - sfd__h376475[24] ? - ((_theResult___fst_exp__h376383 == 8'd254) ? + sfd__h367292[23:1]) : + sfd__h367292[22:0] ; + assign _theResult___sfd__h376901 = + sfd__h376476[24] ? + ((_theResult___fst_exp__h376384 == 8'd254) ? 23'd0 : - sfd__h376475[23:1]) : - sfd__h376475[22:0] ; - assign _theResult___sfd__h385536 = - sfd__h385087[24] ? - ((_theResult___fst_exp__h385068 == 8'd254) ? + sfd__h376476[23:1]) : + sfd__h376476[22:0] ; + assign _theResult___sfd__h385537 = + sfd__h385088[24] ? + ((_theResult___fst_exp__h385069 == 8'd254) ? 23'd0 : - sfd__h385087[23:1]) : - sfd__h385087[22:0] ; - assign _theResult___sfd__h385638 = + sfd__h385088[23:1]) : + sfd__h385088[22:0] ; + assign _theResult___sfd__h385639 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h342851 : - _theResult___fst_sfd__h385632 ; - assign _theResult___sfd__h404831 = - sfd__h404406[24] ? - ((_theResult___fst_exp__h404314 == 8'd254) ? + _theResult___snd_fst_sfd__h342852 : + _theResult___fst_sfd__h385633 ; + assign _theResult___sfd__h404832 = + sfd__h404407[24] ? + ((_theResult___fst_exp__h404315 == 8'd254) ? 23'd0 : - sfd__h404406[23:1]) : - sfd__h404406[22:0] ; - assign _theResult___sfd__h413413 = - sfd__h412988[24] ? - ((_theResult___fst_exp__h412970 == 8'd254) ? + sfd__h404407[23:1]) : + sfd__h404407[22:0] ; + assign _theResult___sfd__h413414 = + sfd__h412989[24] ? + ((_theResult___fst_exp__h412971 == 8'd254) ? 23'd0 : - sfd__h412988[23:1]) : - sfd__h412988[22:0] ; - assign _theResult___sfd__h422597 = - sfd__h422172[24] ? - ((_theResult___fst_exp__h422080 == 8'd254) ? + sfd__h412989[23:1]) : + sfd__h412989[22:0] ; + assign _theResult___sfd__h422598 = + sfd__h422173[24] ? + ((_theResult___fst_exp__h422081 == 8'd254) ? 23'd0 : - sfd__h422172[23:1]) : - sfd__h422172[22:0] ; - assign _theResult___sfd__h431233 = - sfd__h430784[24] ? - ((_theResult___fst_exp__h430765 == 8'd254) ? + sfd__h422173[23:1]) : + sfd__h422173[22:0] ; + assign _theResult___sfd__h431234 = + sfd__h430785[24] ? + ((_theResult___fst_exp__h430766 == 8'd254) ? 23'd0 : - sfd__h430784[23:1]) : - sfd__h430784[22:0] ; - assign _theResult___sfd__h431335 = + sfd__h430785[23:1]) : + sfd__h430785[22:0] ; + assign _theResult___sfd__h431336 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h388553 : - _theResult___fst_sfd__h431329 ; - assign _theResult___sfd__h450526 = - sfd__h450101[24] ? - ((_theResult___fst_exp__h450009 == 8'd254) ? + _theResult___snd_fst_sfd__h388554 : + _theResult___fst_sfd__h431330 ; + assign _theResult___sfd__h450527 = + sfd__h450102[24] ? + ((_theResult___fst_exp__h450010 == 8'd254) ? 23'd0 : - sfd__h450101[23:1]) : - sfd__h450101[22:0] ; - assign _theResult___sfd__h459108 = - sfd__h458683[24] ? - ((_theResult___fst_exp__h458665 == 8'd254) ? + sfd__h450102[23:1]) : + sfd__h450102[22:0] ; + assign _theResult___sfd__h459109 = + sfd__h458684[24] ? + ((_theResult___fst_exp__h458666 == 8'd254) ? 23'd0 : - sfd__h458683[23:1]) : - sfd__h458683[22:0] ; - assign _theResult___sfd__h468292 = - sfd__h467867[24] ? - ((_theResult___fst_exp__h467775 == 8'd254) ? + sfd__h458684[23:1]) : + sfd__h458684[22:0] ; + assign _theResult___sfd__h468293 = + sfd__h467868[24] ? + ((_theResult___fst_exp__h467776 == 8'd254) ? 23'd0 : - sfd__h467867[23:1]) : - sfd__h467867[22:0] ; - assign _theResult___sfd__h476928 = - sfd__h476479[24] ? - ((_theResult___fst_exp__h476460 == 8'd254) ? + sfd__h467868[23:1]) : + sfd__h467868[22:0] ; + assign _theResult___sfd__h476929 = + sfd__h476480[24] ? + ((_theResult___fst_exp__h476461 == 8'd254) ? 23'd0 : - sfd__h476479[23:1]) : - sfd__h476479[22:0] ; - assign _theResult___sfd__h477030 = + sfd__h476480[23:1]) : + sfd__h476480[22:0] ; + assign _theResult___sfd__h477031 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h434248 : - _theResult___fst_sfd__h477024 ; - assign _theResult___sfd__h507113 = - sfd__h506475[53] ? - ((_theResult___fst_exp__h506457 == 11'd2046) ? + _theResult___snd_fst_sfd__h434249 : + _theResult___fst_sfd__h477025 ; + assign _theResult___sfd__h507114 = + sfd__h506476[53] ? + ((_theResult___fst_exp__h506458 == 11'd2046) ? 52'd0 : - sfd__h506475[52:1]) : - sfd__h506475[51:0] ; - assign _theResult___sfd__h516764 = - sfd__h516126[53] ? - ((_theResult___fst_exp__h516034 == 11'd2046) ? + sfd__h506476[52:1]) : + sfd__h506476[51:0] ; + assign _theResult___sfd__h516765 = + sfd__h516127[53] ? + ((_theResult___fst_exp__h516035 == 11'd2046) ? 52'd0 : - sfd__h516126[52:1]) : - sfd__h516126[51:0] ; - assign _theResult___sfd__h525548 = - sfd__h524886[53] ? - ((_theResult___fst_exp__h524867 == 11'd2046) ? + sfd__h516127[52:1]) : + sfd__h516127[51:0] ; + assign _theResult___sfd__h525549 = + sfd__h524887[53] ? + ((_theResult___fst_exp__h524868 == 11'd2046) ? 52'd0 : - sfd__h524886[52:1]) : - sfd__h524886[51:0] ; - assign _theResult___sfd__h545966 = - sfd__h545328[53] ? - ((_theResult___fst_exp__h545310 == 11'd2046) ? + sfd__h524887[52:1]) : + sfd__h524887[51:0] ; + assign _theResult___sfd__h545967 = + sfd__h545329[53] ? + ((_theResult___fst_exp__h545311 == 11'd2046) ? 52'd0 : - sfd__h545328[52:1]) : - sfd__h545328[51:0] ; - assign _theResult___sfd__h555617 = - sfd__h554979[53] ? - ((_theResult___fst_exp__h554887 == 11'd2046) ? + sfd__h545329[52:1]) : + sfd__h545329[51:0] ; + assign _theResult___sfd__h555618 = + sfd__h554980[53] ? + ((_theResult___fst_exp__h554888 == 11'd2046) ? 52'd0 : - sfd__h554979[52:1]) : - sfd__h554979[51:0] ; - assign _theResult___sfd__h564401 = - sfd__h563739[53] ? - ((_theResult___fst_exp__h563720 == 11'd2046) ? + sfd__h554980[52:1]) : + sfd__h554980[51:0] ; + assign _theResult___sfd__h564402 = + sfd__h563740[53] ? + ((_theResult___fst_exp__h563721 == 11'd2046) ? 52'd0 : - sfd__h563739[52:1]) : - sfd__h563739[51:0] ; - assign _theResult___sfd__h585270 = - sfd__h584632[53] ? - ((_theResult___fst_exp__h584614 == 11'd2046) ? + sfd__h563740[52:1]) : + sfd__h563740[51:0] ; + assign _theResult___sfd__h585271 = + sfd__h584633[53] ? + ((_theResult___fst_exp__h584615 == 11'd2046) ? 52'd0 : - sfd__h584632[52:1]) : - sfd__h584632[51:0] ; - assign _theResult___sfd__h594921 = - sfd__h594283[53] ? - ((_theResult___fst_exp__h594191 == 11'd2046) ? + sfd__h584633[52:1]) : + sfd__h584633[51:0] ; + assign _theResult___sfd__h594922 = + sfd__h594284[53] ? + ((_theResult___fst_exp__h594192 == 11'd2046) ? 52'd0 : - sfd__h594283[52:1]) : - sfd__h594283[51:0] ; - assign _theResult___sfd__h603705 = - sfd__h603043[53] ? - ((_theResult___fst_exp__h603024 == 11'd2046) ? + sfd__h594284[52:1]) : + sfd__h594284[51:0] ; + assign _theResult___sfd__h603706 = + sfd__h603044[53] ? + ((_theResult___fst_exp__h603025 == 11'd2046) ? 52'd0 : - sfd__h603043[52:1]) : - sfd__h603043[51:0] ; - assign _theResult___snd__h358628 = { _theResult____h350506[55:0], 1'd0 } ; - assign _theResult___snd__h358639 = - (!_theResult____h350506[56] && _theResult____h350506[55]) ? - _theResult___snd__h358641 : - _theResult___snd__h358651 ; - assign _theResult___snd__h358641 = { _theResult____h350506[54:0], 2'd0 } ; - assign _theResult___snd__h358651 = - (!_theResult____h350506[56] && !_theResult____h350506[55] && - !_theResult____h350506[54] && - !_theResult____h350506[53] && - !_theResult____h350506[52] && - !_theResult____h350506[51] && - !_theResult____h350506[50] && - !_theResult____h350506[49] && - !_theResult____h350506[48] && - !_theResult____h350506[47] && - !_theResult____h350506[46] && - !_theResult____h350506[45] && - !_theResult____h350506[44] && - !_theResult____h350506[43] && - !_theResult____h350506[42] && - !_theResult____h350506[41] && - !_theResult____h350506[40] && - !_theResult____h350506[39] && - !_theResult____h350506[38] && - !_theResult____h350506[37] && - !_theResult____h350506[36] && - !_theResult____h350506[35] && - !_theResult____h350506[34] && - !_theResult____h350506[33] && - !_theResult____h350506[32] && - !_theResult____h350506[31] && - !_theResult____h350506[30] && - !_theResult____h350506[29] && - !_theResult____h350506[28] && - !_theResult____h350506[27] && - !_theResult____h350506[26] && - !_theResult____h350506[25] && - !_theResult____h350506[24] && - !_theResult____h350506[23] && - !_theResult____h350506[22] && - !_theResult____h350506[21] && - !_theResult____h350506[20] && - !_theResult____h350506[19] && - !_theResult____h350506[18] && - !_theResult____h350506[17] && - !_theResult____h350506[16] && - !_theResult____h350506[15] && - !_theResult____h350506[14] && - !_theResult____h350506[13] && - !_theResult____h350506[12] && - !_theResult____h350506[11] && - !_theResult____h350506[10] && - !_theResult____h350506[9] && - !_theResult____h350506[8] && - !_theResult____h350506[7] && - !_theResult____h350506[6] && - !_theResult____h350506[5] && - !_theResult____h350506[4] && - !_theResult____h350506[3] && - !_theResult____h350506[2] && - !_theResult____h350506[1] && - !_theResult____h350506[0]) ? - _theResult____h350506 : - _theResult___snd__h358657 ; - assign _theResult___snd__h358657 = + sfd__h603044[52:1]) : + sfd__h603044[51:0] ; + assign _theResult___snd__h358629 = { _theResult____h350507[55:0], 1'd0 } ; + assign _theResult___snd__h358640 = + (!_theResult____h350507[56] && _theResult____h350507[55]) ? + _theResult___snd__h358642 : + _theResult___snd__h358652 ; + assign _theResult___snd__h358642 = { _theResult____h350507[54:0], 2'd0 } ; + assign _theResult___snd__h358652 = + (!_theResult____h350507[56] && !_theResult____h350507[55] && + !_theResult____h350507[54] && + !_theResult____h350507[53] && + !_theResult____h350507[52] && + !_theResult____h350507[51] && + !_theResult____h350507[50] && + !_theResult____h350507[49] && + !_theResult____h350507[48] && + !_theResult____h350507[47] && + !_theResult____h350507[46] && + !_theResult____h350507[45] && + !_theResult____h350507[44] && + !_theResult____h350507[43] && + !_theResult____h350507[42] && + !_theResult____h350507[41] && + !_theResult____h350507[40] && + !_theResult____h350507[39] && + !_theResult____h350507[38] && + !_theResult____h350507[37] && + !_theResult____h350507[36] && + !_theResult____h350507[35] && + !_theResult____h350507[34] && + !_theResult____h350507[33] && + !_theResult____h350507[32] && + !_theResult____h350507[31] && + !_theResult____h350507[30] && + !_theResult____h350507[29] && + !_theResult____h350507[28] && + !_theResult____h350507[27] && + !_theResult____h350507[26] && + !_theResult____h350507[25] && + !_theResult____h350507[24] && + !_theResult____h350507[23] && + !_theResult____h350507[22] && + !_theResult____h350507[21] && + !_theResult____h350507[20] && + !_theResult____h350507[19] && + !_theResult____h350507[18] && + !_theResult____h350507[17] && + !_theResult____h350507[16] && + !_theResult____h350507[15] && + !_theResult____h350507[14] && + !_theResult____h350507[13] && + !_theResult____h350507[12] && + !_theResult____h350507[11] && + !_theResult____h350507[10] && + !_theResult____h350507[9] && + !_theResult____h350507[8] && + !_theResult____h350507[7] && + !_theResult____h350507[6] && + !_theResult____h350507[5] && + !_theResult____h350507[4] && + !_theResult____h350507[3] && + !_theResult____h350507[2] && + !_theResult____h350507[1] && + !_theResult____h350507[0]) ? + _theResult____h350507 : + _theResult___snd__h358658 ; + assign _theResult___snd__h358658 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q29[54:0], 2'd0 } ; - assign _theResult___snd__h358680 = - _theResult____h350506 << + assign _theResult___snd__h358681 = + _theResult____h350507 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4347 ; - assign _theResult___snd__h367224 = + assign _theResult___snd__h367225 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h367233 : - _theResult___snd__h367226 ; - assign _theResult___snd__h367226 = + _theResult___snd__h367234 : + _theResult___snd__h367227 ; + assign _theResult___snd__h367227 = { coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h367233 = + assign _theResult___snd__h367234 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4523) ? - sfd__h342901 : - _theResult___snd__h367239 ; - assign _theResult___snd__h367239 = + sfd__h342902 : + _theResult___snd__h367240 ; + assign _theResult___snd__h367240 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q31[54:0], 2'd0 } ; - assign _theResult___snd__h367262 = - sfd__h342901 << + assign _theResult___snd__h367263 = + sfd__h342902 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4578 ; - assign _theResult___snd__h376394 = { _theResult____h368145[55:0], 1'd0 } ; - assign _theResult___snd__h376405 = - (!_theResult____h368145[56] && _theResult____h368145[55]) ? - _theResult___snd__h376407 : - _theResult___snd__h376417 ; - assign _theResult___snd__h376407 = { _theResult____h368145[54:0], 2'd0 } ; - assign _theResult___snd__h376417 = - (!_theResult____h368145[56] && !_theResult____h368145[55] && - !_theResult____h368145[54] && - !_theResult____h368145[53] && - !_theResult____h368145[52] && - !_theResult____h368145[51] && - !_theResult____h368145[50] && - !_theResult____h368145[49] && - !_theResult____h368145[48] && - !_theResult____h368145[47] && - !_theResult____h368145[46] && - !_theResult____h368145[45] && - !_theResult____h368145[44] && - !_theResult____h368145[43] && - !_theResult____h368145[42] && - !_theResult____h368145[41] && - !_theResult____h368145[40] && - !_theResult____h368145[39] && - !_theResult____h368145[38] && - !_theResult____h368145[37] && - !_theResult____h368145[36] && - !_theResult____h368145[35] && - !_theResult____h368145[34] && - !_theResult____h368145[33] && - !_theResult____h368145[32] && - !_theResult____h368145[31] && - !_theResult____h368145[30] && - !_theResult____h368145[29] && - !_theResult____h368145[28] && - !_theResult____h368145[27] && - !_theResult____h368145[26] && - !_theResult____h368145[25] && - !_theResult____h368145[24] && - !_theResult____h368145[23] && - !_theResult____h368145[22] && - !_theResult____h368145[21] && - !_theResult____h368145[20] && - !_theResult____h368145[19] && - !_theResult____h368145[18] && - !_theResult____h368145[17] && - !_theResult____h368145[16] && - !_theResult____h368145[15] && - !_theResult____h368145[14] && - !_theResult____h368145[13] && - !_theResult____h368145[12] && - !_theResult____h368145[11] && - !_theResult____h368145[10] && - !_theResult____h368145[9] && - !_theResult____h368145[8] && - !_theResult____h368145[7] && - !_theResult____h368145[6] && - !_theResult____h368145[5] && - !_theResult____h368145[4] && - !_theResult____h368145[3] && - !_theResult____h368145[2] && - !_theResult____h368145[1] && - !_theResult____h368145[0]) ? - _theResult____h368145 : - _theResult___snd__h376423 ; - assign _theResult___snd__h376423 = + assign _theResult___snd__h376395 = { _theResult____h368146[55:0], 1'd0 } ; + assign _theResult___snd__h376406 = + (!_theResult____h368146[56] && _theResult____h368146[55]) ? + _theResult___snd__h376408 : + _theResult___snd__h376418 ; + assign _theResult___snd__h376408 = { _theResult____h368146[54:0], 2'd0 } ; + assign _theResult___snd__h376418 = + (!_theResult____h368146[56] && !_theResult____h368146[55] && + !_theResult____h368146[54] && + !_theResult____h368146[53] && + !_theResult____h368146[52] && + !_theResult____h368146[51] && + !_theResult____h368146[50] && + !_theResult____h368146[49] && + !_theResult____h368146[48] && + !_theResult____h368146[47] && + !_theResult____h368146[46] && + !_theResult____h368146[45] && + !_theResult____h368146[44] && + !_theResult____h368146[43] && + !_theResult____h368146[42] && + !_theResult____h368146[41] && + !_theResult____h368146[40] && + !_theResult____h368146[39] && + !_theResult____h368146[38] && + !_theResult____h368146[37] && + !_theResult____h368146[36] && + !_theResult____h368146[35] && + !_theResult____h368146[34] && + !_theResult____h368146[33] && + !_theResult____h368146[32] && + !_theResult____h368146[31] && + !_theResult____h368146[30] && + !_theResult____h368146[29] && + !_theResult____h368146[28] && + !_theResult____h368146[27] && + !_theResult____h368146[26] && + !_theResult____h368146[25] && + !_theResult____h368146[24] && + !_theResult____h368146[23] && + !_theResult____h368146[22] && + !_theResult____h368146[21] && + !_theResult____h368146[20] && + !_theResult____h368146[19] && + !_theResult____h368146[18] && + !_theResult____h368146[17] && + !_theResult____h368146[16] && + !_theResult____h368146[15] && + !_theResult____h368146[14] && + !_theResult____h368146[13] && + !_theResult____h368146[12] && + !_theResult____h368146[11] && + !_theResult____h368146[10] && + !_theResult____h368146[9] && + !_theResult____h368146[8] && + !_theResult____h368146[7] && + !_theResult____h368146[6] && + !_theResult____h368146[5] && + !_theResult____h368146[4] && + !_theResult____h368146[3] && + !_theResult____h368146[2] && + !_theResult____h368146[1] && + !_theResult____h368146[0]) ? + _theResult____h368146 : + _theResult___snd__h376424 ; + assign _theResult___snd__h376424 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q39[54:0], 2'd0 } ; - assign _theResult___snd__h376446 = - _theResult____h368145 << + assign _theResult___snd__h376447 = + _theResult____h368146 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4898 ; - assign _theResult___snd__h385014 = + assign _theResult___snd__h385015 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h385028 : - _theResult___snd__h367226 ; - assign _theResult___snd__h385028 = + _theResult___snd__h385029 : + _theResult___snd__h367227 ; + assign _theResult___snd__h385029 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4523) ? - sfd__h342901 : - _theResult___snd__h385034 ; - assign _theResult___snd__h385034 = + sfd__h342902 : + _theResult___snd__h385035 ; + assign _theResult___snd__h385035 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q44[54:0], 2'd0 } ; - assign _theResult___snd__h385052 = - sfd__h342901 << + assign _theResult___snd__h385053 = + sfd__h342902 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4972[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4972) ; - assign _theResult___snd__h404325 = { _theResult____h396205[55:0], 1'd0 } ; - assign _theResult___snd__h404336 = - (!_theResult____h396205[56] && _theResult____h396205[55]) ? - _theResult___snd__h404338 : - _theResult___snd__h404348 ; - assign _theResult___snd__h404338 = { _theResult____h396205[54:0], 2'd0 } ; - assign _theResult___snd__h404348 = - (!_theResult____h396205[56] && !_theResult____h396205[55] && - !_theResult____h396205[54] && - !_theResult____h396205[53] && - !_theResult____h396205[52] && - !_theResult____h396205[51] && - !_theResult____h396205[50] && - !_theResult____h396205[49] && - !_theResult____h396205[48] && - !_theResult____h396205[47] && - !_theResult____h396205[46] && - !_theResult____h396205[45] && - !_theResult____h396205[44] && - !_theResult____h396205[43] && - !_theResult____h396205[42] && - !_theResult____h396205[41] && - !_theResult____h396205[40] && - !_theResult____h396205[39] && - !_theResult____h396205[38] && - !_theResult____h396205[37] && - !_theResult____h396205[36] && - !_theResult____h396205[35] && - !_theResult____h396205[34] && - !_theResult____h396205[33] && - !_theResult____h396205[32] && - !_theResult____h396205[31] && - !_theResult____h396205[30] && - !_theResult____h396205[29] && - !_theResult____h396205[28] && - !_theResult____h396205[27] && - !_theResult____h396205[26] && - !_theResult____h396205[25] && - !_theResult____h396205[24] && - !_theResult____h396205[23] && - !_theResult____h396205[22] && - !_theResult____h396205[21] && - !_theResult____h396205[20] && - !_theResult____h396205[19] && - !_theResult____h396205[18] && - !_theResult____h396205[17] && - !_theResult____h396205[16] && - !_theResult____h396205[15] && - !_theResult____h396205[14] && - !_theResult____h396205[13] && - !_theResult____h396205[12] && - !_theResult____h396205[11] && - !_theResult____h396205[10] && - !_theResult____h396205[9] && - !_theResult____h396205[8] && - !_theResult____h396205[7] && - !_theResult____h396205[6] && - !_theResult____h396205[5] && - !_theResult____h396205[4] && - !_theResult____h396205[3] && - !_theResult____h396205[2] && - !_theResult____h396205[1] && - !_theResult____h396205[0]) ? - _theResult____h396205 : - _theResult___snd__h404354 ; - assign _theResult___snd__h404354 = + assign _theResult___snd__h404326 = { _theResult____h396206[55:0], 1'd0 } ; + assign _theResult___snd__h404337 = + (!_theResult____h396206[56] && _theResult____h396206[55]) ? + _theResult___snd__h404339 : + _theResult___snd__h404349 ; + assign _theResult___snd__h404339 = { _theResult____h396206[54:0], 2'd0 } ; + assign _theResult___snd__h404349 = + (!_theResult____h396206[56] && !_theResult____h396206[55] && + !_theResult____h396206[54] && + !_theResult____h396206[53] && + !_theResult____h396206[52] && + !_theResult____h396206[51] && + !_theResult____h396206[50] && + !_theResult____h396206[49] && + !_theResult____h396206[48] && + !_theResult____h396206[47] && + !_theResult____h396206[46] && + !_theResult____h396206[45] && + !_theResult____h396206[44] && + !_theResult____h396206[43] && + !_theResult____h396206[42] && + !_theResult____h396206[41] && + !_theResult____h396206[40] && + !_theResult____h396206[39] && + !_theResult____h396206[38] && + !_theResult____h396206[37] && + !_theResult____h396206[36] && + !_theResult____h396206[35] && + !_theResult____h396206[34] && + !_theResult____h396206[33] && + !_theResult____h396206[32] && + !_theResult____h396206[31] && + !_theResult____h396206[30] && + !_theResult____h396206[29] && + !_theResult____h396206[28] && + !_theResult____h396206[27] && + !_theResult____h396206[26] && + !_theResult____h396206[25] && + !_theResult____h396206[24] && + !_theResult____h396206[23] && + !_theResult____h396206[22] && + !_theResult____h396206[21] && + !_theResult____h396206[20] && + !_theResult____h396206[19] && + !_theResult____h396206[18] && + !_theResult____h396206[17] && + !_theResult____h396206[16] && + !_theResult____h396206[15] && + !_theResult____h396206[14] && + !_theResult____h396206[13] && + !_theResult____h396206[12] && + !_theResult____h396206[11] && + !_theResult____h396206[10] && + !_theResult____h396206[9] && + !_theResult____h396206[8] && + !_theResult____h396206[7] && + !_theResult____h396206[6] && + !_theResult____h396206[5] && + !_theResult____h396206[4] && + !_theResult____h396206[3] && + !_theResult____h396206[2] && + !_theResult____h396206[1] && + !_theResult____h396206[0]) ? + _theResult____h396206 : + _theResult___snd__h404355 ; + assign _theResult___snd__h404355 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q64[54:0], 2'd0 } ; - assign _theResult___snd__h404377 = - _theResult____h396205 << + assign _theResult___snd__h404378 = + _theResult____h396206 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5739 ; - assign _theResult___snd__h412921 = + assign _theResult___snd__h412922 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h412930 : - _theResult___snd__h412923 ; - assign _theResult___snd__h412923 = + _theResult___snd__h412931 : + _theResult___snd__h412924 ; + assign _theResult___snd__h412924 = { coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h412930 = + assign _theResult___snd__h412931 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5915) ? - sfd__h388603 : - _theResult___snd__h412936 ; - assign _theResult___snd__h412936 = + sfd__h388604 : + _theResult___snd__h412937 ; + assign _theResult___snd__h412937 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q66[54:0], 2'd0 } ; - assign _theResult___snd__h412959 = - sfd__h388603 << + assign _theResult___snd__h412960 = + sfd__h388604 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5970 ; - assign _theResult___snd__h422091 = { _theResult____h413842[55:0], 1'd0 } ; - assign _theResult___snd__h422102 = - (!_theResult____h413842[56] && _theResult____h413842[55]) ? - _theResult___snd__h422104 : - _theResult___snd__h422114 ; - assign _theResult___snd__h422104 = { _theResult____h413842[54:0], 2'd0 } ; - assign _theResult___snd__h422114 = - (!_theResult____h413842[56] && !_theResult____h413842[55] && - !_theResult____h413842[54] && - !_theResult____h413842[53] && - !_theResult____h413842[52] && - !_theResult____h413842[51] && - !_theResult____h413842[50] && - !_theResult____h413842[49] && - !_theResult____h413842[48] && - !_theResult____h413842[47] && - !_theResult____h413842[46] && - !_theResult____h413842[45] && - !_theResult____h413842[44] && - !_theResult____h413842[43] && - !_theResult____h413842[42] && - !_theResult____h413842[41] && - !_theResult____h413842[40] && - !_theResult____h413842[39] && - !_theResult____h413842[38] && - !_theResult____h413842[37] && - !_theResult____h413842[36] && - !_theResult____h413842[35] && - !_theResult____h413842[34] && - !_theResult____h413842[33] && - !_theResult____h413842[32] && - !_theResult____h413842[31] && - !_theResult____h413842[30] && - !_theResult____h413842[29] && - !_theResult____h413842[28] && - !_theResult____h413842[27] && - !_theResult____h413842[26] && - !_theResult____h413842[25] && - !_theResult____h413842[24] && - !_theResult____h413842[23] && - !_theResult____h413842[22] && - !_theResult____h413842[21] && - !_theResult____h413842[20] && - !_theResult____h413842[19] && - !_theResult____h413842[18] && - !_theResult____h413842[17] && - !_theResult____h413842[16] && - !_theResult____h413842[15] && - !_theResult____h413842[14] && - !_theResult____h413842[13] && - !_theResult____h413842[12] && - !_theResult____h413842[11] && - !_theResult____h413842[10] && - !_theResult____h413842[9] && - !_theResult____h413842[8] && - !_theResult____h413842[7] && - !_theResult____h413842[6] && - !_theResult____h413842[5] && - !_theResult____h413842[4] && - !_theResult____h413842[3] && - !_theResult____h413842[2] && - !_theResult____h413842[1] && - !_theResult____h413842[0]) ? - _theResult____h413842 : - _theResult___snd__h422120 ; - assign _theResult___snd__h422120 = + assign _theResult___snd__h422092 = { _theResult____h413843[55:0], 1'd0 } ; + assign _theResult___snd__h422103 = + (!_theResult____h413843[56] && _theResult____h413843[55]) ? + _theResult___snd__h422105 : + _theResult___snd__h422115 ; + assign _theResult___snd__h422105 = { _theResult____h413843[54:0], 2'd0 } ; + assign _theResult___snd__h422115 = + (!_theResult____h413843[56] && !_theResult____h413843[55] && + !_theResult____h413843[54] && + !_theResult____h413843[53] && + !_theResult____h413843[52] && + !_theResult____h413843[51] && + !_theResult____h413843[50] && + !_theResult____h413843[49] && + !_theResult____h413843[48] && + !_theResult____h413843[47] && + !_theResult____h413843[46] && + !_theResult____h413843[45] && + !_theResult____h413843[44] && + !_theResult____h413843[43] && + !_theResult____h413843[42] && + !_theResult____h413843[41] && + !_theResult____h413843[40] && + !_theResult____h413843[39] && + !_theResult____h413843[38] && + !_theResult____h413843[37] && + !_theResult____h413843[36] && + !_theResult____h413843[35] && + !_theResult____h413843[34] && + !_theResult____h413843[33] && + !_theResult____h413843[32] && + !_theResult____h413843[31] && + !_theResult____h413843[30] && + !_theResult____h413843[29] && + !_theResult____h413843[28] && + !_theResult____h413843[27] && + !_theResult____h413843[26] && + !_theResult____h413843[25] && + !_theResult____h413843[24] && + !_theResult____h413843[23] && + !_theResult____h413843[22] && + !_theResult____h413843[21] && + !_theResult____h413843[20] && + !_theResult____h413843[19] && + !_theResult____h413843[18] && + !_theResult____h413843[17] && + !_theResult____h413843[16] && + !_theResult____h413843[15] && + !_theResult____h413843[14] && + !_theResult____h413843[13] && + !_theResult____h413843[12] && + !_theResult____h413843[11] && + !_theResult____h413843[10] && + !_theResult____h413843[9] && + !_theResult____h413843[8] && + !_theResult____h413843[7] && + !_theResult____h413843[6] && + !_theResult____h413843[5] && + !_theResult____h413843[4] && + !_theResult____h413843[3] && + !_theResult____h413843[2] && + !_theResult____h413843[1] && + !_theResult____h413843[0]) ? + _theResult____h413843 : + _theResult___snd__h422121 ; + assign _theResult___snd__h422121 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q74[54:0], 2'd0 } ; - assign _theResult___snd__h422143 = - _theResult____h413842 << + assign _theResult___snd__h422144 = + _theResult____h413843 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6290 ; - assign _theResult___snd__h430711 = + assign _theResult___snd__h430712 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h430725 : - _theResult___snd__h412923 ; - assign _theResult___snd__h430725 = + _theResult___snd__h430726 : + _theResult___snd__h412924 ; + assign _theResult___snd__h430726 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5915) ? - sfd__h388603 : - _theResult___snd__h430731 ; - assign _theResult___snd__h430731 = + sfd__h388604 : + _theResult___snd__h430732 ; + assign _theResult___snd__h430732 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q79[54:0], 2'd0 } ; - assign _theResult___snd__h430749 = - sfd__h388603 << + assign _theResult___snd__h430750 = + sfd__h388604 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6364[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6364) ; - assign _theResult___snd__h450020 = { _theResult____h441900[55:0], 1'd0 } ; - assign _theResult___snd__h450031 = - (!_theResult____h441900[56] && _theResult____h441900[55]) ? - _theResult___snd__h450033 : - _theResult___snd__h450043 ; - assign _theResult___snd__h450033 = { _theResult____h441900[54:0], 2'd0 } ; - assign _theResult___snd__h450043 = - (!_theResult____h441900[56] && !_theResult____h441900[55] && - !_theResult____h441900[54] && - !_theResult____h441900[53] && - !_theResult____h441900[52] && - !_theResult____h441900[51] && - !_theResult____h441900[50] && - !_theResult____h441900[49] && - !_theResult____h441900[48] && - !_theResult____h441900[47] && - !_theResult____h441900[46] && - !_theResult____h441900[45] && - !_theResult____h441900[44] && - !_theResult____h441900[43] && - !_theResult____h441900[42] && - !_theResult____h441900[41] && - !_theResult____h441900[40] && - !_theResult____h441900[39] && - !_theResult____h441900[38] && - !_theResult____h441900[37] && - !_theResult____h441900[36] && - !_theResult____h441900[35] && - !_theResult____h441900[34] && - !_theResult____h441900[33] && - !_theResult____h441900[32] && - !_theResult____h441900[31] && - !_theResult____h441900[30] && - !_theResult____h441900[29] && - !_theResult____h441900[28] && - !_theResult____h441900[27] && - !_theResult____h441900[26] && - !_theResult____h441900[25] && - !_theResult____h441900[24] && - !_theResult____h441900[23] && - !_theResult____h441900[22] && - !_theResult____h441900[21] && - !_theResult____h441900[20] && - !_theResult____h441900[19] && - !_theResult____h441900[18] && - !_theResult____h441900[17] && - !_theResult____h441900[16] && - !_theResult____h441900[15] && - !_theResult____h441900[14] && - !_theResult____h441900[13] && - !_theResult____h441900[12] && - !_theResult____h441900[11] && - !_theResult____h441900[10] && - !_theResult____h441900[9] && - !_theResult____h441900[8] && - !_theResult____h441900[7] && - !_theResult____h441900[6] && - !_theResult____h441900[5] && - !_theResult____h441900[4] && - !_theResult____h441900[3] && - !_theResult____h441900[2] && - !_theResult____h441900[1] && - !_theResult____h441900[0]) ? - _theResult____h441900 : - _theResult___snd__h450049 ; - assign _theResult___snd__h450049 = + assign _theResult___snd__h450021 = { _theResult____h441901[55:0], 1'd0 } ; + assign _theResult___snd__h450032 = + (!_theResult____h441901[56] && _theResult____h441901[55]) ? + _theResult___snd__h450034 : + _theResult___snd__h450044 ; + assign _theResult___snd__h450034 = { _theResult____h441901[54:0], 2'd0 } ; + assign _theResult___snd__h450044 = + (!_theResult____h441901[56] && !_theResult____h441901[55] && + !_theResult____h441901[54] && + !_theResult____h441901[53] && + !_theResult____h441901[52] && + !_theResult____h441901[51] && + !_theResult____h441901[50] && + !_theResult____h441901[49] && + !_theResult____h441901[48] && + !_theResult____h441901[47] && + !_theResult____h441901[46] && + !_theResult____h441901[45] && + !_theResult____h441901[44] && + !_theResult____h441901[43] && + !_theResult____h441901[42] && + !_theResult____h441901[41] && + !_theResult____h441901[40] && + !_theResult____h441901[39] && + !_theResult____h441901[38] && + !_theResult____h441901[37] && + !_theResult____h441901[36] && + !_theResult____h441901[35] && + !_theResult____h441901[34] && + !_theResult____h441901[33] && + !_theResult____h441901[32] && + !_theResult____h441901[31] && + !_theResult____h441901[30] && + !_theResult____h441901[29] && + !_theResult____h441901[28] && + !_theResult____h441901[27] && + !_theResult____h441901[26] && + !_theResult____h441901[25] && + !_theResult____h441901[24] && + !_theResult____h441901[23] && + !_theResult____h441901[22] && + !_theResult____h441901[21] && + !_theResult____h441901[20] && + !_theResult____h441901[19] && + !_theResult____h441901[18] && + !_theResult____h441901[17] && + !_theResult____h441901[16] && + !_theResult____h441901[15] && + !_theResult____h441901[14] && + !_theResult____h441901[13] && + !_theResult____h441901[12] && + !_theResult____h441901[11] && + !_theResult____h441901[10] && + !_theResult____h441901[9] && + !_theResult____h441901[8] && + !_theResult____h441901[7] && + !_theResult____h441901[6] && + !_theResult____h441901[5] && + !_theResult____h441901[4] && + !_theResult____h441901[3] && + !_theResult____h441901[2] && + !_theResult____h441901[1] && + !_theResult____h441901[0]) ? + _theResult____h441901 : + _theResult___snd__h450050 ; + assign _theResult___snd__h450050 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q99[54:0], 2'd0 } ; - assign _theResult___snd__h450072 = - _theResult____h441900 << + assign _theResult___snd__h450073 = + _theResult____h441901 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7131 ; - assign _theResult___snd__h458616 = + assign _theResult___snd__h458617 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h458625 : - _theResult___snd__h458618 ; - assign _theResult___snd__h458618 = + _theResult___snd__h458626 : + _theResult___snd__h458619 ; + assign _theResult___snd__h458619 = { coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h458625 = + assign _theResult___snd__h458626 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7307) ? - sfd__h434298 : - _theResult___snd__h458631 ; - assign _theResult___snd__h458631 = + sfd__h434299 : + _theResult___snd__h458632 ; + assign _theResult___snd__h458632 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q101[54:0], 2'd0 } ; - assign _theResult___snd__h458654 = - sfd__h434298 << + assign _theResult___snd__h458655 = + sfd__h434299 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7362 ; - assign _theResult___snd__h467786 = { _theResult____h459537[55:0], 1'd0 } ; - assign _theResult___snd__h467797 = - (!_theResult____h459537[56] && _theResult____h459537[55]) ? - _theResult___snd__h467799 : - _theResult___snd__h467809 ; - assign _theResult___snd__h467799 = { _theResult____h459537[54:0], 2'd0 } ; - assign _theResult___snd__h467809 = - (!_theResult____h459537[56] && !_theResult____h459537[55] && - !_theResult____h459537[54] && - !_theResult____h459537[53] && - !_theResult____h459537[52] && - !_theResult____h459537[51] && - !_theResult____h459537[50] && - !_theResult____h459537[49] && - !_theResult____h459537[48] && - !_theResult____h459537[47] && - !_theResult____h459537[46] && - !_theResult____h459537[45] && - !_theResult____h459537[44] && - !_theResult____h459537[43] && - !_theResult____h459537[42] && - !_theResult____h459537[41] && - !_theResult____h459537[40] && - !_theResult____h459537[39] && - !_theResult____h459537[38] && - !_theResult____h459537[37] && - !_theResult____h459537[36] && - !_theResult____h459537[35] && - !_theResult____h459537[34] && - !_theResult____h459537[33] && - !_theResult____h459537[32] && - !_theResult____h459537[31] && - !_theResult____h459537[30] && - !_theResult____h459537[29] && - !_theResult____h459537[28] && - !_theResult____h459537[27] && - !_theResult____h459537[26] && - !_theResult____h459537[25] && - !_theResult____h459537[24] && - !_theResult____h459537[23] && - !_theResult____h459537[22] && - !_theResult____h459537[21] && - !_theResult____h459537[20] && - !_theResult____h459537[19] && - !_theResult____h459537[18] && - !_theResult____h459537[17] && - !_theResult____h459537[16] && - !_theResult____h459537[15] && - !_theResult____h459537[14] && - !_theResult____h459537[13] && - !_theResult____h459537[12] && - !_theResult____h459537[11] && - !_theResult____h459537[10] && - !_theResult____h459537[9] && - !_theResult____h459537[8] && - !_theResult____h459537[7] && - !_theResult____h459537[6] && - !_theResult____h459537[5] && - !_theResult____h459537[4] && - !_theResult____h459537[3] && - !_theResult____h459537[2] && - !_theResult____h459537[1] && - !_theResult____h459537[0]) ? - _theResult____h459537 : - _theResult___snd__h467815 ; - assign _theResult___snd__h467815 = + assign _theResult___snd__h467787 = { _theResult____h459538[55:0], 1'd0 } ; + assign _theResult___snd__h467798 = + (!_theResult____h459538[56] && _theResult____h459538[55]) ? + _theResult___snd__h467800 : + _theResult___snd__h467810 ; + assign _theResult___snd__h467800 = { _theResult____h459538[54:0], 2'd0 } ; + assign _theResult___snd__h467810 = + (!_theResult____h459538[56] && !_theResult____h459538[55] && + !_theResult____h459538[54] && + !_theResult____h459538[53] && + !_theResult____h459538[52] && + !_theResult____h459538[51] && + !_theResult____h459538[50] && + !_theResult____h459538[49] && + !_theResult____h459538[48] && + !_theResult____h459538[47] && + !_theResult____h459538[46] && + !_theResult____h459538[45] && + !_theResult____h459538[44] && + !_theResult____h459538[43] && + !_theResult____h459538[42] && + !_theResult____h459538[41] && + !_theResult____h459538[40] && + !_theResult____h459538[39] && + !_theResult____h459538[38] && + !_theResult____h459538[37] && + !_theResult____h459538[36] && + !_theResult____h459538[35] && + !_theResult____h459538[34] && + !_theResult____h459538[33] && + !_theResult____h459538[32] && + !_theResult____h459538[31] && + !_theResult____h459538[30] && + !_theResult____h459538[29] && + !_theResult____h459538[28] && + !_theResult____h459538[27] && + !_theResult____h459538[26] && + !_theResult____h459538[25] && + !_theResult____h459538[24] && + !_theResult____h459538[23] && + !_theResult____h459538[22] && + !_theResult____h459538[21] && + !_theResult____h459538[20] && + !_theResult____h459538[19] && + !_theResult____h459538[18] && + !_theResult____h459538[17] && + !_theResult____h459538[16] && + !_theResult____h459538[15] && + !_theResult____h459538[14] && + !_theResult____h459538[13] && + !_theResult____h459538[12] && + !_theResult____h459538[11] && + !_theResult____h459538[10] && + !_theResult____h459538[9] && + !_theResult____h459538[8] && + !_theResult____h459538[7] && + !_theResult____h459538[6] && + !_theResult____h459538[5] && + !_theResult____h459538[4] && + !_theResult____h459538[3] && + !_theResult____h459538[2] && + !_theResult____h459538[1] && + !_theResult____h459538[0]) ? + _theResult____h459538 : + _theResult___snd__h467816 ; + assign _theResult___snd__h467816 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q109[54:0], 2'd0 } ; - assign _theResult___snd__h467838 = - _theResult____h459537 << + assign _theResult___snd__h467839 = + _theResult____h459538 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7682 ; - assign _theResult___snd__h476406 = + assign _theResult___snd__h476407 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h476420 : - _theResult___snd__h458618 ; - assign _theResult___snd__h476420 = + _theResult___snd__h476421 : + _theResult___snd__h458619 ; + assign _theResult___snd__h476421 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7307) ? - sfd__h434298 : - _theResult___snd__h476426 ; - assign _theResult___snd__h476426 = + sfd__h434299 : + _theResult___snd__h476427 ; + assign _theResult___snd__h476427 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q114[54:0], 2'd0 } ; - assign _theResult___snd__h476444 = - sfd__h434298 << + assign _theResult___snd__h476445 = + sfd__h434299 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7756[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7756) ; - assign _theResult___snd__h506408 = - (f1_exp__h487069 == 8'd0) ? - _theResult___snd__h506417 : - _theResult___snd__h506410 ; - assign _theResult___snd__h506410 = { f1_sfd__h487070, 34'd0 } ; - assign _theResult___snd__h506417 = - (f1_exp__h487069 == 8'd0 && !f1_sfd__h487070[22] && + assign _theResult___snd__h506409 = + (f1_exp__h487070 == 8'd0) ? + _theResult___snd__h506418 : + _theResult___snd__h506411 ; + assign _theResult___snd__h506411 = { f1_sfd__h487071, 34'd0 } ; + assign _theResult___snd__h506418 = + (f1_exp__h487070 == 8'd0 && !f1_sfd__h487071[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8671) ? - sfd__h487431 : - _theResult___snd__h506423 ; - assign _theResult___snd__h506423 = + sfd__h487432 : + _theResult___snd__h506424 ; + assign _theResult___snd__h506424 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134[54:0], 2'd0 } ; - assign _theResult___snd__h506446 = - sfd__h487431 << + assign _theResult___snd__h506447 = + sfd__h487432 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8698 ; - assign _theResult___snd__h516045 = { _theResult____h507798[55:0], 1'd0 } ; - assign _theResult___snd__h516056 = - (!_theResult____h507798[56] && _theResult____h507798[55]) ? - _theResult___snd__h516058 : - _theResult___snd__h516068 ; - assign _theResult___snd__h516058 = { _theResult____h507798[54:0], 2'd0 } ; - assign _theResult___snd__h516068 = - (!_theResult____h507798[56] && !_theResult____h507798[55] && - !_theResult____h507798[54] && - !_theResult____h507798[53] && - !_theResult____h507798[52] && - !_theResult____h507798[51] && - !_theResult____h507798[50] && - !_theResult____h507798[49] && - !_theResult____h507798[48] && - !_theResult____h507798[47] && - !_theResult____h507798[46] && - !_theResult____h507798[45] && - !_theResult____h507798[44] && - !_theResult____h507798[43] && - !_theResult____h507798[42] && - !_theResult____h507798[41] && - !_theResult____h507798[40] && - !_theResult____h507798[39] && - !_theResult____h507798[38] && - !_theResult____h507798[37] && - !_theResult____h507798[36] && - !_theResult____h507798[35] && - !_theResult____h507798[34] && - !_theResult____h507798[33] && - !_theResult____h507798[32] && - !_theResult____h507798[31] && - !_theResult____h507798[30] && - !_theResult____h507798[29] && - !_theResult____h507798[28] && - !_theResult____h507798[27] && - !_theResult____h507798[26] && - !_theResult____h507798[25] && - !_theResult____h507798[24] && - !_theResult____h507798[23] && - !_theResult____h507798[22] && - !_theResult____h507798[21] && - !_theResult____h507798[20] && - !_theResult____h507798[19] && - !_theResult____h507798[18] && - !_theResult____h507798[17] && - !_theResult____h507798[16] && - !_theResult____h507798[15] && - !_theResult____h507798[14] && - !_theResult____h507798[13] && - !_theResult____h507798[12] && - !_theResult____h507798[11] && - !_theResult____h507798[10] && - !_theResult____h507798[9] && - !_theResult____h507798[8] && - !_theResult____h507798[7] && - !_theResult____h507798[6] && - !_theResult____h507798[5] && - !_theResult____h507798[4] && - !_theResult____h507798[3] && - !_theResult____h507798[2] && - !_theResult____h507798[1] && - !_theResult____h507798[0]) ? - _theResult____h507798 : - _theResult___snd__h516074 ; - assign _theResult___snd__h516074 = + assign _theResult___snd__h516046 = { _theResult____h507799[55:0], 1'd0 } ; + assign _theResult___snd__h516057 = + (!_theResult____h507799[56] && _theResult____h507799[55]) ? + _theResult___snd__h516059 : + _theResult___snd__h516069 ; + assign _theResult___snd__h516059 = { _theResult____h507799[54:0], 2'd0 } ; + assign _theResult___snd__h516069 = + (!_theResult____h507799[56] && !_theResult____h507799[55] && + !_theResult____h507799[54] && + !_theResult____h507799[53] && + !_theResult____h507799[52] && + !_theResult____h507799[51] && + !_theResult____h507799[50] && + !_theResult____h507799[49] && + !_theResult____h507799[48] && + !_theResult____h507799[47] && + !_theResult____h507799[46] && + !_theResult____h507799[45] && + !_theResult____h507799[44] && + !_theResult____h507799[43] && + !_theResult____h507799[42] && + !_theResult____h507799[41] && + !_theResult____h507799[40] && + !_theResult____h507799[39] && + !_theResult____h507799[38] && + !_theResult____h507799[37] && + !_theResult____h507799[36] && + !_theResult____h507799[35] && + !_theResult____h507799[34] && + !_theResult____h507799[33] && + !_theResult____h507799[32] && + !_theResult____h507799[31] && + !_theResult____h507799[30] && + !_theResult____h507799[29] && + !_theResult____h507799[28] && + !_theResult____h507799[27] && + !_theResult____h507799[26] && + !_theResult____h507799[25] && + !_theResult____h507799[24] && + !_theResult____h507799[23] && + !_theResult____h507799[22] && + !_theResult____h507799[21] && + !_theResult____h507799[20] && + !_theResult____h507799[19] && + !_theResult____h507799[18] && + !_theResult____h507799[17] && + !_theResult____h507799[16] && + !_theResult____h507799[15] && + !_theResult____h507799[14] && + !_theResult____h507799[13] && + !_theResult____h507799[12] && + !_theResult____h507799[11] && + !_theResult____h507799[10] && + !_theResult____h507799[9] && + !_theResult____h507799[8] && + !_theResult____h507799[7] && + !_theResult____h507799[6] && + !_theResult____h507799[5] && + !_theResult____h507799[4] && + !_theResult____h507799[3] && + !_theResult____h507799[2] && + !_theResult____h507799[1] && + !_theResult____h507799[0]) ? + _theResult____h507799 : + _theResult___snd__h516075 ; + assign _theResult___snd__h516075 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138[54:0], 2'd0 } ; - assign _theResult___snd__h516097 = - _theResult____h507798 << + assign _theResult___snd__h516098 = + _theResult____h507799 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9010 ; - assign _theResult___snd__h524813 = - (f1_exp__h487069 == 8'd0) ? - _theResult___snd__h524827 : - _theResult___snd__h506410 ; - assign _theResult___snd__h524827 = - (f1_exp__h487069 == 8'd0 && !f1_sfd__h487070[22] && + assign _theResult___snd__h524814 = + (f1_exp__h487070 == 8'd0) ? + _theResult___snd__h524828 : + _theResult___snd__h506411 ; + assign _theResult___snd__h524828 = + (f1_exp__h487070 == 8'd0 && !f1_sfd__h487071[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8671) ? - sfd__h487431 : - _theResult___snd__h524833 ; - assign _theResult___snd__h524833 = + sfd__h487432 : + _theResult___snd__h524834 ; + assign _theResult___snd__h524834 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141[54:0], 2'd0 } ; - assign _theResult___snd__h524851 = - sfd__h487431 << + assign _theResult___snd__h524852 = + sfd__h487432 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9061 ; - assign _theResult___snd__h545261 = - (f2_exp__h526063 == 8'd0) ? - _theResult___snd__h545270 : - _theResult___snd__h545263 ; - assign _theResult___snd__h545263 = { f2_sfd__h526064, 34'd0 } ; - assign _theResult___snd__h545270 = - (f2_exp__h526063 == 8'd0 && !f2_sfd__h526064[22] && + assign _theResult___snd__h545262 = + (f2_exp__h526064 == 8'd0) ? + _theResult___snd__h545271 : + _theResult___snd__h545264 ; + assign _theResult___snd__h545264 = { f2_sfd__h526065, 34'd0 } ; + assign _theResult___snd__h545271 = + (f2_exp__h526064 == 8'd0 && !f2_sfd__h526065[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171) ? - sfd__h526425 : - _theResult___snd__h545276 ; - assign _theResult___snd__h545276 = + sfd__h526426 : + _theResult___snd__h545277 ; + assign _theResult___snd__h545277 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174[54:0], 2'd0 } ; - assign _theResult___snd__h545299 = - sfd__h526425 << + assign _theResult___snd__h545300 = + sfd__h526426 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10198 ; - assign _theResult___snd__h554898 = { _theResult____h546651[55:0], 1'd0 } ; - assign _theResult___snd__h554909 = - (!_theResult____h546651[56] && _theResult____h546651[55]) ? - _theResult___snd__h554911 : - _theResult___snd__h554921 ; - assign _theResult___snd__h554911 = { _theResult____h546651[54:0], 2'd0 } ; - assign _theResult___snd__h554921 = - (!_theResult____h546651[56] && !_theResult____h546651[55] && - !_theResult____h546651[54] && - !_theResult____h546651[53] && - !_theResult____h546651[52] && - !_theResult____h546651[51] && - !_theResult____h546651[50] && - !_theResult____h546651[49] && - !_theResult____h546651[48] && - !_theResult____h546651[47] && - !_theResult____h546651[46] && - !_theResult____h546651[45] && - !_theResult____h546651[44] && - !_theResult____h546651[43] && - !_theResult____h546651[42] && - !_theResult____h546651[41] && - !_theResult____h546651[40] && - !_theResult____h546651[39] && - !_theResult____h546651[38] && - !_theResult____h546651[37] && - !_theResult____h546651[36] && - !_theResult____h546651[35] && - !_theResult____h546651[34] && - !_theResult____h546651[33] && - !_theResult____h546651[32] && - !_theResult____h546651[31] && - !_theResult____h546651[30] && - !_theResult____h546651[29] && - !_theResult____h546651[28] && - !_theResult____h546651[27] && - !_theResult____h546651[26] && - !_theResult____h546651[25] && - !_theResult____h546651[24] && - !_theResult____h546651[23] && - !_theResult____h546651[22] && - !_theResult____h546651[21] && - !_theResult____h546651[20] && - !_theResult____h546651[19] && - !_theResult____h546651[18] && - !_theResult____h546651[17] && - !_theResult____h546651[16] && - !_theResult____h546651[15] && - !_theResult____h546651[14] && - !_theResult____h546651[13] && - !_theResult____h546651[12] && - !_theResult____h546651[11] && - !_theResult____h546651[10] && - !_theResult____h546651[9] && - !_theResult____h546651[8] && - !_theResult____h546651[7] && - !_theResult____h546651[6] && - !_theResult____h546651[5] && - !_theResult____h546651[4] && - !_theResult____h546651[3] && - !_theResult____h546651[2] && - !_theResult____h546651[1] && - !_theResult____h546651[0]) ? - _theResult____h546651 : - _theResult___snd__h554927 ; - assign _theResult___snd__h554927 = + assign _theResult___snd__h554899 = { _theResult____h546652[55:0], 1'd0 } ; + assign _theResult___snd__h554910 = + (!_theResult____h546652[56] && _theResult____h546652[55]) ? + _theResult___snd__h554912 : + _theResult___snd__h554922 ; + assign _theResult___snd__h554912 = { _theResult____h546652[54:0], 2'd0 } ; + assign _theResult___snd__h554922 = + (!_theResult____h546652[56] && !_theResult____h546652[55] && + !_theResult____h546652[54] && + !_theResult____h546652[53] && + !_theResult____h546652[52] && + !_theResult____h546652[51] && + !_theResult____h546652[50] && + !_theResult____h546652[49] && + !_theResult____h546652[48] && + !_theResult____h546652[47] && + !_theResult____h546652[46] && + !_theResult____h546652[45] && + !_theResult____h546652[44] && + !_theResult____h546652[43] && + !_theResult____h546652[42] && + !_theResult____h546652[41] && + !_theResult____h546652[40] && + !_theResult____h546652[39] && + !_theResult____h546652[38] && + !_theResult____h546652[37] && + !_theResult____h546652[36] && + !_theResult____h546652[35] && + !_theResult____h546652[34] && + !_theResult____h546652[33] && + !_theResult____h546652[32] && + !_theResult____h546652[31] && + !_theResult____h546652[30] && + !_theResult____h546652[29] && + !_theResult____h546652[28] && + !_theResult____h546652[27] && + !_theResult____h546652[26] && + !_theResult____h546652[25] && + !_theResult____h546652[24] && + !_theResult____h546652[23] && + !_theResult____h546652[22] && + !_theResult____h546652[21] && + !_theResult____h546652[20] && + !_theResult____h546652[19] && + !_theResult____h546652[18] && + !_theResult____h546652[17] && + !_theResult____h546652[16] && + !_theResult____h546652[15] && + !_theResult____h546652[14] && + !_theResult____h546652[13] && + !_theResult____h546652[12] && + !_theResult____h546652[11] && + !_theResult____h546652[10] && + !_theResult____h546652[9] && + !_theResult____h546652[8] && + !_theResult____h546652[7] && + !_theResult____h546652[6] && + !_theResult____h546652[5] && + !_theResult____h546652[4] && + !_theResult____h546652[3] && + !_theResult____h546652[2] && + !_theResult____h546652[1] && + !_theResult____h546652[0]) ? + _theResult____h546652 : + _theResult___snd__h554928 ; + assign _theResult___snd__h554928 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178[54:0], 2'd0 } ; - assign _theResult___snd__h554950 = - _theResult____h546651 << + assign _theResult___snd__h554951 = + _theResult____h546652 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10495 ; - assign _theResult___snd__h563666 = - (f2_exp__h526063 == 8'd0) ? - _theResult___snd__h563680 : - _theResult___snd__h545263 ; - assign _theResult___snd__h563680 = - (f2_exp__h526063 == 8'd0 && !f2_sfd__h526064[22] && + assign _theResult___snd__h563667 = + (f2_exp__h526064 == 8'd0) ? + _theResult___snd__h563681 : + _theResult___snd__h545264 ; + assign _theResult___snd__h563681 = + (f2_exp__h526064 == 8'd0 && !f2_sfd__h526065[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10171) ? - sfd__h526425 : - _theResult___snd__h563686 ; - assign _theResult___snd__h563686 = + sfd__h526426 : + _theResult___snd__h563687 ; + assign _theResult___snd__h563687 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181[54:0], 2'd0 } ; - assign _theResult___snd__h563704 = - sfd__h526425 << + assign _theResult___snd__h563705 = + sfd__h526426 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10546 ; - assign _theResult___snd__h584565 = - (f3_exp__h565367 == 8'd0) ? - _theResult___snd__h584574 : - _theResult___snd__h584567 ; - assign _theResult___snd__h584567 = { f3_sfd__h565368, 34'd0 } ; - assign _theResult___snd__h584574 = - (f3_exp__h565367 == 8'd0 && !f3_sfd__h565368[22] && + assign _theResult___snd__h584566 = + (f3_exp__h565368 == 8'd0) ? + _theResult___snd__h584575 : + _theResult___snd__h584568 ; + assign _theResult___snd__h584568 = { f3_sfd__h565369, 34'd0 } ; + assign _theResult___snd__h584575 = + (f3_exp__h565368 == 8'd0 && !f3_sfd__h565369[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9401) ? - sfd__h565729 : - _theResult___snd__h584580 ; - assign _theResult___snd__h584580 = + sfd__h565730 : + _theResult___snd__h584581 ; + assign _theResult___snd__h584581 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151[54:0], 2'd0 } ; - assign _theResult___snd__h584603 = - sfd__h565729 << + assign _theResult___snd__h584604 = + sfd__h565730 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9428 ; - assign _theResult___snd__h594202 = { _theResult____h585955[55:0], 1'd0 } ; - assign _theResult___snd__h594213 = - (!_theResult____h585955[56] && _theResult____h585955[55]) ? - _theResult___snd__h594215 : - _theResult___snd__h594225 ; - assign _theResult___snd__h594215 = { _theResult____h585955[54:0], 2'd0 } ; - assign _theResult___snd__h594225 = - (!_theResult____h585955[56] && !_theResult____h585955[55] && - !_theResult____h585955[54] && - !_theResult____h585955[53] && - !_theResult____h585955[52] && - !_theResult____h585955[51] && - !_theResult____h585955[50] && - !_theResult____h585955[49] && - !_theResult____h585955[48] && - !_theResult____h585955[47] && - !_theResult____h585955[46] && - !_theResult____h585955[45] && - !_theResult____h585955[44] && - !_theResult____h585955[43] && - !_theResult____h585955[42] && - !_theResult____h585955[41] && - !_theResult____h585955[40] && - !_theResult____h585955[39] && - !_theResult____h585955[38] && - !_theResult____h585955[37] && - !_theResult____h585955[36] && - !_theResult____h585955[35] && - !_theResult____h585955[34] && - !_theResult____h585955[33] && - !_theResult____h585955[32] && - !_theResult____h585955[31] && - !_theResult____h585955[30] && - !_theResult____h585955[29] && - !_theResult____h585955[28] && - !_theResult____h585955[27] && - !_theResult____h585955[26] && - !_theResult____h585955[25] && - !_theResult____h585955[24] && - !_theResult____h585955[23] && - !_theResult____h585955[22] && - !_theResult____h585955[21] && - !_theResult____h585955[20] && - !_theResult____h585955[19] && - !_theResult____h585955[18] && - !_theResult____h585955[17] && - !_theResult____h585955[16] && - !_theResult____h585955[15] && - !_theResult____h585955[14] && - !_theResult____h585955[13] && - !_theResult____h585955[12] && - !_theResult____h585955[11] && - !_theResult____h585955[10] && - !_theResult____h585955[9] && - !_theResult____h585955[8] && - !_theResult____h585955[7] && - !_theResult____h585955[6] && - !_theResult____h585955[5] && - !_theResult____h585955[4] && - !_theResult____h585955[3] && - !_theResult____h585955[2] && - !_theResult____h585955[1] && - !_theResult____h585955[0]) ? - _theResult____h585955 : - _theResult___snd__h594231 ; - assign _theResult___snd__h594231 = + assign _theResult___snd__h594203 = { _theResult____h585956[55:0], 1'd0 } ; + assign _theResult___snd__h594214 = + (!_theResult____h585956[56] && _theResult____h585956[55]) ? + _theResult___snd__h594216 : + _theResult___snd__h594226 ; + assign _theResult___snd__h594216 = { _theResult____h585956[54:0], 2'd0 } ; + assign _theResult___snd__h594226 = + (!_theResult____h585956[56] && !_theResult____h585956[55] && + !_theResult____h585956[54] && + !_theResult____h585956[53] && + !_theResult____h585956[52] && + !_theResult____h585956[51] && + !_theResult____h585956[50] && + !_theResult____h585956[49] && + !_theResult____h585956[48] && + !_theResult____h585956[47] && + !_theResult____h585956[46] && + !_theResult____h585956[45] && + !_theResult____h585956[44] && + !_theResult____h585956[43] && + !_theResult____h585956[42] && + !_theResult____h585956[41] && + !_theResult____h585956[40] && + !_theResult____h585956[39] && + !_theResult____h585956[38] && + !_theResult____h585956[37] && + !_theResult____h585956[36] && + !_theResult____h585956[35] && + !_theResult____h585956[34] && + !_theResult____h585956[33] && + !_theResult____h585956[32] && + !_theResult____h585956[31] && + !_theResult____h585956[30] && + !_theResult____h585956[29] && + !_theResult____h585956[28] && + !_theResult____h585956[27] && + !_theResult____h585956[26] && + !_theResult____h585956[25] && + !_theResult____h585956[24] && + !_theResult____h585956[23] && + !_theResult____h585956[22] && + !_theResult____h585956[21] && + !_theResult____h585956[20] && + !_theResult____h585956[19] && + !_theResult____h585956[18] && + !_theResult____h585956[17] && + !_theResult____h585956[16] && + !_theResult____h585956[15] && + !_theResult____h585956[14] && + !_theResult____h585956[13] && + !_theResult____h585956[12] && + !_theResult____h585956[11] && + !_theResult____h585956[10] && + !_theResult____h585956[9] && + !_theResult____h585956[8] && + !_theResult____h585956[7] && + !_theResult____h585956[6] && + !_theResult____h585956[5] && + !_theResult____h585956[4] && + !_theResult____h585956[3] && + !_theResult____h585956[2] && + !_theResult____h585956[1] && + !_theResult____h585956[0]) ? + _theResult____h585956 : + _theResult___snd__h594232 ; + assign _theResult___snd__h594232 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155[54:0], 2'd0 } ; - assign _theResult___snd__h594254 = - _theResult____h585955 << + assign _theResult___snd__h594255 = + _theResult____h585956 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9725 ; - assign _theResult___snd__h602970 = - (f3_exp__h565367 == 8'd0) ? - _theResult___snd__h602984 : - _theResult___snd__h584567 ; - assign _theResult___snd__h602984 = - (f3_exp__h565367 == 8'd0 && !f3_sfd__h565368[22] && + assign _theResult___snd__h602971 = + (f3_exp__h565368 == 8'd0) ? + _theResult___snd__h602985 : + _theResult___snd__h584568 ; + assign _theResult___snd__h602985 = + (f3_exp__h565368 == 8'd0 && !f3_sfd__h565369[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9401) ? - sfd__h565729 : - _theResult___snd__h602990 ; - assign _theResult___snd__h602990 = + sfd__h565730 : + _theResult___snd__h602991 ; + assign _theResult___snd__h602991 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158[54:0], 2'd0 } ; - assign _theResult___snd__h603008 = - sfd__h565729 << + assign _theResult___snd__h603009 = + sfd__h565730 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9776 ; - assign _theResult___snd__h608464 = - b__h607916[63] ? b___1__h608529 : b__h607916 ; - assign _theResult___snd_fst_exp__h367799 = + assign _theResult___snd__h608465 = + b__h607917[63] ? b___1__h608530 : b__h607917 ; + assign _theResult___snd_fst_exp__h367800 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4113 ? - _theResult___fst_exp__h359214 : - _theResult___fst_exp__h367796 ; - assign _theResult___snd_fst_exp__h385619 = + _theResult___fst_exp__h359215 : + _theResult___fst_exp__h367797 ; + assign _theResult___snd_fst_exp__h385620 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? - _theResult___fst_exp__h376980 : - _theResult___fst_exp__h385616 ; - assign _theResult___snd_fst_exp__h413496 = + _theResult___fst_exp__h376981 : + _theResult___fst_exp__h385617 ; + assign _theResult___snd_fst_exp__h413497 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5505 ? - _theResult___fst_exp__h404911 : - _theResult___fst_exp__h413493 ; - assign _theResult___snd_fst_exp__h431316 = + _theResult___fst_exp__h404912 : + _theResult___fst_exp__h413494 ; + assign _theResult___snd_fst_exp__h431317 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? - _theResult___fst_exp__h422677 : - _theResult___fst_exp__h431313 ; - assign _theResult___snd_fst_exp__h459191 = + _theResult___fst_exp__h422678 : + _theResult___fst_exp__h431314 ; + assign _theResult___snd_fst_exp__h459192 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6897 ? - _theResult___fst_exp__h450606 : - _theResult___fst_exp__h459188 ; - assign _theResult___snd_fst_exp__h477011 = + _theResult___fst_exp__h450607 : + _theResult___fst_exp__h459189 ; + assign _theResult___snd_fst_exp__h477012 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? - _theResult___fst_exp__h468372 : - _theResult___fst_exp__h477008 ; - assign _theResult___snd_fst_exp__h507218 = + _theResult___fst_exp__h468373 : + _theResult___fst_exp__h477009 ; + assign _theResult___snd_fst_exp__h507219 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 ? 11'd0 : - _theResult___fst_exp__h507215 ; - assign _theResult___snd_fst_exp__h525653 = + _theResult___fst_exp__h507216 ; + assign _theResult___snd_fst_exp__h525654 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 ? - _theResult___fst_exp__h516866 : - _theResult___fst_exp__h525650 ; - assign _theResult___snd_fst_exp__h546071 = + _theResult___fst_exp__h516867 : + _theResult___fst_exp__h525651 ; + assign _theResult___snd_fst_exp__h546072 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 ? 11'd0 : - _theResult___fst_exp__h546068 ; - assign _theResult___snd_fst_exp__h564506 = + _theResult___fst_exp__h546069 ; + assign _theResult___snd_fst_exp__h564507 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 ? - _theResult___fst_exp__h555719 : - _theResult___fst_exp__h564503 ; - assign _theResult___snd_fst_exp__h585375 = + _theResult___fst_exp__h555720 : + _theResult___fst_exp__h564504 ; + assign _theResult___snd_fst_exp__h585376 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 ? 11'd0 : - _theResult___fst_exp__h585372 ; - assign _theResult___snd_fst_exp__h603810 = + _theResult___fst_exp__h585373 ; + assign _theResult___snd_fst_exp__h603811 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 ? - _theResult___fst_exp__h595023 : - _theResult___fst_exp__h603807 ; - assign _theResult___snd_fst_sfd__h342851 = + _theResult___fst_exp__h595024 : + _theResult___fst_exp__h603808 ; + assign _theResult___snd_fst_sfd__h342852 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h367800 = + assign _theResult___snd_fst_sfd__h367801 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4113 ? - _theResult___fst_sfd__h359215 : - _theResult___fst_sfd__h367797 ; - assign _theResult___snd_fst_sfd__h385620 = + _theResult___fst_sfd__h359216 : + _theResult___fst_sfd__h367798 ; + assign _theResult___snd_fst_sfd__h385621 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4653 ? - _theResult___fst_sfd__h376981 : - _theResult___fst_sfd__h385617 ; - assign _theResult___snd_fst_sfd__h388553 = + _theResult___fst_sfd__h376982 : + _theResult___fst_sfd__h385618 ; + assign _theResult___snd_fst_sfd__h388554 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h413497 = + assign _theResult___snd_fst_sfd__h413498 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5505 ? - _theResult___fst_sfd__h404912 : - _theResult___fst_sfd__h413494 ; - assign _theResult___snd_fst_sfd__h431317 = + _theResult___fst_sfd__h404913 : + _theResult___fst_sfd__h413495 ; + assign _theResult___snd_fst_sfd__h431318 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d6045 ? - _theResult___fst_sfd__h422678 : - _theResult___fst_sfd__h431314 ; - assign _theResult___snd_fst_sfd__h434248 = + _theResult___fst_sfd__h422679 : + _theResult___fst_sfd__h431315 ; + assign _theResult___snd_fst_sfd__h434249 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h459192 = + assign _theResult___snd_fst_sfd__h459193 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6897 ? - _theResult___fst_sfd__h450607 : - _theResult___fst_sfd__h459189 ; - assign _theResult___snd_fst_sfd__h477012 = + _theResult___fst_sfd__h450608 : + _theResult___fst_sfd__h459190 ; + assign _theResult___snd_fst_sfd__h477013 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7437 ? - _theResult___fst_sfd__h468373 : - _theResult___fst_sfd__h477009 ; - assign _theResult___snd_fst_sfd__h487385 = - (f1_sfd__h487070 == 23'd0) ? + _theResult___fst_sfd__h468374 : + _theResult___fst_sfd__h477010 ; + assign _theResult___snd_fst_sfd__h487386 = + (f1_sfd__h487071 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h487133 ; - assign _theResult___snd_fst_sfd__h507219 = + out___1_sfd__h487134 ; + assign _theResult___snd_fst_sfd__h507220 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8627 ? 52'd0 : - _theResult___fst_sfd__h507216 ; - assign _theResult___snd_fst_sfd__h525654 = + _theResult___fst_sfd__h507217 ; + assign _theResult___snd_fst_sfd__h525655 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8763 ? - _theResult___fst_sfd__h516867 : - _theResult___fst_sfd__h525651 ; - assign _theResult___snd_fst_sfd__h526379 = - (f2_sfd__h526064 == 23'd0) ? + _theResult___fst_sfd__h516868 : + _theResult___fst_sfd__h525652 ; + assign _theResult___snd_fst_sfd__h526380 = + (f2_sfd__h526065 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h526127 ; - assign _theResult___snd_fst_sfd__h546072 = + out___1_sfd__h526128 ; + assign _theResult___snd_fst_sfd__h546073 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10127 ? 52'd0 : - _theResult___fst_sfd__h546069 ; - assign _theResult___snd_fst_sfd__h564507 = + _theResult___fst_sfd__h546070 ; + assign _theResult___snd_fst_sfd__h564508 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10248 ? - _theResult___fst_sfd__h555720 : - _theResult___fst_sfd__h564504 ; - assign _theResult___snd_fst_sfd__h565683 = - (f3_sfd__h565368 == 23'd0) ? + _theResult___fst_sfd__h555721 : + _theResult___fst_sfd__h564505 ; + assign _theResult___snd_fst_sfd__h565684 = + (f3_sfd__h565369 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h565431 ; - assign _theResult___snd_fst_sfd__h585376 = + out___1_sfd__h565432 ; + assign _theResult___snd_fst_sfd__h585377 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9357 ? 52'd0 : - _theResult___fst_sfd__h585373 ; - assign _theResult___snd_fst_sfd__h603811 = + _theResult___fst_sfd__h585374 ; + assign _theResult___snd_fst_sfd__h603812 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9478 ? - _theResult___fst_sfd__h595024 : - _theResult___fst_sfd__h603808 ; - assign a___1__h608077 = + _theResult___fst_sfd__h595025 : + _theResult___fst_sfd__h603809 ; + assign a___1__h608078 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd1) ? { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[171:140] } : { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q12[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q12 } ; - assign a___1__h608468 = 64'd0 - a__h607915 ; - assign a__h607915 = + assign a___1__h608469 = 64'd0 - a__h607916 ; + assign a__h607916 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - a___1__h608077 : + a___1__h608078 : coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign b___1__h608078 = + assign b___1__h608079 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q13[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q13 } : { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] } ; - assign b___1__h608529 = 64'd0 - b__h607916 ; - assign b__h607916 = + assign b___1__h608530 = 64'd0 - b__h607917 ; + assign b__h607917 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - b___1__h608078 : + b___1__h608079 : coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign b__h608063 = { {64{a__h607915[63]}}, a__h607915 } ; - assign b__h608139 = { {64{b__h607916[63]}}, b__h607916 } ; - assign b__h608240 = { 64'd0, a__h607915 } ; - assign b__h608252 = { 64'd0, b__h607916 } ; + assign b__h608064 = { {64{a__h607916[63]}}, a__h607916 } ; + assign b__h608140 = { {64{b__h607917[63]}}, b__h607917 } ; + assign b__h608241 = { 64'd0, a__h607916 } ; + assign b__h608253 = { 64'd0, b__h607917 } ; assign base__h721348 = { csrf_stvec_base_hi_reg, 2'b0 } ; assign base__h721368 = { csrf_mtvec_base_hi_reg, 2'b0 } ; assign cause_code__h718388 = @@ -29824,8 +29824,8 @@ module mkCore(CLK, CASE_commitStage_f_rob_dataD_OUT_BITS_165_TO__ETC__q251, trap_val__h718389, IF_commitStage_f_rob_data_first__5067_BITS_97__ETC___d15238 } ; - assign commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15770 = - commitStage_rg_serial_num + y__h740368 ; + assign commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15776 = + commitStage_rg_serial_num + y__h740125 ; assign coreFix_aluExe_0_bypassWire_0_wget__2411_BITS__ETC___d12413 = coreFix_aluExe_0_bypassWire_0$wget[70:64] == coreFix_aluExe_0_dispToRegQ$first[84:78] ; @@ -30012,9 +30012,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10922 | - ((f3_exp__h565367 != 8'd255 || f3_sfd__h565368 == 23'd0) && - (f3_exp__h565367 != 8'd255 || f3_sfd__h565368 != 23'd0) && - (f3_exp__h565367 != 8'd0 || f3_sfd__h565368 != 23'd0) && + ((f3_exp__h565368 != 8'd255 || f3_sfd__h565369 == 23'd0) && + (f3_exp__h565368 != 8'd255 || f3_sfd__h565369 != 23'd0) && + (f3_exp__h565368 != 8'd0 || f3_sfd__h565369 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10962) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__486_BI_ETC___d11003 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -30022,9 +30022,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10991 | - ((f3_exp__h565367 != 8'd255 || f3_sfd__h565368 == 23'd0) && - (f3_exp__h565367 != 8'd255 || f3_sfd__h565368 != 23'd0) && - (f3_exp__h565367 != 8'd0 || f3_sfd__h565368 != 23'd0) && + ((f3_exp__h565368 != 8'd255 || f3_sfd__h565369 == 23'd0) && + (f3_exp__h565368 != 8'd255 || f3_sfd__h565369 != 23'd0) && + (f3_exp__h565368 != 8'd0 || f3_sfd__h565369 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10998) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__486_BI_ETC___d11051 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -30032,9 +30032,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11035 | - ((f3_exp__h565367 != 8'd255 || f3_sfd__h565368 == 23'd0) && - (f3_exp__h565367 != 8'd255 || f3_sfd__h565368 != 23'd0) && - (f3_exp__h565367 != 8'd0 || f3_sfd__h565368 != 23'd0) && + ((f3_exp__h565368 != 8'd255 || f3_sfd__h565369 == 23'd0) && + (f3_exp__h565368 != 8'd255 || f3_sfd__h565369 != 23'd0) && + (f3_exp__h565368 != 8'd0 || f3_sfd__h565369 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11046) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__486_BI_ETC___d11093 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -30042,9 +30042,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11079 | - ((f3_exp__h565367 != 8'd255 || f3_sfd__h565368 == 23'd0) && - (f3_exp__h565367 != 8'd255 || f3_sfd__h565368 != 23'd0) && - (f3_exp__h565367 != 8'd0 || f3_sfd__h565368 != 23'd0) && + ((f3_exp__h565368 != 8'd255 || f3_sfd__h565369 == 23'd0) && + (f3_exp__h565368 != 8'd255 || f3_sfd__h565369 != 23'd0) && + (f3_exp__h565368 != 8'd0 || f3_sfd__h565369 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11088) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__486_BI_ETC___d11135 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -30052,9 +30052,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11121 | - ((f3_exp__h565367 != 8'd255 || f3_sfd__h565368 == 23'd0) && - (f3_exp__h565367 != 8'd255 || f3_sfd__h565368 != 23'd0) && - (f3_exp__h565367 != 8'd0 || f3_sfd__h565368 != 23'd0) && + ((f3_exp__h565368 != 8'd255 || f3_sfd__h565369 == 23'd0) && + (f3_exp__h565368 != 8'd255 || f3_sfd__h565369 != 23'd0) && + (f3_exp__h565368 != 8'd0 || f3_sfd__h565369 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11130) ; assign coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q13 = coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] ; @@ -30100,7 +30100,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[58] && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[57:0] == - y__h258550 ; + y__h258551 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIn_ETC___d3167 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3131 || @@ -30356,15 +30356,15 @@ module mkCore(CLK, !coreFix_memExe_forwardQ_deqReq_rl) && coreFix_memExe_forwardQ_full ; assign coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1734 = - { coreFix_memExe_lsq$getOrigBE << x__h186792[2:0], - x__h186792, + { coreFix_memExe_lsq$getOrigBE << x__h186793[2:0], + x__h186793, coreFix_memExe_regToExeQ$first[75:12], coreFix_memExe_lsq$getOrigBE, coreFix_memExe_lsq$getOrigBE[7] ? - x__h186792[2:0] != 3'd0 : + x__h186793[2:0] != 3'd0 : (coreFix_memExe_lsq$getOrigBE[3] ? - x__h186792[1:0] != 2'd0 : - coreFix_memExe_lsq$getOrigBE[1] && x__h186792[0]) } ; + x__h186793[1:0] != 2'd0 : + coreFix_memExe_lsq$getOrigBE[1] && x__h186793[0]) } ; assign coreFix_memExe_memRespLdQ_enqReq_dummy2_2_read_ETC___d3765 = coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3734 || @@ -30505,24 +30505,24 @@ module mkCore(CLK, csrf_rg_dcsr[2] || !fetchStage$pipelines_0_canDeq || fetchStage$RDY_pipelines_0_first && IF_fetchStage_RDY_pipelines_0_first__2989_AND__ETC___d13681 ; - assign data78994_BITS_31_TO_0__q11 = data__h478994[31:0] ; - assign data79888_BITS_31_TO_0__q14 = data__h479888[31:0] ; - assign data___1__h479506 = - { {32{data78994_BITS_31_TO_0__q11[31]}}, - data78994_BITS_31_TO_0__q11 } ; - assign data___1__h480400 = - { {32{data79888_BITS_31_TO_0__q14[31]}}, - data79888_BITS_31_TO_0__q14 } ; - assign data__h478994 = + assign data78995_BITS_31_TO_0__q11 = data__h478995[31:0] ; + assign data79889_BITS_31_TO_0__q14 = data__h479889[31:0] ; + assign data___1__h479507 = + { {32{data78995_BITS_31_TO_0__q11[31]}}, + data78995_BITS_31_TO_0__q11 } ; + assign data___1__h480401 = + { {32{data79889_BITS_31_TO_0__q14[31]}}, + data79889_BITS_31_TO_0__q14 } ; + assign data__h478995 = (coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[35:34] == 2'd0) ? coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ$D_OUT[63:0] : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ$D_OUT[127:64] ; - assign data__h479888 = + assign data__h479889 = (coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[35:34] == 2'd2) ? - x_quotient__h479690 : - x_remainder__h479691 ; + x_quotient__h479691 : + x_remainder__h479692 ; assign dcsr_cause__h717907 = (commitStage_commitTrap[36] && commitStage_commitTrap[35:32] == 4'd14) ? @@ -30540,27 +30540,27 @@ module mkCore(CLK, commitStage_commitTrap[35:32] != 4'd14) ? 3'd4 : 3'd1) ; - assign din_inc___2_exp__h385650 = _theResult___fst_exp__h358617 + 8'd1 ; - assign din_inc___2_exp__h385674 = _theResult___fst_exp__h367273 + 8'd1 ; - assign din_inc___2_exp__h385704 = _theResult___fst_exp__h376383 + 8'd1 ; - assign din_inc___2_exp__h385728 = _theResult___fst_exp__h385068 + 8'd1 ; - assign din_inc___2_exp__h431347 = _theResult___fst_exp__h404314 + 8'd1 ; - assign din_inc___2_exp__h431371 = _theResult___fst_exp__h412970 + 8'd1 ; - assign din_inc___2_exp__h431401 = _theResult___fst_exp__h422080 + 8'd1 ; - assign din_inc___2_exp__h431425 = _theResult___fst_exp__h430765 + 8'd1 ; - assign din_inc___2_exp__h477042 = _theResult___fst_exp__h450009 + 8'd1 ; - assign din_inc___2_exp__h477066 = _theResult___fst_exp__h458665 + 8'd1 ; - assign din_inc___2_exp__h477096 = _theResult___fst_exp__h467775 + 8'd1 ; - assign din_inc___2_exp__h477120 = _theResult___fst_exp__h476460 + 8'd1 ; - assign din_inc___2_exp__h525707 = _theResult___fst_exp__h506457 + 11'd1 ; - assign din_inc___2_exp__h525742 = _theResult___fst_exp__h516034 + 11'd1 ; - assign din_inc___2_exp__h525768 = _theResult___fst_exp__h524867 + 11'd1 ; - assign din_inc___2_exp__h564560 = _theResult___fst_exp__h545310 + 11'd1 ; - assign din_inc___2_exp__h564595 = _theResult___fst_exp__h554887 + 11'd1 ; - assign din_inc___2_exp__h564621 = _theResult___fst_exp__h563720 + 11'd1 ; - assign din_inc___2_exp__h603864 = _theResult___fst_exp__h584614 + 11'd1 ; - assign din_inc___2_exp__h603899 = _theResult___fst_exp__h594191 + 11'd1 ; - assign din_inc___2_exp__h603925 = _theResult___fst_exp__h603024 + 11'd1 ; + assign din_inc___2_exp__h385651 = _theResult___fst_exp__h358618 + 8'd1 ; + assign din_inc___2_exp__h385675 = _theResult___fst_exp__h367274 + 8'd1 ; + assign din_inc___2_exp__h385705 = _theResult___fst_exp__h376384 + 8'd1 ; + assign din_inc___2_exp__h385729 = _theResult___fst_exp__h385069 + 8'd1 ; + assign din_inc___2_exp__h431348 = _theResult___fst_exp__h404315 + 8'd1 ; + assign din_inc___2_exp__h431372 = _theResult___fst_exp__h412971 + 8'd1 ; + assign din_inc___2_exp__h431402 = _theResult___fst_exp__h422081 + 8'd1 ; + assign din_inc___2_exp__h431426 = _theResult___fst_exp__h430766 + 8'd1 ; + assign din_inc___2_exp__h477043 = _theResult___fst_exp__h450010 + 8'd1 ; + assign din_inc___2_exp__h477067 = _theResult___fst_exp__h458666 + 8'd1 ; + assign din_inc___2_exp__h477097 = _theResult___fst_exp__h467776 + 8'd1 ; + assign din_inc___2_exp__h477121 = _theResult___fst_exp__h476461 + 8'd1 ; + assign din_inc___2_exp__h525708 = _theResult___fst_exp__h506458 + 11'd1 ; + assign din_inc___2_exp__h525743 = _theResult___fst_exp__h516035 + 11'd1 ; + assign din_inc___2_exp__h525769 = _theResult___fst_exp__h524868 + 11'd1 ; + assign din_inc___2_exp__h564561 = _theResult___fst_exp__h545311 + 11'd1 ; + assign din_inc___2_exp__h564596 = _theResult___fst_exp__h554888 + 11'd1 ; + assign din_inc___2_exp__h564622 = _theResult___fst_exp__h563721 + 11'd1 ; + assign din_inc___2_exp__h603865 = _theResult___fst_exp__h584615 + 11'd1 ; + assign din_inc___2_exp__h603900 = _theResult___fst_exp__h594192 + 11'd1 ; + assign din_inc___2_exp__h603926 = _theResult___fst_exp__h603025 + 11'd1 ; assign enabled_ints___1__h658901 = pend_ints__h658374 & y__h658913 ; assign enabled_ints__h658947 = pend_ints__h658374 & @@ -30586,38 +30586,38 @@ module mkCore(CLK, specTagManager$canClaim) && regRenamingTable_rename_0_canRename__3653_AND__ETC___d13724 && IF_fetchStage_pipelines_0_first__2992_BITS_194_ETC___d14135) ; - assign f1_exp87069_MINUS_127__q136 = f1_exp__h487069 - 8'd127 ; - assign f1_exp__h487069 = + assign f1_exp87070_MINUS_127__q136 = f1_exp__h487070 - 8'd127 ; + assign f1_exp__h487070 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[170:163] : 8'd255 ; - assign f1_sfd__h487070 = + assign f1_sfd__h487071 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[162:140] : 23'd4194304 ; - assign f2_exp26063_MINUS_127__q176 = f2_exp__h526063 - 8'd127 ; - assign f2_exp__h526063 = + assign f2_exp26064_MINUS_127__q176 = f2_exp__h526064 - 8'd127 ; + assign f2_exp__h526064 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[106:99] : 8'd255 ; - assign f2_sfd__h526064 = + assign f2_sfd__h526065 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[98:76] : 23'd4194304 ; - assign f3_exp65367_MINUS_127__q153 = f3_exp__h565367 - 8'd127 ; - assign f3_exp__h565367 = + assign f3_exp65368_MINUS_127__q153 = f3_exp__h565368 - 8'd127 ; + assign f3_exp__h565368 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[42:35] : 8'd255 ; - assign f3_sfd__h565368 = + assign f3_sfd__h565369 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[34:12] : 23'd4194304 ; - assign f_csr_rsps_i_notFull__6114_AND_f_csr_reqs_firs_ETC___d16217 = + assign f_csr_rsps_i_notFull__6120_AND_f_csr_reqs_firs_ETC___d16223 = f_csr_rsps$FULL_N && (f_csr_reqs$D_OUT[75:64] != 12'd2049 || csrf_stats_module_writeQ$FULL_N) && @@ -30821,7 +30821,7 @@ module mkCore(CLK, assign fetchStage_pipelines_1_first__3001_BIT_173_383_ETC___d13921 = { fetchStage$pipelines_1_first[173], CASE_fetchStagepipelines_1_first_BITS_172_TO__ETC__q235 } ; - assign fflags__h737833 = + assign fflags__h737590 = ({ rob$deqPort_0_deq_data[361:356], 1'd0, rob$deqPort_0_deq_data[354:350], @@ -30831,8 +30831,8 @@ module mkCore(CLK, rob$deqPort_0_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h737818 ; - assign fflags__h740546 = + po_fflags__h737575 ; + assign fflags__h740303 = ({ rob$deqPort_1_deq_data[361:356], 1'd0, rob$deqPort_1_deq_data[354:350], @@ -30842,82 +30842,82 @@ module mkCore(CLK, rob$deqPort_1_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h740531 ; - assign fflags__h743227 = - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_deq_ETC___d15982 ? - y_avValue_fst__h743164 : - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d15988 ; + po_fflags__h740288 ; + assign fflags__h742984 = + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_deq_ETC___d15988 ? + y_avValue_fst__h742921 : + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d15994 ; assign fflags_csr__read__h615689 = { 59'd0, csrf_fflags_reg } ; assign frm_csr__read__h615700 = { 61'd0, csrf_frm_reg } ; - assign guard__h350516 = - { IF_sfdin58611_BIT_33_THEN_2_ELSE_0__q30[1], - { sfdin__h358611[32:0], 23'd0 } != 56'd0 } ; - assign guard__h359225 = - { IF_theResult___snd67224_BIT_33_THEN_2_ELSE_0__q32[1], - { _theResult___snd__h367224[32:0], 23'd0 } != 56'd0 } ; - assign guard__h368155 = - { IF_sfdin76377_BIT_33_THEN_2_ELSE_0__q40[1], - { sfdin__h376377[32:0], 23'd0 } != 56'd0 } ; - assign guard__h368753 = x__h368855 != 57'd0 ; - assign guard__h376991 = - { IF_theResult___snd85014_BIT_33_THEN_2_ELSE_0__q45[1], - { _theResult___snd__h385014[32:0], 23'd0 } != 56'd0 } ; - assign guard__h396215 = - { IF_sfdin04308_BIT_33_THEN_2_ELSE_0__q65[1], - { sfdin__h404308[32:0], 23'd0 } != 56'd0 } ; - assign guard__h404922 = - { IF_theResult___snd12921_BIT_33_THEN_2_ELSE_0__q67[1], - { _theResult___snd__h412921[32:0], 23'd0 } != 56'd0 } ; - assign guard__h413852 = - { IF_sfdin22074_BIT_33_THEN_2_ELSE_0__q75[1], - { sfdin__h422074[32:0], 23'd0 } != 56'd0 } ; - assign guard__h414450 = x__h414552 != 57'd0 ; - assign guard__h422688 = - { IF_theResult___snd30711_BIT_33_THEN_2_ELSE_0__q80[1], - { _theResult___snd__h430711[32:0], 23'd0 } != 56'd0 } ; - assign guard__h441910 = - { IF_sfdin50003_BIT_33_THEN_2_ELSE_0__q100[1], - { sfdin__h450003[32:0], 23'd0 } != 56'd0 } ; - assign guard__h450617 = - { IF_theResult___snd58616_BIT_33_THEN_2_ELSE_0__q102[1], - { _theResult___snd__h458616[32:0], 23'd0 } != 56'd0 } ; - assign guard__h459547 = - { IF_sfdin67769_BIT_33_THEN_2_ELSE_0__q110[1], - { sfdin__h467769[32:0], 23'd0 } != 56'd0 } ; - assign guard__h460145 = x__h460247 != 57'd0 ; - assign guard__h468383 = - { IF_theResult___snd76406_BIT_33_THEN_2_ELSE_0__q115[1], - { _theResult___snd__h476406[32:0], 23'd0 } != 56'd0 } ; - assign guard__h498496 = - { IF_theResult___snd06408_BIT_4_THEN_2_ELSE_0__q135[1], - { _theResult___snd__h506408[3:0], 52'd0 } != 56'd0 } ; - assign guard__h507808 = - { IF_sfdin16028_BIT_4_THEN_2_ELSE_0__q139[1], - { sfdin__h516028[3:0], 52'd0 } != 56'd0 } ; - assign guard__h508406 = x__h508506 != 57'd0 ; - assign guard__h516877 = - { IF_theResult___snd24813_BIT_4_THEN_2_ELSE_0__q142[1], - { _theResult___snd__h524813[3:0], 52'd0 } != 56'd0 } ; - assign guard__h537349 = - { IF_theResult___snd45261_BIT_4_THEN_2_ELSE_0__q175[1], - { _theResult___snd__h545261[3:0], 52'd0 } != 56'd0 } ; - assign guard__h546661 = - { IF_sfdin54881_BIT_4_THEN_2_ELSE_0__q179[1], - { sfdin__h554881[3:0], 52'd0 } != 56'd0 } ; - assign guard__h547259 = x__h547359 != 57'd0 ; - assign guard__h555730 = - { IF_theResult___snd63666_BIT_4_THEN_2_ELSE_0__q182[1], - { _theResult___snd__h563666[3:0], 52'd0 } != 56'd0 } ; - assign guard__h576653 = - { IF_theResult___snd84565_BIT_4_THEN_2_ELSE_0__q152[1], - { _theResult___snd__h584565[3:0], 52'd0 } != 56'd0 } ; - assign guard__h585965 = - { IF_sfdin94185_BIT_4_THEN_2_ELSE_0__q156[1], - { sfdin__h594185[3:0], 52'd0 } != 56'd0 } ; - assign guard__h586563 = x__h586663 != 57'd0 ; - assign guard__h595034 = - { IF_theResult___snd02970_BIT_4_THEN_2_ELSE_0__q159[1], - { _theResult___snd__h602970[3:0], 52'd0 } != 56'd0 } ; + assign guard__h350517 = + { IF_sfdin58612_BIT_33_THEN_2_ELSE_0__q30[1], + { sfdin__h358612[32:0], 23'd0 } != 56'd0 } ; + assign guard__h359226 = + { IF_theResult___snd67225_BIT_33_THEN_2_ELSE_0__q32[1], + { _theResult___snd__h367225[32:0], 23'd0 } != 56'd0 } ; + assign guard__h368156 = + { IF_sfdin76378_BIT_33_THEN_2_ELSE_0__q40[1], + { sfdin__h376378[32:0], 23'd0 } != 56'd0 } ; + assign guard__h368754 = x__h368856 != 57'd0 ; + assign guard__h376992 = + { IF_theResult___snd85015_BIT_33_THEN_2_ELSE_0__q45[1], + { _theResult___snd__h385015[32:0], 23'd0 } != 56'd0 } ; + assign guard__h396216 = + { IF_sfdin04309_BIT_33_THEN_2_ELSE_0__q65[1], + { sfdin__h404309[32:0], 23'd0 } != 56'd0 } ; + assign guard__h404923 = + { IF_theResult___snd12922_BIT_33_THEN_2_ELSE_0__q67[1], + { _theResult___snd__h412922[32:0], 23'd0 } != 56'd0 } ; + assign guard__h413853 = + { IF_sfdin22075_BIT_33_THEN_2_ELSE_0__q75[1], + { sfdin__h422075[32:0], 23'd0 } != 56'd0 } ; + assign guard__h414451 = x__h414553 != 57'd0 ; + assign guard__h422689 = + { IF_theResult___snd30712_BIT_33_THEN_2_ELSE_0__q80[1], + { _theResult___snd__h430712[32:0], 23'd0 } != 56'd0 } ; + assign guard__h441911 = + { IF_sfdin50004_BIT_33_THEN_2_ELSE_0__q100[1], + { sfdin__h450004[32:0], 23'd0 } != 56'd0 } ; + assign guard__h450618 = + { IF_theResult___snd58617_BIT_33_THEN_2_ELSE_0__q102[1], + { _theResult___snd__h458617[32:0], 23'd0 } != 56'd0 } ; + assign guard__h459548 = + { IF_sfdin67770_BIT_33_THEN_2_ELSE_0__q110[1], + { sfdin__h467770[32:0], 23'd0 } != 56'd0 } ; + assign guard__h460146 = x__h460248 != 57'd0 ; + assign guard__h468384 = + { IF_theResult___snd76407_BIT_33_THEN_2_ELSE_0__q115[1], + { _theResult___snd__h476407[32:0], 23'd0 } != 56'd0 } ; + assign guard__h498497 = + { IF_theResult___snd06409_BIT_4_THEN_2_ELSE_0__q135[1], + { _theResult___snd__h506409[3:0], 52'd0 } != 56'd0 } ; + assign guard__h507809 = + { IF_sfdin16029_BIT_4_THEN_2_ELSE_0__q139[1], + { sfdin__h516029[3:0], 52'd0 } != 56'd0 } ; + assign guard__h508407 = x__h508507 != 57'd0 ; + assign guard__h516878 = + { IF_theResult___snd24814_BIT_4_THEN_2_ELSE_0__q142[1], + { _theResult___snd__h524814[3:0], 52'd0 } != 56'd0 } ; + assign guard__h537350 = + { IF_theResult___snd45262_BIT_4_THEN_2_ELSE_0__q175[1], + { _theResult___snd__h545262[3:0], 52'd0 } != 56'd0 } ; + assign guard__h546662 = + { IF_sfdin54882_BIT_4_THEN_2_ELSE_0__q179[1], + { sfdin__h554882[3:0], 52'd0 } != 56'd0 } ; + assign guard__h547260 = x__h547360 != 57'd0 ; + assign guard__h555731 = + { IF_theResult___snd63667_BIT_4_THEN_2_ELSE_0__q182[1], + { _theResult___snd__h563667[3:0], 52'd0 } != 56'd0 } ; + assign guard__h576654 = + { IF_theResult___snd84566_BIT_4_THEN_2_ELSE_0__q152[1], + { _theResult___snd__h584566[3:0], 52'd0 } != 56'd0 } ; + assign guard__h585966 = + { IF_sfdin94186_BIT_4_THEN_2_ELSE_0__q156[1], + { sfdin__h594186[3:0], 52'd0 } != 56'd0 } ; + assign guard__h586564 = x__h586664 != 57'd0 ; + assign guard__h595035 = + { IF_theResult___snd02971_BIT_4_THEN_2_ELSE_0__q159[1], + { _theResult___snd__h602971[3:0], 52'd0 } != 56'd0 } ; assign idx__h693568 = fetchStage$pipelines_0_canDeq && NOT_fetchStage_pipelines_0_first__2992_BITS_19_ETC___d13991 || @@ -31024,35 +31024,35 @@ module mkCore(CLK, (!mmio_pRsQ_deqReq_dummy2_2$Q_OUT || !mmio_pRsQ_deqReq_lat_0$whas && !mmio_pRsQ_deqReq_rl) && mmio_pRsQ_full ; - assign msip__h76122 = csrf_software_int_pend_vec_3 ; + assign msip__h76123 = csrf_software_int_pend_vec_3 ; assign mstatus_csr__read__h616560 = { r1__read__h620558, csrf_ie_vec_0 } ; assign mtvec_csr__read__h617009 = { r1__read__h620817, csrf_mtvec_mode_low_reg } ; - assign n___1__h201995 = + assign n___1__h201996 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[78] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[70:63] : - x__h200592[63:56], + x__h200593[63:56], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[77] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[62:55] : - x__h200592[55:48], + x__h200593[55:48], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[76] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[54:47] : - x__h200592[47:40], + x__h200593[47:40], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[75] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[46:39] : - x__h200592[39:32], + x__h200593[39:32], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[74] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[38:31] : - x__h200592[31:24], + x__h200593[31:24], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[73] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[30:23] : - x__h200592[23:16], + x__h200593[23:16], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[72] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[22:15] : - x__h200592[15:8], + x__h200593[15:8], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[71] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[14:7] : - x__h200592[7:0] } ; + x__h200593[7:0] } ; assign n__read__h617693 = (csrf_mcycle_ehr_data_dummy2_0$Q_OUT && csrf_mcycle_ehr_data_dummy2_1$Q_OUT) ? @@ -31063,244 +31063,244 @@ module mkCore(CLK, csrf_minstret_ehr_data_dummy2_1$Q_OUT) ? csrf_minstret_ehr_data_rl : 64'd0 ; - assign n__read__h6759 = + assign n__read__h6760 = csrf_mcycle_ehr_data_dummy2_1$Q_OUT ? (csrf_mcycle_ehr_data_lat_0$whas ? - upd__h6873 : + upd__h6874 : csrf_mcycle_ehr_data_rl) : 64'd0 ; - assign n__read__h736179 = + assign n__read__h735936 = csrf_minstret_ehr_data_dummy2_1$Q_OUT ? IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 : 64'd0 ; - assign next_deqP___1__h301221 = + assign next_deqP___1__h301222 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP + 3'd1 ; - assign next_deqP___1__h309217 = + assign next_deqP___1__h309218 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP + 1'd1 ; - assign next_deqP___1__h315498 = + assign next_deqP___1__h315499 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP + 1'd1 ; - assign next_deqP___1__h323352 = + assign next_deqP___1__h323353 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP + 1'd1 ; - assign next_deqP___1__h333409 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; - assign next_deqP___1__h336634 = coreFix_memExe_forwardQ_deqP + 1'd1 ; + assign next_deqP___1__h333410 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; + assign next_deqP___1__h336635 = coreFix_memExe_forwardQ_deqP + 1'd1 ; assign next_pc__h731630 = (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? rob$deqPort_0_deq_data[95:32] : rob_deqPort_0_deq_data__4646_BITS_425_TO_362_4_ETC___d15496 ; - assign old_fflags__h742653 = + assign old_fflags__h742410 = csrf_fflags_reg | rob$deqPort_0_deq_data[31:27] ; - assign out___1_sfd__h487133 = { f1_sfd__h487070, 29'd0 } ; - assign out___1_sfd__h526127 = { f2_sfd__h526064, 29'd0 } ; - assign out___1_sfd__h565431 = { f3_sfd__h565368, 29'd0 } ; - assign out_exp__h359136 = - sfdin__h358611[34] ? - _theResult___exp__h359133 : - _theResult___fst_exp__h358617 ; - assign out_exp__h367718 = - _theResult___snd__h367224[34] ? - _theResult___exp__h367715 : - _theResult___fst_exp__h367273 ; - assign out_exp__h376902 = - sfdin__h376377[34] ? - _theResult___exp__h376899 : - _theResult___fst_exp__h376383 ; - assign out_exp__h385538 = - _theResult___snd__h385014[34] ? - _theResult___exp__h385535 : - _theResult___fst_exp__h385068 ; - assign out_exp__h404833 = - sfdin__h404308[34] ? - _theResult___exp__h404830 : - _theResult___fst_exp__h404314 ; - assign out_exp__h413415 = - _theResult___snd__h412921[34] ? - _theResult___exp__h413412 : - _theResult___fst_exp__h412970 ; - assign out_exp__h422599 = - sfdin__h422074[34] ? - _theResult___exp__h422596 : - _theResult___fst_exp__h422080 ; - assign out_exp__h431235 = - _theResult___snd__h430711[34] ? - _theResult___exp__h431232 : - _theResult___fst_exp__h430765 ; - assign out_exp__h450528 = - sfdin__h450003[34] ? - _theResult___exp__h450525 : - _theResult___fst_exp__h450009 ; - assign out_exp__h459110 = - _theResult___snd__h458616[34] ? - _theResult___exp__h459107 : - _theResult___fst_exp__h458665 ; - assign out_exp__h468294 = - sfdin__h467769[34] ? - _theResult___exp__h468291 : - _theResult___fst_exp__h467775 ; - assign out_exp__h476930 = - _theResult___snd__h476406[34] ? - _theResult___exp__h476927 : - _theResult___fst_exp__h476460 ; - assign out_exp__h507115 = - _theResult___snd__h506408[5] ? - _theResult___exp__h507112 : - _theResult___fst_exp__h506457 ; - assign out_exp__h516766 = - sfdin__h516028[5] ? - _theResult___exp__h516763 : - _theResult___fst_exp__h516034 ; - assign out_exp__h525550 = - _theResult___snd__h524813[5] ? - _theResult___exp__h525547 : - _theResult___fst_exp__h524867 ; - assign out_exp__h545968 = - _theResult___snd__h545261[5] ? - _theResult___exp__h545965 : - _theResult___fst_exp__h545310 ; - assign out_exp__h555619 = - sfdin__h554881[5] ? - _theResult___exp__h555616 : - _theResult___fst_exp__h554887 ; - assign out_exp__h564403 = - _theResult___snd__h563666[5] ? - _theResult___exp__h564400 : - _theResult___fst_exp__h563720 ; - assign out_exp__h585272 = - _theResult___snd__h584565[5] ? - _theResult___exp__h585269 : - _theResult___fst_exp__h584614 ; - assign out_exp__h594923 = - sfdin__h594185[5] ? - _theResult___exp__h594920 : - _theResult___fst_exp__h594191 ; - assign out_exp__h603707 = - _theResult___snd__h602970[5] ? - _theResult___exp__h603704 : - _theResult___fst_exp__h603024 ; - assign out_f_exp__h385914 = - (_theResult___exp__h385637 == 8'd255 && - _theResult___sfd__h385638 != 23'd0 || + assign out___1_sfd__h487134 = { f1_sfd__h487071, 29'd0 } ; + assign out___1_sfd__h526128 = { f2_sfd__h526065, 29'd0 } ; + assign out___1_sfd__h565432 = { f3_sfd__h565369, 29'd0 } ; + assign out_exp__h359137 = + sfdin__h358612[34] ? + _theResult___exp__h359134 : + _theResult___fst_exp__h358618 ; + assign out_exp__h367719 = + _theResult___snd__h367225[34] ? + _theResult___exp__h367716 : + _theResult___fst_exp__h367274 ; + assign out_exp__h376903 = + sfdin__h376378[34] ? + _theResult___exp__h376900 : + _theResult___fst_exp__h376384 ; + assign out_exp__h385539 = + _theResult___snd__h385015[34] ? + _theResult___exp__h385536 : + _theResult___fst_exp__h385069 ; + assign out_exp__h404834 = + sfdin__h404309[34] ? + _theResult___exp__h404831 : + _theResult___fst_exp__h404315 ; + assign out_exp__h413416 = + _theResult___snd__h412922[34] ? + _theResult___exp__h413413 : + _theResult___fst_exp__h412971 ; + assign out_exp__h422600 = + sfdin__h422075[34] ? + _theResult___exp__h422597 : + _theResult___fst_exp__h422081 ; + assign out_exp__h431236 = + _theResult___snd__h430712[34] ? + _theResult___exp__h431233 : + _theResult___fst_exp__h430766 ; + assign out_exp__h450529 = + sfdin__h450004[34] ? + _theResult___exp__h450526 : + _theResult___fst_exp__h450010 ; + assign out_exp__h459111 = + _theResult___snd__h458617[34] ? + _theResult___exp__h459108 : + _theResult___fst_exp__h458666 ; + assign out_exp__h468295 = + sfdin__h467770[34] ? + _theResult___exp__h468292 : + _theResult___fst_exp__h467776 ; + assign out_exp__h476931 = + _theResult___snd__h476407[34] ? + _theResult___exp__h476928 : + _theResult___fst_exp__h476461 ; + assign out_exp__h507116 = + _theResult___snd__h506409[5] ? + _theResult___exp__h507113 : + _theResult___fst_exp__h506458 ; + assign out_exp__h516767 = + sfdin__h516029[5] ? + _theResult___exp__h516764 : + _theResult___fst_exp__h516035 ; + assign out_exp__h525551 = + _theResult___snd__h524814[5] ? + _theResult___exp__h525548 : + _theResult___fst_exp__h524868 ; + assign out_exp__h545969 = + _theResult___snd__h545262[5] ? + _theResult___exp__h545966 : + _theResult___fst_exp__h545311 ; + assign out_exp__h555620 = + sfdin__h554882[5] ? + _theResult___exp__h555617 : + _theResult___fst_exp__h554888 ; + assign out_exp__h564404 = + _theResult___snd__h563667[5] ? + _theResult___exp__h564401 : + _theResult___fst_exp__h563721 ; + assign out_exp__h585273 = + _theResult___snd__h584566[5] ? + _theResult___exp__h585270 : + _theResult___fst_exp__h584615 ; + assign out_exp__h594924 = + sfdin__h594186[5] ? + _theResult___exp__h594921 : + _theResult___fst_exp__h594192 ; + assign out_exp__h603708 = + _theResult___snd__h602971[5] ? + _theResult___exp__h603705 : + _theResult___fst_exp__h603025 ; + assign out_f_exp__h385915 = + (_theResult___exp__h385638 == 8'd255 && + _theResult___sfd__h385639 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h385628 ; - assign out_f_exp__h431611 = - (_theResult___exp__h431334 == 8'd255 && - _theResult___sfd__h431335 != 23'd0 || + _theResult___fst_exp__h385629 ; + assign out_f_exp__h431612 = + (_theResult___exp__h431335 == 8'd255 && + _theResult___sfd__h431336 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h431325 ; - assign out_f_exp__h477306 = - (_theResult___exp__h477029 == 8'd255 && - _theResult___sfd__h477030 != 23'd0 || + _theResult___fst_exp__h431326 ; + assign out_f_exp__h477307 = + (_theResult___exp__h477030 == 8'd255 && + _theResult___sfd__h477031 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h477020 ; - assign out_f_sfd__h385915 = - (_theResult___exp__h385637 == 8'd255 && - _theResult___sfd__h385638 != 23'd0) ? + _theResult___fst_exp__h477021 ; + assign out_f_sfd__h385916 = + (_theResult___exp__h385638 == 8'd255 && + _theResult___sfd__h385639 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h385638 ; - assign out_f_sfd__h431612 = - (_theResult___exp__h431334 == 8'd255 && - _theResult___sfd__h431335 != 23'd0) ? + _theResult___sfd__h385639 ; + assign out_f_sfd__h431613 = + (_theResult___exp__h431335 == 8'd255 && + _theResult___sfd__h431336 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h431335 ; - assign out_f_sfd__h477307 = - (_theResult___exp__h477029 == 8'd255 && - _theResult___sfd__h477030 != 23'd0) ? + _theResult___sfd__h431336 ; + assign out_f_sfd__h477308 = + (_theResult___exp__h477030 == 8'd255 && + _theResult___sfd__h477031 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h477030 ; - assign out_sfd__h359137 = - sfdin__h358611[34] ? - _theResult___sfd__h359134 : - sfdin__h358611[56:34] ; - assign out_sfd__h367719 = - _theResult___snd__h367224[34] ? - _theResult___sfd__h367716 : - _theResult___snd__h367224[56:34] ; - assign out_sfd__h376903 = - sfdin__h376377[34] ? - _theResult___sfd__h376900 : - sfdin__h376377[56:34] ; - assign out_sfd__h385539 = - _theResult___snd__h385014[34] ? - _theResult___sfd__h385536 : - _theResult___snd__h385014[56:34] ; - assign out_sfd__h404834 = - sfdin__h404308[34] ? - _theResult___sfd__h404831 : - sfdin__h404308[56:34] ; - assign out_sfd__h413416 = - _theResult___snd__h412921[34] ? - _theResult___sfd__h413413 : - _theResult___snd__h412921[56:34] ; - assign out_sfd__h422600 = - sfdin__h422074[34] ? - _theResult___sfd__h422597 : - sfdin__h422074[56:34] ; - assign out_sfd__h431236 = - _theResult___snd__h430711[34] ? - _theResult___sfd__h431233 : - _theResult___snd__h430711[56:34] ; - assign out_sfd__h450529 = - sfdin__h450003[34] ? - _theResult___sfd__h450526 : - sfdin__h450003[56:34] ; - assign out_sfd__h459111 = - _theResult___snd__h458616[34] ? - _theResult___sfd__h459108 : - _theResult___snd__h458616[56:34] ; - assign out_sfd__h468295 = - sfdin__h467769[34] ? - _theResult___sfd__h468292 : - sfdin__h467769[56:34] ; - assign out_sfd__h476931 = - _theResult___snd__h476406[34] ? - _theResult___sfd__h476928 : - _theResult___snd__h476406[56:34] ; - assign out_sfd__h507116 = - _theResult___snd__h506408[5] ? - _theResult___sfd__h507113 : - _theResult___snd__h506408[56:5] ; - assign out_sfd__h516767 = - sfdin__h516028[5] ? - _theResult___sfd__h516764 : - sfdin__h516028[56:5] ; - assign out_sfd__h525551 = - _theResult___snd__h524813[5] ? - _theResult___sfd__h525548 : - _theResult___snd__h524813[56:5] ; - assign out_sfd__h545969 = - _theResult___snd__h545261[5] ? - _theResult___sfd__h545966 : - _theResult___snd__h545261[56:5] ; - assign out_sfd__h555620 = - sfdin__h554881[5] ? - _theResult___sfd__h555617 : - sfdin__h554881[56:5] ; - assign out_sfd__h564404 = - _theResult___snd__h563666[5] ? - _theResult___sfd__h564401 : - _theResult___snd__h563666[56:5] ; - assign out_sfd__h585273 = - _theResult___snd__h584565[5] ? - _theResult___sfd__h585270 : - _theResult___snd__h584565[56:5] ; - assign out_sfd__h594924 = - sfdin__h594185[5] ? - _theResult___sfd__h594921 : - sfdin__h594185[56:5] ; - assign out_sfd__h603708 = - _theResult___snd__h602970[5] ? - _theResult___sfd__h603705 : - _theResult___snd__h602970[56:5] ; + _theResult___sfd__h477031 ; + assign out_sfd__h359138 = + sfdin__h358612[34] ? + _theResult___sfd__h359135 : + sfdin__h358612[56:34] ; + assign out_sfd__h367720 = + _theResult___snd__h367225[34] ? + _theResult___sfd__h367717 : + _theResult___snd__h367225[56:34] ; + assign out_sfd__h376904 = + sfdin__h376378[34] ? + _theResult___sfd__h376901 : + sfdin__h376378[56:34] ; + assign out_sfd__h385540 = + _theResult___snd__h385015[34] ? + _theResult___sfd__h385537 : + _theResult___snd__h385015[56:34] ; + assign out_sfd__h404835 = + sfdin__h404309[34] ? + _theResult___sfd__h404832 : + sfdin__h404309[56:34] ; + assign out_sfd__h413417 = + _theResult___snd__h412922[34] ? + _theResult___sfd__h413414 : + _theResult___snd__h412922[56:34] ; + assign out_sfd__h422601 = + sfdin__h422075[34] ? + _theResult___sfd__h422598 : + sfdin__h422075[56:34] ; + assign out_sfd__h431237 = + _theResult___snd__h430712[34] ? + _theResult___sfd__h431234 : + _theResult___snd__h430712[56:34] ; + assign out_sfd__h450530 = + sfdin__h450004[34] ? + _theResult___sfd__h450527 : + sfdin__h450004[56:34] ; + assign out_sfd__h459112 = + _theResult___snd__h458617[34] ? + _theResult___sfd__h459109 : + _theResult___snd__h458617[56:34] ; + assign out_sfd__h468296 = + sfdin__h467770[34] ? + _theResult___sfd__h468293 : + sfdin__h467770[56:34] ; + assign out_sfd__h476932 = + _theResult___snd__h476407[34] ? + _theResult___sfd__h476929 : + _theResult___snd__h476407[56:34] ; + assign out_sfd__h507117 = + _theResult___snd__h506409[5] ? + _theResult___sfd__h507114 : + _theResult___snd__h506409[56:5] ; + assign out_sfd__h516768 = + sfdin__h516029[5] ? + _theResult___sfd__h516765 : + sfdin__h516029[56:5] ; + assign out_sfd__h525552 = + _theResult___snd__h524814[5] ? + _theResult___sfd__h525549 : + _theResult___snd__h524814[56:5] ; + assign out_sfd__h545970 = + _theResult___snd__h545262[5] ? + _theResult___sfd__h545967 : + _theResult___snd__h545262[56:5] ; + assign out_sfd__h555621 = + sfdin__h554882[5] ? + _theResult___sfd__h555618 : + sfdin__h554882[56:5] ; + assign out_sfd__h564405 = + _theResult___snd__h563667[5] ? + _theResult___sfd__h564402 : + _theResult___snd__h563667[56:5] ; + assign out_sfd__h585274 = + _theResult___snd__h584566[5] ? + _theResult___sfd__h585271 : + _theResult___snd__h584566[56:5] ; + assign out_sfd__h594925 = + sfdin__h594186[5] ? + _theResult___sfd__h594922 : + sfdin__h594186[56:5] ; + assign out_sfd__h603709 = + _theResult___snd__h602971[5] ? + _theResult___sfd__h603706 : + _theResult___snd__h602971[56:5] ; assign pc__h721332 = csrf_prv_reg_read__3022_ULE_1_5008_AND_IF_comm_ETC___d15030 ? y_avValue_new_pc__h721124 : @@ -31311,12 +31311,12 @@ module mkCore(CLK, 1'd0, csrf_software_int_en_vec_1 & csrf_software_int_pend_vec_1, 1'd0 } ; - assign po_fflags__h737818 = old_fflags__h742653 ; - assign po_fflags__h740531 = - old_fflags__h742653 | rob$deqPort_1_deq_data[31:27] ; - assign prv__h744896 = csrf_prv_reg ; - assign prv__h744940 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; - assign q___1__h480475 = + assign po_fflags__h737575 = old_fflags__h742410 ; + assign po_fflags__h740288 = + old_fflags__h742410 | rob$deqPort_1_deq_data[31:27] ; + assign prv__h744653 = csrf_prv_reg ; + assign prv__h744697 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; + assign q___1__h480476 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[203:140] ; assign r1__read_BITS_13_TO_0___h658923 = @@ -31328,7 +31328,7 @@ module mkCore(CLK, csrf_mideleg_5_3_reg, 1'b0 } ; assign r1__read_BITS_13_TO_12___h662455 = csrf_fs_reg ; - assign r1__read_BITS_62_TO_14___h739496 = { r1__read__h620582, 2'd0 } ; + assign r1__read_BITS_62_TO_14___h739253 = { r1__read__h620582, 2'd0 } ; assign r1__read_BIT_20___h663151 = csrf_tw_reg ; assign r1__read__h619387 = { r1__read__h619389, csrf_ie_vec_1 } ; assign r1__read__h619389 = { r1__read__h619391, 2'b0 } ; @@ -31378,7 +31378,7 @@ module mkCore(CLK, assign r1__read__h620574 = { r1__read__h620576, 2'b0 } ; assign r1__read__h620576 = { r1__read__h620578, csrf_mpp_reg } ; assign r1__read__h620578 = - { r1__read_BITS_62_TO_14___h739496, csrf_fs_reg } ; + { r1__read_BITS_62_TO_14___h739253, csrf_fs_reg } ; assign r1__read__h620582 = { r1__read__h620584, csrf_mprv_reg } ; assign r1__read__h620584 = { r1__read__h620586, csrf_sum_reg } ; assign r1__read__h620586 = { r1__read__h620588, csrf_mxr_reg } ; @@ -31434,9 +31434,9 @@ module mkCore(CLK, assign r1__read__h620859 = { r1__read__h620861, 1'b0 } ; assign r1__read__h620861 = { 52'b0, csrf_external_int_pend_vec_3 } ; assign r1__read__h620938 = { 4'd0, csrf_rg_tdata1_dmode } ; - assign rVal1__h486685 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign rVal2__h486686 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign r___1__h480502 = + assign rVal1__h486686 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; + assign rVal2__h486687 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; + assign r___1__h480503 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[139:76] ; assign regRenamingTable_RDY_rename_0_getRename__3535__ETC___d13544 = @@ -31692,8 +31692,8 @@ module mkCore(CLK, fetchStage$pipelines_0_canDeq ? y_avValue_fst__h689832 : specTagManager$currentSpecBits ; - assign res_data__h342290 = { 32'hFFFFFFFF, x__h342305 } ; - assign res_data__h342295 = + assign res_data__h342291 = { 32'hFFFFFFFF, x__h342306 } ; + assign res_data__h342296 = { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == @@ -31706,8 +31706,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:5] } ; - assign res_data__h387992 = { 32'hFFFFFFFF, x__h388007 } ; - assign res_data__h387997 = + assign res_data__h387993 = { 32'hFFFFFFFF, x__h388008 } ; + assign res_data__h387998 = { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == @@ -31720,8 +31720,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:5] } ; - assign res_data__h433687 = { 32'hFFFFFFFF, x__h433702 } ; - assign res_data__h433692 = + assign res_data__h433688 = { 32'hFFFFFFFF, x__h433703 } ; + assign res_data__h433693 = { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == @@ -31734,7 +31734,7 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:5] } ; - assign res_fflags__h342291 = + assign res_fflags__h342292 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != @@ -31802,7 +31802,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d5355 } ; - assign res_fflags__h387993 = + assign res_fflags__h387994 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != @@ -31870,7 +31870,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d6747 } ; - assign res_fflags__h433688 = + assign res_fflags__h433689 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != @@ -31938,36 +31938,36 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d8139 } ; - assign resp_addr__h296398 = + assign resp_addr__h296399 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getSlot[52:1], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getRq[95:84] } ; - assign result__h368758 = + assign result__h368759 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4658[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4658[0] | - guard__h368753 } ; - assign result__h414455 = + guard__h368754 } ; + assign result__h414456 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6050[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d6050[0] | - guard__h414450 } ; - assign result__h460150 = + guard__h414451 } ; + assign result__h460151 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7442[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7442[0] | - guard__h460145 } ; - assign result__h508411 = + guard__h460146 } ; + assign result__h508412 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8768[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8768[0] | - guard__h508406 } ; - assign result__h547264 = + guard__h508407 } ; + assign result__h547265 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10253[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10253[0] | - guard__h547259 } ; - assign result__h586568 = + guard__h547260 } ; + assign result__h586569 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9483[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9483[0] | - guard__h586563 } ; + guard__h586564 } ; assign result__h653953 = w__h653948 & y__h653982 ; assign result__h654004 = ~x__h654003 ; - assign rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16053 = + assign rg_core_run_state_read__3293_EQ_2_3294_AND_NOT_ETC___d16059 = rg_core_run_state == 2'd2 && !flush_reservation && !flush_tlbs && !update_vm_info && fetchStage$iTlbIfc_flush_done && @@ -31982,7 +31982,7 @@ module mkCore(CLK, fetchStage$iTlbIfc_noPendingReq && coreFix_memExe_dTlb$noPendingReq && NOT_rob_deqPort_0_deq_data__4646_BITS_329_TO_3_ETC___d15305 ; - assign rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15606 = + assign rob_deqPort_0_deq_data__4646_BITS_161_TO_98_46_ETC___d15612 = { rob$deqPort_0_deq_data[161:98], (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? @@ -31999,7 +31999,7 @@ module mkCore(CLK, 64'hAAAAAAAAAAAAAAAA, x_prv__h732255, 64'hAAAAAAAAAAAAAAAA, - x__h735673, + x__h735430, 128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign rob_deqPort_0_deq_data__4646_BITS_425_TO_362_4_ETC___d15496 = rob$deqPort_0_deq_data[425:362] + 64'd4 ; @@ -32019,7 +32019,7 @@ module mkCore(CLK, fetchStage$pipelines_0_first[86:82] : 5'd0 ; assign satp_csr__read__h616417 = { r1__read__h620535, csrf_ppn_reg } ; - assign sbIdx__h158708 = + assign sbIdx__h158709 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[65:64] : @@ -32029,155 +32029,155 @@ module mkCore(CLK, { r1__read__h620319, csrf_scause_code_reg } ; assign scounteren_csr__read__h616076 = { r1__read__h620306, csrf_scounteren_cy_reg } ; - assign sfd__h342901 = { value__h351128, 3'd0 } ; - assign sfd__h358709 = + assign sfd__h342902 = { value__h351129, 3'd0 } ; + assign sfd__h358710 = { 1'b0, - _theResult___fst_exp__h358617 != 8'd0, - sfdin__h358611[56:34] } + + _theResult___fst_exp__h358618 != 8'd0, + sfdin__h358612[56:34] } + 25'd1 ; - assign sfd__h367291 = + assign sfd__h367292 = { 1'b0, - _theResult___fst_exp__h367273 != 8'd0, - _theResult___snd__h367224[56:34] } + + _theResult___fst_exp__h367274 != 8'd0, + _theResult___snd__h367225[56:34] } + 25'd1 ; - assign sfd__h376475 = + assign sfd__h376476 = { 1'b0, - _theResult___fst_exp__h376383 != 8'd0, - sfdin__h376377[56:34] } + + _theResult___fst_exp__h376384 != 8'd0, + sfdin__h376378[56:34] } + 25'd1 ; - assign sfd__h385087 = + assign sfd__h385088 = { 1'b0, - _theResult___fst_exp__h385068 != 8'd0, - _theResult___snd__h385014[56:34] } + + _theResult___fst_exp__h385069 != 8'd0, + _theResult___snd__h385015[56:34] } + 25'd1 ; - assign sfd__h388603 = { value__h396825, 3'd0 } ; - assign sfd__h404406 = + assign sfd__h388604 = { value__h396826, 3'd0 } ; + assign sfd__h404407 = { 1'b0, - _theResult___fst_exp__h404314 != 8'd0, - sfdin__h404308[56:34] } + + _theResult___fst_exp__h404315 != 8'd0, + sfdin__h404309[56:34] } + 25'd1 ; - assign sfd__h412988 = + assign sfd__h412989 = { 1'b0, - _theResult___fst_exp__h412970 != 8'd0, - _theResult___snd__h412921[56:34] } + + _theResult___fst_exp__h412971 != 8'd0, + _theResult___snd__h412922[56:34] } + 25'd1 ; - assign sfd__h422172 = + assign sfd__h422173 = { 1'b0, - _theResult___fst_exp__h422080 != 8'd0, - sfdin__h422074[56:34] } + + _theResult___fst_exp__h422081 != 8'd0, + sfdin__h422075[56:34] } + 25'd1 ; - assign sfd__h430784 = + assign sfd__h430785 = { 1'b0, - _theResult___fst_exp__h430765 != 8'd0, - _theResult___snd__h430711[56:34] } + + _theResult___fst_exp__h430766 != 8'd0, + _theResult___snd__h430712[56:34] } + 25'd1 ; - assign sfd__h434298 = { value__h442520, 3'd0 } ; - assign sfd__h450101 = + assign sfd__h434299 = { value__h442521, 3'd0 } ; + assign sfd__h450102 = { 1'b0, - _theResult___fst_exp__h450009 != 8'd0, - sfdin__h450003[56:34] } + + _theResult___fst_exp__h450010 != 8'd0, + sfdin__h450004[56:34] } + 25'd1 ; - assign sfd__h458683 = + assign sfd__h458684 = { 1'b0, - _theResult___fst_exp__h458665 != 8'd0, - _theResult___snd__h458616[56:34] } + + _theResult___fst_exp__h458666 != 8'd0, + _theResult___snd__h458617[56:34] } + 25'd1 ; - assign sfd__h467867 = + assign sfd__h467868 = { 1'b0, - _theResult___fst_exp__h467775 != 8'd0, - sfdin__h467769[56:34] } + + _theResult___fst_exp__h467776 != 8'd0, + sfdin__h467770[56:34] } + 25'd1 ; - assign sfd__h476479 = + assign sfd__h476480 = { 1'b0, - _theResult___fst_exp__h476460 != 8'd0, - _theResult___snd__h476406[56:34] } + + _theResult___fst_exp__h476461 != 8'd0, + _theResult___snd__h476407[56:34] } + 25'd1 ; - assign sfd__h487431 = { value__h492014, 32'd0 } ; - assign sfd__h506475 = + assign sfd__h487432 = { value__h492015, 32'd0 } ; + assign sfd__h506476 = { 1'b0, - _theResult___fst_exp__h506457 != 11'd0, - _theResult___snd__h506408[56:5] } + + _theResult___fst_exp__h506458 != 11'd0, + _theResult___snd__h506409[56:5] } + 54'd1 ; - assign sfd__h516126 = + assign sfd__h516127 = { 1'b0, - _theResult___fst_exp__h516034 != 11'd0, - sfdin__h516028[56:5] } + + _theResult___fst_exp__h516035 != 11'd0, + sfdin__h516029[56:5] } + 54'd1 ; - assign sfd__h524886 = + assign sfd__h524887 = { 1'b0, - _theResult___fst_exp__h524867 != 11'd0, - _theResult___snd__h524813[56:5] } + + _theResult___fst_exp__h524868 != 11'd0, + _theResult___snd__h524814[56:5] } + 54'd1 ; - assign sfd__h526425 = { value__h530867, 32'd0 } ; - assign sfd__h545328 = + assign sfd__h526426 = { value__h530868, 32'd0 } ; + assign sfd__h545329 = { 1'b0, - _theResult___fst_exp__h545310 != 11'd0, - _theResult___snd__h545261[56:5] } + + _theResult___fst_exp__h545311 != 11'd0, + _theResult___snd__h545262[56:5] } + 54'd1 ; - assign sfd__h554979 = + assign sfd__h554980 = { 1'b0, - _theResult___fst_exp__h554887 != 11'd0, - sfdin__h554881[56:5] } + + _theResult___fst_exp__h554888 != 11'd0, + sfdin__h554882[56:5] } + 54'd1 ; - assign sfd__h563739 = + assign sfd__h563740 = { 1'b0, - _theResult___fst_exp__h563720 != 11'd0, - _theResult___snd__h563666[56:5] } + + _theResult___fst_exp__h563721 != 11'd0, + _theResult___snd__h563667[56:5] } + 54'd1 ; - assign sfd__h565729 = { value__h570171, 32'd0 } ; - assign sfd__h584632 = + assign sfd__h565730 = { value__h570172, 32'd0 } ; + assign sfd__h584633 = { 1'b0, - _theResult___fst_exp__h584614 != 11'd0, - _theResult___snd__h584565[56:5] } + + _theResult___fst_exp__h584615 != 11'd0, + _theResult___snd__h584566[56:5] } + 54'd1 ; - assign sfd__h594283 = + assign sfd__h594284 = { 1'b0, - _theResult___fst_exp__h594191 != 11'd0, - sfdin__h594185[56:5] } + + _theResult___fst_exp__h594192 != 11'd0, + sfdin__h594186[56:5] } + 54'd1 ; - assign sfd__h603043 = + assign sfd__h603044 = { 1'b0, - _theResult___fst_exp__h603024 != 11'd0, - _theResult___snd__h602970[56:5] } + + _theResult___fst_exp__h603025 != 11'd0, + _theResult___snd__h602971[56:5] } + 54'd1 ; - assign sfdin__h358611 = - _theResult____h350506[56] ? - _theResult___snd__h358628 : - _theResult___snd__h358639 ; - assign sfdin__h376377 = - _theResult____h368145[56] ? - _theResult___snd__h376394 : - _theResult___snd__h376405 ; - assign sfdin__h404308 = - _theResult____h396205[56] ? - _theResult___snd__h404325 : - _theResult___snd__h404336 ; - assign sfdin__h422074 = - _theResult____h413842[56] ? - _theResult___snd__h422091 : - _theResult___snd__h422102 ; - assign sfdin__h450003 = - _theResult____h441900[56] ? - _theResult___snd__h450020 : - _theResult___snd__h450031 ; - assign sfdin__h467769 = - _theResult____h459537[56] ? - _theResult___snd__h467786 : - _theResult___snd__h467797 ; - assign sfdin__h516028 = - _theResult____h507798[56] ? - _theResult___snd__h516045 : - _theResult___snd__h516056 ; - assign sfdin__h554881 = - _theResult____h546651[56] ? - _theResult___snd__h554898 : - _theResult___snd__h554909 ; - assign sfdin__h594185 = - _theResult____h585955[56] ? - _theResult___snd__h594202 : - _theResult___snd__h594213 ; - assign shiftData__h184460 = - coreFix_memExe_regToExeQ$first[75:12] << x__h184589 ; + assign sfdin__h358612 = + _theResult____h350507[56] ? + _theResult___snd__h358629 : + _theResult___snd__h358640 ; + assign sfdin__h376378 = + _theResult____h368146[56] ? + _theResult___snd__h376395 : + _theResult___snd__h376406 ; + assign sfdin__h404309 = + _theResult____h396206[56] ? + _theResult___snd__h404326 : + _theResult___snd__h404337 ; + assign sfdin__h422075 = + _theResult____h413843[56] ? + _theResult___snd__h422092 : + _theResult___snd__h422103 ; + assign sfdin__h450004 = + _theResult____h441901[56] ? + _theResult___snd__h450021 : + _theResult___snd__h450032 ; + assign sfdin__h467770 = + _theResult____h459538[56] ? + _theResult___snd__h467787 : + _theResult___snd__h467798 ; + assign sfdin__h516029 = + _theResult____h507799[56] ? + _theResult___snd__h516046 : + _theResult___snd__h516057 ; + assign sfdin__h554882 = + _theResult____h546652[56] ? + _theResult___snd__h554899 : + _theResult___snd__h554910 ; + assign sfdin__h594186 = + _theResult____h585956[56] ? + _theResult___snd__h594203 : + _theResult___snd__h594214 ; + assign shiftData__h184461 = + coreFix_memExe_regToExeQ$first[75:12] << x__h184590 ; assign sie_csr__read__h615980 = { r1__read__h619791, 1'b0 } ; assign sip_csr__read__h616354 = { r1__read__h620325, 1'b0 } ; assign spec_bits__h696596 = specTagManager$currentSpecBits | y__h696609 ; @@ -32186,241 +32186,241 @@ module mkCore(CLK, { r1__read__h620301, csrf_stvec_mode_low_reg } ; assign trap_val__h718389 = commitStage_commitTrap[36] ? 64'd0 : trap_val__h719427 ; - assign tsr_val__h735793 = csrf_tsr_reg ; - assign tvm_val__h735795 = csrf_tvm_reg ; - assign upd__h3993 = + assign tsr_val__h735550 = csrf_tsr_reg ; + assign tvm_val__h735552 = csrf_tvm_reg ; + assign upd__h3994 = WILL_FIRE_RL_commitStage_doCommitSystemInst ? MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 : MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 ; - assign upd__h5310 = n__read__h6759 + 64'd1 ; - assign upd__h6873 = + assign upd__h5311 = n__read__h6760 + 64'd1 ; + assign upd__h6874 = MUX_csrf_mcycle_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign upd__h736290 = + assign upd__h736047 = MUX_csrf_minstret_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign v__h300362 = + assign v__h300363 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3131) ? - v__h300593 : + v__h300594 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP ; - assign v__h300593 = + assign v__h300594 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP + 3'd1 ; - assign v__h303707 = + assign v__h303708 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3238) ? - v__h304225 : + v__h304226 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP ; - assign v__h304225 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; - assign v__h314221 = + assign v__h304226 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; + assign v__h314222 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3409) ? - v__h314452 : + v__h314453 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP ; - assign v__h314452 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; - assign v__h318097 = + assign v__h314453 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; + assign v__h318098 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3505) ? - v__h318328 : + v__h318329 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP ; - assign v__h318328 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; - assign v__h332698 = + assign v__h318329 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; + assign v__h332699 = (coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3734) ? - v__h332929 : + v__h332930 : coreFix_memExe_memRespLdQ_enqP ; - assign v__h332929 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; - assign v__h335923 = + assign v__h332930 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; + assign v__h335924 = (coreFix_memExe_forwardQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_enqReq_lat_1_whas___ETC___d3828) ? - v__h336154 : + v__h336155 : coreFix_memExe_forwardQ_enqP ; - assign v__h336154 = coreFix_memExe_forwardQ_enqP + 1'd1 ; - assign v__h609134 = + assign v__h336155 = coreFix_memExe_forwardQ_enqP + 1'd1 ; + assign v__h609135 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_deqEn$whas ? - v__h609144 : + v__h609145 : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit ; - assign v__h609144 = + assign v__h609145 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit + 2'd1 ; - assign v__h610175 = v__h609134 - 2'd1 ; + assign v__h610176 = v__h609135 - 2'd1 ; assign v__h614197 = sbCons$lazyLookup_1_get[3] ? rf$read_1_rd1 : y_avValue__h615331 ; assign v__h639578 = sbCons$lazyLookup_0_get[3] ? rf$read_0_rd1 : y_avValue__h640559 ; - assign value__h351128 = + assign value__h351129 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] } ; - assign value__h396825 = + assign value__h396826 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] } ; - assign value__h442520 = + assign value__h442521 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] } ; - assign value__h492014 = { 1'b0, f1_exp__h487069 != 8'd0, f1_sfd__h487070 } ; - assign value__h530867 = { 1'b0, f2_exp__h526063 != 8'd0, f2_sfd__h526064 } ; - assign value__h570171 = { 1'b0, f3_exp__h565367 != 8'd0, f3_sfd__h565368 } ; + assign value__h492015 = { 1'b0, f1_exp__h487070 != 8'd0, f1_sfd__h487071 } ; + assign value__h530868 = { 1'b0, f2_exp__h526064 != 8'd0, f2_sfd__h526065 } ; + assign value__h570172 = { 1'b0, f3_exp__h565368 != 8'd0, f3_sfd__h565369 } ; assign vm_mode_reg__read__h620541 = { csrf_vm_mode_sv39_reg, 3'b0 } ; assign w__h653948 = coreFix_globalSpecUpdate_correctSpecTag_0$whas ? result__h654004 : 12'd4095 ; - assign x__h155282 = + assign x__h155283 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[68:64] : coreFix_memExe_reqLdQ_data_0_rl[68:64]) : 5'd0 ; - assign x__h155288 = + assign x__h155289 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqLdQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h158829 = { 3'd0, sbIdx__h158708 } ; - assign x__h158835 = + assign x__h158830 = { 3'd0, sbIdx__h158709 } ; + assign x__h158836 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqStQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h161645 = + assign x__h161646 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[152:148] : coreFix_memExe_reqLrScAmoQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h161649 = + assign x__h161650 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[147:84] : coreFix_memExe_reqLrScAmoQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h163497 = + assign x__h163498 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[70:7] : coreFix_memExe_reqLrScAmoQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h18385 = + assign x__h18386 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[141:78] : mmio_dataReqQ_enqReq_rl[141:78] ; - assign x__h184367 = - sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h183533 ; assign x__h184368 = - sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h184214 ; - assign x__h184589 = { x__h186792[2:0], 3'b0 } ; - assign x__h186792 = + sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h183534 ; + assign x__h184369 = + sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h184215 ; + assign x__h184590 = { x__h186793[2:0], 3'b0 } ; + assign x__h186793 = coreFix_memExe_regToExeQ$first[139:76] + { {32{coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10[31]}}, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10 } ; - assign x__h196616 = + assign x__h196617 = coreFix_memExe_dMem_cache_m_banks_0_processAmo[90] ? - curData__h195853[63:32] : - curData__h195853[31:0] ; - assign x__h20923 = + curData__h195854[63:32] : + curData__h195854[31:0] ; + assign x__h20924 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[63:0] : mmio_dataReqQ_enqReq_rl[63:0] ; - assign x__h291633 = + assign x__h291634 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[152:148] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h291645 = + assign x__h291646 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[147:84] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h293499 = + assign x__h293500 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[70:7] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h306572 = + assign x__h306573 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[2:0] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[2:0] ; - assign x__h342305 = - { (_theResult___exp__h385637 != 8'd255 || - _theResult___sfd__h385638 == 23'd0) && + assign x__h342306 = + { (_theResult___exp__h385638 != 8'd255 || + _theResult___sfd__h385639 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5240, - out_f_exp__h385914, - out_f_sfd__h385915 } ; - assign x__h368855 = - sfd__h342901 << (x__h368888[11] ? 12'hAAA : x__h368888) ; - assign x__h368888 = + out_f_exp__h385915, + out_f_sfd__h385916 } ; + assign x__h368856 = + sfd__h342902 << (x__h368889[11] ? 12'hAAA : x__h368889) ; + assign x__h368889 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4654 ; - assign x__h388007 = - { (_theResult___exp__h431334 != 8'd255 || - _theResult___sfd__h431335 == 23'd0) && + assign x__h388008 = + { (_theResult___exp__h431335 != 8'd255 || + _theResult___sfd__h431336 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6632, - out_f_exp__h431611, - out_f_sfd__h431612 } ; - assign x__h414552 = - sfd__h388603 << (x__h414585[11] ? 12'hAAA : x__h414585) ; - assign x__h414585 = + out_f_exp__h431612, + out_f_sfd__h431613 } ; + assign x__h414553 = + sfd__h388604 << (x__h414586[11] ? 12'hAAA : x__h414586) ; + assign x__h414586 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d6046 ; - assign x__h433702 = - { (_theResult___exp__h477029 != 8'd255 || - _theResult___sfd__h477030 == 23'd0) && + assign x__h433703 = + { (_theResult___exp__h477030 != 8'd255 || + _theResult___sfd__h477031 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8024, - out_f_exp__h477306, - out_f_sfd__h477307 } ; - assign x__h460247 = - sfd__h434298 << (x__h460280[11] ? 12'hAAA : x__h460280) ; - assign x__h460280 = + out_f_exp__h477307, + out_f_sfd__h477308 } ; + assign x__h460248 = + sfd__h434299 << (x__h460281[11] ? 12'hAAA : x__h460281) ; + assign x__h460281 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7438 ; - assign x__h46292 = + assign x__h46293 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[141:78] : mmio_cRqQ_enqReq_rl[141:78] ; - assign x__h486591 = - sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h483730 ; assign x__h486592 = - sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h484413 ; + sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h483731 ; assign x__h486593 = - sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h485090 ; - assign x__h48828 = + sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h484414 ; + assign x__h486594 = + sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h485091 ; + assign x__h48829 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[63:0] : mmio_cRqQ_enqReq_rl[63:0] ; - assign x__h508506 = sfd__h487431 << x__h508539 ; - assign x__h508539 = + assign x__h508507 = sfd__h487432 << x__h508540 ; + assign x__h508540 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8764 ; - assign x__h547359 = sfd__h526425 << x__h547392 ; - assign x__h547392 = + assign x__h547360 = sfd__h526426 << x__h547393 ; + assign x__h547393 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10249 ; - assign x__h586663 = sfd__h565729 << x__h586696 ; - assign x__h586696 = + assign x__h586664 = sfd__h565730 << x__h586697 ; + assign x__h586697 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9479 ; - assign x__h608452 = + assign x__h608453 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___fst__h608463 : - a__h607915 ; - assign x__h608478 = a__h607915[63] ^ b__h607916[63] ; - assign x__h609064 = + _theResult___fst__h608464 : + a__h607916 ; + assign x__h608479 = a__h607916[63] ^ b__h607917[63] ; + assign x__h609065 = (coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_divisorQ$D_OUT == 64'd0) ? { 64'hFFFFFFFFFFFFFFFF, @@ -32455,7 +32455,7 @@ module mkCore(CLK, assign x__h723782 = { commitStage_commitTrap[36], 59'b0, cause_code__h718388 } ; assign x__h731805 = { 1'b0, csrf_spp_reg } ; - assign x__h735673 = + assign x__h735430 = { csrf_fs_reg == 2'b11, 40'd5120, csrf_tsr_reg, @@ -32466,9 +32466,9 @@ module mkCore(CLK, csrf_mprv_reg, 2'd0, csrf_fs_reg, - IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15596 } ; - assign x__h739476 = - { r1__read_BITS_62_TO_14___h739496, + IF_rob_deqPort_0_deq_data__4646_BITS_329_TO_32_ETC___d15602 } ; + assign x__h739233 = + { r1__read_BITS_62_TO_14___h739253, 2'b11, csrf_mpp_reg, 2'b0, @@ -32481,20 +32481,20 @@ module mkCore(CLK, 1'b0, csrf_ie_vec_1, csrf_ie_vec_0 } ; - assign x__h742681 = - { y_avValue_snd_snd_snd_snd_snd_snd_snd__h742663[63:15], + assign x__h742438 = + { y_avValue_snd_snd_snd_snd_snd_snd_snd__h742420[63:15], 2'b11, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h742663[12:0] } ; - assign x__h743491 = - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_deq_ETC___d15982 ? - y_avValue_snd_snd_snd_fst__h743301 : - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d16007 ; - assign x__h76237 = mmio_pRqQ_data_0[31:0] ; - assign x_addr__h318495 = + y_avValue_snd_snd_snd_snd_snd_snd_snd__h742420[12:0] } ; + assign x__h743248 = + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_deq_ETC___d15988 ? + y_avValue_snd_snd_snd_fst__h743058 : + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d16013 ; + assign x__h76238 = mmio_pRqQ_data_0[31:0] ; + assign x_addr__h318496 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[578:515] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[578:515] ; - assign x_data__h66086 = + assign x_data__h66087 = EN_mmioToPlatform_pRq_enq ? mmio_pRqQ_enqReq_lat_0$wget[31:0] : mmio_pRqQ_enqReq_rl[31:0] ; @@ -32509,22 +32509,22 @@ module mkCore(CLK, (rob$deqPort_0_deq_data[329:325] == 5'd19) ? x__h731805 : csrf_mpp_reg ; - assign x_quotient__h479690 = + assign x_quotient__h479691 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[75] ? 64'hFFFFFFFFFFFFFFFF : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[9]) ? - q___1__h480475 : + q___1__h480476 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[203:140]) ; assign x_reg_ifc__read__h615819 = { 63'd0, csrf_stats_module_doStats } ; - assign x_remainder__h479691 = + assign x_remainder__h479692 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[75] ? coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[74:11] : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[8]) ? - r___1__h480502 : + r___1__h480503 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc_respQ$D_OUT[139:76]) ; - assign y__h258550 = + assign y__h258551 = { coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[569:518], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[95:90] } ; assign y__h626401 = coreFix_aluExe_1_regToExeQ$first[176:113] + 64'd4 ; @@ -32540,31 +32540,31 @@ module mkCore(CLK, 1'd1, ~csrf_mideleg_1_0_reg } ; assign y__h696609 = 12'd1 << specTagManager$nextSpecTag ; - assign y__h740368 = + assign y__h740125 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_snd_snd_fst__h740391 : + y_avValue_snd_snd_snd_snd_snd_fst__h740148 : 64'd0 ; - assign y__h743250 = - NOT_rob_deqPort_0_canDeq__5634_5635_OR_rob_deq_ETC___d15982 ? - y_avValue_snd_snd_snd_snd_snd_fst__h743311 : - y__h740368 ; - assign y_avValue__h183533 = + assign y__h743007 = + NOT_rob_deqPort_0_canDeq__5640_5641_OR_rob_deq_ETC___d15988 ? + y_avValue_snd_snd_snd_snd_snd_fst__h743068 : + y__h740125 ; + assign y_avValue__h183534 = NOT_coreFix_memExe_bypassWire_0_whas__585_591__ETC___d1612 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__585_5_ETC___d1680 ; - assign y_avValue__h184214 = + assign y_avValue__h184215 = NOT_coreFix_memExe_bypassWire_0_whas__585_591__ETC___d1641 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__585_5_ETC___d1688 ; - assign y_avValue__h483730 = + assign y_avValue__h483731 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8331 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8458 ; - assign y_avValue__h484413 = + assign y_avValue__h484414 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8360 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8466 ; - assign y_avValue__h485090 = + assign y_avValue__h485091 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8386 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8474 ; @@ -32598,7 +32598,7 @@ module mkCore(CLK, regRenamingTable_rename_0_canRename__3653_AND__ETC___d13675) ? y_avValue_fst__h689798 : specTagManager$currentSpecBits ; - assign y_avValue_fst__h739906 = + assign y_avValue_fst__h739663 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32612,10 +32612,10 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 5'd0 : rob$deqPort_0_deq_data[31:27] ; - assign y_avValue_fst__h743132 = - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d15988 | + assign y_avValue_fst__h742889 = + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d15994 | rob$deqPort_1_deq_data[31:27] ; - assign y_avValue_fst__h743164 = + assign y_avValue_fst__h742921 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32627,8 +32627,8 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d15988 : - y_avValue_fst__h743132 ; + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d15994 : + y_avValue_fst__h742889 ; assign y_avValue_new_pc__h721124 = (csrf_stvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h721348 + { 58'd0, x__h721363 } : @@ -32637,7 +32637,7 @@ module mkCore(CLK, (csrf_mtvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h721368 + { 58'd0, x__h721363 } : base__h721368 ; - assign y_avValue_snd_snd_snd_fst__h740381 = + assign y_avValue_snd_snd_snd_fst__h740138 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32651,7 +32651,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 2'd0 : 2'd1 ; - assign y_avValue_snd_snd_snd_fst__h743301 = + assign y_avValue_snd_snd_snd_fst__h743058 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32663,12 +32663,12 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d16007 : - y_avValue_snd_snd_snd_fst__h743337 ; - assign y_avValue_snd_snd_snd_fst__h743337 = - IF_rob_deqPort_0_canDeq__5634_THEN_IF_NOT_rob__ETC___d16007 + + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d16013 : + y_avValue_snd_snd_snd_fst__h743094 ; + assign y_avValue_snd_snd_snd_fst__h743094 = + IF_rob_deqPort_0_canDeq__5640_THEN_IF_NOT_rob__ETC___d16013 + 2'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h740391 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h740148 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32682,7 +32682,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 64'd0 : 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h743311 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h743068 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32694,10 +32694,10 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - y__h740368 : - y_avValue_snd_snd_snd_snd_snd_fst__h743347 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h743347 = y__h740368 + 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h742663 = x__h739476 ; + y__h740125 : + y_avValue_snd_snd_snd_snd_snd_fst__h743104 ; + assign y_avValue_snd_snd_snd_snd_snd_fst__h743104 = y__h740125 + 64'd1 ; + assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h742420 = x__h739233 ; always@(v_f_to_TV_1$D_OUT) begin case (v_f_to_TV_1$D_OUT[475:464]) @@ -32898,28 +32898,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87]) 3'd0: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - x__h200592 = + x__h200593 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -32935,28 +32935,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP) 3'd0: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_0; 3'd1: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_1; 3'd2: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_2; 3'd3: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_3; 3'd4: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_4; 3'd5: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_5; 3'd6: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_6; 3'd7: - x__h290200 = + x__h290201 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_7; endcase end @@ -32966,10 +32966,10 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - addr__h294421 = + addr__h294422 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[581:518]; 1'd1: - addr__h294421 = + addr__h294422 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[581:518]; endcase end @@ -32978,28 +32978,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91]) 3'd0: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - curData__h195853 = + curData__h195854 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -33022,9 +33022,9 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - x__h295970 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; + x__h295971 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; 1'd1: - x__h295970 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; + x__h295971 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; endcase end always@(f_csr_reqs$D_OUT or @@ -33064,46 +33064,46 @@ module mkCore(CLK, n__read__h617693 or n__read__h617884 or csrf_time_reg) begin case (f_csr_reqs$D_OUT[75:64]) - 12'd1: data_out__h747341 = fflags_csr__read__h615689; - 12'd2: data_out__h747341 = frm_csr__read__h615700; - 12'd3: data_out__h747341 = fcsr_csr__read__h615714; - 12'd256: data_out__h747341 = sstatus_csr__read__h615910; - 12'd260: data_out__h747341 = sie_csr__read__h615980; - 12'd261: data_out__h747341 = stvec_csr__read__h616023; - 12'd262: data_out__h747341 = scounteren_csr__read__h616076; - 12'd320: data_out__h747341 = csrf_sscratch_csr; - 12'd321: data_out__h747341 = csrf_sepc_csr; - 12'd322: data_out__h747341 = scause_csr__read__h616214; - 12'd323: data_out__h747341 = csrf_stval_csr; - 12'd324: data_out__h747341 = sip_csr__read__h616354; - 12'd384: data_out__h747341 = satp_csr__read__h616417; - 12'd768: data_out__h747341 = mstatus_csr__read__h616560; - 12'd769: data_out__h747341 = 64'h800000000014112D; - 12'd770: data_out__h747341 = medeleg_csr__read__h616708; - 12'd771: data_out__h747341 = mideleg_csr__read__h616803; - 12'd772: data_out__h747341 = mie_csr__read__h616927; - 12'd773: data_out__h747341 = mtvec_csr__read__h617009; - 12'd774: data_out__h747341 = mcounteren_csr__read__h617101; - 12'd832: data_out__h747341 = csrf_mscratch_csr; - 12'd833: data_out__h747341 = csrf_mepc_csr; - 12'd834: data_out__h747341 = mcause_csr__read__h617356; - 12'd835: data_out__h747341 = csrf_mtval_csr; - 12'd836: data_out__h747341 = mip_csr__read__h617589; - 12'd1952: data_out__h747341 = csrf_rg_tselect; - 12'd1953: data_out__h747341 = rg_tdata1__read__h618544; - 12'd1954: data_out__h747341 = csrf_rg_tdata2; - 12'd1955: data_out__h747341 = csrf_rg_tdata3; - 12'd1968: data_out__h747341 = csrf_rg_dcsr; - 12'd1969: data_out__h747341 = csrf_rg_dpc; - 12'd1970: data_out__h747341 = csrf_rg_dscratch0; - 12'd1971: data_out__h747341 = csrf_rg_dscratch1; + 12'd1: data_out__h747098 = fflags_csr__read__h615689; + 12'd2: data_out__h747098 = frm_csr__read__h615700; + 12'd3: data_out__h747098 = fcsr_csr__read__h615714; + 12'd256: data_out__h747098 = sstatus_csr__read__h615910; + 12'd260: data_out__h747098 = sie_csr__read__h615980; + 12'd261: data_out__h747098 = stvec_csr__read__h616023; + 12'd262: data_out__h747098 = scounteren_csr__read__h616076; + 12'd320: data_out__h747098 = csrf_sscratch_csr; + 12'd321: data_out__h747098 = csrf_sepc_csr; + 12'd322: data_out__h747098 = scause_csr__read__h616214; + 12'd323: data_out__h747098 = csrf_stval_csr; + 12'd324: data_out__h747098 = sip_csr__read__h616354; + 12'd384: data_out__h747098 = satp_csr__read__h616417; + 12'd768: data_out__h747098 = mstatus_csr__read__h616560; + 12'd769: data_out__h747098 = 64'h800000000014112D; + 12'd770: data_out__h747098 = medeleg_csr__read__h616708; + 12'd771: data_out__h747098 = mideleg_csr__read__h616803; + 12'd772: data_out__h747098 = mie_csr__read__h616927; + 12'd773: data_out__h747098 = mtvec_csr__read__h617009; + 12'd774: data_out__h747098 = mcounteren_csr__read__h617101; + 12'd832: data_out__h747098 = csrf_mscratch_csr; + 12'd833: data_out__h747098 = csrf_mepc_csr; + 12'd834: data_out__h747098 = mcause_csr__read__h617356; + 12'd835: data_out__h747098 = csrf_mtval_csr; + 12'd836: data_out__h747098 = mip_csr__read__h617589; + 12'd1952: data_out__h747098 = csrf_rg_tselect; + 12'd1953: data_out__h747098 = rg_tdata1__read__h618544; + 12'd1954: data_out__h747098 = csrf_rg_tdata2; + 12'd1955: data_out__h747098 = csrf_rg_tdata3; + 12'd1968: data_out__h747098 = csrf_rg_dcsr; + 12'd1969: data_out__h747098 = csrf_rg_dpc; + 12'd1970: data_out__h747098 = csrf_rg_dscratch0; + 12'd1971: data_out__h747098 = csrf_rg_dscratch1; 12'd2048, 12'd3857, 12'd3858, 12'd3859, 12'd3860: - data_out__h747341 = 64'd0; - 12'd2049: data_out__h747341 = x_reg_ifc__read__h615819; - 12'd2816, 12'd3072: data_out__h747341 = n__read__h617693; - 12'd2818, 12'd3074: data_out__h747341 = n__read__h617884; - 12'd3073: data_out__h747341 = csrf_time_reg; - default: data_out__h747341 = 64'b0; + data_out__h747098 = 64'd0; + 12'd2049: data_out__h747098 = x_reg_ifc__read__h615819; + 12'd2816, 12'd3072: data_out__h747098 = n__read__h617693; + 12'd2818, 12'd3074: data_out__h747098 = n__read__h617884; + 12'd3073: data_out__h747098 = csrf_time_reg; + default: data_out__h747098 = 64'b0; endcase end always@(coreFix_aluExe_1_dispToRegQ$first or @@ -33268,114 +33268,114 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h350488 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h350489 = 8'd255; 3'd2: - _theResult___fst_exp__h350488 = + _theResult___fst_exp__h350489 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h350488 = + _theResult___fst_exp__h350489 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h350488 = 8'd254; - default: _theResult___fst_exp__h350488 = 8'd0; + 3'd4: _theResult___fst_exp__h350489 = 8'd254; + default: _theResult___fst_exp__h350489 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h350489 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h350490 = 23'd0; 3'd2: - _theResult___fst_sfd__h350489 = + _theResult___fst_sfd__h350490 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h350489 = + _theResult___fst_sfd__h350490 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h350489 = 23'd8388607; - default: _theResult___fst_sfd__h350489 = 23'd0; + 3'd4: _theResult___fst_sfd__h350490 = 23'd8388607; + default: _theResult___fst_sfd__h350490 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h396187 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h396188 = 8'd255; 3'd2: - _theResult___fst_exp__h396187 = + _theResult___fst_exp__h396188 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h396187 = + _theResult___fst_exp__h396188 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h396187 = 8'd254; - default: _theResult___fst_exp__h396187 = 8'd0; + 3'd4: _theResult___fst_exp__h396188 = 8'd254; + default: _theResult___fst_exp__h396188 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h396188 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h396189 = 23'd0; 3'd2: - _theResult___fst_sfd__h396188 = + _theResult___fst_sfd__h396189 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h396188 = + _theResult___fst_sfd__h396189 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h396188 = 23'd8388607; - default: _theResult___fst_sfd__h396188 = 23'd0; + 3'd4: _theResult___fst_sfd__h396189 = 23'd8388607; + default: _theResult___fst_sfd__h396189 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h441882 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h441883 = 8'd255; 3'd2: - _theResult___fst_exp__h441882 = + _theResult___fst_exp__h441883 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h441882 = + _theResult___fst_exp__h441883 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h441882 = 8'd254; - default: _theResult___fst_exp__h441882 = 8'd0; + 3'd4: _theResult___fst_exp__h441883 = 8'd254; + default: _theResult___fst_exp__h441883 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h441883 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h441884 = 23'd0; 3'd2: - _theResult___fst_sfd__h441883 = + _theResult___fst_sfd__h441884 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h441883 = + _theResult___fst_sfd__h441884 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h441883 = 23'd8388607; - default: _theResult___fst_sfd__h441883 = 23'd0; + 3'd4: _theResult___fst_sfd__h441884 = 23'd8388607; + default: _theResult___fst_sfd__h441884 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first) @@ -33763,446 +33763,446 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[194:131]; endcase end - always@(guard__h359225 or - _theResult___fst_exp__h367273 or - out_exp__h367718 or _theResult___exp__h367715) + always@(guard__h359226 or + _theResult___fst_exp__h367274 or + out_exp__h367719 or _theResult___exp__h367716) begin - case (guard__h359225) + case (guard__h359226) 2'b0, 2'b01: - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33 = - _theResult___fst_exp__h367273; + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33 = + _theResult___fst_exp__h367274; 2'b10: - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33 = - out_exp__h367718; + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33 = + out_exp__h367719; 2'b11: - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33 = - _theResult___exp__h367715; + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33 = + _theResult___exp__h367716; endcase end - always@(guard__h359225 or - _theResult___fst_exp__h367273 or _theResult___exp__h367715) + always@(guard__h359226 or + _theResult___fst_exp__h367274 or _theResult___exp__h367716) begin - case (guard__h359225) + case (guard__h359226) 2'b0: - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q34 = - _theResult___fst_exp__h367273; + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q34 = + _theResult___fst_exp__h367274; 2'b01, 2'b10, 2'b11: - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q34 = - _theResult___exp__h367715; + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q34 = + _theResult___exp__h367716; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33 or - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q34 or + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33 or + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q34 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4632 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4634 or - _theResult___fst_exp__h367273) + _theResult___fst_exp__h367274) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h367793 = - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q33; + _theResult___fst_exp__h367794 = + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q33; 3'd1: - _theResult___fst_exp__h367793 = - CASE_guard59225_0b0_theResult___fst_exp67273_0_ETC__q34; + _theResult___fst_exp__h367794 = + CASE_guard59226_0b0_theResult___fst_exp67274_0_ETC__q34; 3'd2: - _theResult___fst_exp__h367793 = + _theResult___fst_exp__h367794 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4632; 3'd3: - _theResult___fst_exp__h367793 = + _theResult___fst_exp__h367794 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4634; - 3'd4: _theResult___fst_exp__h367793 = _theResult___fst_exp__h367273; - default: _theResult___fst_exp__h367793 = 8'd0; + 3'd4: _theResult___fst_exp__h367794 = _theResult___fst_exp__h367274; + default: _theResult___fst_exp__h367794 = 8'd0; endcase end - always@(guard__h350516 or - _theResult___fst_exp__h358617 or - out_exp__h359136 or _theResult___exp__h359133) + always@(guard__h350517 or + _theResult___fst_exp__h358618 or + out_exp__h359137 or _theResult___exp__h359134) begin - case (guard__h350516) + case (guard__h350517) 2'b0, 2'b01: - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35 = - _theResult___fst_exp__h358617; + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35 = + _theResult___fst_exp__h358618; 2'b10: - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35 = - out_exp__h359136; + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35 = + out_exp__h359137; 2'b11: - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35 = - _theResult___exp__h359133; + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35 = + _theResult___exp__h359134; endcase end - always@(guard__h350516 or - _theResult___fst_exp__h358617 or _theResult___exp__h359133) + always@(guard__h350517 or + _theResult___fst_exp__h358618 or _theResult___exp__h359134) begin - case (guard__h350516) + case (guard__h350517) 2'b0: - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q36 = - _theResult___fst_exp__h358617; + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q36 = + _theResult___fst_exp__h358618; 2'b01, 2'b10, 2'b11: - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q36 = - _theResult___exp__h359133; + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q36 = + _theResult___exp__h359134; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35 or - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q36 or + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35 or + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q36 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4410 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4413 or - _theResult___fst_exp__h358617) + _theResult___fst_exp__h358618) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h359211 = - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q35; + _theResult___fst_exp__h359212 = + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q35; 3'd1: - _theResult___fst_exp__h359211 = - CASE_guard50516_0b0_theResult___fst_exp58617_0_ETC__q36; + _theResult___fst_exp__h359212 = + CASE_guard50517_0b0_theResult___fst_exp58618_0_ETC__q36; 3'd2: - _theResult___fst_exp__h359211 = + _theResult___fst_exp__h359212 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4410; 3'd3: - _theResult___fst_exp__h359211 = + _theResult___fst_exp__h359212 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4413; - 3'd4: _theResult___fst_exp__h359211 = _theResult___fst_exp__h358617; - default: _theResult___fst_exp__h359211 = 8'd0; + 3'd4: _theResult___fst_exp__h359212 = _theResult___fst_exp__h358618; + default: _theResult___fst_exp__h359212 = 8'd0; endcase end - always@(guard__h368155 or - _theResult___fst_exp__h376383 or - out_exp__h376902 or _theResult___exp__h376899) + always@(guard__h368156 or + _theResult___fst_exp__h376384 or + out_exp__h376903 or _theResult___exp__h376900) begin - case (guard__h368155) + case (guard__h368156) 2'b0, 2'b01: - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41 = - _theResult___fst_exp__h376383; + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41 = + _theResult___fst_exp__h376384; 2'b10: - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41 = - out_exp__h376902; + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41 = + out_exp__h376903; 2'b11: - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41 = - _theResult___exp__h376899; + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41 = + _theResult___exp__h376900; endcase end - always@(guard__h368155 or - _theResult___fst_exp__h376383 or _theResult___exp__h376899) + always@(guard__h368156 or + _theResult___fst_exp__h376384 or _theResult___exp__h376900) begin - case (guard__h368155) + case (guard__h368156) 2'b0: - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q42 = - _theResult___fst_exp__h376383; + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q42 = + _theResult___fst_exp__h376384; 2'b01, 2'b10, 2'b11: - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q42 = - _theResult___exp__h376899; + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q42 = + _theResult___exp__h376900; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41 or - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q42 or + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41 or + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q42 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4957 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4959 or - _theResult___fst_exp__h376383) + _theResult___fst_exp__h376384) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h376977 = - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q41; + _theResult___fst_exp__h376978 = + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q41; 3'd1: - _theResult___fst_exp__h376977 = - CASE_guard68155_0b0_theResult___fst_exp76383_0_ETC__q42; + _theResult___fst_exp__h376978 = + CASE_guard68156_0b0_theResult___fst_exp76384_0_ETC__q42; 3'd2: - _theResult___fst_exp__h376977 = + _theResult___fst_exp__h376978 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4957; 3'd3: - _theResult___fst_exp__h376977 = + _theResult___fst_exp__h376978 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4959; - 3'd4: _theResult___fst_exp__h376977 = _theResult___fst_exp__h376383; - default: _theResult___fst_exp__h376977 = 8'd0; + 3'd4: _theResult___fst_exp__h376978 = _theResult___fst_exp__h376384; + default: _theResult___fst_exp__h376978 = 8'd0; endcase end - always@(guard__h376991 or - _theResult___fst_exp__h385068 or - out_exp__h385538 or _theResult___exp__h385535) + always@(guard__h376992 or + _theResult___fst_exp__h385069 or + out_exp__h385539 or _theResult___exp__h385536) begin - case (guard__h376991) + case (guard__h376992) 2'b0, 2'b01: - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46 = - _theResult___fst_exp__h385068; + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46 = + _theResult___fst_exp__h385069; 2'b10: - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46 = - out_exp__h385538; + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46 = + out_exp__h385539; 2'b11: - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46 = - _theResult___exp__h385535; + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46 = + _theResult___exp__h385536; endcase end - always@(guard__h376991 or - _theResult___fst_exp__h385068 or _theResult___exp__h385535) + always@(guard__h376992 or + _theResult___fst_exp__h385069 or _theResult___exp__h385536) begin - case (guard__h376991) + case (guard__h376992) 2'b0: - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q47 = - _theResult___fst_exp__h385068; + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q47 = + _theResult___fst_exp__h385069; 2'b01, 2'b10, 2'b11: - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q47 = - _theResult___exp__h385535; + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q47 = + _theResult___exp__h385536; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46 or - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q47 or + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46 or + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q47 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5026 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5028 or - _theResult___fst_exp__h385068) + _theResult___fst_exp__h385069) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h385613 = - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q46; + _theResult___fst_exp__h385614 = + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q46; 3'd1: - _theResult___fst_exp__h385613 = - CASE_guard76991_0b0_theResult___fst_exp85068_0_ETC__q47; + _theResult___fst_exp__h385614 = + CASE_guard76992_0b0_theResult___fst_exp85069_0_ETC__q47; 3'd2: - _theResult___fst_exp__h385613 = + _theResult___fst_exp__h385614 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5026; 3'd3: - _theResult___fst_exp__h385613 = + _theResult___fst_exp__h385614 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5028; - 3'd4: _theResult___fst_exp__h385613 = _theResult___fst_exp__h385068; - default: _theResult___fst_exp__h385613 = 8'd0; + 3'd4: _theResult___fst_exp__h385614 = _theResult___fst_exp__h385069; + default: _theResult___fst_exp__h385614 = 8'd0; endcase end - always@(guard__h359225 or - _theResult___snd__h367224 or - out_sfd__h367719 or _theResult___sfd__h367716) + always@(guard__h359226 or + _theResult___snd__h367225 or + out_sfd__h367720 or _theResult___sfd__h367717) begin - case (guard__h359225) + case (guard__h359226) 2'b0, 2'b01: - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48 = - _theResult___snd__h367224[56:34]; + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48 = + _theResult___snd__h367225[56:34]; 2'b10: - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48 = - out_sfd__h367719; + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48 = + out_sfd__h367720; 2'b11: - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48 = - _theResult___sfd__h367716; + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48 = + _theResult___sfd__h367717; endcase end - always@(guard__h359225 or - _theResult___snd__h367224 or _theResult___sfd__h367716) + always@(guard__h359226 or + _theResult___snd__h367225 or _theResult___sfd__h367717) begin - case (guard__h359225) + case (guard__h359226) 2'b0: - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q49 = - _theResult___snd__h367224[56:34]; + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q49 = + _theResult___snd__h367225[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q49 = - _theResult___sfd__h367716; + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q49 = + _theResult___sfd__h367717; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48 or - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q49 or + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48 or + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q49 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5076 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5078 or - _theResult___snd__h367224) + _theResult___snd__h367225) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h367794 = - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q48; + _theResult___fst_sfd__h367795 = + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q48; 3'd1: - _theResult___fst_sfd__h367794 = - CASE_guard59225_0b0_theResult___snd67224_BITS__ETC__q49; + _theResult___fst_sfd__h367795 = + CASE_guard59226_0b0_theResult___snd67225_BITS__ETC__q49; 3'd2: - _theResult___fst_sfd__h367794 = + _theResult___fst_sfd__h367795 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5076; 3'd3: - _theResult___fst_sfd__h367794 = + _theResult___fst_sfd__h367795 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5078; - 3'd4: _theResult___fst_sfd__h367794 = _theResult___snd__h367224[56:34]; - default: _theResult___fst_sfd__h367794 = 23'd0; + 3'd4: _theResult___fst_sfd__h367795 = _theResult___snd__h367225[56:34]; + default: _theResult___fst_sfd__h367795 = 23'd0; endcase end - always@(guard__h350516 or - sfdin__h358611 or out_sfd__h359137 or _theResult___sfd__h359134) + always@(guard__h350517 or + sfdin__h358612 or out_sfd__h359138 or _theResult___sfd__h359135) begin - case (guard__h350516) + case (guard__h350517) 2'b0, 2'b01: - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50 = - sfdin__h358611[56:34]; + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50 = + sfdin__h358612[56:34]; 2'b10: - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50 = - out_sfd__h359137; + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50 = + out_sfd__h359138; 2'b11: - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50 = - _theResult___sfd__h359134; + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50 = + _theResult___sfd__h359135; endcase end - always@(guard__h350516 or sfdin__h358611 or _theResult___sfd__h359134) + always@(guard__h350517 or sfdin__h358612 or _theResult___sfd__h359135) begin - case (guard__h350516) + case (guard__h350517) 2'b0: - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q51 = - sfdin__h358611[56:34]; + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q51 = + sfdin__h358612[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q51 = - _theResult___sfd__h359134; + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q51 = + _theResult___sfd__h359135; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50 or - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q51 or + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50 or + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q51 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5057 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5059 or - sfdin__h358611) + sfdin__h358612) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h359212 = - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q50; + _theResult___fst_sfd__h359213 = + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q50; 3'd1: - _theResult___fst_sfd__h359212 = - CASE_guard50516_0b0_sfdin58611_BITS_56_TO_34_0_ETC__q51; + _theResult___fst_sfd__h359213 = + CASE_guard50517_0b0_sfdin58612_BITS_56_TO_34_0_ETC__q51; 3'd2: - _theResult___fst_sfd__h359212 = + _theResult___fst_sfd__h359213 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5057; 3'd3: - _theResult___fst_sfd__h359212 = + _theResult___fst_sfd__h359213 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5059; - 3'd4: _theResult___fst_sfd__h359212 = sfdin__h358611[56:34]; - default: _theResult___fst_sfd__h359212 = 23'd0; + 3'd4: _theResult___fst_sfd__h359213 = sfdin__h358612[56:34]; + default: _theResult___fst_sfd__h359213 = 23'd0; endcase end - always@(guard__h368155 or - sfdin__h376377 or out_sfd__h376903 or _theResult___sfd__h376900) + always@(guard__h368156 or + sfdin__h376378 or out_sfd__h376904 or _theResult___sfd__h376901) begin - case (guard__h368155) + case (guard__h368156) 2'b0, 2'b01: - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52 = - sfdin__h376377[56:34]; + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52 = + sfdin__h376378[56:34]; 2'b10: - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52 = - out_sfd__h376903; + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52 = + out_sfd__h376904; 2'b11: - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52 = - _theResult___sfd__h376900; + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52 = + _theResult___sfd__h376901; endcase end - always@(guard__h368155 or sfdin__h376377 or _theResult___sfd__h376900) + always@(guard__h368156 or sfdin__h376378 or _theResult___sfd__h376901) begin - case (guard__h368155) + case (guard__h368156) 2'b0: - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q53 = - sfdin__h376377[56:34]; + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q53 = + sfdin__h376378[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q53 = - _theResult___sfd__h376900; + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q53 = + _theResult___sfd__h376901; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52 or - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q53 or + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52 or + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q53 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5103 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5105 or - sfdin__h376377) + sfdin__h376378) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h376978 = - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q52; + _theResult___fst_sfd__h376979 = + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q52; 3'd1: - _theResult___fst_sfd__h376978 = - CASE_guard68155_0b0_sfdin76377_BITS_56_TO_34_0_ETC__q53; + _theResult___fst_sfd__h376979 = + CASE_guard68156_0b0_sfdin76378_BITS_56_TO_34_0_ETC__q53; 3'd2: - _theResult___fst_sfd__h376978 = + _theResult___fst_sfd__h376979 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5103; 3'd3: - _theResult___fst_sfd__h376978 = + _theResult___fst_sfd__h376979 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5105; - 3'd4: _theResult___fst_sfd__h376978 = sfdin__h376377[56:34]; - default: _theResult___fst_sfd__h376978 = 23'd0; + 3'd4: _theResult___fst_sfd__h376979 = sfdin__h376378[56:34]; + default: _theResult___fst_sfd__h376979 = 23'd0; endcase end - always@(guard__h376991 or - _theResult___snd__h385014 or - out_sfd__h385539 or _theResult___sfd__h385536) + always@(guard__h376992 or + _theResult___snd__h385015 or + out_sfd__h385540 or _theResult___sfd__h385537) begin - case (guard__h376991) + case (guard__h376992) 2'b0, 2'b01: - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54 = - _theResult___snd__h385014[56:34]; + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54 = + _theResult___snd__h385015[56:34]; 2'b10: - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54 = - out_sfd__h385539; + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54 = + out_sfd__h385540; 2'b11: - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54 = - _theResult___sfd__h385536; + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54 = + _theResult___sfd__h385537; endcase end - always@(guard__h376991 or - _theResult___snd__h385014 or _theResult___sfd__h385536) + always@(guard__h376992 or + _theResult___snd__h385015 or _theResult___sfd__h385537) begin - case (guard__h376991) + case (guard__h376992) 2'b0: - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q55 = - _theResult___snd__h385014[56:34]; + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q55 = + _theResult___snd__h385015[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q55 = - _theResult___sfd__h385536; + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q55 = + _theResult___sfd__h385537; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54 or - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q55 or + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54 or + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q55 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5122 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5124 or - _theResult___snd__h385014) + _theResult___snd__h385015) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h385614 = - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q54; + _theResult___fst_sfd__h385615 = + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q54; 3'd1: - _theResult___fst_sfd__h385614 = - CASE_guard76991_0b0_theResult___snd85014_BITS__ETC__q55; + _theResult___fst_sfd__h385615 = + CASE_guard76992_0b0_theResult___snd85015_BITS__ETC__q55; 3'd2: - _theResult___fst_sfd__h385614 = + _theResult___fst_sfd__h385615 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5122; 3'd3: - _theResult___fst_sfd__h385614 = + _theResult___fst_sfd__h385615 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5124; - 3'd4: _theResult___fst_sfd__h385614 = _theResult___snd__h385014[56:34]; - default: _theResult___fst_sfd__h385614 = 23'd0; + 3'd4: _theResult___fst_sfd__h385615 = _theResult___snd__h385015[56:34]; + default: _theResult___fst_sfd__h385615 = 23'd0; endcase end - always@(guard__h350516 or + always@(guard__h350517 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h350516) + case (guard__h350517) 2'b0, 2'b01, 2'b10: - CASE_guard50516_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 = + CASE_guard50517_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard50516_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 = - guard__h350516 == 2'b11 && + CASE_guard50517_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 = + guard__h350517 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard50516_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 or - guard__h350516) + CASE_guard50517_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56 or + guard__h350517) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5210 = - CASE_guard50516_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56; + CASE_guard50517_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q56; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5210 = - (guard__h350516 == 2'b0) ? + (guard__h350517 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h350516 == 2'b01 || guard__h350516 == 2'b10 || - guard__h350516 == 2'b11) && + (guard__h350517 == 2'b01 || guard__h350517 == 2'b10 || + guard__h350517 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5210 = @@ -34213,34 +34213,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h350516 or + always@(guard__h350517 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h350516) + case (guard__h350517) 2'b0, 2'b01, 2'b10: - CASE_guard50516_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 = + CASE_guard50517_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard50516_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 = - guard__h350516 != 2'b11 || + CASE_guard50517_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 = + guard__h350517 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard50516_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 or - guard__h350516) + CASE_guard50517_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57 or + guard__h350517) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5154 = - CASE_guard50516_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57; + CASE_guard50517_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q57; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5154 = - (guard__h350516 == 2'b0) ? + (guard__h350517 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h350516 != 2'b01 && guard__h350516 != 2'b10 && - guard__h350516 != 2'b11 || + guard__h350517 != 2'b01 && guard__h350517 != 2'b10 && + guard__h350517 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5154 = @@ -34251,34 +34251,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h359225 or + always@(guard__h359226 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h359225) + case (guard__h359226) 2'b0, 2'b01, 2'b10: - CASE_guard59225_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 = + CASE_guard59226_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard59225_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 = - guard__h359225 == 2'b11 && + CASE_guard59226_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 = + guard__h359226 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard59225_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 or - guard__h359225) + CASE_guard59226_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58 or + guard__h359226) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5217 = - CASE_guard59225_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58; + CASE_guard59226_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q58; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5217 = - (guard__h359225 == 2'b0) ? + (guard__h359226 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h359225 == 2'b01 || guard__h359225 == 2'b10 || - guard__h359225 == 2'b11) && + (guard__h359226 == 2'b01 || guard__h359226 == 2'b10 || + guard__h359226 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5217 = @@ -34289,34 +34289,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h359225 or + always@(guard__h359226 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h359225) + case (guard__h359226) 2'b0, 2'b01, 2'b10: - CASE_guard59225_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 = + CASE_guard59226_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard59225_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 = - guard__h359225 != 2'b11 || + CASE_guard59226_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 = + guard__h359226 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard59225_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 or - guard__h359225) + CASE_guard59226_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59 or + guard__h359226) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5167 = - CASE_guard59225_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59; + CASE_guard59226_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q59; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5167 = - (guard__h359225 == 2'b0) ? + (guard__h359226 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h359225 != 2'b01 && guard__h359225 != 2'b10 && - guard__h359225 != 2'b11 || + guard__h359226 != 2'b01 && guard__h359226 != 2'b10 && + guard__h359226 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5167 = @@ -34327,34 +34327,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h368155 or + always@(guard__h368156 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h368155) + case (guard__h368156) 2'b0, 2'b01, 2'b10: - CASE_guard68155_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 = + CASE_guard68156_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard68155_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 = - guard__h368155 == 2'b11 && + CASE_guard68156_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 = + guard__h368156 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard68155_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 or - guard__h368155) + CASE_guard68156_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60 or + guard__h368156) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5227 = - CASE_guard68155_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60; + CASE_guard68156_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q60; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5227 = - (guard__h368155 == 2'b0) ? + (guard__h368156 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h368155 == 2'b01 || guard__h368155 == 2'b10 || - guard__h368155 == 2'b11) && + (guard__h368156 == 2'b01 || guard__h368156 == 2'b10 || + guard__h368156 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5227 = @@ -34365,34 +34365,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h368155 or + always@(guard__h368156 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h368155) + case (guard__h368156) 2'b0, 2'b01, 2'b10: - CASE_guard68155_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 = + CASE_guard68156_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard68155_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 = - guard__h368155 != 2'b11 || + CASE_guard68156_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 = + guard__h368156 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard68155_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 or - guard__h368155) + CASE_guard68156_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61 or + guard__h368156) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5184 = - CASE_guard68155_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61; + CASE_guard68156_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q61; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5184 = - (guard__h368155 == 2'b0) ? + (guard__h368156 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h368155 != 2'b01 && guard__h368155 != 2'b10 && - guard__h368155 != 2'b11 || + guard__h368156 != 2'b01 && guard__h368156 != 2'b10 && + guard__h368156 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5184 = @@ -34403,34 +34403,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h376991 or + always@(guard__h376992 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h376991) + case (guard__h376992) 2'b0, 2'b01, 2'b10: - CASE_guard76991_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 = + CASE_guard76992_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard76991_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 = - guard__h376991 == 2'b11 && + CASE_guard76992_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 = + guard__h376992 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard76991_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 or - guard__h376991) + CASE_guard76992_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62 or + guard__h376992) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5234 = - CASE_guard76991_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62; + CASE_guard76992_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q62; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5234 = - (guard__h376991 == 2'b0) ? + (guard__h376992 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h376991 == 2'b01 || guard__h376991 == 2'b10 || - guard__h376991 == 2'b11) && + (guard__h376992 == 2'b01 || guard__h376992 == 2'b10 || + guard__h376992 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5234 = @@ -34441,34 +34441,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h376991 or + always@(guard__h376992 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h376991) + case (guard__h376992) 2'b0, 2'b01, 2'b10: - CASE_guard76991_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 = + CASE_guard76992_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard76991_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 = - guard__h376991 != 2'b11 || + CASE_guard76992_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 = + guard__h376992 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard76991_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 or - guard__h376991) + CASE_guard76992_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63 or + guard__h376992) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5197 = - CASE_guard76991_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63; + CASE_guard76992_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q63; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5197 = - (guard__h376991 == 2'b0) ? + (guard__h376992 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h376991 != 2'b01 && guard__h376991 != 2'b10 && - guard__h376991 != 2'b11 || + guard__h376992 != 2'b01 && guard__h376992 != 2'b10 && + guard__h376992 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5197 = @@ -34505,446 +34505,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h404922 or - _theResult___fst_exp__h412970 or - out_exp__h413415 or _theResult___exp__h413412) + always@(guard__h404923 or + _theResult___fst_exp__h412971 or + out_exp__h413416 or _theResult___exp__h413413) begin - case (guard__h404922) + case (guard__h404923) 2'b0, 2'b01: - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68 = - _theResult___fst_exp__h412970; + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68 = + _theResult___fst_exp__h412971; 2'b10: - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68 = - out_exp__h413415; + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68 = + out_exp__h413416; 2'b11: - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68 = - _theResult___exp__h413412; + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68 = + _theResult___exp__h413413; endcase end - always@(guard__h404922 or - _theResult___fst_exp__h412970 or _theResult___exp__h413412) + always@(guard__h404923 or + _theResult___fst_exp__h412971 or _theResult___exp__h413413) begin - case (guard__h404922) + case (guard__h404923) 2'b0: - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q69 = - _theResult___fst_exp__h412970; + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q69 = + _theResult___fst_exp__h412971; 2'b01, 2'b10, 2'b11: - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q69 = - _theResult___exp__h413412; + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q69 = + _theResult___exp__h413413; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68 or - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q69 or + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68 or + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q69 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6024 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6026 or - _theResult___fst_exp__h412970) + _theResult___fst_exp__h412971) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h413490 = - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q68; + _theResult___fst_exp__h413491 = + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q68; 3'd1: - _theResult___fst_exp__h413490 = - CASE_guard04922_0b0_theResult___fst_exp12970_0_ETC__q69; + _theResult___fst_exp__h413491 = + CASE_guard04923_0b0_theResult___fst_exp12971_0_ETC__q69; 3'd2: - _theResult___fst_exp__h413490 = + _theResult___fst_exp__h413491 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6024; 3'd3: - _theResult___fst_exp__h413490 = + _theResult___fst_exp__h413491 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6026; - 3'd4: _theResult___fst_exp__h413490 = _theResult___fst_exp__h412970; - default: _theResult___fst_exp__h413490 = 8'd0; + 3'd4: _theResult___fst_exp__h413491 = _theResult___fst_exp__h412971; + default: _theResult___fst_exp__h413491 = 8'd0; endcase end - always@(guard__h396215 or - _theResult___fst_exp__h404314 or - out_exp__h404833 or _theResult___exp__h404830) + always@(guard__h396216 or + _theResult___fst_exp__h404315 or + out_exp__h404834 or _theResult___exp__h404831) begin - case (guard__h396215) + case (guard__h396216) 2'b0, 2'b01: - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70 = - _theResult___fst_exp__h404314; + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70 = + _theResult___fst_exp__h404315; 2'b10: - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70 = - out_exp__h404833; + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70 = + out_exp__h404834; 2'b11: - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70 = - _theResult___exp__h404830; + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70 = + _theResult___exp__h404831; endcase end - always@(guard__h396215 or - _theResult___fst_exp__h404314 or _theResult___exp__h404830) + always@(guard__h396216 or + _theResult___fst_exp__h404315 or _theResult___exp__h404831) begin - case (guard__h396215) + case (guard__h396216) 2'b0: - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q71 = - _theResult___fst_exp__h404314; + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q71 = + _theResult___fst_exp__h404315; 2'b01, 2'b10, 2'b11: - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q71 = - _theResult___exp__h404830; + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q71 = + _theResult___exp__h404831; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70 or - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q71 or + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70 or + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q71 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5802 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5805 or - _theResult___fst_exp__h404314) + _theResult___fst_exp__h404315) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h404908 = - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q70; + _theResult___fst_exp__h404909 = + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q70; 3'd1: - _theResult___fst_exp__h404908 = - CASE_guard96215_0b0_theResult___fst_exp04314_0_ETC__q71; + _theResult___fst_exp__h404909 = + CASE_guard96216_0b0_theResult___fst_exp04315_0_ETC__q71; 3'd2: - _theResult___fst_exp__h404908 = + _theResult___fst_exp__h404909 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5802; 3'd3: - _theResult___fst_exp__h404908 = + _theResult___fst_exp__h404909 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5805; - 3'd4: _theResult___fst_exp__h404908 = _theResult___fst_exp__h404314; - default: _theResult___fst_exp__h404908 = 8'd0; + 3'd4: _theResult___fst_exp__h404909 = _theResult___fst_exp__h404315; + default: _theResult___fst_exp__h404909 = 8'd0; endcase end - always@(guard__h413852 or - _theResult___fst_exp__h422080 or - out_exp__h422599 or _theResult___exp__h422596) + always@(guard__h413853 or + _theResult___fst_exp__h422081 or + out_exp__h422600 or _theResult___exp__h422597) begin - case (guard__h413852) + case (guard__h413853) 2'b0, 2'b01: - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76 = - _theResult___fst_exp__h422080; + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76 = + _theResult___fst_exp__h422081; 2'b10: - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76 = - out_exp__h422599; + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76 = + out_exp__h422600; 2'b11: - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76 = - _theResult___exp__h422596; + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76 = + _theResult___exp__h422597; endcase end - always@(guard__h413852 or - _theResult___fst_exp__h422080 or _theResult___exp__h422596) + always@(guard__h413853 or + _theResult___fst_exp__h422081 or _theResult___exp__h422597) begin - case (guard__h413852) + case (guard__h413853) 2'b0: - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q77 = - _theResult___fst_exp__h422080; + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q77 = + _theResult___fst_exp__h422081; 2'b01, 2'b10, 2'b11: - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q77 = - _theResult___exp__h422596; + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q77 = + _theResult___exp__h422597; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76 or - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q77 or + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76 or + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q77 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6349 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6351 or - _theResult___fst_exp__h422080) + _theResult___fst_exp__h422081) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h422674 = - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q76; + _theResult___fst_exp__h422675 = + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q76; 3'd1: - _theResult___fst_exp__h422674 = - CASE_guard13852_0b0_theResult___fst_exp22080_0_ETC__q77; + _theResult___fst_exp__h422675 = + CASE_guard13853_0b0_theResult___fst_exp22081_0_ETC__q77; 3'd2: - _theResult___fst_exp__h422674 = + _theResult___fst_exp__h422675 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6349; 3'd3: - _theResult___fst_exp__h422674 = + _theResult___fst_exp__h422675 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6351; - 3'd4: _theResult___fst_exp__h422674 = _theResult___fst_exp__h422080; - default: _theResult___fst_exp__h422674 = 8'd0; + 3'd4: _theResult___fst_exp__h422675 = _theResult___fst_exp__h422081; + default: _theResult___fst_exp__h422675 = 8'd0; endcase end - always@(guard__h422688 or - _theResult___fst_exp__h430765 or - out_exp__h431235 or _theResult___exp__h431232) + always@(guard__h422689 or + _theResult___fst_exp__h430766 or + out_exp__h431236 or _theResult___exp__h431233) begin - case (guard__h422688) + case (guard__h422689) 2'b0, 2'b01: - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81 = - _theResult___fst_exp__h430765; + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81 = + _theResult___fst_exp__h430766; 2'b10: - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81 = - out_exp__h431235; + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81 = + out_exp__h431236; 2'b11: - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81 = - _theResult___exp__h431232; + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81 = + _theResult___exp__h431233; endcase end - always@(guard__h422688 or - _theResult___fst_exp__h430765 or _theResult___exp__h431232) + always@(guard__h422689 or + _theResult___fst_exp__h430766 or _theResult___exp__h431233) begin - case (guard__h422688) + case (guard__h422689) 2'b0: - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q82 = - _theResult___fst_exp__h430765; + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q82 = + _theResult___fst_exp__h430766; 2'b01, 2'b10, 2'b11: - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q82 = - _theResult___exp__h431232; + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q82 = + _theResult___exp__h431233; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81 or - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q82 or + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81 or + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q82 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6418 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6420 or - _theResult___fst_exp__h430765) + _theResult___fst_exp__h430766) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h431310 = - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q81; + _theResult___fst_exp__h431311 = + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q81; 3'd1: - _theResult___fst_exp__h431310 = - CASE_guard22688_0b0_theResult___fst_exp30765_0_ETC__q82; + _theResult___fst_exp__h431311 = + CASE_guard22689_0b0_theResult___fst_exp30766_0_ETC__q82; 3'd2: - _theResult___fst_exp__h431310 = + _theResult___fst_exp__h431311 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6418; 3'd3: - _theResult___fst_exp__h431310 = + _theResult___fst_exp__h431311 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6420; - 3'd4: _theResult___fst_exp__h431310 = _theResult___fst_exp__h430765; - default: _theResult___fst_exp__h431310 = 8'd0; + 3'd4: _theResult___fst_exp__h431311 = _theResult___fst_exp__h430766; + default: _theResult___fst_exp__h431311 = 8'd0; endcase end - always@(guard__h404922 or - _theResult___snd__h412921 or - out_sfd__h413416 or _theResult___sfd__h413413) + always@(guard__h404923 or + _theResult___snd__h412922 or + out_sfd__h413417 or _theResult___sfd__h413414) begin - case (guard__h404922) + case (guard__h404923) 2'b0, 2'b01: - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83 = - _theResult___snd__h412921[56:34]; + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83 = + _theResult___snd__h412922[56:34]; 2'b10: - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83 = - out_sfd__h413416; + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83 = + out_sfd__h413417; 2'b11: - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83 = - _theResult___sfd__h413413; + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83 = + _theResult___sfd__h413414; endcase end - always@(guard__h404922 or - _theResult___snd__h412921 or _theResult___sfd__h413413) + always@(guard__h404923 or + _theResult___snd__h412922 or _theResult___sfd__h413414) begin - case (guard__h404922) + case (guard__h404923) 2'b0: - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q84 = - _theResult___snd__h412921[56:34]; + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q84 = + _theResult___snd__h412922[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q84 = - _theResult___sfd__h413413; + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q84 = + _theResult___sfd__h413414; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83 or - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q84 or + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83 or + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q84 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6468 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6470 or - _theResult___snd__h412921) + _theResult___snd__h412922) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h413491 = - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q83; + _theResult___fst_sfd__h413492 = + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q83; 3'd1: - _theResult___fst_sfd__h413491 = - CASE_guard04922_0b0_theResult___snd12921_BITS__ETC__q84; + _theResult___fst_sfd__h413492 = + CASE_guard04923_0b0_theResult___snd12922_BITS__ETC__q84; 3'd2: - _theResult___fst_sfd__h413491 = + _theResult___fst_sfd__h413492 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6468; 3'd3: - _theResult___fst_sfd__h413491 = + _theResult___fst_sfd__h413492 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6470; - 3'd4: _theResult___fst_sfd__h413491 = _theResult___snd__h412921[56:34]; - default: _theResult___fst_sfd__h413491 = 23'd0; + 3'd4: _theResult___fst_sfd__h413492 = _theResult___snd__h412922[56:34]; + default: _theResult___fst_sfd__h413492 = 23'd0; endcase end - always@(guard__h396215 or - sfdin__h404308 or out_sfd__h404834 or _theResult___sfd__h404831) + always@(guard__h396216 or + sfdin__h404309 or out_sfd__h404835 or _theResult___sfd__h404832) begin - case (guard__h396215) + case (guard__h396216) 2'b0, 2'b01: - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85 = - sfdin__h404308[56:34]; + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85 = + sfdin__h404309[56:34]; 2'b10: - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85 = - out_sfd__h404834; + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85 = + out_sfd__h404835; 2'b11: - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85 = - _theResult___sfd__h404831; + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85 = + _theResult___sfd__h404832; endcase end - always@(guard__h396215 or sfdin__h404308 or _theResult___sfd__h404831) + always@(guard__h396216 or sfdin__h404309 or _theResult___sfd__h404832) begin - case (guard__h396215) + case (guard__h396216) 2'b0: - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q86 = - sfdin__h404308[56:34]; + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q86 = + sfdin__h404309[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q86 = - _theResult___sfd__h404831; + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q86 = + _theResult___sfd__h404832; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85 or - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q86 or + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85 or + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q86 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6449 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6451 or - sfdin__h404308) + sfdin__h404309) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h404909 = - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q85; + _theResult___fst_sfd__h404910 = + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q85; 3'd1: - _theResult___fst_sfd__h404909 = - CASE_guard96215_0b0_sfdin04308_BITS_56_TO_34_0_ETC__q86; + _theResult___fst_sfd__h404910 = + CASE_guard96216_0b0_sfdin04309_BITS_56_TO_34_0_ETC__q86; 3'd2: - _theResult___fst_sfd__h404909 = + _theResult___fst_sfd__h404910 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6449; 3'd3: - _theResult___fst_sfd__h404909 = + _theResult___fst_sfd__h404910 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6451; - 3'd4: _theResult___fst_sfd__h404909 = sfdin__h404308[56:34]; - default: _theResult___fst_sfd__h404909 = 23'd0; + 3'd4: _theResult___fst_sfd__h404910 = sfdin__h404309[56:34]; + default: _theResult___fst_sfd__h404910 = 23'd0; endcase end - always@(guard__h413852 or - sfdin__h422074 or out_sfd__h422600 or _theResult___sfd__h422597) + always@(guard__h413853 or + sfdin__h422075 or out_sfd__h422601 or _theResult___sfd__h422598) begin - case (guard__h413852) + case (guard__h413853) 2'b0, 2'b01: - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87 = - sfdin__h422074[56:34]; + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87 = + sfdin__h422075[56:34]; 2'b10: - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87 = - out_sfd__h422600; + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87 = + out_sfd__h422601; 2'b11: - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87 = - _theResult___sfd__h422597; + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87 = + _theResult___sfd__h422598; endcase end - always@(guard__h413852 or sfdin__h422074 or _theResult___sfd__h422597) + always@(guard__h413853 or sfdin__h422075 or _theResult___sfd__h422598) begin - case (guard__h413852) + case (guard__h413853) 2'b0: - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q88 = - sfdin__h422074[56:34]; + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q88 = + sfdin__h422075[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q88 = - _theResult___sfd__h422597; + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q88 = + _theResult___sfd__h422598; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87 or - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q88 or + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87 or + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q88 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6495 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6497 or - sfdin__h422074) + sfdin__h422075) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h422675 = - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q87; + _theResult___fst_sfd__h422676 = + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q87; 3'd1: - _theResult___fst_sfd__h422675 = - CASE_guard13852_0b0_sfdin22074_BITS_56_TO_34_0_ETC__q88; + _theResult___fst_sfd__h422676 = + CASE_guard13853_0b0_sfdin22075_BITS_56_TO_34_0_ETC__q88; 3'd2: - _theResult___fst_sfd__h422675 = + _theResult___fst_sfd__h422676 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6495; 3'd3: - _theResult___fst_sfd__h422675 = + _theResult___fst_sfd__h422676 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6497; - 3'd4: _theResult___fst_sfd__h422675 = sfdin__h422074[56:34]; - default: _theResult___fst_sfd__h422675 = 23'd0; + 3'd4: _theResult___fst_sfd__h422676 = sfdin__h422075[56:34]; + default: _theResult___fst_sfd__h422676 = 23'd0; endcase end - always@(guard__h422688 or - _theResult___snd__h430711 or - out_sfd__h431236 or _theResult___sfd__h431233) + always@(guard__h422689 or + _theResult___snd__h430712 or + out_sfd__h431237 or _theResult___sfd__h431234) begin - case (guard__h422688) + case (guard__h422689) 2'b0, 2'b01: - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89 = - _theResult___snd__h430711[56:34]; + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89 = + _theResult___snd__h430712[56:34]; 2'b10: - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89 = - out_sfd__h431236; + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89 = + out_sfd__h431237; 2'b11: - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89 = - _theResult___sfd__h431233; + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89 = + _theResult___sfd__h431234; endcase end - always@(guard__h422688 or - _theResult___snd__h430711 or _theResult___sfd__h431233) + always@(guard__h422689 or + _theResult___snd__h430712 or _theResult___sfd__h431234) begin - case (guard__h422688) + case (guard__h422689) 2'b0: - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q90 = - _theResult___snd__h430711[56:34]; + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q90 = + _theResult___snd__h430712[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q90 = - _theResult___sfd__h431233; + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q90 = + _theResult___sfd__h431234; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89 or - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q90 or + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89 or + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q90 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6514 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6516 or - _theResult___snd__h430711) + _theResult___snd__h430712) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h431311 = - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q89; + _theResult___fst_sfd__h431312 = + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q89; 3'd1: - _theResult___fst_sfd__h431311 = - CASE_guard22688_0b0_theResult___snd30711_BITS__ETC__q90; + _theResult___fst_sfd__h431312 = + CASE_guard22689_0b0_theResult___snd30712_BITS__ETC__q90; 3'd2: - _theResult___fst_sfd__h431311 = + _theResult___fst_sfd__h431312 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6514; 3'd3: - _theResult___fst_sfd__h431311 = + _theResult___fst_sfd__h431312 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6516; - 3'd4: _theResult___fst_sfd__h431311 = _theResult___snd__h430711[56:34]; - default: _theResult___fst_sfd__h431311 = 23'd0; + 3'd4: _theResult___fst_sfd__h431312 = _theResult___snd__h430712[56:34]; + default: _theResult___fst_sfd__h431312 = 23'd0; endcase end - always@(guard__h396215 or + always@(guard__h396216 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h396215) + case (guard__h396216) 2'b0, 2'b01, 2'b10: - CASE_guard96215_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 = + CASE_guard96216_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard96215_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 = - guard__h396215 == 2'b11 && + CASE_guard96216_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 = + guard__h396216 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard96215_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 or - guard__h396215) + CASE_guard96216_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91 or + guard__h396216) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6602 = - CASE_guard96215_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91; + CASE_guard96216_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q91; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6602 = - (guard__h396215 == 2'b0) ? + (guard__h396216 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h396215 == 2'b01 || guard__h396215 == 2'b10 || - guard__h396215 == 2'b11) && + (guard__h396216 == 2'b01 || guard__h396216 == 2'b10 || + guard__h396216 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6602 = @@ -34955,34 +34955,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h396215 or + always@(guard__h396216 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h396215) + case (guard__h396216) 2'b0, 2'b01, 2'b10: - CASE_guard96215_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 = + CASE_guard96216_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard96215_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 = - guard__h396215 != 2'b11 || + CASE_guard96216_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 = + guard__h396216 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard96215_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 or - guard__h396215) + CASE_guard96216_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92 or + guard__h396216) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6546 = - CASE_guard96215_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92; + CASE_guard96216_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q92; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6546 = - (guard__h396215 == 2'b0) ? + (guard__h396216 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h396215 != 2'b01 && guard__h396215 != 2'b10 && - guard__h396215 != 2'b11 || + guard__h396216 != 2'b01 && guard__h396216 != 2'b10 && + guard__h396216 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6546 = @@ -34993,34 +34993,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h404922 or + always@(guard__h404923 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h404922) + case (guard__h404923) 2'b0, 2'b01, 2'b10: - CASE_guard04922_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 = + CASE_guard04923_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard04922_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 = - guard__h404922 == 2'b11 && + CASE_guard04923_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 = + guard__h404923 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard04922_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 or - guard__h404922) + CASE_guard04923_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93 or + guard__h404923) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6609 = - CASE_guard04922_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93; + CASE_guard04923_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q93; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6609 = - (guard__h404922 == 2'b0) ? + (guard__h404923 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h404922 == 2'b01 || guard__h404922 == 2'b10 || - guard__h404922 == 2'b11) && + (guard__h404923 == 2'b01 || guard__h404923 == 2'b10 || + guard__h404923 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6609 = @@ -35031,34 +35031,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h404922 or + always@(guard__h404923 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h404922) + case (guard__h404923) 2'b0, 2'b01, 2'b10: - CASE_guard04922_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 = + CASE_guard04923_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard04922_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 = - guard__h404922 != 2'b11 || + CASE_guard04923_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 = + guard__h404923 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard04922_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 or - guard__h404922) + CASE_guard04923_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94 or + guard__h404923) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559 = - CASE_guard04922_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94; + CASE_guard04923_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q94; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559 = - (guard__h404922 == 2'b0) ? + (guard__h404923 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h404922 != 2'b01 && guard__h404922 != 2'b10 && - guard__h404922 != 2'b11 || + guard__h404923 != 2'b01 && guard__h404923 != 2'b10 && + guard__h404923 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6559 = @@ -35069,34 +35069,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h413852 or + always@(guard__h413853 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h413852) + case (guard__h413853) 2'b0, 2'b01, 2'b10: - CASE_guard13852_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 = + CASE_guard13853_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard13852_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 = - guard__h413852 == 2'b11 && + CASE_guard13853_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 = + guard__h413853 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard13852_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 or - guard__h413852) + CASE_guard13853_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95 or + guard__h413853) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6619 = - CASE_guard13852_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95; + CASE_guard13853_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q95; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6619 = - (guard__h413852 == 2'b0) ? + (guard__h413853 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h413852 == 2'b01 || guard__h413852 == 2'b10 || - guard__h413852 == 2'b11) && + (guard__h413853 == 2'b01 || guard__h413853 == 2'b10 || + guard__h413853 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6619 = @@ -35107,34 +35107,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h413852 or + always@(guard__h413853 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h413852) + case (guard__h413853) 2'b0, 2'b01, 2'b10: - CASE_guard13852_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 = + CASE_guard13853_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard13852_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 = - guard__h413852 != 2'b11 || + CASE_guard13853_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 = + guard__h413853 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard13852_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 or - guard__h413852) + CASE_guard13853_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96 or + guard__h413853) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6576 = - CASE_guard13852_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96; + CASE_guard13853_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q96; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6576 = - (guard__h413852 == 2'b0) ? + (guard__h413853 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h413852 != 2'b01 && guard__h413852 != 2'b10 && - guard__h413852 != 2'b11 || + guard__h413853 != 2'b01 && guard__h413853 != 2'b10 && + guard__h413853 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6576 = @@ -35145,34 +35145,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h422688 or + always@(guard__h422689 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h422688) + case (guard__h422689) 2'b0, 2'b01, 2'b10: - CASE_guard22688_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 = + CASE_guard22689_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard22688_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 = - guard__h422688 == 2'b11 && + CASE_guard22689_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 = + guard__h422689 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard22688_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 or - guard__h422688) + CASE_guard22689_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97 or + guard__h422689) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6626 = - CASE_guard22688_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97; + CASE_guard22689_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q97; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6626 = - (guard__h422688 == 2'b0) ? + (guard__h422689 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h422688 == 2'b01 || guard__h422688 == 2'b10 || - guard__h422688 == 2'b11) && + (guard__h422689 == 2'b01 || guard__h422689 == 2'b10 || + guard__h422689 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6626 = @@ -35183,34 +35183,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h422688 or + always@(guard__h422689 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h422688) + case (guard__h422689) 2'b0, 2'b01, 2'b10: - CASE_guard22688_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 = + CASE_guard22689_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard22688_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 = - guard__h422688 != 2'b11 || + CASE_guard22689_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 = + guard__h422689 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard22688_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 or - guard__h422688) + CASE_guard22689_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98 or + guard__h422689) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6589 = - CASE_guard22688_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98; + CASE_guard22689_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q98; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6589 = - (guard__h422688 == 2'b0) ? + (guard__h422689 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h422688 != 2'b01 && guard__h422688 != 2'b10 && - guard__h422688 != 2'b11 || + guard__h422689 != 2'b01 && guard__h422689 != 2'b10 && + guard__h422689 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6589 = @@ -35247,446 +35247,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h450617 or - _theResult___fst_exp__h458665 or - out_exp__h459110 or _theResult___exp__h459107) + always@(guard__h450618 or + _theResult___fst_exp__h458666 or + out_exp__h459111 or _theResult___exp__h459108) begin - case (guard__h450617) + case (guard__h450618) 2'b0, 2'b01: - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103 = - _theResult___fst_exp__h458665; + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103 = + _theResult___fst_exp__h458666; 2'b10: - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103 = - out_exp__h459110; + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103 = + out_exp__h459111; 2'b11: - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103 = - _theResult___exp__h459107; + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103 = + _theResult___exp__h459108; endcase end - always@(guard__h450617 or - _theResult___fst_exp__h458665 or _theResult___exp__h459107) + always@(guard__h450618 or + _theResult___fst_exp__h458666 or _theResult___exp__h459108) begin - case (guard__h450617) + case (guard__h450618) 2'b0: - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q104 = - _theResult___fst_exp__h458665; + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q104 = + _theResult___fst_exp__h458666; 2'b01, 2'b10, 2'b11: - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q104 = - _theResult___exp__h459107; + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q104 = + _theResult___exp__h459108; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103 or - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q104 or + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103 or + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q104 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7416 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7418 or - _theResult___fst_exp__h458665) + _theResult___fst_exp__h458666) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h459185 = - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q103; + _theResult___fst_exp__h459186 = + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q103; 3'd1: - _theResult___fst_exp__h459185 = - CASE_guard50617_0b0_theResult___fst_exp58665_0_ETC__q104; + _theResult___fst_exp__h459186 = + CASE_guard50618_0b0_theResult___fst_exp58666_0_ETC__q104; 3'd2: - _theResult___fst_exp__h459185 = + _theResult___fst_exp__h459186 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7416; 3'd3: - _theResult___fst_exp__h459185 = + _theResult___fst_exp__h459186 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7418; - 3'd4: _theResult___fst_exp__h459185 = _theResult___fst_exp__h458665; - default: _theResult___fst_exp__h459185 = 8'd0; + 3'd4: _theResult___fst_exp__h459186 = _theResult___fst_exp__h458666; + default: _theResult___fst_exp__h459186 = 8'd0; endcase end - always@(guard__h441910 or - _theResult___fst_exp__h450009 or - out_exp__h450528 or _theResult___exp__h450525) + always@(guard__h441911 or + _theResult___fst_exp__h450010 or + out_exp__h450529 or _theResult___exp__h450526) begin - case (guard__h441910) + case (guard__h441911) 2'b0, 2'b01: - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105 = - _theResult___fst_exp__h450009; + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105 = + _theResult___fst_exp__h450010; 2'b10: - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105 = - out_exp__h450528; + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105 = + out_exp__h450529; 2'b11: - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105 = - _theResult___exp__h450525; + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105 = + _theResult___exp__h450526; endcase end - always@(guard__h441910 or - _theResult___fst_exp__h450009 or _theResult___exp__h450525) + always@(guard__h441911 or + _theResult___fst_exp__h450010 or _theResult___exp__h450526) begin - case (guard__h441910) + case (guard__h441911) 2'b0: - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q106 = - _theResult___fst_exp__h450009; + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q106 = + _theResult___fst_exp__h450010; 2'b01, 2'b10, 2'b11: - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q106 = - _theResult___exp__h450525; + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q106 = + _theResult___exp__h450526; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105 or - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q106 or + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105 or + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q106 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7194 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7197 or - _theResult___fst_exp__h450009) + _theResult___fst_exp__h450010) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h450603 = - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q105; + _theResult___fst_exp__h450604 = + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q105; 3'd1: - _theResult___fst_exp__h450603 = - CASE_guard41910_0b0_theResult___fst_exp50009_0_ETC__q106; + _theResult___fst_exp__h450604 = + CASE_guard41911_0b0_theResult___fst_exp50010_0_ETC__q106; 3'd2: - _theResult___fst_exp__h450603 = + _theResult___fst_exp__h450604 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7194; 3'd3: - _theResult___fst_exp__h450603 = + _theResult___fst_exp__h450604 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7197; - 3'd4: _theResult___fst_exp__h450603 = _theResult___fst_exp__h450009; - default: _theResult___fst_exp__h450603 = 8'd0; + 3'd4: _theResult___fst_exp__h450604 = _theResult___fst_exp__h450010; + default: _theResult___fst_exp__h450604 = 8'd0; endcase end - always@(guard__h459547 or - _theResult___fst_exp__h467775 or - out_exp__h468294 or _theResult___exp__h468291) + always@(guard__h459548 or + _theResult___fst_exp__h467776 or + out_exp__h468295 or _theResult___exp__h468292) begin - case (guard__h459547) + case (guard__h459548) 2'b0, 2'b01: - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111 = - _theResult___fst_exp__h467775; + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111 = + _theResult___fst_exp__h467776; 2'b10: - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111 = - out_exp__h468294; + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111 = + out_exp__h468295; 2'b11: - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111 = - _theResult___exp__h468291; + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111 = + _theResult___exp__h468292; endcase end - always@(guard__h459547 or - _theResult___fst_exp__h467775 or _theResult___exp__h468291) + always@(guard__h459548 or + _theResult___fst_exp__h467776 or _theResult___exp__h468292) begin - case (guard__h459547) + case (guard__h459548) 2'b0: - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q112 = - _theResult___fst_exp__h467775; + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q112 = + _theResult___fst_exp__h467776; 2'b01, 2'b10, 2'b11: - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q112 = - _theResult___exp__h468291; + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q112 = + _theResult___exp__h468292; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111 or - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q112 or + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111 or + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q112 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7741 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7743 or - _theResult___fst_exp__h467775) + _theResult___fst_exp__h467776) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h468369 = - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q111; + _theResult___fst_exp__h468370 = + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q111; 3'd1: - _theResult___fst_exp__h468369 = - CASE_guard59547_0b0_theResult___fst_exp67775_0_ETC__q112; + _theResult___fst_exp__h468370 = + CASE_guard59548_0b0_theResult___fst_exp67776_0_ETC__q112; 3'd2: - _theResult___fst_exp__h468369 = + _theResult___fst_exp__h468370 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7741; 3'd3: - _theResult___fst_exp__h468369 = + _theResult___fst_exp__h468370 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7743; - 3'd4: _theResult___fst_exp__h468369 = _theResult___fst_exp__h467775; - default: _theResult___fst_exp__h468369 = 8'd0; + 3'd4: _theResult___fst_exp__h468370 = _theResult___fst_exp__h467776; + default: _theResult___fst_exp__h468370 = 8'd0; endcase end - always@(guard__h468383 or - _theResult___fst_exp__h476460 or - out_exp__h476930 or _theResult___exp__h476927) + always@(guard__h468384 or + _theResult___fst_exp__h476461 or + out_exp__h476931 or _theResult___exp__h476928) begin - case (guard__h468383) + case (guard__h468384) 2'b0, 2'b01: - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116 = - _theResult___fst_exp__h476460; + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116 = + _theResult___fst_exp__h476461; 2'b10: - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116 = - out_exp__h476930; + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116 = + out_exp__h476931; 2'b11: - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116 = - _theResult___exp__h476927; + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116 = + _theResult___exp__h476928; endcase end - always@(guard__h468383 or - _theResult___fst_exp__h476460 or _theResult___exp__h476927) + always@(guard__h468384 or + _theResult___fst_exp__h476461 or _theResult___exp__h476928) begin - case (guard__h468383) + case (guard__h468384) 2'b0: - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q117 = - _theResult___fst_exp__h476460; + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q117 = + _theResult___fst_exp__h476461; 2'b01, 2'b10, 2'b11: - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q117 = - _theResult___exp__h476927; + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q117 = + _theResult___exp__h476928; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116 or - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q117 or + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116 or + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q117 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7810 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7812 or - _theResult___fst_exp__h476460) + _theResult___fst_exp__h476461) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h477005 = - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q116; + _theResult___fst_exp__h477006 = + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q116; 3'd1: - _theResult___fst_exp__h477005 = - CASE_guard68383_0b0_theResult___fst_exp76460_0_ETC__q117; + _theResult___fst_exp__h477006 = + CASE_guard68384_0b0_theResult___fst_exp76461_0_ETC__q117; 3'd2: - _theResult___fst_exp__h477005 = + _theResult___fst_exp__h477006 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7810; 3'd3: - _theResult___fst_exp__h477005 = + _theResult___fst_exp__h477006 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7812; - 3'd4: _theResult___fst_exp__h477005 = _theResult___fst_exp__h476460; - default: _theResult___fst_exp__h477005 = 8'd0; + 3'd4: _theResult___fst_exp__h477006 = _theResult___fst_exp__h476461; + default: _theResult___fst_exp__h477006 = 8'd0; endcase end - always@(guard__h450617 or - _theResult___snd__h458616 or - out_sfd__h459111 or _theResult___sfd__h459108) + always@(guard__h450618 or + _theResult___snd__h458617 or + out_sfd__h459112 or _theResult___sfd__h459109) begin - case (guard__h450617) + case (guard__h450618) 2'b0, 2'b01: - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118 = - _theResult___snd__h458616[56:34]; + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118 = + _theResult___snd__h458617[56:34]; 2'b10: - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118 = - out_sfd__h459111; + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118 = + out_sfd__h459112; 2'b11: - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118 = - _theResult___sfd__h459108; + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118 = + _theResult___sfd__h459109; endcase end - always@(guard__h450617 or - _theResult___snd__h458616 or _theResult___sfd__h459108) + always@(guard__h450618 or + _theResult___snd__h458617 or _theResult___sfd__h459109) begin - case (guard__h450617) + case (guard__h450618) 2'b0: - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q119 = - _theResult___snd__h458616[56:34]; + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q119 = + _theResult___snd__h458617[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q119 = - _theResult___sfd__h459108; + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q119 = + _theResult___sfd__h459109; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118 or - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q119 or + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118 or + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q119 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7860 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7862 or - _theResult___snd__h458616) + _theResult___snd__h458617) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h459186 = - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q118; + _theResult___fst_sfd__h459187 = + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q118; 3'd1: - _theResult___fst_sfd__h459186 = - CASE_guard50617_0b0_theResult___snd58616_BITS__ETC__q119; + _theResult___fst_sfd__h459187 = + CASE_guard50618_0b0_theResult___snd58617_BITS__ETC__q119; 3'd2: - _theResult___fst_sfd__h459186 = + _theResult___fst_sfd__h459187 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7860; 3'd3: - _theResult___fst_sfd__h459186 = + _theResult___fst_sfd__h459187 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7862; - 3'd4: _theResult___fst_sfd__h459186 = _theResult___snd__h458616[56:34]; - default: _theResult___fst_sfd__h459186 = 23'd0; + 3'd4: _theResult___fst_sfd__h459187 = _theResult___snd__h458617[56:34]; + default: _theResult___fst_sfd__h459187 = 23'd0; endcase end - always@(guard__h441910 or - sfdin__h450003 or out_sfd__h450529 or _theResult___sfd__h450526) + always@(guard__h441911 or + sfdin__h450004 or out_sfd__h450530 or _theResult___sfd__h450527) begin - case (guard__h441910) + case (guard__h441911) 2'b0, 2'b01: - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120 = - sfdin__h450003[56:34]; + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120 = + sfdin__h450004[56:34]; 2'b10: - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120 = - out_sfd__h450529; + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120 = + out_sfd__h450530; 2'b11: - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120 = - _theResult___sfd__h450526; + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120 = + _theResult___sfd__h450527; endcase end - always@(guard__h441910 or sfdin__h450003 or _theResult___sfd__h450526) + always@(guard__h441911 or sfdin__h450004 or _theResult___sfd__h450527) begin - case (guard__h441910) + case (guard__h441911) 2'b0: - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q121 = - sfdin__h450003[56:34]; + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q121 = + sfdin__h450004[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q121 = - _theResult___sfd__h450526; + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q121 = + _theResult___sfd__h450527; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120 or - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q121 or + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120 or + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q121 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7841 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7843 or - sfdin__h450003) + sfdin__h450004) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h450604 = - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q120; + _theResult___fst_sfd__h450605 = + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q120; 3'd1: - _theResult___fst_sfd__h450604 = - CASE_guard41910_0b0_sfdin50003_BITS_56_TO_34_0_ETC__q121; + _theResult___fst_sfd__h450605 = + CASE_guard41911_0b0_sfdin50004_BITS_56_TO_34_0_ETC__q121; 3'd2: - _theResult___fst_sfd__h450604 = + _theResult___fst_sfd__h450605 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7841; 3'd3: - _theResult___fst_sfd__h450604 = + _theResult___fst_sfd__h450605 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7843; - 3'd4: _theResult___fst_sfd__h450604 = sfdin__h450003[56:34]; - default: _theResult___fst_sfd__h450604 = 23'd0; + 3'd4: _theResult___fst_sfd__h450605 = sfdin__h450004[56:34]; + default: _theResult___fst_sfd__h450605 = 23'd0; endcase end - always@(guard__h459547 or - sfdin__h467769 or out_sfd__h468295 or _theResult___sfd__h468292) + always@(guard__h459548 or + sfdin__h467770 or out_sfd__h468296 or _theResult___sfd__h468293) begin - case (guard__h459547) + case (guard__h459548) 2'b0, 2'b01: - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122 = - sfdin__h467769[56:34]; + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122 = + sfdin__h467770[56:34]; 2'b10: - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122 = - out_sfd__h468295; + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122 = + out_sfd__h468296; 2'b11: - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122 = - _theResult___sfd__h468292; + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122 = + _theResult___sfd__h468293; endcase end - always@(guard__h459547 or sfdin__h467769 or _theResult___sfd__h468292) + always@(guard__h459548 or sfdin__h467770 or _theResult___sfd__h468293) begin - case (guard__h459547) + case (guard__h459548) 2'b0: - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q123 = - sfdin__h467769[56:34]; + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q123 = + sfdin__h467770[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q123 = - _theResult___sfd__h468292; + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q123 = + _theResult___sfd__h468293; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122 or - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q123 or + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122 or + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q123 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7887 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7889 or - sfdin__h467769) + sfdin__h467770) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h468370 = - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q122; + _theResult___fst_sfd__h468371 = + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q122; 3'd1: - _theResult___fst_sfd__h468370 = - CASE_guard59547_0b0_sfdin67769_BITS_56_TO_34_0_ETC__q123; + _theResult___fst_sfd__h468371 = + CASE_guard59548_0b0_sfdin67770_BITS_56_TO_34_0_ETC__q123; 3'd2: - _theResult___fst_sfd__h468370 = + _theResult___fst_sfd__h468371 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7887; 3'd3: - _theResult___fst_sfd__h468370 = + _theResult___fst_sfd__h468371 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7889; - 3'd4: _theResult___fst_sfd__h468370 = sfdin__h467769[56:34]; - default: _theResult___fst_sfd__h468370 = 23'd0; + 3'd4: _theResult___fst_sfd__h468371 = sfdin__h467770[56:34]; + default: _theResult___fst_sfd__h468371 = 23'd0; endcase end - always@(guard__h468383 or - _theResult___snd__h476406 or - out_sfd__h476931 or _theResult___sfd__h476928) + always@(guard__h468384 or + _theResult___snd__h476407 or + out_sfd__h476932 or _theResult___sfd__h476929) begin - case (guard__h468383) + case (guard__h468384) 2'b0, 2'b01: - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124 = - _theResult___snd__h476406[56:34]; + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124 = + _theResult___snd__h476407[56:34]; 2'b10: - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124 = - out_sfd__h476931; + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124 = + out_sfd__h476932; 2'b11: - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124 = - _theResult___sfd__h476928; + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124 = + _theResult___sfd__h476929; endcase end - always@(guard__h468383 or - _theResult___snd__h476406 or _theResult___sfd__h476928) + always@(guard__h468384 or + _theResult___snd__h476407 or _theResult___sfd__h476929) begin - case (guard__h468383) + case (guard__h468384) 2'b0: - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q125 = - _theResult___snd__h476406[56:34]; + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q125 = + _theResult___snd__h476407[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q125 = - _theResult___sfd__h476928; + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q125 = + _theResult___sfd__h476929; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124 or - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q125 or + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124 or + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q125 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7906 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7908 or - _theResult___snd__h476406) + _theResult___snd__h476407) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h477006 = - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q124; + _theResult___fst_sfd__h477007 = + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q124; 3'd1: - _theResult___fst_sfd__h477006 = - CASE_guard68383_0b0_theResult___snd76406_BITS__ETC__q125; + _theResult___fst_sfd__h477007 = + CASE_guard68384_0b0_theResult___snd76407_BITS__ETC__q125; 3'd2: - _theResult___fst_sfd__h477006 = + _theResult___fst_sfd__h477007 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7906; 3'd3: - _theResult___fst_sfd__h477006 = + _theResult___fst_sfd__h477007 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7908; - 3'd4: _theResult___fst_sfd__h477006 = _theResult___snd__h476406[56:34]; - default: _theResult___fst_sfd__h477006 = 23'd0; + 3'd4: _theResult___fst_sfd__h477007 = _theResult___snd__h476407[56:34]; + default: _theResult___fst_sfd__h477007 = 23'd0; endcase end - always@(guard__h441910 or + always@(guard__h441911 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h441910) + case (guard__h441911) 2'b0, 2'b01, 2'b10: - CASE_guard41910_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + CASE_guard41911_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard41910_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = - guard__h441910 == 2'b11 && + CASE_guard41911_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + guard__h441911 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard41910_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or - guard__h441910) + CASE_guard41911_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or + guard__h441911) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7994 = - CASE_guard41910_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; + CASE_guard41911_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7994 = - (guard__h441910 == 2'b0) ? + (guard__h441911 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h441910 == 2'b01 || guard__h441910 == 2'b10 || - guard__h441910 == 2'b11) && + (guard__h441911 == 2'b01 || guard__h441911 == 2'b10 || + guard__h441911 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7994 = @@ -35697,34 +35697,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h441910 or + always@(guard__h441911 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h441910) + case (guard__h441911) 2'b0, 2'b01, 2'b10: - CASE_guard41910_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + CASE_guard41911_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard41910_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = - guard__h441910 != 2'b11 || + CASE_guard41911_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + guard__h441911 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard41910_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or - guard__h441910) + CASE_guard41911_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or + guard__h441911) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7938 = - CASE_guard41910_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; + CASE_guard41911_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7938 = - (guard__h441910 == 2'b0) ? + (guard__h441911 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h441910 != 2'b01 && guard__h441910 != 2'b10 && - guard__h441910 != 2'b11 || + guard__h441911 != 2'b01 && guard__h441911 != 2'b10 && + guard__h441911 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7938 = @@ -35735,34 +35735,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h450617 or + always@(guard__h450618 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h450617) + case (guard__h450618) 2'b0, 2'b01, 2'b10: - CASE_guard50617_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 = + CASE_guard50618_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard50617_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 = - guard__h450617 == 2'b11 && + CASE_guard50618_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 = + guard__h450618 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard50617_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 or - guard__h450617) + CASE_guard50618_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128 or + guard__h450618) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8001 = - CASE_guard50617_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128; + CASE_guard50618_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q128; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8001 = - (guard__h450617 == 2'b0) ? + (guard__h450618 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h450617 == 2'b01 || guard__h450617 == 2'b10 || - guard__h450617 == 2'b11) && + (guard__h450618 == 2'b01 || guard__h450618 == 2'b10 || + guard__h450618 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8001 = @@ -35773,34 +35773,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h450617 or + always@(guard__h450618 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h450617) + case (guard__h450618) 2'b0, 2'b01, 2'b10: - CASE_guard50617_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 = + CASE_guard50618_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard50617_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 = - guard__h450617 != 2'b11 || + CASE_guard50618_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 = + guard__h450618 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard50617_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 or - guard__h450617) + CASE_guard50618_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129 or + guard__h450618) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7951 = - CASE_guard50617_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129; + CASE_guard50618_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q129; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7951 = - (guard__h450617 == 2'b0) ? + (guard__h450618 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h450617 != 2'b01 && guard__h450617 != 2'b10 && - guard__h450617 != 2'b11 || + guard__h450618 != 2'b01 && guard__h450618 != 2'b10 && + guard__h450618 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7951 = @@ -35811,34 +35811,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h459547 or + always@(guard__h459548 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h459547) + case (guard__h459548) 2'b0, 2'b01, 2'b10: - CASE_guard59547_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 = + CASE_guard59548_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard59547_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 = - guard__h459547 == 2'b11 && + CASE_guard59548_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 = + guard__h459548 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard59547_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 or - guard__h459547) + CASE_guard59548_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130 or + guard__h459548) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8011 = - CASE_guard59547_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130; + CASE_guard59548_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q130; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8011 = - (guard__h459547 == 2'b0) ? + (guard__h459548 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h459547 == 2'b01 || guard__h459547 == 2'b10 || - guard__h459547 == 2'b11) && + (guard__h459548 == 2'b01 || guard__h459548 == 2'b10 || + guard__h459548 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8011 = @@ -35849,34 +35849,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h459547 or + always@(guard__h459548 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h459547) + case (guard__h459548) 2'b0, 2'b01, 2'b10: - CASE_guard59547_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 = + CASE_guard59548_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard59547_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 = - guard__h459547 != 2'b11 || + CASE_guard59548_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 = + guard__h459548 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard59547_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 or - guard__h459547) + CASE_guard59548_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131 or + guard__h459548) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7968 = - CASE_guard59547_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131; + CASE_guard59548_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q131; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7968 = - (guard__h459547 == 2'b0) ? + (guard__h459548 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h459547 != 2'b01 && guard__h459547 != 2'b10 && - guard__h459547 != 2'b11 || + guard__h459548 != 2'b01 && guard__h459548 != 2'b10 && + guard__h459548 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7968 = @@ -35887,34 +35887,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h468383 or + always@(guard__h468384 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h468383) + case (guard__h468384) 2'b0, 2'b01, 2'b10: - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 = + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 = - guard__h468383 == 2'b11 && + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 = + guard__h468384 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 or - guard__h468383) + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132 or + guard__h468384) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8018 = - CASE_guard68383_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132; + CASE_guard68384_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q132; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8018 = - (guard__h468383 == 2'b0) ? + (guard__h468384 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h468383 == 2'b01 || guard__h468383 == 2'b10 || - guard__h468383 == 2'b11) && + (guard__h468384 == 2'b01 || guard__h468384 == 2'b10 || + guard__h468384 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d8018 = @@ -35925,34 +35925,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h468383 or + always@(guard__h468384 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h468383) + case (guard__h468384) 2'b0, 2'b01, 2'b10: - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 = + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 = - guard__h468383 != 2'b11 || + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 = + guard__h468384 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 or - guard__h468383) + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133 or + guard__h468384) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7981 = - CASE_guard68383_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133; + CASE_guard68384_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q133; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7981 = - (guard__h468383 == 2'b0) ? + (guard__h468384 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h468383 != 2'b01 && guard__h468383 != 2'b10 && - guard__h468383 != 2'b11 || + guard__h468384 != 2'b01 && guard__h468384 != 2'b10 && + guard__h468384 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7981 = @@ -36009,28 +36009,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$RDY_request_put; endcase end - always@(guard__h498496 or - _theResult___fst_exp__h506457 or _theResult___exp__h507112) + always@(guard__h498497 or + _theResult___fst_exp__h506458 or _theResult___exp__h507113) begin - case (guard__h498496) + case (guard__h498497) 2'b0: - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q143 = - _theResult___fst_exp__h506457; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q143 = + _theResult___fst_exp__h506458; 2'b01, 2'b10, 2'b11: - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q143 = - _theResult___exp__h507112; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q143 = + _theResult___exp__h507113; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h506457 or + _theResult___fst_exp__h506458 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9130 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9128 or - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q143) + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q143) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9134 = - _theResult___fst_exp__h506457; + _theResult___fst_exp__h506458; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9134 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9130; @@ -36039,44 +36039,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9128; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9134 = - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q143; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q143; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9134 = 11'd0; endcase end - always@(guard__h498496 or - _theResult___fst_exp__h506457 or - out_exp__h507115 or _theResult___exp__h507112) + always@(guard__h498497 or + _theResult___fst_exp__h506458 or + out_exp__h507116 or _theResult___exp__h507113) begin - case (guard__h498496) + case (guard__h498497) 2'b0, 2'b01: - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q144 = - _theResult___fst_exp__h506457; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q144 = + _theResult___fst_exp__h506458; 2'b10: - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q144 = - out_exp__h507115; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q144 = + out_exp__h507116; 2'b11: - CASE_guard98496_0b0_theResult___fst_exp06457_0_ETC__q144 = - _theResult___exp__h507112; + CASE_guard98497_0b0_theResult___fst_exp06458_0_ETC__q144 = + _theResult___exp__h507113; endcase end - always@(guard__h498496 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h498497 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h498496) + case (guard__h498497) 2'b0, 2'b01, 2'b10: - CASE_guard98496_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + CASE_guard98497_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard98496_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = - guard__h498496 == 2'b11 && + CASE_guard98497_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + guard__h498497 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h498496) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h498497) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36086,12 +36086,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146 = - (guard__h498496 == 2'b0) ? + (guard__h498497 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h498496 == 2'b01 || guard__h498496 == 2'b10 || - guard__h498496 == 2'b11) && + (guard__h498497 == 2'b01 || guard__h498497 == 2'b10 || + guard__h498497 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -36102,23 +36102,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h507808 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h507809 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h507808) + case (guard__h507809) 2'b0, 2'b01, 2'b10: - CASE_guard07808_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + CASE_guard07809_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard07808_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = - guard__h507808 == 2'b11 && + CASE_guard07809_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + guard__h507809 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h507808) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h507809) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36128,12 +36128,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148 = - (guard__h507808 == 2'b0) ? + (guard__h507809 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h507808 == 2'b01 || guard__h507808 == 2'b10 || - guard__h507808 == 2'b11) && + (guard__h507809 == 2'b01 || guard__h507809 == 2'b10 || + guard__h507809 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -36144,23 +36144,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h516877 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h516878 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h516877) + case (guard__h516878) 2'b0, 2'b01, 2'b10: - CASE_guard16877_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + CASE_guard16878_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard16877_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = - guard__h516877 == 2'b11 && + CASE_guard16878_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + guard__h516878 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h516877) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h516878) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36170,12 +36170,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150 = - (guard__h516877 == 2'b0) ? + (guard__h516878 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h516877 == 2'b01 || guard__h516877 == 2'b10 || - guard__h516877 == 2'b11) && + (guard__h516878 == 2'b01 || guard__h516878 == 2'b10 || + guard__h516878 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -36186,28 +36186,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h576653 or - _theResult___fst_exp__h584614 or _theResult___exp__h585269) + always@(guard__h576654 or + _theResult___fst_exp__h584615 or _theResult___exp__h585270) begin - case (guard__h576653) + case (guard__h576654) 2'b0: - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q160 = - _theResult___fst_exp__h584614; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q160 = + _theResult___fst_exp__h584615; 2'b01, 2'b10, 2'b11: - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q160 = - _theResult___exp__h585269; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q160 = + _theResult___exp__h585270; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h584614 or + _theResult___fst_exp__h584615 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9845 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9843 or - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q160) + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q160) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849 = - _theResult___fst_exp__h584614; + _theResult___fst_exp__h584615; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9845; @@ -36216,42 +36216,42 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9843; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849 = - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q160; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q160; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9849 = 11'd0; endcase end - always@(guard__h576653 or - _theResult___fst_exp__h584614 or - out_exp__h585272 or _theResult___exp__h585269) + always@(guard__h576654 or + _theResult___fst_exp__h584615 or + out_exp__h585273 or _theResult___exp__h585270) begin - case (guard__h576653) + case (guard__h576654) 2'b0, 2'b01: - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q161 = - _theResult___fst_exp__h584614; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q161 = + _theResult___fst_exp__h584615; 2'b10: - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q161 = - out_exp__h585272; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q161 = + out_exp__h585273; 2'b11: - CASE_guard76653_0b0_theResult___fst_exp84614_0_ETC__q161 = - _theResult___exp__h585269; + CASE_guard76654_0b0_theResult___fst_exp84615_0_ETC__q161 = + _theResult___exp__h585270; endcase end - always@(guard__h576653 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h576654 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h576653) + case (guard__h576654) 2'b0, 2'b01, 2'b10: - CASE_guard76653_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + CASE_guard76654_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard76653_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = - guard__h576653 == 2'b11 && + CASE_guard76654_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + guard__h576654 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h576653) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h576654) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36260,12 +36260,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163 = - (guard__h576653 == 2'b0) ? + (guard__h576654 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h576653 == 2'b01 || guard__h576653 == 2'b10 || - guard__h576653 == 2'b11) && + (guard__h576654 == 2'b01 || guard__h576654 == 2'b10 || + guard__h576654 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36276,21 +36276,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h595034 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h595035 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h595034) + case (guard__h595035) 2'b0, 2'b01, 2'b10: - CASE_guard95034_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + CASE_guard95035_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard95034_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = - guard__h595034 == 2'b11 && + CASE_guard95035_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + guard__h595035 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595034) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595035) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36299,12 +36299,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165 = - (guard__h595034 == 2'b0) ? + (guard__h595035 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h595034 == 2'b01 || guard__h595034 == 2'b10 || - guard__h595034 == 2'b11) && + (guard__h595035 == 2'b01 || guard__h595035 == 2'b10 || + guard__h595035 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36315,21 +36315,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h585965 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h585966 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h585965) + case (guard__h585966) 2'b0, 2'b01, 2'b10: - CASE_guard85965_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + CASE_guard85966_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard85965_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = - guard__h585965 == 2'b11 && + CASE_guard85966_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + guard__h585966 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h585965) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h585966) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36338,12 +36338,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167 = - (guard__h585965 == 2'b0) ? + (guard__h585966 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h585965 == 2'b01 || guard__h585965 == 2'b10 || - guard__h585965 == 2'b11) && + (guard__h585966 == 2'b01 || guard__h585966 == 2'b10 || + guard__h585966 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36354,21 +36354,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h585965 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h585966 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h585965) + case (guard__h585966) 2'b0, 2'b01, 2'b10: - CASE_guard85965_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + CASE_guard85966_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard85965_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = - guard__h585965 != 2'b11 || + CASE_guard85966_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + guard__h585966 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h585965) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h585966) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36377,12 +36377,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169 = - (guard__h585965 == 2'b0) ? + (guard__h585966 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h585965 != 2'b01 && guard__h585965 != 2'b10 && - guard__h585965 != 2'b11 || + guard__h585966 != 2'b01 && guard__h585966 != 2'b10 && + guard__h585966 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36393,21 +36393,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h595034 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h595035 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h595034) + case (guard__h595035) 2'b0, 2'b01, 2'b10: - CASE_guard95034_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + CASE_guard95035_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard95034_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = - guard__h595034 != 2'b11 || + CASE_guard95035_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + guard__h595035 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595034) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h595035) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36416,12 +36416,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171 = - (guard__h595034 == 2'b0) ? + (guard__h595035 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h595034 != 2'b01 && guard__h595034 != 2'b10 && - guard__h595034 != 2'b11 || + guard__h595035 != 2'b01 && guard__h595035 != 2'b10 && + guard__h595035 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36432,21 +36432,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h576653 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h576654 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h576653) + case (guard__h576654) 2'b0, 2'b01, 2'b10: - CASE_guard76653_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + CASE_guard76654_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard76653_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = - guard__h576653 != 2'b11 || + CASE_guard76654_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + guard__h576654 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h576653) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h576654) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36455,12 +36455,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173 = - (guard__h576653 == 2'b0) ? + (guard__h576654 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h576653 != 2'b01 && guard__h576653 != 2'b10 && - guard__h576653 != 2'b11 || + guard__h576654 != 2'b01 && guard__h576654 != 2'b10 && + guard__h576654 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36471,28 +36471,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h537349 or - _theResult___fst_exp__h545310 or _theResult___exp__h545965) + always@(guard__h537350 or + _theResult___fst_exp__h545311 or _theResult___exp__h545966) begin - case (guard__h537349) + case (guard__h537350) 2'b0: - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q183 = - _theResult___fst_exp__h545310; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q183 = + _theResult___fst_exp__h545311; 2'b01, 2'b10, 2'b11: - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q183 = - _theResult___exp__h545965; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q183 = + _theResult___exp__h545966; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h545310 or + _theResult___fst_exp__h545311 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10615 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10613 or - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q183) + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q183) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619 = - _theResult___fst_exp__h545310; + _theResult___fst_exp__h545311; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10615; @@ -36501,49 +36501,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10613; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619 = - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q183; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q183; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10619 = 11'd0; endcase end - always@(guard__h537349 or - _theResult___fst_exp__h545310 or - out_exp__h545968 or _theResult___exp__h545965) + always@(guard__h537350 or + _theResult___fst_exp__h545311 or + out_exp__h545969 or _theResult___exp__h545966) begin - case (guard__h537349) + case (guard__h537350) 2'b0, 2'b01: - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q184 = - _theResult___fst_exp__h545310; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q184 = + _theResult___fst_exp__h545311; 2'b10: - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q184 = - out_exp__h545968; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q184 = + out_exp__h545969; 2'b11: - CASE_guard37349_0b0_theResult___fst_exp45310_0_ETC__q184 = - _theResult___exp__h545965; + CASE_guard37350_0b0_theResult___fst_exp45311_0_ETC__q184 = + _theResult___exp__h545966; endcase end - always@(guard__h546661 or - _theResult___fst_exp__h554887 or _theResult___exp__h555616) + always@(guard__h546662 or + _theResult___fst_exp__h554888 or _theResult___exp__h555617) begin - case (guard__h546661) + case (guard__h546662) 2'b0: - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q185 = - _theResult___fst_exp__h554887; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q185 = + _theResult___fst_exp__h554888; 2'b01, 2'b10, 2'b11: - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q185 = - _theResult___exp__h555616; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q185 = + _theResult___exp__h555617; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h554887 or + _theResult___fst_exp__h554888 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10653 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10651 or - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q185) + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q185) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657 = - _theResult___fst_exp__h554887; + _theResult___fst_exp__h554888; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10653; @@ -36552,49 +36552,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10651; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657 = - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q185; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q185; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10657 = 11'd0; endcase end - always@(guard__h546661 or - _theResult___fst_exp__h554887 or - out_exp__h555619 or _theResult___exp__h555616) + always@(guard__h546662 or + _theResult___fst_exp__h554888 or + out_exp__h555620 or _theResult___exp__h555617) begin - case (guard__h546661) + case (guard__h546662) 2'b0, 2'b01: - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q186 = - _theResult___fst_exp__h554887; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q186 = + _theResult___fst_exp__h554888; 2'b10: - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q186 = - out_exp__h555619; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q186 = + out_exp__h555620; 2'b11: - CASE_guard46661_0b0_theResult___fst_exp54887_0_ETC__q186 = - _theResult___exp__h555616; + CASE_guard46662_0b0_theResult___fst_exp54888_0_ETC__q186 = + _theResult___exp__h555617; endcase end - always@(guard__h555730 or - _theResult___fst_exp__h563720 or _theResult___exp__h564400) + always@(guard__h555731 or + _theResult___fst_exp__h563721 or _theResult___exp__h564401) begin - case (guard__h555730) + case (guard__h555731) 2'b0: - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q187 = - _theResult___fst_exp__h563720; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q187 = + _theResult___fst_exp__h563721; 2'b01, 2'b10, 2'b11: - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q187 = - _theResult___exp__h564400; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q187 = + _theResult___exp__h564401; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h563720 or + _theResult___fst_exp__h563721 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10684 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10682 or - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q187) + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q187) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688 = - _theResult___fst_exp__h563720; + _theResult___fst_exp__h563721; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10684; @@ -36603,49 +36603,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10682; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688 = - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q187; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q187; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10688 = 11'd0; endcase end - always@(guard__h555730 or - _theResult___fst_exp__h563720 or - out_exp__h564403 or _theResult___exp__h564400) + always@(guard__h555731 or + _theResult___fst_exp__h563721 or + out_exp__h564404 or _theResult___exp__h564401) begin - case (guard__h555730) + case (guard__h555731) 2'b0, 2'b01: - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q188 = - _theResult___fst_exp__h563720; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q188 = + _theResult___fst_exp__h563721; 2'b10: - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q188 = - out_exp__h564403; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q188 = + out_exp__h564404; 2'b11: - CASE_guard55730_0b0_theResult___fst_exp63720_0_ETC__q188 = - _theResult___exp__h564400; + CASE_guard55731_0b0_theResult___fst_exp63721_0_ETC__q188 = + _theResult___exp__h564401; endcase end - always@(guard__h585965 or - _theResult___fst_exp__h594191 or _theResult___exp__h594920) + always@(guard__h585966 or + _theResult___fst_exp__h594192 or _theResult___exp__h594921) begin - case (guard__h585965) + case (guard__h585966) 2'b0: - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q189 = - _theResult___fst_exp__h594191; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q189 = + _theResult___fst_exp__h594192; 2'b01, 2'b10, 2'b11: - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q189 = - _theResult___exp__h594920; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q189 = + _theResult___exp__h594921; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h594191 or + _theResult___fst_exp__h594192 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9883 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9881 or - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q189) + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q189) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887 = - _theResult___fst_exp__h594191; + _theResult___fst_exp__h594192; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9883; @@ -36654,49 +36654,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9881; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887 = - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q189; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q189; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9887 = 11'd0; endcase end - always@(guard__h585965 or - _theResult___fst_exp__h594191 or - out_exp__h594923 or _theResult___exp__h594920) + always@(guard__h585966 or + _theResult___fst_exp__h594192 or + out_exp__h594924 or _theResult___exp__h594921) begin - case (guard__h585965) + case (guard__h585966) 2'b0, 2'b01: - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q190 = - _theResult___fst_exp__h594191; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q190 = + _theResult___fst_exp__h594192; 2'b10: - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q190 = - out_exp__h594923; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q190 = + out_exp__h594924; 2'b11: - CASE_guard85965_0b0_theResult___fst_exp94191_0_ETC__q190 = - _theResult___exp__h594920; + CASE_guard85966_0b0_theResult___fst_exp94192_0_ETC__q190 = + _theResult___exp__h594921; endcase end - always@(guard__h595034 or - _theResult___fst_exp__h603024 or _theResult___exp__h603704) + always@(guard__h595035 or + _theResult___fst_exp__h603025 or _theResult___exp__h603705) begin - case (guard__h595034) + case (guard__h595035) 2'b0: - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q191 = - _theResult___fst_exp__h603024; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q191 = + _theResult___fst_exp__h603025; 2'b01, 2'b10, 2'b11: - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q191 = - _theResult___exp__h603704; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q191 = + _theResult___exp__h603705; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h603024 or + _theResult___fst_exp__h603025 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9914 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9912 or - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q191) + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q191) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918 = - _theResult___fst_exp__h603024; + _theResult___fst_exp__h603025; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9914; @@ -36705,44 +36705,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9912; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918 = - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q191; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q191; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9918 = 11'd0; endcase end - always@(guard__h595034 or - _theResult___fst_exp__h603024 or - out_exp__h603707 or _theResult___exp__h603704) + always@(guard__h595035 or + _theResult___fst_exp__h603025 or + out_exp__h603708 or _theResult___exp__h603705) begin - case (guard__h595034) + case (guard__h595035) 2'b0, 2'b01: - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q192 = - _theResult___fst_exp__h603024; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q192 = + _theResult___fst_exp__h603025; 2'b10: - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q192 = - out_exp__h603707; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q192 = + out_exp__h603708; 2'b11: - CASE_guard95034_0b0_theResult___fst_exp03024_0_ETC__q192 = - _theResult___exp__h603704; + CASE_guard95035_0b0_theResult___fst_exp03025_0_ETC__q192 = + _theResult___exp__h603705; endcase end - always@(guard__h546661 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h546662 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h546661) + case (guard__h546662) 2'b0, 2'b01, 2'b10: - CASE_guard46661_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + CASE_guard46662_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard46661_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = - guard__h546661 == 2'b11 && + CASE_guard46662_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + guard__h546662 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h546661) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h546662) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36752,12 +36752,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194 = - (guard__h546661 == 2'b0) ? + (guard__h546662 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h546661 == 2'b01 || guard__h546661 == 2'b10 || - guard__h546661 == 2'b11) && + (guard__h546662 == 2'b01 || guard__h546662 == 2'b10 || + guard__h546662 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36768,23 +36768,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h537349 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h537350 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h537349) + case (guard__h537350) 2'b0, 2'b01, 2'b10: - CASE_guard37349_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + CASE_guard37350_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard37349_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = - guard__h537349 == 2'b11 && + CASE_guard37350_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + guard__h537350 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537349) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537350) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36794,12 +36794,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196 = - (guard__h537349 == 2'b0) ? + (guard__h537350 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h537349 == 2'b01 || guard__h537349 == 2'b10 || - guard__h537349 == 2'b11) && + (guard__h537350 == 2'b01 || guard__h537350 == 2'b10 || + guard__h537350 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36810,23 +36810,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h555730 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h555731 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h555730) + case (guard__h555731) 2'b0, 2'b01, 2'b10: - CASE_guard55730_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + CASE_guard55731_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard55730_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = - guard__h555730 == 2'b11 && + CASE_guard55731_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + guard__h555731 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h555730) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h555731) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36836,12 +36836,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198 = - (guard__h555730 == 2'b0) ? + (guard__h555731 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h555730 == 2'b01 || guard__h555730 == 2'b10 || - guard__h555730 == 2'b11) && + (guard__h555731 == 2'b01 || guard__h555731 == 2'b10 || + guard__h555731 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36852,23 +36852,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h546661 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h546662 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h546661) + case (guard__h546662) 2'b0, 2'b01, 2'b10: - CASE_guard46661_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + CASE_guard46662_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard46661_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = - guard__h546661 != 2'b11 || + CASE_guard46662_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + guard__h546662 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h546661) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h546662) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36878,12 +36878,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200 = - (guard__h546661 == 2'b0) ? + (guard__h546662 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h546661 != 2'b01 && guard__h546661 != 2'b10 && - guard__h546661 != 2'b11 || + guard__h546662 != 2'b01 && guard__h546662 != 2'b10 && + guard__h546662 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36894,23 +36894,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h555730 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h555731 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h555730) + case (guard__h555731) 2'b0, 2'b01, 2'b10: - CASE_guard55730_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + CASE_guard55731_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard55730_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = - guard__h555730 != 2'b11 || + CASE_guard55731_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + guard__h555731 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h555730) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h555731) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36920,12 +36920,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202 = - (guard__h555730 == 2'b0) ? + (guard__h555731 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h555730 != 2'b01 && guard__h555730 != 2'b10 && - guard__h555730 != 2'b11 || + guard__h555731 != 2'b01 && guard__h555731 != 2'b10 && + guard__h555731 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36936,23 +36936,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h537349 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h537350 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h537349) + case (guard__h537350) 2'b0, 2'b01, 2'b10: - CASE_guard37349_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + CASE_guard37350_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard37349_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = - guard__h537349 != 2'b11 || + CASE_guard37350_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + guard__h537350 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537349) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h537350) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36962,12 +36962,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204 = - (guard__h537349 == 2'b0) ? + (guard__h537350 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h537349 != 2'b01 && guard__h537349 != 2'b10 && - guard__h537349 != 2'b11 || + guard__h537350 != 2'b01 && guard__h537350 != 2'b10 && + guard__h537350 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36978,28 +36978,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h537349 or - _theResult___snd__h545261 or _theResult___sfd__h545966) + always@(guard__h537350 or + _theResult___snd__h545262 or _theResult___sfd__h545967) begin - case (guard__h537349) + case (guard__h537350) 2'b0: - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q205 = - _theResult___snd__h545261[56:5]; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q205 = + _theResult___snd__h545262[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q205 = - _theResult___sfd__h545966; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q205 = + _theResult___sfd__h545967; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h545261 or + _theResult___snd__h545262 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10710 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10708 or - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q205) + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q205) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714 = - _theResult___snd__h545261[56:5]; + _theResult___snd__h545262[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10710; @@ -37008,48 +37008,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10708; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714 = - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q205; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q205; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10714 = 52'd0; endcase end - always@(guard__h537349 or - _theResult___snd__h545261 or - out_sfd__h545969 or _theResult___sfd__h545966) + always@(guard__h537350 or + _theResult___snd__h545262 or + out_sfd__h545970 or _theResult___sfd__h545967) begin - case (guard__h537349) + case (guard__h537350) 2'b0, 2'b01: - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q206 = - _theResult___snd__h545261[56:5]; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q206 = + _theResult___snd__h545262[56:5]; 2'b10: - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q206 = - out_sfd__h545969; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q206 = + out_sfd__h545970; 2'b11: - CASE_guard37349_0b0_theResult___snd45261_BITS__ETC__q206 = - _theResult___sfd__h545966; + CASE_guard37350_0b0_theResult___snd45262_BITS__ETC__q206 = + _theResult___sfd__h545967; endcase end - always@(guard__h546661 or sfdin__h554881 or _theResult___sfd__h555617) + always@(guard__h546662 or sfdin__h554882 or _theResult___sfd__h555618) begin - case (guard__h546661) + case (guard__h546662) 2'b0: - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q207 = - sfdin__h554881[56:5]; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q207 = + sfdin__h554882[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q207 = - _theResult___sfd__h555617; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q207 = + _theResult___sfd__h555618; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h554881 or + sfdin__h554882 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10736 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10734 or - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q207) + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q207) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740 = - sfdin__h554881[56:5]; + sfdin__h554882[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10736; @@ -37058,48 +37058,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10734; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740 = - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q207; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q207; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10740 = 52'd0; endcase end - always@(guard__h546661 or - sfdin__h554881 or out_sfd__h555620 or _theResult___sfd__h555617) + always@(guard__h546662 or + sfdin__h554882 or out_sfd__h555621 or _theResult___sfd__h555618) begin - case (guard__h546661) + case (guard__h546662) 2'b0, 2'b01: - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q208 = - sfdin__h554881[56:5]; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q208 = + sfdin__h554882[56:5]; 2'b10: - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q208 = - out_sfd__h555620; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q208 = + out_sfd__h555621; 2'b11: - CASE_guard46661_0b0_sfdin54881_BITS_56_TO_5_0b_ETC__q208 = - _theResult___sfd__h555617; + CASE_guard46662_0b0_sfdin54882_BITS_56_TO_5_0b_ETC__q208 = + _theResult___sfd__h555618; endcase end - always@(guard__h555730 or - _theResult___snd__h563666 or _theResult___sfd__h564401) + always@(guard__h555731 or + _theResult___snd__h563667 or _theResult___sfd__h564402) begin - case (guard__h555730) + case (guard__h555731) 2'b0: - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q209 = - _theResult___snd__h563666[56:5]; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q209 = + _theResult___snd__h563667[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q209 = - _theResult___sfd__h564401; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q209 = + _theResult___sfd__h564402; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h563666 or + _theResult___snd__h563667 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10755 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10753 or - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q209) + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q209) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759 = - _theResult___snd__h563666[56:5]; + _theResult___snd__h563667[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10755; @@ -37108,49 +37108,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10753; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759 = - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q209; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q209; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d10759 = 52'd0; endcase end - always@(guard__h555730 or - _theResult___snd__h563666 or - out_sfd__h564404 or _theResult___sfd__h564401) + always@(guard__h555731 or + _theResult___snd__h563667 or + out_sfd__h564405 or _theResult___sfd__h564402) begin - case (guard__h555730) + case (guard__h555731) 2'b0, 2'b01: - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q210 = - _theResult___snd__h563666[56:5]; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q210 = + _theResult___snd__h563667[56:5]; 2'b10: - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q210 = - out_sfd__h564404; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q210 = + out_sfd__h564405; 2'b11: - CASE_guard55730_0b0_theResult___snd63666_BITS__ETC__q210 = - _theResult___sfd__h564401; + CASE_guard55731_0b0_theResult___snd63667_BITS__ETC__q210 = + _theResult___sfd__h564402; endcase end - always@(guard__h507808 or - _theResult___fst_exp__h516034 or _theResult___exp__h516763) + always@(guard__h507809 or + _theResult___fst_exp__h516035 or _theResult___exp__h516764) begin - case (guard__h507808) + case (guard__h507809) 2'b0: - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q211 = - _theResult___fst_exp__h516034; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q211 = + _theResult___fst_exp__h516035; 2'b01, 2'b10, 2'b11: - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q211 = - _theResult___exp__h516763; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q211 = + _theResult___exp__h516764; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h516034 or + _theResult___fst_exp__h516035 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9173 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9171 or - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q211) + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q211) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9177 = - _theResult___fst_exp__h516034; + _theResult___fst_exp__h516035; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9177 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9173; @@ -37159,49 +37159,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9171; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9177 = - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q211; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q211; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9177 = 11'd0; endcase end - always@(guard__h507808 or - _theResult___fst_exp__h516034 or - out_exp__h516766 or _theResult___exp__h516763) + always@(guard__h507809 or + _theResult___fst_exp__h516035 or + out_exp__h516767 or _theResult___exp__h516764) begin - case (guard__h507808) + case (guard__h507809) 2'b0, 2'b01: - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q212 = - _theResult___fst_exp__h516034; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q212 = + _theResult___fst_exp__h516035; 2'b10: - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q212 = - out_exp__h516766; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q212 = + out_exp__h516767; 2'b11: - CASE_guard07808_0b0_theResult___fst_exp16034_0_ETC__q212 = - _theResult___exp__h516763; + CASE_guard07809_0b0_theResult___fst_exp16035_0_ETC__q212 = + _theResult___exp__h516764; endcase end - always@(guard__h516877 or - _theResult___fst_exp__h524867 or _theResult___exp__h525547) + always@(guard__h516878 or + _theResult___fst_exp__h524868 or _theResult___exp__h525548) begin - case (guard__h516877) + case (guard__h516878) 2'b0: - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q213 = - _theResult___fst_exp__h524867; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q213 = + _theResult___fst_exp__h524868; 2'b01, 2'b10, 2'b11: - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q213 = - _theResult___exp__h525547; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q213 = + _theResult___exp__h525548; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h524867 or + _theResult___fst_exp__h524868 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9204 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9202 or - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q213) + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q213) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9208 = - _theResult___fst_exp__h524867; + _theResult___fst_exp__h524868; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9208 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9204; @@ -37210,49 +37210,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9202; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9208 = - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q213; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q213; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9208 = 11'd0; endcase end - always@(guard__h516877 or - _theResult___fst_exp__h524867 or - out_exp__h525550 or _theResult___exp__h525547) + always@(guard__h516878 or + _theResult___fst_exp__h524868 or + out_exp__h525551 or _theResult___exp__h525548) begin - case (guard__h516877) + case (guard__h516878) 2'b0, 2'b01: - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q214 = - _theResult___fst_exp__h524867; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q214 = + _theResult___fst_exp__h524868; 2'b10: - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q214 = - out_exp__h525550; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q214 = + out_exp__h525551; 2'b11: - CASE_guard16877_0b0_theResult___fst_exp24867_0_ETC__q214 = - _theResult___exp__h525547; + CASE_guard16878_0b0_theResult___fst_exp24868_0_ETC__q214 = + _theResult___exp__h525548; endcase end - always@(guard__h498496 or - _theResult___snd__h506408 or _theResult___sfd__h507113) + always@(guard__h498497 or + _theResult___snd__h506409 or _theResult___sfd__h507114) begin - case (guard__h498496) + case (guard__h498497) 2'b0: - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q215 = - _theResult___snd__h506408[56:5]; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q215 = + _theResult___snd__h506409[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q215 = - _theResult___sfd__h507113; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q215 = + _theResult___sfd__h507114; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h506408 or + _theResult___snd__h506409 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9230 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9228 or - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q215) + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q215) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9234 = - _theResult___snd__h506408[56:5]; + _theResult___snd__h506409[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9234 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9230; @@ -37261,48 +37261,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9228; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9234 = - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q215; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q215; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9234 = 52'd0; endcase end - always@(guard__h498496 or - _theResult___snd__h506408 or - out_sfd__h507116 or _theResult___sfd__h507113) + always@(guard__h498497 or + _theResult___snd__h506409 or + out_sfd__h507117 or _theResult___sfd__h507114) begin - case (guard__h498496) + case (guard__h498497) 2'b0, 2'b01: - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q216 = - _theResult___snd__h506408[56:5]; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q216 = + _theResult___snd__h506409[56:5]; 2'b10: - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q216 = - out_sfd__h507116; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q216 = + out_sfd__h507117; 2'b11: - CASE_guard98496_0b0_theResult___snd06408_BITS__ETC__q216 = - _theResult___sfd__h507113; + CASE_guard98497_0b0_theResult___snd06409_BITS__ETC__q216 = + _theResult___sfd__h507114; endcase end - always@(guard__h507808 or sfdin__h516028 or _theResult___sfd__h516764) + always@(guard__h507809 or sfdin__h516029 or _theResult___sfd__h516765) begin - case (guard__h507808) + case (guard__h507809) 2'b0: - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q217 = - sfdin__h516028[56:5]; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q217 = + sfdin__h516029[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q217 = - _theResult___sfd__h516764; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q217 = + _theResult___sfd__h516765; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h516028 or + sfdin__h516029 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9257 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9255 or - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q217) + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q217) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9261 = - sfdin__h516028[56:5]; + sfdin__h516029[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9261 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9257; @@ -37311,48 +37311,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9255; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9261 = - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q217; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q217; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9261 = 52'd0; endcase end - always@(guard__h507808 or - sfdin__h516028 or out_sfd__h516767 or _theResult___sfd__h516764) + always@(guard__h507809 or + sfdin__h516029 or out_sfd__h516768 or _theResult___sfd__h516765) begin - case (guard__h507808) + case (guard__h507809) 2'b0, 2'b01: - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q218 = - sfdin__h516028[56:5]; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q218 = + sfdin__h516029[56:5]; 2'b10: - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q218 = - out_sfd__h516767; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q218 = + out_sfd__h516768; 2'b11: - CASE_guard07808_0b0_sfdin16028_BITS_56_TO_5_0b_ETC__q218 = - _theResult___sfd__h516764; + CASE_guard07809_0b0_sfdin16029_BITS_56_TO_5_0b_ETC__q218 = + _theResult___sfd__h516765; endcase end - always@(guard__h516877 or - _theResult___snd__h524813 or _theResult___sfd__h525548) + always@(guard__h516878 or + _theResult___snd__h524814 or _theResult___sfd__h525549) begin - case (guard__h516877) + case (guard__h516878) 2'b0: - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q219 = - _theResult___snd__h524813[56:5]; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q219 = + _theResult___snd__h524814[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q219 = - _theResult___sfd__h525548; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q219 = + _theResult___sfd__h525549; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h524813 or + _theResult___snd__h524814 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9276 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9274 or - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q219) + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q219) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9280 = - _theResult___snd__h524813[56:5]; + _theResult___snd__h524814[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9280 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9276; @@ -37361,49 +37361,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9274; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9280 = - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q219; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q219; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9280 = 52'd0; endcase end - always@(guard__h516877 or - _theResult___snd__h524813 or - out_sfd__h525551 or _theResult___sfd__h525548) + always@(guard__h516878 or + _theResult___snd__h524814 or + out_sfd__h525552 or _theResult___sfd__h525549) begin - case (guard__h516877) + case (guard__h516878) 2'b0, 2'b01: - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q220 = - _theResult___snd__h524813[56:5]; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q220 = + _theResult___snd__h524814[56:5]; 2'b10: - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q220 = - out_sfd__h525551; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q220 = + out_sfd__h525552; 2'b11: - CASE_guard16877_0b0_theResult___snd24813_BITS__ETC__q220 = - _theResult___sfd__h525548; + CASE_guard16878_0b0_theResult___snd24814_BITS__ETC__q220 = + _theResult___sfd__h525549; endcase end - always@(guard__h576653 or - _theResult___snd__h584565 or _theResult___sfd__h585270) + always@(guard__h576654 or + _theResult___snd__h584566 or _theResult___sfd__h585271) begin - case (guard__h576653) + case (guard__h576654) 2'b0: - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q221 = - _theResult___snd__h584565[56:5]; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q221 = + _theResult___snd__h584566[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q221 = - _theResult___sfd__h585270; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q221 = + _theResult___sfd__h585271; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h584565 or + _theResult___snd__h584566 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9940 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9938 or - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q221) + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q221) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9944 = - _theResult___snd__h584565[56:5]; + _theResult___snd__h584566[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9944 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9940; @@ -37412,48 +37412,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9938; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9944 = - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q221; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q221; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9944 = 52'd0; endcase end - always@(guard__h576653 or - _theResult___snd__h584565 or - out_sfd__h585273 or _theResult___sfd__h585270) + always@(guard__h576654 or + _theResult___snd__h584566 or + out_sfd__h585274 or _theResult___sfd__h585271) begin - case (guard__h576653) + case (guard__h576654) 2'b0, 2'b01: - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q222 = - _theResult___snd__h584565[56:5]; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q222 = + _theResult___snd__h584566[56:5]; 2'b10: - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q222 = - out_sfd__h585273; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q222 = + out_sfd__h585274; 2'b11: - CASE_guard76653_0b0_theResult___snd84565_BITS__ETC__q222 = - _theResult___sfd__h585270; + CASE_guard76654_0b0_theResult___snd84566_BITS__ETC__q222 = + _theResult___sfd__h585271; endcase end - always@(guard__h585965 or sfdin__h594185 or _theResult___sfd__h594921) + always@(guard__h585966 or sfdin__h594186 or _theResult___sfd__h594922) begin - case (guard__h585965) + case (guard__h585966) 2'b0: - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q223 = - sfdin__h594185[56:5]; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q223 = + sfdin__h594186[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q223 = - _theResult___sfd__h594921; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q223 = + _theResult___sfd__h594922; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h594185 or + sfdin__h594186 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9966 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9964 or - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q223) + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q223) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9970 = - sfdin__h594185[56:5]; + sfdin__h594186[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9970 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9966; @@ -37462,24 +37462,24 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9964; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9970 = - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q223; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q223; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9970 = 52'd0; endcase end - always@(guard__h585965 or - sfdin__h594185 or out_sfd__h594924 or _theResult___sfd__h594921) + always@(guard__h585966 or + sfdin__h594186 or out_sfd__h594925 or _theResult___sfd__h594922) begin - case (guard__h585965) + case (guard__h585966) 2'b0, 2'b01: - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q224 = - sfdin__h594185[56:5]; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q224 = + sfdin__h594186[56:5]; 2'b10: - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q224 = - out_sfd__h594924; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q224 = + out_sfd__h594925; 2'b11: - CASE_guard85965_0b0_sfdin94185_BITS_56_TO_5_0b_ETC__q224 = - _theResult___sfd__h594921; + CASE_guard85966_0b0_sfdin94186_BITS_56_TO_5_0b_ETC__q224 = + _theResult___sfd__h594922; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -37514,28 +37514,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ_first__486_BI_ETC___d10967; endcase end - always@(guard__h595034 or - _theResult___snd__h602970 or _theResult___sfd__h603705) + always@(guard__h595035 or + _theResult___snd__h602971 or _theResult___sfd__h603706) begin - case (guard__h595034) + case (guard__h595035) 2'b0: - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q225 = - _theResult___snd__h602970[56:5]; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q225 = + _theResult___snd__h602971[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q225 = - _theResult___sfd__h603705; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q225 = + _theResult___sfd__h603706; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h602970 or + _theResult___snd__h602971 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9985 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9983 or - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q225) + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q225) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989 = - _theResult___snd__h602970[56:5]; + _theResult___snd__h602971[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9985; @@ -37544,25 +37544,25 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9983; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989 = - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q225; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q225; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__486_ETC___d9989 = 52'd0; endcase end - always@(guard__h595034 or - _theResult___snd__h602970 or - out_sfd__h603708 or _theResult___sfd__h603705) + always@(guard__h595035 or + _theResult___snd__h602971 or + out_sfd__h603709 or _theResult___sfd__h603706) begin - case (guard__h595034) + case (guard__h595035) 2'b0, 2'b01: - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q226 = - _theResult___snd__h602970[56:5]; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q226 = + _theResult___snd__h602971[56:5]; 2'b10: - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q226 = - out_sfd__h603708; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q226 = + out_sfd__h603709; 2'b11: - CASE_guard95034_0b0_theResult___snd02970_BITS__ETC__q226 = - _theResult___sfd__h603705; + CASE_guard95035_0b0_theResult___snd02971_BITS__ETC__q226 = + _theResult___sfd__h603706; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -38711,7 +38711,7 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[13:11], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[9:0] }; - 6'd21, 6'd22, 6'd29: + 6'd21: data_warl_xformed__h731607 = { 52'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], @@ -38721,6 +38721,21 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[5:3], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[1:0] }; + 6'd22, 6'd29: + data_warl_xformed__h731607 = + { 52'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[9], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[7], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[5], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[3], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[1], + 1'd0 }; 6'd32, 6'd33, 6'd34, 6'd35: data_warl_xformed__h731607 = 64'd0; 6'd37: data_warl_xformed__h731607 = @@ -41756,7 +41771,7 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] != 5'd19 && rob$deqPort_1_deq_data[329:325] != 5'd20) $write("instret:%0d PC:0x%0h instr:0x%08h", - commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15770, + commitStage_rg_serial_num_4635_PLUS_IF_rob_deq_ETC___d15776, rob$deqPort_1_deq_data[425:362], rob$deqPort_1_deq_data[361:330], " iType:"); @@ -42293,7 +42308,7 @@ module mkCore(CLK, $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h609134 == 2'd0) + v__h609135 == 2'd0) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (WILL_FIRE_RL_renameStage_doRenaming_SystemInst && diff --git a/src_SSITH_P3/Verilog_RTL_sim/mkCoreW.v b/src_SSITH_P3/Verilog_RTL_sim/mkCoreW.v index ea0a6ee..bb0d3be 100644 --- a/src_SSITH_P3/Verilog_RTL_sim/mkCoreW.v +++ b/src_SSITH_P3/Verilog_RTL_sim/mkCoreW.v @@ -2716,22 +2716,22 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_rl_dm_hart0_reset_wait assign CAN_FIRE_RL_rl_dm_hart0_reset_wait = (rg_hart0_reset_delay != 8'd1 || - debug_module$RDY_hart0_reset_client_response_put && - proc$RDY_start) && + proc$RDY_start && + debug_module$RDY_hart0_reset_client_response_put) && rg_hart0_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_dm_hart0_reset_wait = CAN_FIRE_RL_rl_dm_hart0_reset_wait && !EN_start ; // rule RL_ClientServerRequest assign CAN_FIRE_RL_ClientServerRequest = - debug_module$RDY_hart0_client_run_halt_request_get && - proc$RDY_hart0_run_halt_server_request_put ; + proc$RDY_hart0_run_halt_server_request_put && + debug_module$RDY_hart0_client_run_halt_request_get ; assign WILL_FIRE_RL_ClientServerRequest = CAN_FIRE_RL_ClientServerRequest ; // rule RL_ClientServerResponse assign CAN_FIRE_RL_ClientServerResponse = - debug_module$RDY_hart0_client_run_halt_response_put && - proc$RDY_hart0_run_halt_server_response_get ; + proc$RDY_hart0_run_halt_server_response_get && + debug_module$RDY_hart0_client_run_halt_response_put ; assign WILL_FIRE_RL_ClientServerResponse = CAN_FIRE_RL_ClientServerResponse ; @@ -2743,25 +2743,25 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_mkConnectionGetPut_1 assign CAN_FIRE_RL_mkConnectionGetPut_1 = - v_td2_to_td_0$RDY_in_put && proc$RDY_v_to_TV_0_get ; + proc$RDY_v_to_TV_0_get && v_td2_to_td_0$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_1 = CAN_FIRE_RL_mkConnectionGetPut_1 ; // rule RL_mkConnectionGetPut_2 assign CAN_FIRE_RL_mkConnectionGetPut_2 = - v_td2_to_td_0$RDY_out_get && tv_encode$RDY_v_cpu_in_0_put ; + tv_encode$RDY_v_cpu_in_0_put && v_td2_to_td_0$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_2 = CAN_FIRE_RL_mkConnectionGetPut_2 ; // rule RL_mkConnectionGetPut_3 assign CAN_FIRE_RL_mkConnectionGetPut_3 = - v_td2_to_td_1$RDY_in_put && proc$RDY_v_to_TV_1_get ; + proc$RDY_v_to_TV_1_get && v_td2_to_td_1$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_3 = CAN_FIRE_RL_mkConnectionGetPut_3 ; // rule RL_mkConnectionGetPut_4 assign CAN_FIRE_RL_mkConnectionGetPut_4 = - v_td2_to_td_1$RDY_out_get && tv_encode$RDY_v_cpu_in_1_put ; + tv_encode$RDY_v_cpu_in_1_put && v_td2_to_td_1$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_4 = CAN_FIRE_RL_mkConnectionGetPut_4 ; diff --git a/src_SSITH_P3/Verilog_RTL_sim/mkP3_Core.v b/src_SSITH_P3/Verilog_RTL_sim/mkP3_Core.v index 1b6b7c2..b1f7022 100644 --- a/src_SSITH_P3/Verilog_RTL_sim/mkP3_Core.v +++ b/src_SSITH_P3/Verilog_RTL_sim/mkP3_Core.v @@ -1434,7 +1434,7 @@ module mkP3_Core(CLK, // rule RL_rl_ndm_reset_wait assign CAN_FIRE_RL_rl_ndm_reset_wait = (rg_ndm_reset_delay != 8'd1 || - corew$RDY_ndm_reset_client_response_put && corew$RDY_start) && + corew$RDY_start && corew$RDY_ndm_reset_client_response_put) && rg_ndm_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_ndm_reset_wait = CAN_FIRE_RL_rl_ndm_reset_wait ; diff --git a/src_SSITH_P3/xilinx_ip/hdl/mkCore.v b/src_SSITH_P3/xilinx_ip/hdl/mkCore.v index 4a78ad7..1768535 100644 --- a/src_SSITH_P3/xilinx_ip/hdl/mkCore.v +++ b/src_SSITH_P3/xilinx_ip/hdl/mkCore.v @@ -4514,36 +4514,36 @@ module mkCore(CLK, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9944, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2875, - addr__h290067, - curData__h192916, - data_out__h737644, + addr__h290068, + curData__h192917, + data_out__h737401, data_warl_xformed__h722429, rVal1__h609051, rVal1__h633779, trap_val__h710482, - x__h197126, + x__h197127, x__h723033; reg [51 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19, - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217, - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218, - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219, - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220, - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205, - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206, - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207, - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208, - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209, - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210, - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221, - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222, - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223, - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224, - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225, - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226, - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215, - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216, + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217, + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218, + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219, + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220, + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205, + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206, + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207, + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208, + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209, + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210, + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221, + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222, + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223, + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224, + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225, + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226, + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215, + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644, @@ -4555,45 +4555,45 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874; reg [31 : 0] SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_071_ETC___d1348, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_31_TO_0_ETC___d1398; - reg [22 : 0] CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82, - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83, - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86, - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87, - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88, - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89, - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119, - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120, - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49, - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50, - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117, - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118, - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47, - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48, - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121, - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122, - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51, - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52, - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123, - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124, - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53, - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54, - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84, - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85, - _theResult___fst_sfd__h346068, - _theResult___fst_sfd__h354791, - _theResult___fst_sfd__h363373, - _theResult___fst_sfd__h372557, - _theResult___fst_sfd__h381193, - _theResult___fst_sfd__h391767, - _theResult___fst_sfd__h400488, - _theResult___fst_sfd__h409070, - _theResult___fst_sfd__h418254, - _theResult___fst_sfd__h426890, - _theResult___fst_sfd__h437462, - _theResult___fst_sfd__h446183, - _theResult___fst_sfd__h454765, - _theResult___fst_sfd__h463949, - _theResult___fst_sfd__h472585; + reg [22 : 0] CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82, + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83, + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86, + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87, + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88, + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89, + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119, + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120, + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49, + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50, + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117, + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118, + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47, + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48, + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121, + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122, + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51, + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52, + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123, + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124, + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53, + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54, + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84, + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85, + _theResult___fst_sfd__h346069, + _theResult___fst_sfd__h354792, + _theResult___fst_sfd__h363374, + _theResult___fst_sfd__h372558, + _theResult___fst_sfd__h381194, + _theResult___fst_sfd__h391768, + _theResult___fst_sfd__h400489, + _theResult___fst_sfd__h409071, + _theResult___fst_sfd__h418255, + _theResult___fst_sfd__h426891, + _theResult___fst_sfd__h437463, + _theResult___fst_sfd__h446184, + _theResult___fst_sfd__h454766, + _theResult___fst_sfd__h463950, + _theResult___fst_sfd__h472586; reg [20 : 0] CASE_coreFix_aluExe_0_dispToRegQfirst_BITS_15_ETC__q285, CASE_coreFix_aluExe_0_regToExeQfirst_BITS_416_ETC__q231, CASE_coreFix_aluExe_0_rsAludispatchData_BITS__ETC__q282, @@ -4622,24 +4622,24 @@ module mkCore(CLK, reg [10 : 0] CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q14, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16, CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18, - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211, - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212, - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213, - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214, - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183, - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184, - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185, - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186, - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187, - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188, - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160, - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161, - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189, - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190, - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191, - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192, - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143, - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144, + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211, + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212, + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213, + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214, + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183, + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184, + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185, + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186, + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187, + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188, + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160, + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161, + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189, + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190, + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191, + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192, + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143, + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573, @@ -4649,47 +4649,47 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803; - reg [7 : 0] CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67, - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68, - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75, - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76, - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80, - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81, - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104, - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105, - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34, - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35, - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102, - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103, - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32, - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33, - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110, - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111, - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40, - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41, - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115, - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116, - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45, - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46, - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69, - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70, + reg [7 : 0] CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67, + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68, + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75, + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76, + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80, + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81, + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104, + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105, + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34, + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35, + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102, + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103, + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32, + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33, + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110, + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111, + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40, + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41, + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115, + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116, + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45, + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46, + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69, + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70, SEL_ARR_coreFix_memExe_respLrScAmoQ_data_0_071_ETC___d1373, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_7_TO_0__ETC___d1420, - _theResult___fst_exp__h346067, - _theResult___fst_exp__h354790, - _theResult___fst_exp__h363372, - _theResult___fst_exp__h372556, - _theResult___fst_exp__h381192, - _theResult___fst_exp__h391766, - _theResult___fst_exp__h400487, - _theResult___fst_exp__h409069, - _theResult___fst_exp__h418253, - _theResult___fst_exp__h426889, - _theResult___fst_exp__h437461, - _theResult___fst_exp__h446182, - _theResult___fst_exp__h454764, - _theResult___fst_exp__h463948, - _theResult___fst_exp__h472584; + _theResult___fst_exp__h346068, + _theResult___fst_exp__h354791, + _theResult___fst_exp__h363373, + _theResult___fst_exp__h372557, + _theResult___fst_exp__h381193, + _theResult___fst_exp__h391767, + _theResult___fst_exp__h400488, + _theResult___fst_exp__h409070, + _theResult___fst_exp__h418254, + _theResult___fst_exp__h426890, + _theResult___fst_exp__h437462, + _theResult___fst_exp__h446183, + _theResult___fst_exp__h454765, + _theResult___fst_exp__h463949, + _theResult___fst_exp__h472585; reg [5 : 0] CASE_mmioToPlatform_pRq_enq_x_BITS_37_TO_36_0__ETC__q280, CASE_mmio_cRqQ_data_0_BITS_77_TO_76_0_mmio_cRq_ETC__q9, CASE_mmio_dataReqQ_data_0_BITS_77_TO_76_0_mmio_ETC__q276, @@ -4727,8 +4727,8 @@ module mkCore(CLK, CASE_fetchStagepipelines_0_first_BITS_177_TO__ETC__q233, CASE_fetchStagepipelines_1_first_BITS_177_TO__ETC__q236, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10717, - x__h285846, - x__h291616; + x__h285847, + x__h291617; reg [1 : 0] CASE_commitStage_f_rob_dataD_OUT_BITS_97_TO_9_ETC__q249, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q299, @@ -4766,45 +4766,45 @@ module mkCore(CLK, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q237, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q238, CASE_fetchStagepipelines_1_first_BITS_191_TO__ETC__q242, - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93, - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92, - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95, - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94, - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97, - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96, - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125, - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56, - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55, - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128, - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58, - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57, - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130, - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129, - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60, - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59, - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132, - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131, - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62, - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61, - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91, - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90, - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93, + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92, + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149, + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95, + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94, + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147, + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97, + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96, + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203, + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193, + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127, + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125, + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199, + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195, + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56, + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55, + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128, + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126, + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201, + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197, + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58, + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57, + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130, + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129, + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60, + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59, + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132, + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131, + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172, + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162, + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62, + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61, + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168, + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164, + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170, + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166, + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91, + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90, + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145, CASE_k69625_0_coreFix_aluExe_0_rsAluRDY_enq_1_ETC__q239, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446, IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459, @@ -4877,19 +4877,19 @@ module mkCore(CLK, wire [517 : 0] SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2945; wire [511 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2208, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2938, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076; wire [463 : 0] commitStage_f_rob_data_first__4755_BIT_167_485_ETC___d14927; - wire [457 : 0] rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292; + wire [457 : 0] rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298; wire [447 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008; wire [393 : 0] IF_commitStage_f_rob_data_first__4755_BITS_97__ETC___d14926; wire [383 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2929, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067; wire [321 : 0] basicExec___d11943, basicExec___d12617; wire [319 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003; wire [255 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2920, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058; wire [191 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998; wire [144 : 0] coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1706; wire [68 : 0] execFpuSimple___d11056; @@ -4927,21 +4927,21 @@ module mkCore(CLK, IF_coreFix_memExe_lsq_firstLd__277_BIT_96_342__ETC___d1425, IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8, IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15191, - _theResult___fst__h603370, - _theResult___snd__h603371, - a___1__h603089, - a___1__h603375, - a__h602948, + _theResult___fst__h603371, + _theResult___snd__h603372, + a___1__h603090, + a___1__h603376, + a__h602949, amoExec___d880, - b___1__h603090, - b___1__h603420, - b__h602949, + b___1__h603091, + b___1__h603421, + b__h602950, base__h712403, base__h712423, - commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, - data___1__h475008, - data___1__h475816, - data__h475282, + commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, + data___1__h475009, + data___1__h475817, + data__h475283, fcsr_csr__read__h609377, fflags_csr__read__h609352, frm_csr__read__h609363, @@ -4953,58 +4953,58 @@ module mkCore(CLK, mip_csr__read__h611252, mstatus_csr__read__h610223, mtvec_csr__read__h610672, - n___1__h198529, - n__h194454, + n___1__h198530, + n__h194455, n__read__h611356, n__read__h611547, - n__read__h6759, - n__read__h726937, + n__read__h6760, + n__read__h726694, next_pc__h722452, pc__h712387, - q___1__h475881, - rVal1__h481761, - rVal2__h481762, - r___1__h475907, - res_data__h337869, - res_data__h337874, - res_data__h383571, - res_data__h383576, - res_data__h429266, - res_data__h429271, - resp_addr__h291971, + q___1__h475882, + rVal1__h481762, + rVal2__h481763, + r___1__h475908, + res_data__h337870, + res_data__h337875, + res_data__h383572, + res_data__h383577, + res_data__h429267, + res_data__h429272, + resp_addr__h291972, rg_tdata1__read__h612207, robdeqPort_0_deq_data_BITS_95_TO_32__q245, satp_csr__read__h610080, scause_csr__read__h609877, scounteren_csr__read__h609739, - shiftData__h181567, + shiftData__h181568, sie_csr__read__h609643, sip_csr__read__h610017, sstatus_csr__read__h609573, stvec_csr__read__h609686, trap_val__h709444, - upd__h3993, - upd__h5310, - upd__h6873, - upd__h727048, + upd__h3994, + upd__h5311, + upd__h6874, + upd__h726805, v__h607935, v__h632818, - x__h153731, - x__h157278, - x__h160092, - x__h161940, - x__h181476, + x__h153732, + x__h157279, + x__h160093, + x__h161941, x__h181477, - x__h18385, - x__h183902, - x__h20923, - x__h287291, - x__h289145, - x__h46292, - x__h481670, + x__h181478, + x__h18386, + x__h183903, + x__h20924, + x__h287292, + x__h289146, + x__h46293, x__h481671, x__h481672, - x__h48828, + x__h481673, + x__h48829, x__h617232, x__h617233, x__h639741, @@ -5012,30 +5012,30 @@ module mkCore(CLK, x__h702377, x__h714645, x__h714837, - x__h726431, - x__h729900, - x__h733045, - x_addr__h314074, - x_quotient__h475196, + x__h726188, + x__h729657, + x__h732802, + x_addr__h314075, + x_quotient__h475197, x_reg_ifc__read__h609482, - x_remainder__h475197, - y__h730732, - y__h733553, - y_avValue__h180564, - y_avValue__h181170, - y_avValue__h478806, - y_avValue__h479414, - y_avValue__h480016, + x_remainder__h475198, + y__h730489, + y__h733310, + y_avValue__h180565, + y_avValue__h181171, + y_avValue__h478807, + y_avValue__h479415, + y_avValue__h480017, y_avValue__h608841, y_avValue__h615057, y_avValue__h633571, y_avValue__h637576, y_avValue_new_pc__h712179, y_avValue_new_pc__h712365, - y_avValue_snd_snd_snd_snd_snd_fst__h730755, - y_avValue_snd_snd_snd_snd_snd_fst__h733614, - y_avValue_snd_snd_snd_snd_snd_fst__h733650, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027; + y_avValue_snd_snd_snd_snd_snd_fst__h730512, + y_avValue_snd_snd_snd_snd_snd_fst__h733371, + y_avValue_snd_snd_snd_snd_snd_fst__h733407, + y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784; wire [62 : 0] IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10652, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9882, IF_csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_c_ETC___d14920, @@ -5086,7 +5086,7 @@ module mkCore(CLK, r1__read__h614367, r1__read__h614397, r1__read__h614514, - y__h254803; + y__h254804; wire [56 : 0] IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63, IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98, @@ -5114,154 +5114,154 @@ module mkCore(CLK, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950, _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342, - _theResult____h346085, - _theResult____h363724, - _theResult____h391784, - _theResult____h409421, - _theResult____h437479, - _theResult____h455116, - _theResult____h502869, - _theResult____h541722, - _theResult____h581026, - _theResult___snd__h354207, - _theResult___snd__h354218, - _theResult___snd__h354220, - _theResult___snd__h354230, - _theResult___snd__h354236, - _theResult___snd__h354259, - _theResult___snd__h362803, - _theResult___snd__h362805, - _theResult___snd__h362812, - _theResult___snd__h362818, - _theResult___snd__h362841, - _theResult___snd__h371973, - _theResult___snd__h371984, - _theResult___snd__h371986, - _theResult___snd__h371996, - _theResult___snd__h372002, - _theResult___snd__h372025, - _theResult___snd__h380593, - _theResult___snd__h380607, - _theResult___snd__h380613, - _theResult___snd__h380631, - _theResult___snd__h399904, - _theResult___snd__h399915, - _theResult___snd__h399917, - _theResult___snd__h399927, - _theResult___snd__h399933, - _theResult___snd__h399956, - _theResult___snd__h408500, - _theResult___snd__h408502, - _theResult___snd__h408509, - _theResult___snd__h408515, - _theResult___snd__h408538, - _theResult___snd__h417670, - _theResult___snd__h417681, - _theResult___snd__h417683, - _theResult___snd__h417693, - _theResult___snd__h417699, - _theResult___snd__h417722, - _theResult___snd__h426290, - _theResult___snd__h426304, - _theResult___snd__h426310, - _theResult___snd__h426328, - _theResult___snd__h445599, - _theResult___snd__h445610, - _theResult___snd__h445612, - _theResult___snd__h445622, - _theResult___snd__h445628, - _theResult___snd__h445651, - _theResult___snd__h454195, - _theResult___snd__h454197, - _theResult___snd__h454204, - _theResult___snd__h454210, - _theResult___snd__h454233, - _theResult___snd__h463365, - _theResult___snd__h463376, - _theResult___snd__h463378, - _theResult___snd__h463388, - _theResult___snd__h463394, - _theResult___snd__h463417, - _theResult___snd__h471985, - _theResult___snd__h471999, - _theResult___snd__h472005, - _theResult___snd__h472023, - _theResult___snd__h501479, - _theResult___snd__h501481, - _theResult___snd__h501488, - _theResult___snd__h501494, - _theResult___snd__h501517, - _theResult___snd__h511116, - _theResult___snd__h511127, - _theResult___snd__h511129, - _theResult___snd__h511139, - _theResult___snd__h511145, - _theResult___snd__h511168, - _theResult___snd__h519884, - _theResult___snd__h519898, - _theResult___snd__h519904, - _theResult___snd__h519922, - _theResult___snd__h540332, - _theResult___snd__h540334, - _theResult___snd__h540341, - _theResult___snd__h540347, - _theResult___snd__h540370, - _theResult___snd__h549969, - _theResult___snd__h549980, - _theResult___snd__h549982, - _theResult___snd__h549992, - _theResult___snd__h549998, - _theResult___snd__h550021, - _theResult___snd__h558737, - _theResult___snd__h558751, - _theResult___snd__h558757, - _theResult___snd__h558775, - _theResult___snd__h579636, - _theResult___snd__h579638, - _theResult___snd__h579645, - _theResult___snd__h579651, - _theResult___snd__h579674, - _theResult___snd__h589273, - _theResult___snd__h589284, - _theResult___snd__h589286, - _theResult___snd__h589296, - _theResult___snd__h589302, - _theResult___snd__h589325, - _theResult___snd__h598041, - _theResult___snd__h598055, - _theResult___snd__h598061, - _theResult___snd__h598079, + _theResult____h346086, + _theResult____h363725, + _theResult____h391785, + _theResult____h409422, + _theResult____h437480, + _theResult____h455117, + _theResult____h502870, + _theResult____h541723, + _theResult____h581027, + _theResult___snd__h354208, + _theResult___snd__h354219, + _theResult___snd__h354221, + _theResult___snd__h354231, + _theResult___snd__h354237, + _theResult___snd__h354260, + _theResult___snd__h362804, + _theResult___snd__h362806, + _theResult___snd__h362813, + _theResult___snd__h362819, + _theResult___snd__h362842, + _theResult___snd__h371974, + _theResult___snd__h371985, + _theResult___snd__h371987, + _theResult___snd__h371997, + _theResult___snd__h372003, + _theResult___snd__h372026, + _theResult___snd__h380594, + _theResult___snd__h380608, + _theResult___snd__h380614, + _theResult___snd__h380632, + _theResult___snd__h399905, + _theResult___snd__h399916, + _theResult___snd__h399918, + _theResult___snd__h399928, + _theResult___snd__h399934, + _theResult___snd__h399957, + _theResult___snd__h408501, + _theResult___snd__h408503, + _theResult___snd__h408510, + _theResult___snd__h408516, + _theResult___snd__h408539, + _theResult___snd__h417671, + _theResult___snd__h417682, + _theResult___snd__h417684, + _theResult___snd__h417694, + _theResult___snd__h417700, + _theResult___snd__h417723, + _theResult___snd__h426291, + _theResult___snd__h426305, + _theResult___snd__h426311, + _theResult___snd__h426329, + _theResult___snd__h445600, + _theResult___snd__h445611, + _theResult___snd__h445613, + _theResult___snd__h445623, + _theResult___snd__h445629, + _theResult___snd__h445652, + _theResult___snd__h454196, + _theResult___snd__h454198, + _theResult___snd__h454205, + _theResult___snd__h454211, + _theResult___snd__h454234, + _theResult___snd__h463366, + _theResult___snd__h463377, + _theResult___snd__h463379, + _theResult___snd__h463389, + _theResult___snd__h463395, + _theResult___snd__h463418, + _theResult___snd__h471986, + _theResult___snd__h472000, + _theResult___snd__h472006, + _theResult___snd__h472024, + _theResult___snd__h501480, + _theResult___snd__h501482, + _theResult___snd__h501489, + _theResult___snd__h501495, + _theResult___snd__h501518, + _theResult___snd__h511117, + _theResult___snd__h511128, + _theResult___snd__h511130, + _theResult___snd__h511140, + _theResult___snd__h511146, + _theResult___snd__h511169, + _theResult___snd__h519885, + _theResult___snd__h519899, + _theResult___snd__h519905, + _theResult___snd__h519923, + _theResult___snd__h540333, + _theResult___snd__h540335, + _theResult___snd__h540342, + _theResult___snd__h540348, + _theResult___snd__h540371, + _theResult___snd__h549970, + _theResult___snd__h549981, + _theResult___snd__h549983, + _theResult___snd__h549993, + _theResult___snd__h549999, + _theResult___snd__h550022, + _theResult___snd__h558738, + _theResult___snd__h558752, + _theResult___snd__h558758, + _theResult___snd__h558776, + _theResult___snd__h579637, + _theResult___snd__h579639, + _theResult___snd__h579646, + _theResult___snd__h579652, + _theResult___snd__h579675, + _theResult___snd__h589274, + _theResult___snd__h589285, + _theResult___snd__h589287, + _theResult___snd__h589297, + _theResult___snd__h589303, + _theResult___snd__h589326, + _theResult___snd__h598042, + _theResult___snd__h598056, + _theResult___snd__h598062, + _theResult___snd__h598080, r1__read__h614233, r1__read__h614369, r1__read__h614399, r1__read__h614516, - result__h364337, - result__h410034, - result__h455729, - result__h503482, - result__h542335, - result__h581639, - sfd__h338480, - sfd__h384182, - sfd__h429877, - sfd__h482502, - sfd__h521496, - sfd__h560800, - sfdin__h354190, - sfdin__h371956, - sfdin__h399887, - sfdin__h417653, - sfdin__h445582, - sfdin__h463348, - sfdin__h511099, - sfdin__h549952, - sfdin__h589256, - x__h364434, - x__h410131, - x__h455826, - x__h503577, - x__h542430, - x__h581734; + result__h364338, + result__h410035, + result__h455730, + result__h503483, + result__h542336, + result__h581640, + sfd__h338481, + sfd__h384183, + sfd__h429878, + sfd__h482503, + sfd__h521497, + sfd__h560801, + sfdin__h354191, + sfdin__h371957, + sfdin__h399888, + sfdin__h417654, + sfdin__h445583, + sfdin__h463349, + sfdin__h511100, + sfdin__h549953, + sfdin__h589257, + x__h364435, + x__h410132, + x__h455827, + x__h503578, + x__h542431, + x__h581735; wire [55 : 0] r1__read__h613060, r1__read__h613464, r1__read__h613998, @@ -5278,18 +5278,18 @@ module mkCore(CLK, r1__read__h614371, r1__read__h614405, r1__read__h614522, - sfd__h501546, - sfd__h511197, - sfd__h519957, - sfd__h540399, - sfd__h550050, - sfd__h558810, - sfd__h579703, - sfd__h589354, - sfd__h598114, - value__h346707, - value__h392404, - value__h438099; + sfd__h501547, + sfd__h511198, + sfd__h519958, + sfd__h540400, + sfd__h550051, + sfd__h558811, + sfd__h579704, + sfd__h589355, + sfd__h598115, + value__h346708, + value__h392405, + value__h438100; wire [52 : 0] r1__read__h614239, r1__read__h614348, r1__read__h614373, @@ -5316,66 +5316,66 @@ module mkCore(CLK, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881, - _theResult___fst_sfd__h486456, - _theResult___fst_sfd__h502284, - _theResult___fst_sfd__h502287, - _theResult___fst_sfd__h511935, - _theResult___fst_sfd__h511938, - _theResult___fst_sfd__h520719, - _theResult___fst_sfd__h520722, - _theResult___fst_sfd__h520731, - _theResult___fst_sfd__h520737, - _theResult___fst_sfd__h525309, - _theResult___fst_sfd__h541137, - _theResult___fst_sfd__h541140, - _theResult___fst_sfd__h550788, - _theResult___fst_sfd__h550791, - _theResult___fst_sfd__h559572, - _theResult___fst_sfd__h559575, - _theResult___fst_sfd__h559584, - _theResult___fst_sfd__h559590, - _theResult___fst_sfd__h564613, - _theResult___fst_sfd__h580441, - _theResult___fst_sfd__h580444, - _theResult___fst_sfd__h590092, - _theResult___fst_sfd__h590095, - _theResult___fst_sfd__h598876, - _theResult___fst_sfd__h598879, - _theResult___fst_sfd__h598888, - _theResult___fst_sfd__h598894, - _theResult___sfd__h502184, - _theResult___sfd__h511835, - _theResult___sfd__h520619, - _theResult___sfd__h541037, - _theResult___sfd__h550688, - _theResult___sfd__h559472, - _theResult___sfd__h580341, - _theResult___sfd__h589992, - _theResult___sfd__h598776, - _theResult___snd_fst_sfd__h482456, - _theResult___snd_fst_sfd__h502290, - _theResult___snd_fst_sfd__h520725, - _theResult___snd_fst_sfd__h521450, - _theResult___snd_fst_sfd__h541143, - _theResult___snd_fst_sfd__h559578, - _theResult___snd_fst_sfd__h560754, - _theResult___snd_fst_sfd__h580447, - _theResult___snd_fst_sfd__h598882, - out___1_sfd__h482204, - out___1_sfd__h521198, - out___1_sfd__h560502, - out_sfd__h502187, - out_sfd__h511838, - out_sfd__h520622, - out_sfd__h541040, - out_sfd__h550691, - out_sfd__h559475, - out_sfd__h580344, - out_sfd__h589995, - out_sfd__h598779; + _theResult___fst_sfd__h486457, + _theResult___fst_sfd__h502285, + _theResult___fst_sfd__h502288, + _theResult___fst_sfd__h511936, + _theResult___fst_sfd__h511939, + _theResult___fst_sfd__h520720, + _theResult___fst_sfd__h520723, + _theResult___fst_sfd__h520732, + _theResult___fst_sfd__h520738, + _theResult___fst_sfd__h525310, + _theResult___fst_sfd__h541138, + _theResult___fst_sfd__h541141, + _theResult___fst_sfd__h550789, + _theResult___fst_sfd__h550792, + _theResult___fst_sfd__h559573, + _theResult___fst_sfd__h559576, + _theResult___fst_sfd__h559585, + _theResult___fst_sfd__h559591, + _theResult___fst_sfd__h564614, + _theResult___fst_sfd__h580442, + _theResult___fst_sfd__h580445, + _theResult___fst_sfd__h590093, + _theResult___fst_sfd__h590096, + _theResult___fst_sfd__h598877, + _theResult___fst_sfd__h598880, + _theResult___fst_sfd__h598889, + _theResult___fst_sfd__h598895, + _theResult___sfd__h502185, + _theResult___sfd__h511836, + _theResult___sfd__h520620, + _theResult___sfd__h541038, + _theResult___sfd__h550689, + _theResult___sfd__h559473, + _theResult___sfd__h580342, + _theResult___sfd__h589993, + _theResult___sfd__h598777, + _theResult___snd_fst_sfd__h482457, + _theResult___snd_fst_sfd__h502291, + _theResult___snd_fst_sfd__h520726, + _theResult___snd_fst_sfd__h521451, + _theResult___snd_fst_sfd__h541144, + _theResult___snd_fst_sfd__h559579, + _theResult___snd_fst_sfd__h560755, + _theResult___snd_fst_sfd__h580448, + _theResult___snd_fst_sfd__h598883, + out___1_sfd__h482205, + out___1_sfd__h521199, + out___1_sfd__h560503, + out_sfd__h502188, + out_sfd__h511839, + out_sfd__h520623, + out_sfd__h541041, + out_sfd__h550692, + out_sfd__h559476, + out_sfd__h580345, + out_sfd__h589996, + out_sfd__h598780; wire [50 : 0] r1__read__h613064, r1__read__h614241; wire [49 : 0] r1__read__h614350; - wire [48 : 0] r1__read_BITS_62_TO_14___h729920, + wire [48 : 0] r1__read_BITS_62_TO_14___h729677, r1__read__h613066, r1__read__h614352; wire [46 : 0] r1__read__h613068, r1__read__h614245; @@ -5391,36 +5391,36 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10, - data75282_BITS_31_TO_0__q13, + data75283_BITS_31_TO_0__q13, imm__h655329, r1__read__h613076, r1__read__h614259, - x__h193679, - x__h337884, - x__h383586, - x__h429281, - x__h76237, - x_data__h66086, + x__h193680, + x__h337885, + x__h383587, + x__h429282, + x__h76238, + x_data__h66087, x_data_imm__h676657, x_data_imm__h692711; wire [29 : 0] r1__read__h613078, r1__read__h614261; wire [27 : 0] r1__read__h614263; wire [24 : 0] NOT_fetchStage_pipelines_0_first__2757_BITS_19_ETC___d14166, - sfd__h354288, - sfd__h362870, - sfd__h372054, - sfd__h380666, - sfd__h399985, - sfd__h408567, - sfd__h417751, - sfd__h426363, - sfd__h445680, - sfd__h454262, - sfd__h463446, - sfd__h472058, - value__h487085, - value__h525938, - value__h565242; + sfd__h354289, + sfd__h362871, + sfd__h372055, + sfd__h380667, + sfd__h399986, + sfd__h408568, + sfd__h417752, + sfd__h426364, + sfd__h445681, + sfd__h454263, + sfd__h463447, + sfd__h472059, + value__h487086, + value__h525939, + value__h565243; wire [22 : 0] IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959, IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349, @@ -5445,66 +5445,66 @@ module mkCore(CLK, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806, IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808, - _theResult___fst_sfd__h354794, - _theResult___fst_sfd__h363376, - _theResult___fst_sfd__h372560, - _theResult___fst_sfd__h381196, - _theResult___fst_sfd__h381205, - _theResult___fst_sfd__h381211, - _theResult___fst_sfd__h400491, - _theResult___fst_sfd__h409073, - _theResult___fst_sfd__h418257, - _theResult___fst_sfd__h426893, - _theResult___fst_sfd__h426902, - _theResult___fst_sfd__h426908, - _theResult___fst_sfd__h446186, - _theResult___fst_sfd__h454768, - _theResult___fst_sfd__h463952, - _theResult___fst_sfd__h472588, - _theResult___fst_sfd__h472597, - _theResult___fst_sfd__h472603, - _theResult___sfd__h354713, - _theResult___sfd__h363295, - _theResult___sfd__h372479, - _theResult___sfd__h381115, - _theResult___sfd__h381217, - _theResult___sfd__h400410, - _theResult___sfd__h408992, - _theResult___sfd__h418176, - _theResult___sfd__h426812, - _theResult___sfd__h426914, - _theResult___sfd__h446105, - _theResult___sfd__h454687, - _theResult___sfd__h463871, - _theResult___sfd__h472507, - _theResult___sfd__h472609, - _theResult___snd_fst_sfd__h338430, - _theResult___snd_fst_sfd__h363379, - _theResult___snd_fst_sfd__h381199, - _theResult___snd_fst_sfd__h384132, - _theResult___snd_fst_sfd__h409076, - _theResult___snd_fst_sfd__h426896, - _theResult___snd_fst_sfd__h429827, - _theResult___snd_fst_sfd__h454771, - _theResult___snd_fst_sfd__h472591, - f1_sfd__h482141, - f2_sfd__h521135, - f3_sfd__h560439, - out_f_sfd__h381494, - out_f_sfd__h427191, - out_f_sfd__h472886, - out_sfd__h354716, - out_sfd__h363298, - out_sfd__h372482, - out_sfd__h381118, - out_sfd__h400413, - out_sfd__h408995, - out_sfd__h418179, - out_sfd__h426815, - out_sfd__h446108, - out_sfd__h454690, - out_sfd__h463874, - out_sfd__h472510; + _theResult___fst_sfd__h354795, + _theResult___fst_sfd__h363377, + _theResult___fst_sfd__h372561, + _theResult___fst_sfd__h381197, + _theResult___fst_sfd__h381206, + _theResult___fst_sfd__h381212, + _theResult___fst_sfd__h400492, + _theResult___fst_sfd__h409074, + _theResult___fst_sfd__h418258, + _theResult___fst_sfd__h426894, + _theResult___fst_sfd__h426903, + _theResult___fst_sfd__h426909, + _theResult___fst_sfd__h446187, + _theResult___fst_sfd__h454769, + _theResult___fst_sfd__h463953, + _theResult___fst_sfd__h472589, + _theResult___fst_sfd__h472598, + _theResult___fst_sfd__h472604, + _theResult___sfd__h354714, + _theResult___sfd__h363296, + _theResult___sfd__h372480, + _theResult___sfd__h381116, + _theResult___sfd__h381218, + _theResult___sfd__h400411, + _theResult___sfd__h408993, + _theResult___sfd__h418177, + _theResult___sfd__h426813, + _theResult___sfd__h426915, + _theResult___sfd__h446106, + _theResult___sfd__h454688, + _theResult___sfd__h463872, + _theResult___sfd__h472508, + _theResult___sfd__h472610, + _theResult___snd_fst_sfd__h338431, + _theResult___snd_fst_sfd__h363380, + _theResult___snd_fst_sfd__h381200, + _theResult___snd_fst_sfd__h384133, + _theResult___snd_fst_sfd__h409077, + _theResult___snd_fst_sfd__h426897, + _theResult___snd_fst_sfd__h429828, + _theResult___snd_fst_sfd__h454772, + _theResult___snd_fst_sfd__h472592, + f1_sfd__h482142, + f2_sfd__h521136, + f3_sfd__h560440, + out_f_sfd__h381495, + out_f_sfd__h427192, + out_f_sfd__h472887, + out_sfd__h354717, + out_sfd__h363299, + out_sfd__h372483, + out_sfd__h381119, + out_sfd__h400414, + out_sfd__h408996, + out_sfd__h418180, + out_sfd__h426816, + out_sfd__h446109, + out_sfd__h454691, + out_sfd__h463875, + out_sfd__h472511; wire [19 : 0] r1__read__h614198; wire [15 : 0] IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824, _theResult____h651118, @@ -5513,7 +5513,7 @@ module mkCore(CLK, pend_ints__h651116, y__h651655; wire [13 : 0] r1__read_BITS_13_TO_0___h651665; - wire [12 : 0] IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282, + wire [12 : 0] IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288, fetchStage_pipelines_1_first__2766_BIT_173_358_ETC___d13676, rob_deqPort_0_deq_data__4339_BIT_181_4414_CONC_ETC___d14505; wire [11 : 0] IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10431, @@ -5551,12 +5551,12 @@ module mkCore(CLK, result__h646746, spec_bits__h688398, w__h646690, - x__h364467, - x__h410164, - x__h455859, - x__h503610, - x__h542463, - x__h581767, + x__h364468, + x__h410165, + x__h455860, + x__h503611, + x__h542464, + x__h581768, x__h646694, x__h646745, y__h646724, @@ -5585,102 +5585,102 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q140, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q157, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q180, - _theResult___exp__h502183, - _theResult___exp__h511834, - _theResult___exp__h520618, - _theResult___exp__h541036, - _theResult___exp__h550687, - _theResult___exp__h559471, - _theResult___exp__h580340, - _theResult___exp__h589991, - _theResult___exp__h598775, - _theResult___fst_exp__h486455, - _theResult___fst_exp__h501519, - _theResult___fst_exp__h501525, - _theResult___fst_exp__h501528, - _theResult___fst_exp__h502283, - _theResult___fst_exp__h502286, - _theResult___fst_exp__h511105, - _theResult___fst_exp__h511170, - _theResult___fst_exp__h511176, - _theResult___fst_exp__h511179, - _theResult___fst_exp__h511934, - _theResult___fst_exp__h511937, - _theResult___fst_exp__h519890, - _theResult___fst_exp__h519929, - _theResult___fst_exp__h519935, - _theResult___fst_exp__h519938, - _theResult___fst_exp__h520718, - _theResult___fst_exp__h520721, - _theResult___fst_exp__h520730, - _theResult___fst_exp__h520733, - _theResult___fst_exp__h525308, - _theResult___fst_exp__h540372, - _theResult___fst_exp__h540378, - _theResult___fst_exp__h540381, - _theResult___fst_exp__h541136, - _theResult___fst_exp__h541139, - _theResult___fst_exp__h549958, - _theResult___fst_exp__h550023, - _theResult___fst_exp__h550029, - _theResult___fst_exp__h550032, - _theResult___fst_exp__h550787, - _theResult___fst_exp__h550790, - _theResult___fst_exp__h558743, - _theResult___fst_exp__h558782, - _theResult___fst_exp__h558788, - _theResult___fst_exp__h558791, - _theResult___fst_exp__h559571, - _theResult___fst_exp__h559574, - _theResult___fst_exp__h559583, - _theResult___fst_exp__h559586, - _theResult___fst_exp__h564612, - _theResult___fst_exp__h579676, - _theResult___fst_exp__h579682, - _theResult___fst_exp__h579685, - _theResult___fst_exp__h580440, - _theResult___fst_exp__h580443, - _theResult___fst_exp__h589262, - _theResult___fst_exp__h589327, - _theResult___fst_exp__h589333, - _theResult___fst_exp__h589336, - _theResult___fst_exp__h590091, - _theResult___fst_exp__h590094, - _theResult___fst_exp__h598047, - _theResult___fst_exp__h598086, - _theResult___fst_exp__h598092, - _theResult___fst_exp__h598095, - _theResult___fst_exp__h598875, - _theResult___fst_exp__h598878, - _theResult___fst_exp__h598887, - _theResult___fst_exp__h598890, - _theResult___snd_fst_exp__h502289, - _theResult___snd_fst_exp__h520724, - _theResult___snd_fst_exp__h541142, - _theResult___snd_fst_exp__h559577, - _theResult___snd_fst_exp__h580446, - _theResult___snd_fst_exp__h598881, + _theResult___exp__h502184, + _theResult___exp__h511835, + _theResult___exp__h520619, + _theResult___exp__h541037, + _theResult___exp__h550688, + _theResult___exp__h559472, + _theResult___exp__h580341, + _theResult___exp__h589992, + _theResult___exp__h598776, + _theResult___fst_exp__h486456, + _theResult___fst_exp__h501520, + _theResult___fst_exp__h501526, + _theResult___fst_exp__h501529, + _theResult___fst_exp__h502284, + _theResult___fst_exp__h502287, + _theResult___fst_exp__h511106, + _theResult___fst_exp__h511171, + _theResult___fst_exp__h511177, + _theResult___fst_exp__h511180, + _theResult___fst_exp__h511935, + _theResult___fst_exp__h511938, + _theResult___fst_exp__h519891, + _theResult___fst_exp__h519930, + _theResult___fst_exp__h519936, + _theResult___fst_exp__h519939, + _theResult___fst_exp__h520719, + _theResult___fst_exp__h520722, + _theResult___fst_exp__h520731, + _theResult___fst_exp__h520734, + _theResult___fst_exp__h525309, + _theResult___fst_exp__h540373, + _theResult___fst_exp__h540379, + _theResult___fst_exp__h540382, + _theResult___fst_exp__h541137, + _theResult___fst_exp__h541140, + _theResult___fst_exp__h549959, + _theResult___fst_exp__h550024, + _theResult___fst_exp__h550030, + _theResult___fst_exp__h550033, + _theResult___fst_exp__h550788, + _theResult___fst_exp__h550791, + _theResult___fst_exp__h558744, + _theResult___fst_exp__h558783, + _theResult___fst_exp__h558789, + _theResult___fst_exp__h558792, + _theResult___fst_exp__h559572, + _theResult___fst_exp__h559575, + _theResult___fst_exp__h559584, + _theResult___fst_exp__h559587, + _theResult___fst_exp__h564613, + _theResult___fst_exp__h579677, + _theResult___fst_exp__h579683, + _theResult___fst_exp__h579686, + _theResult___fst_exp__h580441, + _theResult___fst_exp__h580444, + _theResult___fst_exp__h589263, + _theResult___fst_exp__h589328, + _theResult___fst_exp__h589334, + _theResult___fst_exp__h589337, + _theResult___fst_exp__h590092, + _theResult___fst_exp__h590095, + _theResult___fst_exp__h598048, + _theResult___fst_exp__h598087, + _theResult___fst_exp__h598093, + _theResult___fst_exp__h598096, + _theResult___fst_exp__h598876, + _theResult___fst_exp__h598879, + _theResult___fst_exp__h598888, + _theResult___fst_exp__h598891, + _theResult___snd_fst_exp__h502290, + _theResult___snd_fst_exp__h520725, + _theResult___snd_fst_exp__h541143, + _theResult___snd_fst_exp__h559578, + _theResult___snd_fst_exp__h580447, + _theResult___snd_fst_exp__h598882, coreFix_fpuMulDivExe_0_fpuExec_double_divresp_ETC__q71, coreFix_fpuMulDivExe_0_fpuExec_double_fmaresp_ETC__q36, coreFix_fpuMulDivExe_0_fpuExec_double_sqrtres_ETC__q106, - din_inc___2_exp__h520778, - din_inc___2_exp__h520813, - din_inc___2_exp__h520839, - din_inc___2_exp__h559631, - din_inc___2_exp__h559666, - din_inc___2_exp__h559692, - din_inc___2_exp__h598935, - din_inc___2_exp__h598970, - din_inc___2_exp__h598996, - out_exp__h502186, - out_exp__h511837, - out_exp__h520621, - out_exp__h541039, - out_exp__h550690, - out_exp__h559474, - out_exp__h580343, - out_exp__h589994, - out_exp__h598778; + din_inc___2_exp__h520779, + din_inc___2_exp__h520814, + din_inc___2_exp__h520840, + din_inc___2_exp__h559632, + din_inc___2_exp__h559667, + din_inc___2_exp__h559693, + din_inc___2_exp__h598936, + din_inc___2_exp__h598971, + din_inc___2_exp__h598997, + out_exp__h502187, + out_exp__h511838, + out_exp__h520622, + out_exp__h541040, + out_exp__h550691, + out_exp__h559475, + out_exp__h580344, + out_exp__h589995, + out_exp__h598779; wire [8 : 0] IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264, IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656; @@ -5711,123 +5711,123 @@ module mkCore(CLK, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q77, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q42, SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q112, - _theResult___exp__h354712, - _theResult___exp__h363294, - _theResult___exp__h372478, - _theResult___exp__h381114, - _theResult___exp__h381216, - _theResult___exp__h400409, - _theResult___exp__h408991, - _theResult___exp__h418175, - _theResult___exp__h426811, - _theResult___exp__h426913, - _theResult___exp__h446104, - _theResult___exp__h454686, - _theResult___exp__h463870, - _theResult___exp__h472506, - _theResult___exp__h472608, - _theResult___fst_exp__h354196, - _theResult___fst_exp__h354261, - _theResult___fst_exp__h354267, - _theResult___fst_exp__h354270, - _theResult___fst_exp__h354793, - _theResult___fst_exp__h362843, - _theResult___fst_exp__h362849, - _theResult___fst_exp__h362852, - _theResult___fst_exp__h363375, - _theResult___fst_exp__h371962, - _theResult___fst_exp__h372027, - _theResult___fst_exp__h372033, - _theResult___fst_exp__h372036, - _theResult___fst_exp__h372559, - _theResult___fst_exp__h380599, - _theResult___fst_exp__h380638, - _theResult___fst_exp__h380644, - _theResult___fst_exp__h380647, - _theResult___fst_exp__h381195, - _theResult___fst_exp__h381204, - _theResult___fst_exp__h381207, - _theResult___fst_exp__h399893, - _theResult___fst_exp__h399958, - _theResult___fst_exp__h399964, - _theResult___fst_exp__h399967, - _theResult___fst_exp__h400490, - _theResult___fst_exp__h408540, - _theResult___fst_exp__h408546, - _theResult___fst_exp__h408549, - _theResult___fst_exp__h409072, - _theResult___fst_exp__h417659, - _theResult___fst_exp__h417724, - _theResult___fst_exp__h417730, - _theResult___fst_exp__h417733, - _theResult___fst_exp__h418256, - _theResult___fst_exp__h426296, - _theResult___fst_exp__h426335, - _theResult___fst_exp__h426341, - _theResult___fst_exp__h426344, - _theResult___fst_exp__h426892, - _theResult___fst_exp__h426901, - _theResult___fst_exp__h426904, - _theResult___fst_exp__h445588, - _theResult___fst_exp__h445653, - _theResult___fst_exp__h445659, - _theResult___fst_exp__h445662, - _theResult___fst_exp__h446185, - _theResult___fst_exp__h454235, - _theResult___fst_exp__h454241, - _theResult___fst_exp__h454244, - _theResult___fst_exp__h454767, - _theResult___fst_exp__h463354, - _theResult___fst_exp__h463419, - _theResult___fst_exp__h463425, - _theResult___fst_exp__h463428, - _theResult___fst_exp__h463951, - _theResult___fst_exp__h471991, - _theResult___fst_exp__h472030, - _theResult___fst_exp__h472036, - _theResult___fst_exp__h472039, - _theResult___fst_exp__h472587, - _theResult___fst_exp__h472596, - _theResult___fst_exp__h472599, - _theResult___snd_fst_exp__h363378, - _theResult___snd_fst_exp__h381198, - _theResult___snd_fst_exp__h409075, - _theResult___snd_fst_exp__h426895, - _theResult___snd_fst_exp__h454770, - _theResult___snd_fst_exp__h472590, - din_inc___2_exp__h381229, - din_inc___2_exp__h381253, - din_inc___2_exp__h381283, - din_inc___2_exp__h381307, - din_inc___2_exp__h426926, - din_inc___2_exp__h426950, - din_inc___2_exp__h426980, - din_inc___2_exp__h427004, - din_inc___2_exp__h472621, - din_inc___2_exp__h472645, - din_inc___2_exp__h472675, - din_inc___2_exp__h472699, - f1_exp82140_MINUS_127__q136, - f1_exp__h482140, - f2_exp21134_MINUS_127__q176, - f2_exp__h521134, - f3_exp60438_MINUS_127__q153, - f3_exp__h560438, - out_exp__h354715, - out_exp__h363297, - out_exp__h372481, - out_exp__h381117, - out_exp__h400412, - out_exp__h408994, - out_exp__h418178, - out_exp__h426814, - out_exp__h446107, - out_exp__h454689, - out_exp__h463873, - out_exp__h472509, - out_f_exp__h381493, - out_f_exp__h427190, - out_f_exp__h472885, + _theResult___exp__h354713, + _theResult___exp__h363295, + _theResult___exp__h372479, + _theResult___exp__h381115, + _theResult___exp__h381217, + _theResult___exp__h400410, + _theResult___exp__h408992, + _theResult___exp__h418176, + _theResult___exp__h426812, + _theResult___exp__h426914, + _theResult___exp__h446105, + _theResult___exp__h454687, + _theResult___exp__h463871, + _theResult___exp__h472507, + _theResult___exp__h472609, + _theResult___fst_exp__h354197, + _theResult___fst_exp__h354262, + _theResult___fst_exp__h354268, + _theResult___fst_exp__h354271, + _theResult___fst_exp__h354794, + _theResult___fst_exp__h362844, + _theResult___fst_exp__h362850, + _theResult___fst_exp__h362853, + _theResult___fst_exp__h363376, + _theResult___fst_exp__h371963, + _theResult___fst_exp__h372028, + _theResult___fst_exp__h372034, + _theResult___fst_exp__h372037, + _theResult___fst_exp__h372560, + _theResult___fst_exp__h380600, + _theResult___fst_exp__h380639, + _theResult___fst_exp__h380645, + _theResult___fst_exp__h380648, + _theResult___fst_exp__h381196, + _theResult___fst_exp__h381205, + _theResult___fst_exp__h381208, + _theResult___fst_exp__h399894, + _theResult___fst_exp__h399959, + _theResult___fst_exp__h399965, + _theResult___fst_exp__h399968, + _theResult___fst_exp__h400491, + _theResult___fst_exp__h408541, + _theResult___fst_exp__h408547, + _theResult___fst_exp__h408550, + _theResult___fst_exp__h409073, + _theResult___fst_exp__h417660, + _theResult___fst_exp__h417725, + _theResult___fst_exp__h417731, + _theResult___fst_exp__h417734, + _theResult___fst_exp__h418257, + _theResult___fst_exp__h426297, + _theResult___fst_exp__h426336, + _theResult___fst_exp__h426342, + _theResult___fst_exp__h426345, + _theResult___fst_exp__h426893, + _theResult___fst_exp__h426902, + _theResult___fst_exp__h426905, + _theResult___fst_exp__h445589, + _theResult___fst_exp__h445654, + _theResult___fst_exp__h445660, + _theResult___fst_exp__h445663, + _theResult___fst_exp__h446186, + _theResult___fst_exp__h454236, + _theResult___fst_exp__h454242, + _theResult___fst_exp__h454245, + _theResult___fst_exp__h454768, + _theResult___fst_exp__h463355, + _theResult___fst_exp__h463420, + _theResult___fst_exp__h463426, + _theResult___fst_exp__h463429, + _theResult___fst_exp__h463952, + _theResult___fst_exp__h471992, + _theResult___fst_exp__h472031, + _theResult___fst_exp__h472037, + _theResult___fst_exp__h472040, + _theResult___fst_exp__h472588, + _theResult___fst_exp__h472597, + _theResult___fst_exp__h472600, + _theResult___snd_fst_exp__h363379, + _theResult___snd_fst_exp__h381199, + _theResult___snd_fst_exp__h409076, + _theResult___snd_fst_exp__h426896, + _theResult___snd_fst_exp__h454771, + _theResult___snd_fst_exp__h472591, + din_inc___2_exp__h381230, + din_inc___2_exp__h381254, + din_inc___2_exp__h381284, + din_inc___2_exp__h381308, + din_inc___2_exp__h426927, + din_inc___2_exp__h426951, + din_inc___2_exp__h426981, + din_inc___2_exp__h427005, + din_inc___2_exp__h472622, + din_inc___2_exp__h472646, + din_inc___2_exp__h472676, + din_inc___2_exp__h472700, + f1_exp82141_MINUS_127__q136, + f1_exp__h482141, + f2_exp21135_MINUS_127__q176, + f2_exp__h521135, + f3_exp60439_MINUS_127__q153, + f3_exp__h560439, + out_exp__h354716, + out_exp__h363298, + out_exp__h372482, + out_exp__h381118, + out_exp__h400413, + out_exp__h408995, + out_exp__h418179, + out_exp__h426815, + out_exp__h446108, + out_exp__h454690, + out_exp__h463874, + out_exp__h472510, + out_f_exp__h381494, + out_f_exp__h427191, + out_f_exp__h472886, x__h613035; wire [5 : 0] IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639, @@ -5848,11 +5848,11 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262, IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2144, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096, - x__h181699, + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102, + x__h181700, x__h712418; wire [4 : 0] IF_fetchStage_pipelines_1_first__2766_BITS_194_ETC___d14306, - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664, + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5169, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6561, _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7953, @@ -5870,25 +5870,25 @@ module mkCore(CLK, _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7965, checkForException___d13008, checkForException___d13698, - fflags__h728257, - fflags__h730910, - fflags__h733530, - old_fflags__h733017, - po_fflags__h728242, - po_fflags__h730895, + fflags__h728014, + fflags__h730667, + fflags__h733287, + old_fflags__h732774, + po_fflags__h727999, + po_fflags__h730652, r1__read__h614601, - res_fflags__h337870, - res_fflags__h383572, - res_fflags__h429267, + res_fflags__h337871, + res_fflags__h383573, + res_fflags__h429268, rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, rs1__h655328, - x__h153725, - x__h157272, - x__h160088, - x__h287279, - y_avValue_fst__h730270, - y_avValue_fst__h733435, - y_avValue_fst__h733467; + x__h153726, + x__h157273, + x__h160089, + x__h287280, + y_avValue_fst__h730027, + y_avValue_fst__h733192, + y_avValue_fst__h733224; wire [3 : 0] IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1851, IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1853, IF_IF_coreFix_memExe_dTlb_procResp__714_BIT_18_ETC___d1855, @@ -5920,72 +5920,72 @@ module mkCore(CLK, wire [2 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2539, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2793, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1212, - _theResult_____2__h296521, + _theResult_____2__h296522, dcsr_cause__h708962, - next_deqP___1__h296800, - v__h295941, - v__h296172, - x__h302151, + next_deqP___1__h296801, + v__h295942, + v__h296173, + x__h302152, x_decodeInfo_frm__h655012; wire [1 : 0] IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1208, - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683, - IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139, - IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74, - IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99, - IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179, - IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29, - IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109, - IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39, - IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156, - IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64, - IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135, - IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66, - IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142, - IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79, - IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175, - IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101, - IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182, - IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31, - IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114, - IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152, - IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44, - IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159, - guard__h346095, - guard__h354804, - guard__h363734, - guard__h372570, - guard__h391794, - guard__h400501, - guard__h409431, - guard__h418267, - guard__h437489, - guard__h446196, - guard__h455126, - guard__h463962, - guard__h493567, - guard__h502879, - guard__h511948, - guard__h532420, - guard__h541732, - guard__h550801, - guard__h571724, - guard__h581036, - guard__h590105, - prv__h735199, - prv__h735243, + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689, + IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139, + IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74, + IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99, + IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179, + IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29, + IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109, + IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39, + IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156, + IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64, + IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135, + IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66, + IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142, + IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79, + IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175, + IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101, + IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182, + IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31, + IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114, + IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152, + IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44, + IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159, + guard__h346096, + guard__h354805, + guard__h363735, + guard__h372571, + guard__h391795, + guard__h400502, + guard__h409432, + guard__h418268, + guard__h437490, + guard__h446197, + guard__h455127, + guard__h463963, + guard__h493568, + guard__h502880, + guard__h511949, + guard__h532421, + guard__h541733, + guard__h550802, + guard__h571725, + guard__h581037, + guard__h590106, + prv__h734956, + prv__h735000, r1__read_BITS_13_TO_12___h655197, - sbIdx__h157151, - v__h603883, - v__h603893, - v__h604528, + sbIdx__h157152, + v__h603884, + v__h603894, + v__h604529, x__h722556, - x__h733794, + x__h733551, x_prv__h712487, x_prv__h723013, - y_avValue_snd_snd_snd_fst__h730745, - y_avValue_snd_snd_snd_fst__h733604, - y_avValue_snd_snd_snd_fst__h733640; + y_avValue_snd_snd_snd_fst__h730502, + y_avValue_snd_snd_snd_fst__h733361, + y_avValue_snd_snd_snd_fst__h733397; wire IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5069, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5119, IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6461, @@ -6065,7 +6065,7 @@ module mkCore(CLK, IF_NOT_fetchStage_pipelines_0_canDeq__2755_275_ETC___d13916, IF_NOT_fetchStage_pipelines_1_first__2766_BITS_ETC___d13831, IF_NOT_fetchStage_pipelines_1_first__2766_BITS_ETC___d13915, - IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674, + IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10472, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10705, IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900, @@ -6188,7 +6188,7 @@ module mkCore(CLK, IF_mmio_dataRespQ_enqReq_lat_1_whas__92_THEN_m_ETC___d201, IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmio_p_ETC___d642, IF_mmio_pRsQ_enqReq_lat_1_whas__82_THEN_mmio_p_ETC___d491, - IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675, + IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5221, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5249, NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d6613, @@ -6198,7 +6198,7 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13344, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13422, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13725, - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680, + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765, NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807, @@ -6218,7 +6218,7 @@ module mkCore(CLK, NOT_commitStage_commitTrap_4347_BIT_36_4589_45_ETC___d14695, NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15005, NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15016, - NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368, + NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374, NOT_coreFix_aluExe_0_bypassWire_0_whas__2202_2_ETC___d12229, NOT_coreFix_aluExe_0_bypassWire_0_whas__2202_2_ETC___d12257, NOT_coreFix_aluExe_1_bypassWire_0_whas__1342_1_ETC___d11369, @@ -6326,10 +6326,10 @@ module mkCore(CLK, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13736, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13878, NOT_renameStage_rg_m_halt_req_2784_BIT_4_2785__ETC___d13896, - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356, - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658, + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362, + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664, NOT_rob_deqPort_0_deq_data__4339_BITS_329_TO_3_ETC___d14993, - NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353, + NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359, NOT_specTagManager_canClaim__3401_3492_OR_NOT__ETC___d14007, NOT_specTagManager_canClaim__3401_3492_OR_NOT__ETC___d14074, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132, @@ -6425,11 +6425,11 @@ module mkCore(CLK, _dor1sbAggr$EN_setReady_3_put, _dor1sbCons$EN_setReady_0_put, _dor1sbCons$EN_setReady_1_put, - _theResult_____2__h304517, - _theResult_____2__h310511, - _theResult_____2__h318365, - _theResult_____2__h328709, - _theResult_____2__h331934, + _theResult_____2__h304518, + _theResult_____2__h310512, + _theResult_____2__h318366, + _theResult_____2__h328710, + _theResult_____2__h331935, commitStage_commitTrap_4347_BIT_36_4589_AND_co_ETC___d14654, coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12205, coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12244, @@ -6540,7 +6540,7 @@ module mkCore(CLK, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13734, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13876, epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13894, - f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893, + f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899, fetchStage_RDY_pipelines_1_deq__2769_AND_NOT_f_ETC___d14078, fetchStage_pipelines_0_canDeq__2755_AND_NOT_fe_ETC___d14018, fetchStage_pipelines_0_canDeq__2755_AND_NOT_fe_ETC___d14100, @@ -6565,12 +6565,12 @@ module mkCore(CLK, fetchStage_pipelines_0_first__2757_BIT_68_2786_ETC___d13835, fetchStage_pipelines_1_first__2766_BITS_194_TO_ETC___d13973, fetchStage_pipelines_1_first__2766_BITS_199_TO_ETC___d13985, - guard__h364332, - guard__h410029, - guard__h455724, - guard__h503477, - guard__h542330, - guard__h581634, + guard__h364333, + guard__h410030, + guard__h455725, + guard__h503478, + guard__h542331, + guard__h581635, idx__h685370, k__h669625, mmio_cRqQ_enqReq_dummy2_2_read__32_AND_IF_mmio_ETC___d444, @@ -6585,12 +6585,12 @@ module mkCore(CLK, mmio_pRqQ_empty_53_AND_epochManager_checkEpoch_ETC___d14094, mmio_pRqQ_enqReq_dummy2_2_read__35_AND_IF_mmio_ETC___d747, mmio_pRsQ_enqReq_dummy2_2_read__94_AND_IF_mmio_ETC___d606, - msip__h76122, - next_deqP___1__h304796, - next_deqP___1__h311077, - next_deqP___1__h318931, - next_deqP___1__h328988, - next_deqP___1__h332213, + msip__h76123, + next_deqP___1__h304797, + next_deqP___1__h311078, + next_deqP___1__h318932, + next_deqP___1__h328989, + next_deqP___1__h332214, r1__read_BIT_20___h655893, regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13309, regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13941, @@ -6616,24 +6616,24 @@ module mkCore(CLK, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13799, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13840, renameStage_rg_m_halt_req_2784_BIT_4_2785_OR_f_ETC___d13920, - rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729, + rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735, rob_RDY_deqPort_0_deq__4336_AND_rob_RDY_deqPor_ETC___d14998, sbCons_lazyLookup_2_get_coreFix_fpuMulDivExe_0_ETC___d8294, sbCons_lazyLookup_2_get_coreFix_fpuMulDivExe_0_ETC___d8295, sbCons_lazyLookup_3_get_coreFix_memExe_dispToR_ETC___d1632, - tsr_val__h726551, - tvm_val__h726553, - v__h299286, - v__h299804, - v__h309800, - v__h310031, - v__h313676, - v__h313907, - v__h328277, - v__h328508, - v__h331502, - v__h331733, - x__h603384; + tsr_val__h726308, + tvm_val__h726310, + v__h299287, + v__h299805, + v__h309801, + v__h310032, + v__h313677, + v__h313908, + v__h328278, + v__h328509, + v__h331503, + v__h331734, + x__h603385; // action method coreReq_start assign RDY_coreReq_start = 1'd1 ; @@ -6674,7 +6674,7 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q264, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q265, !CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q266, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076 } ; assign RDY_dCacheToParent_rsToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_empty ; @@ -6694,7 +6694,7 @@ module mkCore(CLK, assign dCacheToParent_rqToP_first = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q272, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q273, - SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096 } ; + SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102 } ; assign RDY_dCacheToParent_rqToP_first = !coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_empty ; @@ -9895,7 +9895,7 @@ module mkCore(CLK, // rule RL_readyToFetch assign CAN_FIRE_RL_readyToFetch = fetchStage$RDY_done_flushing && - rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729 && + rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735 && !flush_brpred && fetchStage$iMemIfc_flush_done && fetchStage$flush_predictors_done ; @@ -9992,7 +9992,7 @@ module mkCore(CLK, // rule RL_rl_debug_csr_write assign CAN_FIRE_RL_rl_debug_csr_write = f_csr_reqs$EMPTY_N && - f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893 && + f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899 && rg_core_run_state == 2'd1 && f_csr_reqs$D_OUT[76] ; assign WILL_FIRE_RL_rl_debug_csr_write = CAN_FIRE_RL_rl_debug_csr_write ; @@ -10446,8 +10446,8 @@ module mkCore(CLK, // rule RL_commitStage_doCommitNormalInst assign CAN_FIRE_RL_commitStage_doCommitNormalInst = rob$RDY_deqPort_0_deq_data && - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356 && - NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368 ; + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362 && + NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374 ; assign WILL_FIRE_RL_commitStage_doCommitNormalInst = CAN_FIRE_RL_commitStage_doCommitNormalInst && !WILL_FIRE_RL_commitStage_rl_send_tv_reset ; @@ -11743,7 +11743,7 @@ module mkCore(CLK, f_csr_reqs$D_OUT[75:64] == 12'd836 ; assign MUX_csrf_fflags_reg$write_1__SEL_1 = WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 ; + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 ; assign MUX_csrf_fflags_reg$write_1__SEL_2 = WILL_FIRE_RL_commitStage_doCommitSystemInst && rob$deqPort_0_deq_data[329:325] == 5'd13 && @@ -12033,7 +12033,7 @@ module mkCore(CLK, assign MUX_commitStage_rg_serial_num$write_1__VAL_1 = commitStage_rg_serial_num + 64'd1 ; assign MUX_commitStage_rg_serial_num$write_1__VAL_3 = - commitStage_rg_serial_num + y__h733553 ; + commitStage_rg_serial_num + y__h733310 ; assign MUX_coreFix_aluExe_0_rsAlu$enq_1__VAL_1 = { fetchStage$pipelines_0_first[199:195], IF_fetchStage_pipelines_0_first__2757_BITS_194_ETC___d12883, @@ -12159,7 +12159,7 @@ module mkCore(CLK, IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd0) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$deqWrite_2__VAL_4 = { IF_coreFix_memExe_dMem_cache_m_banks_0_pipelin_ETC___d2713, @@ -12173,10 +12173,10 @@ module mkCore(CLK, assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_1 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq[147:84], - x__h285846 } ; + x__h285847 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_2 = { 517'h02AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, - x__h287291, + x__h287292, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_3 = { 518'h1AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA, @@ -12184,7 +12184,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$getEmptyEntryInit } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_pipeline$send_1__VAL_4 = { 2'd2, - addr__h290067, + addr__h290068, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2945 } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_processAmo$write_1__VAL_1 = { 1'd1, @@ -12197,12 +12197,12 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getSucc } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_1 = - { x__h153725, x__h153731, 84'h82AAAAAAAAAAAAAAAAAAA } ; + { x__h153726, x__h153732, 84'h82AAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_2 = - { x__h157272, x__h157278, 84'hCAAAAAAAAAAAAAAAAAAAA } ; + { x__h157273, x__h157279, 84'hCAAAAAAAAAAAAAAAAAAAA } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wset_1__VAL_3 = - { x__h160088, - x__h160092, + { x__h160089, + x__h160093, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1208, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1212, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1216, @@ -12213,7 +12213,7 @@ module mkCore(CLK, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1238, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1242, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1247, - x__h161940, + x__h161941, IF_coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1__ETC___d1255, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1259, coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1_rea_ETC___d1263, @@ -12226,7 +12226,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[576:574] } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, - resp_addr__h291971, + resp_addr__h291972, 2'd0, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getData } ; assign MUX_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wset_1__VAL_2 = @@ -12234,8 +12234,8 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getRq, coreFix_memExe_dMem_cache_m_banks_0_pRqMshr$sendRsToP_pRq_getData } ; assign MUX_coreFix_memExe_dTlb$updateVMInfo_1__VAL_1 = - { prv__h735243, - prv__h735243 != 2'd3 && csrf_vm_mode_sv39_reg, + { prv__h735000, + prv__h735000 != 2'd3 && csrf_vm_mode_sv39_reg, csrf_mxr_reg, csrf_sum_reg, csrf_ppn_reg } ; @@ -12312,7 +12312,7 @@ module mkCore(CLK, assign MUX_coreFix_memExe_memRespLdQ_enqReq_lat_0$wset_1__VAL_1 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[152:148], - x__h197126 } ; + x__h197127 } ; assign MUX_coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wset_1__VAL_1 = { 5'd0, coreFix_memExe_lsq$firstSt[141:78], @@ -12347,8 +12347,8 @@ module mkCore(CLK, assign MUX_coreFix_memExe_respLrScAmoQ_enqReq_lat_0$wset_1__VAL_3 = { 1'd1, coreFix_memExe_dMem_cache_m_banks_0_processAmo[6] ? - curData__h192916 : - { {32{x__h193679[31]}}, x__h193679 } } ; + curData__h192917 : + { {32{x__h193680[31]}}, x__h193680 } } ; assign MUX_coreFix_trainBPQ_0$enq_1__VAL_1 = { coreFix_aluExe_0_exeToFinQ$first[146:19], coreFix_aluExe_0_exeToFinQ$first[326:322], @@ -12381,7 +12381,7 @@ module mkCore(CLK, MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_1 || MUX_csrInstOrInterruptInflight_dummy2_0$write_1__SEL_2 ; assign MUX_csrf_fflags_reg$write_1__VAL_1 = - csrf_fflags_reg | fflags__h733530 ; + csrf_fflags_reg | fflags__h733287 ; assign MUX_csrf_frm_reg$write_1__VAL_1 = (IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == 6'd1) ? @@ -12424,9 +12424,9 @@ module mkCore(CLK, assign MUX_csrf_minstret_ehr_data_lat_0$wset_1__VAL_2 = rob$deqPort_0_deq_data[95:32] ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 = - n__read__h726937 + 64'd1 ; + n__read__h726694 + 64'd1 ; assign MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 = - n__read__h726937 + { 62'd0, x__h733794 } ; + n__read__h726694 + { 62'd0, x__h733551 } ; assign MUX_csrf_mpp_reg$write_1__VAL_1 = (rob$deqPort_0_deq_data[329:325] == 5'd13 && IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == @@ -12473,7 +12473,7 @@ module mkCore(CLK, 6'd18) && MUX_csrf_sepc_csr$write_1__VAL_1[8] ; assign MUX_csrf_stval_csr$write_1__VAL_1 = rob$deqPort_0_deq_data[95:32] ; - assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h737644 } ; + assign MUX_f_csr_rsps$enq_1__VAL_3 = { 1'd1, data_out__h737401 } ; assign MUX_f_fpr_rsps$enq_1__VAL_3 = { 1'd1, rf$read_4_rd1 } ; assign MUX_fetchStage$iTlbIfc_updateVMInfo_1__VAL_1 = { csrf_prv_reg, @@ -12522,24 +12522,24 @@ module mkCore(CLK, 56'hAAAAAAAAAAAAAA } ; assign MUX_rf$write_2_wr_2__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? - res_data__h337874 : - res_data__h337869 ; + res_data__h337875 : + res_data__h337870 ; assign MUX_rf$write_2_wr_2__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? - res_data__h383576 : - res_data__h383571 ; + res_data__h383577 : + res_data__h383572 ; assign MUX_rf$write_2_wr_2__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? - res_data__h429271 : - res_data__h429266 ; + res_data__h429272 : + res_data__h429267 ; assign MUX_rf$write_2_wr_2__VAL_5 = coreFix_fpuMulDivExe_0_mulDivExec_mulQ$first_data[33] ? - data___1__h475008 : + data___1__h475009 : IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC___d8070 ; assign MUX_rf$write_2_wr_2__VAL_6 = coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[33] ? - data___1__h475816 : - data__h475282 ; + data___1__h475817 : + data__h475283 ; assign MUX_rf$write_3_wr_2__VAL_3 = coreFix_memExe_lsq$firstLd[100] ? coreFix_memExe_respLrScAmoQ_data_0 : @@ -12608,15 +12608,15 @@ module mkCore(CLK, assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_2 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] : - res_fflags__h337870 ; + res_fflags__h337871 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_3 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] : - res_fflags__h383572 ; + res_fflags__h383573 ; assign MUX_rob$setExecuted_doFinishFpuMulDiv_0_set_3__VAL_4 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[39] ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] : - res_fflags__h429267 ; + res_fflags__h429268 ; assign MUX_v_f_to_TV_0$enq_1__VAL_1 = { commitStage_rg_serial_num, 77'h0AAAAAAAAAAAAAAAAAAA, @@ -12632,9 +12632,9 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, rob$deqPort_0_deq_data[161:98], IF_rob_deqPort_0_deq_data__4339_BITS_97_TO_96__ETC___d14512, - fflags__h728257, + fflags__h728014, rob$deqPort_0_deq_data[26], - x__h729900, + x__h729657, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign MUX_v_f_to_TV_0$enq_1__VAL_4 = { commitStage_rg_serial_num, @@ -12649,7 +12649,7 @@ module mkCore(CLK, rob_deqPort_0_deq_data__4339_BIT_181_4414_CONC_ETC___d14505, rob$deqPort_0_deq_data[167], rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404, - rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292 } ; + rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298 } ; // inlined wires assign csrf_minstret_ehr_data_lat_0$whas = @@ -13003,8 +13003,8 @@ module mkCore(CLK, // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$D_IN = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas ? - v__h604528 : - v__h603883 ; + v__h604529 : + v__h603884 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit$EN = 1'd1 ; // register coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_pipe_0 @@ -13111,7 +13111,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - _theResult_____2__h296521 ; + _theResult_____2__h296522 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl @@ -13133,7 +13133,7 @@ module mkCore(CLK, (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_clearReq_rl) ? 3'd0 : - v__h295941 ; + v__h295942 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_rl @@ -13179,7 +13179,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3127 && - _theResult_____2__h304517 ; + _theResult_____2__h304518 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl @@ -13197,7 +13197,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_fromPQ_ETC___d3127 && - v__h299286 ; + v__h299287 ; assign coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl @@ -13297,7 +13297,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3298 && - _theResult_____2__h310511 ; + _theResult_____2__h310512 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl @@ -13315,7 +13315,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_ETC___d3298 && - v__h309800 ; + v__h309801 ; assign coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_rl @@ -13336,7 +13336,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0 assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_data_0$D_IN = - { x_addr__h314074, + { x_addr__h314075, coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[514:513] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[514:513], @@ -13366,7 +13366,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3394 && - _theResult_____2__h318365 ; + _theResult_____2__h318366 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl @@ -13384,7 +13384,7 @@ module mkCore(CLK, // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$D_IN = NOT_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_ETC___d3394 && - v__h313676 ; + v__h313677 ; assign coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP$EN = 1'd1 ; // register coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl @@ -13461,7 +13461,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_deqP assign coreFix_memExe_forwardQ_deqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3717 && - _theResult_____2__h331934 ; + _theResult_____2__h331935 ; assign coreFix_memExe_forwardQ_deqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_deqReq_rl @@ -13479,7 +13479,7 @@ module mkCore(CLK, // register coreFix_memExe_forwardQ_enqP assign coreFix_memExe_forwardQ_enqP$D_IN = NOT_coreFix_memExe_forwardQ_clearReq_dummy2_1__ETC___d3717 && - v__h331502 ; + v__h331503 ; assign coreFix_memExe_forwardQ_enqP$EN = 1'd1 ; // register coreFix_memExe_forwardQ_enqReq_rl @@ -13522,7 +13522,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_deqP assign coreFix_memExe_memRespLdQ_deqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3623 && - _theResult_____2__h328709 ; + _theResult_____2__h328710 ; assign coreFix_memExe_memRespLdQ_deqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_deqReq_rl @@ -13540,7 +13540,7 @@ module mkCore(CLK, // register coreFix_memExe_memRespLdQ_enqP assign coreFix_memExe_memRespLdQ_enqP$D_IN = NOT_coreFix_memExe_memRespLdQ_clearReq_dummy2__ETC___d3623 && - v__h328277 ; + v__h328278 ; assign coreFix_memExe_memRespLdQ_enqP$EN = 1'd1 ; // register coreFix_memExe_memRespLdQ_enqReq_rl @@ -13796,7 +13796,7 @@ module mkCore(CLK, IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 == 6'd2) || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd3) ; @@ -13833,7 +13833,7 @@ module mkCore(CLK, assign csrf_fs_reg$EN = MUX_csrf_fs_reg$write_1__SEL_2 || WILL_FIRE_RL_commitStage_doCommitNormalInst && - NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 || + NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 || WILL_FIRE_RL_rl_debug_csr_write && (f_csr_reqs$D_OUT[75:64] == 12'd1 || f_csr_reqs$D_OUT[75:64] == 12'd2 || @@ -13988,7 +13988,7 @@ module mkCore(CLK, 6'd24 ; // register csrf_mcycle_ehr_data_rl - assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5310 ; + assign csrf_mcycle_ehr_data_rl$D_IN = upd__h5311 ; assign csrf_mcycle_ehr_data_rl$EN = 1'd1 ; // register csrf_medeleg_13_11_reg @@ -14112,7 +14112,7 @@ module mkCore(CLK, // register csrf_minstret_ehr_data_rl assign csrf_minstret_ehr_data_rl$D_IN = csrf_minstret_ehr_data_lat_1$whas ? - upd__h3993 : + upd__h3994 : IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 ; assign csrf_minstret_ehr_data_rl$EN = 1'd1 ; @@ -14896,7 +14896,7 @@ module mkCore(CLK, // register mmio_cRqQ_data_0 assign mmio_cRqQ_data_0$D_IN = - { x__h46292, + { x__h46293, (mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_cRqQ_enqReq_rl[77:76] == 2'd0) ? @@ -14908,7 +14908,7 @@ module mkCore(CLK, mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[71:64] : mmio_cRqQ_enqReq_rl[71:64], - x__h48828 } ; + x__h48829 } ; assign mmio_cRqQ_data_0$EN = NOT_mmio_cRqQ_clearReq_dummy2_1_read__26_27_OR_ETC___d431 && mmio_cRqQ_enqReq_dummy2_2$Q_OUT && @@ -15001,7 +15001,7 @@ module mkCore(CLK, // register mmio_dataReqQ_data_0 assign mmio_dataReqQ_data_0$D_IN = - { x__h18385, + { x__h18386, (mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[77:76] == 2'd0 : mmio_dataReqQ_enqReq_rl[77:76] == 2'd0) ? @@ -15013,7 +15013,7 @@ module mkCore(CLK, mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[71:64] : mmio_dataReqQ_enqReq_rl[71:64], - x__h20923 } ; + x__h20924 } ; assign mmio_dataReqQ_data_0$EN = NOT_mmio_dataReqQ_clearReq_dummy2_1_read__35_3_ETC___d140 && mmio_dataReqQ_enqReq_dummy2_2$Q_OUT && @@ -15097,7 +15097,7 @@ module mkCore(CLK, mmio_pRqQ_enqReq_lat_0$wget[32] : mmio_pRqQ_enqReq_rl[32] } : IF_IF_mmio_pRqQ_enqReq_lat_1_whas__33_THEN_mmi_ETC___d766, - x_data__h66086 } ; + x_data__h66087 } ; assign mmio_pRqQ_data_0$EN = NOT_mmio_pRqQ_clearReq_dummy2_1_read__29_30_OR_ETC___d734 && mmio_pRqQ_enqReq_dummy2_2$Q_OUT && @@ -16174,19 +16174,19 @@ module mkCore(CLK, // submodule coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tdata = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___fst__h603370 : - a__h602948 ; + _theResult___fst__h603371 : + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tuser = - { b__h602949 == 64'd0, - a__h602948, + { b__h602950 == 64'd0, + a__h602949, coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0, - x__h603384, - a__h602948[63], + x__h603385, + a__h602949[63], 8'd0 } ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_divisor_tdata = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? - _theResult___snd__h603371 : - b__h602949 ; + _theResult___snd__h603372 : + b__h602950 ; assign coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$s_axis_dividend_tvalid = WILL_FIRE_RL_coreFix_fpuMulDivExe_0_doExeFpuMulDiv && coreFix_fpuMulDivExe_0_regToExeQ$first[245:243] == 3'd3 && @@ -16247,20 +16247,20 @@ module mkCore(CLK, 1'd1 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned - assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$A = a__h602948 ; - assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$B = b__h602949 ; + assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$A = a__h602949 ; + assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSigned$B = b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned$A = - a__h602948 ; + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulSignedUnsigned$B = - b__h602949 ; + b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned$A = - a__h602948 ; + a__h602949 ; assign coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_mulUnsigned$B = - b__h602949 ; + b__h602950 ; // submodule coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_respQ always@(coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_pipe_1 or @@ -16289,9 +16289,9 @@ module mkCore(CLK, assign coreFix_fpuMulDivExe_0_regToExeQ$enq_x = { CASE_coreFix_fpuMulDivExe_0_dispToRegQfirst_B_ETC__q298, coreFix_fpuMulDivExe_0_dispToRegQ$first[32:12], - x__h481670, x__h481671, x__h481672, + x__h481673, coreFix_fpuMulDivExe_0_dispToRegQ$first[11:0] } ; assign coreFix_fpuMulDivExe_0_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12698 ; @@ -16497,8 +16497,8 @@ module mkCore(CLK, // submodule coreFix_memExe_dMem_cache_m_banks_0_cRqMshr assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getEmptyEntryInit_r = - { x__h287279, - x__h287291, + { x__h287280, + x__h287292, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2793, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2797, @@ -16509,13 +16509,13 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2819, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2823, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2828, - x__h289145, + x__h289146, IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2836, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2840, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2844, coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_d_ETC___d2848 } ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$cRqTransfer_getRq_n = - x__h285846 ; + x__h285847 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq_n = (coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[578:577] == 2'd0) ? @@ -17409,7 +17409,7 @@ module mkCore(CLK, assign coreFix_memExe_lsq$updateData_d = (coreFix_memExe_regToExeQ$first[192:190] == 3'd4) ? coreFix_memExe_regToExeQ$first[75:12] : - shiftData__h181567 ; + shiftData__h181568 ; assign coreFix_memExe_lsq$updateData_t = coreFix_memExe_regToExeQ$first[143:140] ; assign coreFix_memExe_lsq$wakeupLdStalledBySB_sbIdx = @@ -17509,8 +17509,8 @@ module mkCore(CLK, assign coreFix_memExe_regToExeQ$enq_x = { coreFix_memExe_dispToRegQ$first[97:63], coreFix_memExe_dispToRegQ$first[29:12], - x__h181476, x__h181477, + x__h181478, coreFix_memExe_dispToRegQ$first[11:0] } ; assign coreFix_memExe_regToExeQ$specUpdate_correctSpeculation_mask = IF_coreFix_globalSpecUpdate_correctSpecTag_1_w_ETC___d12698 ; @@ -19580,7 +19580,7 @@ module mkCore(CLK, // submodule v_f_to_TV_1 assign v_f_to_TV_1$D_IN = - { commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, + { commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, 77'h0AAAAAAAAAAAAAAAAAAA, rob$deqPort_1_deq_data[425:181], CASE_robdeqPort_1_deq_data_BITS_180_TO_169_1__ETC__q300, @@ -19588,9 +19588,9 @@ module mkCore(CLK, rob$deqPort_1_deq_data[161:98], CASE_robdeqPort_1_deq_data_BITS_97_TO_96_0_ro_ETC__q301, rob$deqPort_1_deq_data[95:32], - fflags__h730910, + fflags__h730667, rob$deqPort_1_deq_data[26], - x__h733045, + x__h732802, 258'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign v_f_to_TV_1$ENQ = WILL_FIRE_RL_commitStage_doCommitNormalInst && @@ -19612,15 +19612,15 @@ module mkCore(CLK, // remaining internal signals module_amoExec instance_amoExec_2(.amoExec_amo_inst(coreFix_memExe_dMem_cache_m_banks_0_processAmo[10:4]), - .amoExec_current_data(curData__h192916), + .amoExec_current_data(curData__h192917), .amoExec_in_data(coreFix_memExe_dMem_cache_m_banks_0_processAmo[74:11]), .amoExec_upper_32_bits(coreFix_memExe_dMem_cache_m_banks_0_processAmo[90]), - .amoExec(n__h194454)); + .amoExec(n__h194455)); module_amoExec instance_amoExec_3(.amoExec_amo_inst({ mmio_pRqQ_data_0[35:32], 3'd0 }), .amoExec_current_data({ 63'd0, - msip__h76122 }), - .amoExec_in_data({ 32'd0, x__h76237 }), + msip__h76123 }), + .amoExec_in_data({ 32'd0, x__h76238 }), .amoExec_upper_32_bits(1'd0), .amoExec(amoExec___d880)); module_basicExec instance_basicExec_6(.basicExec_dInst({ coreFix_aluExe_1_regToExeQ$first[421:417], @@ -19664,10 +19664,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h655012, r1__read_BITS_13_TO_12___h655197 != 2'd0, - { prv__h735199, - tvm_val__h726553, + { prv__h734956, + tvm_val__h726310, { r1__read_BIT_20___h655893, - tsr_val__h726551, + tsr_val__h726308, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19694,10 +19694,10 @@ module mkCore(CLK, .checkForException_csrState({ x_decodeInfo_frm__h655012, r1__read_BITS_13_TO_12___h655197 != 2'd0, - { prv__h735199, - tvm_val__h726553, + { prv__h734956, + tvm_val__h726310, { r1__read_BIT_20___h655893, - tsr_val__h726551, + tsr_val__h726308, { csrf_mcounteren_cy_reg, csrf_mcounteren_cy_reg && csrf_scounteren_cy_reg, @@ -19711,1196 +19711,1196 @@ module mkCore(CLK, module_execFpuSimple instance_execFpuSimple_4(.execFpuSimple_fpu_inst({ coreFix_fpuMulDivExe_0_regToExeQ$first[233:229], CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q259, coreFix_fpuMulDivExe_0_regToExeQ$first[225] }), - .execFpuSimple_rVal1(rVal1__h481761), - .execFpuSimple_rVal2(rVal2__h481762), + .execFpuSimple_rVal1(rVal1__h481762), + .execFpuSimple_rVal2(rVal2__h481763), .execFpuSimple(execFpuSimple___d11056)); assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4249 ? - _theResult___snd__h354259 : - _theResult____h346085 ; + _theResult___snd__h354260 : + _theResult____h346086 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641 ? - _theResult___snd__h399956 : - _theResult____h391784 ; + _theResult___snd__h399957 : + _theResult____h391785 ; assign IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98 = _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033 ? - _theResult___snd__h445651 : - _theResult____h437479 ; + _theResult___snd__h445652 : + _theResult____h437480 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897 ? - _theResult___snd__h511168 : - _theResult____h502869 ; + _theResult___snd__h511169 : + _theResult____h502870 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9612 ? - _theResult___snd__h589325 : - _theResult____h581026 ; + _theResult___snd__h589326 : + _theResult____h581027 ; assign IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178 = _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382 ? - _theResult___snd__h550021 : - _theResult____h541722 ; + _theResult___snd__h550022 : + _theResult____h541723 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q108 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584 ? - _theResult___snd__h463417 : - _theResult____h455116 ; + _theResult___snd__h463418 : + _theResult____h455117 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q38 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4800 ? - _theResult___snd__h372025 : - _theResult____h363724 ; + _theResult___snd__h372026 : + _theResult____h363725 ; assign IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q73 = _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192 ? - _theResult___snd__h417722 : - _theResult____h409421 ; + _theResult___snd__h417723 : + _theResult____h409422 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585 ? - _theResult___snd__h501517 : + _theResult___snd__h501518 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8947 ? - _theResult___snd__h501517 : - _theResult___snd__h519922 ; + _theResult___snd__h501518 : + _theResult___snd__h519923 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9315 ? - _theResult___snd__h579674 : + _theResult___snd__h579675 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9662 ? - _theResult___snd__h579674 : - _theResult___snd__h598079 ; + _theResult___snd__h579675 : + _theResult___snd__h598080 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085 ? - _theResult___snd__h540370 : + _theResult___snd__h540371 : 57'd0 ; assign IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181 = _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10432 ? - _theResult___snd__h540370 : - _theResult___snd__h558775 ; + _theResult___snd__h540371 : + _theResult___snd__h558776 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q100 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264 ? - _theResult___snd__h454233 : + _theResult___snd__h454234 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q113 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7657 ? - _theResult___snd__h454233 : - _theResult___snd__h472023 ; + _theResult___snd__h454234 : + _theResult___snd__h472024 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q30 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4480 ? - _theResult___snd__h362841 : + _theResult___snd__h362842 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q43 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4873 ? - _theResult___snd__h362841 : - _theResult___snd__h380631 ; + _theResult___snd__h362842 : + _theResult___snd__h380632 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q65 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872 ? - _theResult___snd__h408538 : + _theResult___snd__h408539 : 57'd0 ; assign IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q78 = _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6265 ? - _theResult___snd__h408538 : - _theResult___snd__h426328 ; + _theResult___snd__h408539 : + _theResult___snd__h426329 ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5069 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - ((_theResult___fst_exp__h354196 == 8'd255) ? + ((_theResult___fst_exp__h354197 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054) : - ((_theResult___fst_exp__h362852 == 8'd255) ? + ((_theResult___fst_exp__h362853 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d5119 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - ((_theResult___fst_exp__h354196 == 8'd255) ? + ((_theResult___fst_exp__h354197 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110) : - ((_theResult___fst_exp__h362852 == 8'd255) ? + ((_theResult___fst_exp__h362853 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6461 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - ((_theResult___fst_exp__h399893 == 8'd255) ? + ((_theResult___fst_exp__h399894 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446) : - ((_theResult___fst_exp__h408549 == 8'd255) ? + ((_theResult___fst_exp__h408550 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d6511 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - ((_theResult___fst_exp__h399893 == 8'd255) ? + ((_theResult___fst_exp__h399894 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502) : - ((_theResult___fst_exp__h408549 == 8'd255) ? + ((_theResult___fst_exp__h408550 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7853 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - ((_theResult___fst_exp__h445588 == 8'd255) ? + ((_theResult___fst_exp__h445589 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838) : - ((_theResult___fst_exp__h454244 == 8'd255) ? + ((_theResult___fst_exp__h454245 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851) ; assign IF_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_ETC___d7903 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - ((_theResult___fst_exp__h445588 == 8'd255) ? + ((_theResult___fst_exp__h445589 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894) : - ((_theResult___fst_exp__h454244 == 8'd255) ? + ((_theResult___fst_exp__h454245 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901) ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 = - (_theResult____h346085[56] ? + (_theResult____h346086[56] ? 6'd0 : - (_theResult____h346085[55] ? + (_theResult____h346086[55] ? 6'd1 : - (_theResult____h346085[54] ? + (_theResult____h346086[54] ? 6'd2 : - (_theResult____h346085[53] ? + (_theResult____h346086[53] ? 6'd3 : - (_theResult____h346085[52] ? + (_theResult____h346086[52] ? 6'd4 : - (_theResult____h346085[51] ? + (_theResult____h346086[51] ? 6'd5 : - (_theResult____h346085[50] ? + (_theResult____h346086[50] ? 6'd6 : - (_theResult____h346085[49] ? + (_theResult____h346086[49] ? 6'd7 : - (_theResult____h346085[48] ? + (_theResult____h346086[48] ? 6'd8 : - (_theResult____h346085[47] ? + (_theResult____h346086[47] ? 6'd9 : - (_theResult____h346085[46] ? + (_theResult____h346086[46] ? 6'd10 : - (_theResult____h346085[45] ? + (_theResult____h346086[45] ? 6'd11 : - (_theResult____h346085[44] ? + (_theResult____h346086[44] ? 6'd12 : - (_theResult____h346085[43] ? + (_theResult____h346086[43] ? 6'd13 : - (_theResult____h346085[42] ? + (_theResult____h346086[42] ? 6'd14 : - (_theResult____h346085[41] ? + (_theResult____h346086[41] ? 6'd15 : - (_theResult____h346085[40] ? + (_theResult____h346086[40] ? 6'd16 : - (_theResult____h346085[39] ? + (_theResult____h346086[39] ? 6'd17 : - (_theResult____h346085[38] ? + (_theResult____h346086[38] ? 6'd18 : - (_theResult____h346085[37] ? + (_theResult____h346086[37] ? 6'd19 : - (_theResult____h346085[36] ? + (_theResult____h346086[36] ? 6'd20 : - (_theResult____h346085[35] ? + (_theResult____h346086[35] ? 6'd21 : - (_theResult____h346085[34] ? + (_theResult____h346086[34] ? 6'd22 : - (_theResult____h346085[33] ? + (_theResult____h346086[33] ? 6'd23 : - (_theResult____h346085[32] ? + (_theResult____h346086[32] ? 6'd24 : - (_theResult____h346085[31] ? + (_theResult____h346086[31] ? 6'd25 : - (_theResult____h346085[30] ? + (_theResult____h346086[30] ? 6'd26 : - (_theResult____h346085[29] ? + (_theResult____h346086[29] ? 6'd27 : - (_theResult____h346085[28] ? + (_theResult____h346086[28] ? 6'd28 : - (_theResult____h346085[27] ? + (_theResult____h346086[27] ? 6'd29 : - (_theResult____h346085[26] ? + (_theResult____h346086[26] ? 6'd30 : - (_theResult____h346085[25] ? + (_theResult____h346086[25] ? 6'd31 : - (_theResult____h346085[24] ? + (_theResult____h346086[24] ? 6'd32 : - (_theResult____h346085[23] ? + (_theResult____h346086[23] ? 6'd33 : - (_theResult____h346085[22] ? + (_theResult____h346086[22] ? 6'd34 : - (_theResult____h346085[21] ? + (_theResult____h346086[21] ? 6'd35 : - (_theResult____h346085[20] ? + (_theResult____h346086[20] ? 6'd36 : - (_theResult____h346085[19] ? + (_theResult____h346086[19] ? 6'd37 : - (_theResult____h346085[18] ? + (_theResult____h346086[18] ? 6'd38 : - (_theResult____h346085[17] ? + (_theResult____h346086[17] ? 6'd39 : - (_theResult____h346085[16] ? + (_theResult____h346086[16] ? 6'd40 : - (_theResult____h346085[15] ? + (_theResult____h346086[15] ? 6'd41 : - (_theResult____h346085[14] ? + (_theResult____h346086[14] ? 6'd42 : - (_theResult____h346085[13] ? + (_theResult____h346086[13] ? 6'd43 : - (_theResult____h346085[12] ? + (_theResult____h346086[12] ? 6'd44 : - (_theResult____h346085[11] ? + (_theResult____h346086[11] ? 6'd45 : - (_theResult____h346085[10] ? + (_theResult____h346086[10] ? 6'd46 : - (_theResult____h346085[9] ? + (_theResult____h346086[9] ? 6'd47 : - (_theResult____h346085[8] ? + (_theResult____h346086[8] ? 6'd48 : - (_theResult____h346085[7] ? + (_theResult____h346086[7] ? 6'd49 : - (_theResult____h346085[6] ? + (_theResult____h346086[6] ? 6'd50 : - (_theResult____h346085[5] ? + (_theResult____h346086[5] ? 6'd51 : - (_theResult____h346085[4] ? + (_theResult____h346086[4] ? 6'd52 : - (_theResult____h346085[3] ? + (_theResult____h346086[3] ? 6'd53 : - (_theResult____h346085[2] ? + (_theResult____h346086[2] ? 6'd54 : - (_theResult____h346085[1] ? + (_theResult____h346086[1] ? 6'd55 : - (_theResult____h346085[0] ? + (_theResult____h346086[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 = - (_theResult____h391784[56] ? + (_theResult____h391785[56] ? 6'd0 : - (_theResult____h391784[55] ? + (_theResult____h391785[55] ? 6'd1 : - (_theResult____h391784[54] ? + (_theResult____h391785[54] ? 6'd2 : - (_theResult____h391784[53] ? + (_theResult____h391785[53] ? 6'd3 : - (_theResult____h391784[52] ? + (_theResult____h391785[52] ? 6'd4 : - (_theResult____h391784[51] ? + (_theResult____h391785[51] ? 6'd5 : - (_theResult____h391784[50] ? + (_theResult____h391785[50] ? 6'd6 : - (_theResult____h391784[49] ? + (_theResult____h391785[49] ? 6'd7 : - (_theResult____h391784[48] ? + (_theResult____h391785[48] ? 6'd8 : - (_theResult____h391784[47] ? + (_theResult____h391785[47] ? 6'd9 : - (_theResult____h391784[46] ? + (_theResult____h391785[46] ? 6'd10 : - (_theResult____h391784[45] ? + (_theResult____h391785[45] ? 6'd11 : - (_theResult____h391784[44] ? + (_theResult____h391785[44] ? 6'd12 : - (_theResult____h391784[43] ? + (_theResult____h391785[43] ? 6'd13 : - (_theResult____h391784[42] ? + (_theResult____h391785[42] ? 6'd14 : - (_theResult____h391784[41] ? + (_theResult____h391785[41] ? 6'd15 : - (_theResult____h391784[40] ? + (_theResult____h391785[40] ? 6'd16 : - (_theResult____h391784[39] ? + (_theResult____h391785[39] ? 6'd17 : - (_theResult____h391784[38] ? + (_theResult____h391785[38] ? 6'd18 : - (_theResult____h391784[37] ? + (_theResult____h391785[37] ? 6'd19 : - (_theResult____h391784[36] ? + (_theResult____h391785[36] ? 6'd20 : - (_theResult____h391784[35] ? + (_theResult____h391785[35] ? 6'd21 : - (_theResult____h391784[34] ? + (_theResult____h391785[34] ? 6'd22 : - (_theResult____h391784[33] ? + (_theResult____h391785[33] ? 6'd23 : - (_theResult____h391784[32] ? + (_theResult____h391785[32] ? 6'd24 : - (_theResult____h391784[31] ? + (_theResult____h391785[31] ? 6'd25 : - (_theResult____h391784[30] ? + (_theResult____h391785[30] ? 6'd26 : - (_theResult____h391784[29] ? + (_theResult____h391785[29] ? 6'd27 : - (_theResult____h391784[28] ? + (_theResult____h391785[28] ? 6'd28 : - (_theResult____h391784[27] ? + (_theResult____h391785[27] ? 6'd29 : - (_theResult____h391784[26] ? + (_theResult____h391785[26] ? 6'd30 : - (_theResult____h391784[25] ? + (_theResult____h391785[25] ? 6'd31 : - (_theResult____h391784[24] ? + (_theResult____h391785[24] ? 6'd32 : - (_theResult____h391784[23] ? + (_theResult____h391785[23] ? 6'd33 : - (_theResult____h391784[22] ? + (_theResult____h391785[22] ? 6'd34 : - (_theResult____h391784[21] ? + (_theResult____h391785[21] ? 6'd35 : - (_theResult____h391784[20] ? + (_theResult____h391785[20] ? 6'd36 : - (_theResult____h391784[19] ? + (_theResult____h391785[19] ? 6'd37 : - (_theResult____h391784[18] ? + (_theResult____h391785[18] ? 6'd38 : - (_theResult____h391784[17] ? + (_theResult____h391785[17] ? 6'd39 : - (_theResult____h391784[16] ? + (_theResult____h391785[16] ? 6'd40 : - (_theResult____h391784[15] ? + (_theResult____h391785[15] ? 6'd41 : - (_theResult____h391784[14] ? + (_theResult____h391785[14] ? 6'd42 : - (_theResult____h391784[13] ? + (_theResult____h391785[13] ? 6'd43 : - (_theResult____h391784[12] ? + (_theResult____h391785[12] ? 6'd44 : - (_theResult____h391784[11] ? + (_theResult____h391785[11] ? 6'd45 : - (_theResult____h391784[10] ? + (_theResult____h391785[10] ? 6'd46 : - (_theResult____h391784[9] ? + (_theResult____h391785[9] ? 6'd47 : - (_theResult____h391784[8] ? + (_theResult____h391785[8] ? 6'd48 : - (_theResult____h391784[7] ? + (_theResult____h391785[7] ? 6'd49 : - (_theResult____h391784[6] ? + (_theResult____h391785[6] ? 6'd50 : - (_theResult____h391784[5] ? + (_theResult____h391785[5] ? 6'd51 : - (_theResult____h391784[4] ? + (_theResult____h391785[4] ? 6'd52 : - (_theResult____h391784[3] ? + (_theResult____h391785[3] ? 6'd53 : - (_theResult____h391784[2] ? + (_theResult____h391785[2] ? 6'd54 : - (_theResult____h391784[1] ? + (_theResult____h391785[1] ? 6'd55 : - (_theResult____h391784[0] ? + (_theResult____h391785[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 = - (_theResult____h437479[56] ? + (_theResult____h437480[56] ? 6'd0 : - (_theResult____h437479[55] ? + (_theResult____h437480[55] ? 6'd1 : - (_theResult____h437479[54] ? + (_theResult____h437480[54] ? 6'd2 : - (_theResult____h437479[53] ? + (_theResult____h437480[53] ? 6'd3 : - (_theResult____h437479[52] ? + (_theResult____h437480[52] ? 6'd4 : - (_theResult____h437479[51] ? + (_theResult____h437480[51] ? 6'd5 : - (_theResult____h437479[50] ? + (_theResult____h437480[50] ? 6'd6 : - (_theResult____h437479[49] ? + (_theResult____h437480[49] ? 6'd7 : - (_theResult____h437479[48] ? + (_theResult____h437480[48] ? 6'd8 : - (_theResult____h437479[47] ? + (_theResult____h437480[47] ? 6'd9 : - (_theResult____h437479[46] ? + (_theResult____h437480[46] ? 6'd10 : - (_theResult____h437479[45] ? + (_theResult____h437480[45] ? 6'd11 : - (_theResult____h437479[44] ? + (_theResult____h437480[44] ? 6'd12 : - (_theResult____h437479[43] ? + (_theResult____h437480[43] ? 6'd13 : - (_theResult____h437479[42] ? + (_theResult____h437480[42] ? 6'd14 : - (_theResult____h437479[41] ? + (_theResult____h437480[41] ? 6'd15 : - (_theResult____h437479[40] ? + (_theResult____h437480[40] ? 6'd16 : - (_theResult____h437479[39] ? + (_theResult____h437480[39] ? 6'd17 : - (_theResult____h437479[38] ? + (_theResult____h437480[38] ? 6'd18 : - (_theResult____h437479[37] ? + (_theResult____h437480[37] ? 6'd19 : - (_theResult____h437479[36] ? + (_theResult____h437480[36] ? 6'd20 : - (_theResult____h437479[35] ? + (_theResult____h437480[35] ? 6'd21 : - (_theResult____h437479[34] ? + (_theResult____h437480[34] ? 6'd22 : - (_theResult____h437479[33] ? + (_theResult____h437480[33] ? 6'd23 : - (_theResult____h437479[32] ? + (_theResult____h437480[32] ? 6'd24 : - (_theResult____h437479[31] ? + (_theResult____h437480[31] ? 6'd25 : - (_theResult____h437479[30] ? + (_theResult____h437480[30] ? 6'd26 : - (_theResult____h437479[29] ? + (_theResult____h437480[29] ? 6'd27 : - (_theResult____h437479[28] ? + (_theResult____h437480[28] ? 6'd28 : - (_theResult____h437479[27] ? + (_theResult____h437480[27] ? 6'd29 : - (_theResult____h437479[26] ? + (_theResult____h437480[26] ? 6'd30 : - (_theResult____h437479[25] ? + (_theResult____h437480[25] ? 6'd31 : - (_theResult____h437479[24] ? + (_theResult____h437480[24] ? 6'd32 : - (_theResult____h437479[23] ? + (_theResult____h437480[23] ? 6'd33 : - (_theResult____h437479[22] ? + (_theResult____h437480[22] ? 6'd34 : - (_theResult____h437479[21] ? + (_theResult____h437480[21] ? 6'd35 : - (_theResult____h437479[20] ? + (_theResult____h437480[20] ? 6'd36 : - (_theResult____h437479[19] ? + (_theResult____h437480[19] ? 6'd37 : - (_theResult____h437479[18] ? + (_theResult____h437480[18] ? 6'd38 : - (_theResult____h437479[17] ? + (_theResult____h437480[17] ? 6'd39 : - (_theResult____h437479[16] ? + (_theResult____h437480[16] ? 6'd40 : - (_theResult____h437479[15] ? + (_theResult____h437480[15] ? 6'd41 : - (_theResult____h437479[14] ? + (_theResult____h437480[14] ? 6'd42 : - (_theResult____h437479[13] ? + (_theResult____h437480[13] ? 6'd43 : - (_theResult____h437479[12] ? + (_theResult____h437480[12] ? 6'd44 : - (_theResult____h437479[11] ? + (_theResult____h437480[11] ? 6'd45 : - (_theResult____h437479[10] ? + (_theResult____h437480[10] ? 6'd46 : - (_theResult____h437479[9] ? + (_theResult____h437480[9] ? 6'd47 : - (_theResult____h437479[8] ? + (_theResult____h437480[8] ? 6'd48 : - (_theResult____h437479[7] ? + (_theResult____h437480[7] ? 6'd49 : - (_theResult____h437479[6] ? + (_theResult____h437480[6] ? 6'd50 : - (_theResult____h437479[5] ? + (_theResult____h437480[5] ? 6'd51 : - (_theResult____h437479[4] ? + (_theResult____h437480[4] ? 6'd52 : - (_theResult____h437479[3] ? + (_theResult____h437480[3] ? 6'd53 : - (_theResult____h437479[2] ? + (_theResult____h437480[2] ? 6'd54 : - (_theResult____h437479[1] ? + (_theResult____h437480[1] ? 6'd55 : - (_theResult____h437479[0] ? + (_theResult____h437480[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 = - (_theResult____h541722[56] ? + (_theResult____h541723[56] ? 6'd0 : - (_theResult____h541722[55] ? + (_theResult____h541723[55] ? 6'd1 : - (_theResult____h541722[54] ? + (_theResult____h541723[54] ? 6'd2 : - (_theResult____h541722[53] ? + (_theResult____h541723[53] ? 6'd3 : - (_theResult____h541722[52] ? + (_theResult____h541723[52] ? 6'd4 : - (_theResult____h541722[51] ? + (_theResult____h541723[51] ? 6'd5 : - (_theResult____h541722[50] ? + (_theResult____h541723[50] ? 6'd6 : - (_theResult____h541722[49] ? + (_theResult____h541723[49] ? 6'd7 : - (_theResult____h541722[48] ? + (_theResult____h541723[48] ? 6'd8 : - (_theResult____h541722[47] ? + (_theResult____h541723[47] ? 6'd9 : - (_theResult____h541722[46] ? + (_theResult____h541723[46] ? 6'd10 : - (_theResult____h541722[45] ? + (_theResult____h541723[45] ? 6'd11 : - (_theResult____h541722[44] ? + (_theResult____h541723[44] ? 6'd12 : - (_theResult____h541722[43] ? + (_theResult____h541723[43] ? 6'd13 : - (_theResult____h541722[42] ? + (_theResult____h541723[42] ? 6'd14 : - (_theResult____h541722[41] ? + (_theResult____h541723[41] ? 6'd15 : - (_theResult____h541722[40] ? + (_theResult____h541723[40] ? 6'd16 : - (_theResult____h541722[39] ? + (_theResult____h541723[39] ? 6'd17 : - (_theResult____h541722[38] ? + (_theResult____h541723[38] ? 6'd18 : - (_theResult____h541722[37] ? + (_theResult____h541723[37] ? 6'd19 : - (_theResult____h541722[36] ? + (_theResult____h541723[36] ? 6'd20 : - (_theResult____h541722[35] ? + (_theResult____h541723[35] ? 6'd21 : - (_theResult____h541722[34] ? + (_theResult____h541723[34] ? 6'd22 : - (_theResult____h541722[33] ? + (_theResult____h541723[33] ? 6'd23 : - (_theResult____h541722[32] ? + (_theResult____h541723[32] ? 6'd24 : - (_theResult____h541722[31] ? + (_theResult____h541723[31] ? 6'd25 : - (_theResult____h541722[30] ? + (_theResult____h541723[30] ? 6'd26 : - (_theResult____h541722[29] ? + (_theResult____h541723[29] ? 6'd27 : - (_theResult____h541722[28] ? + (_theResult____h541723[28] ? 6'd28 : - (_theResult____h541722[27] ? + (_theResult____h541723[27] ? 6'd29 : - (_theResult____h541722[26] ? + (_theResult____h541723[26] ? 6'd30 : - (_theResult____h541722[25] ? + (_theResult____h541723[25] ? 6'd31 : - (_theResult____h541722[24] ? + (_theResult____h541723[24] ? 6'd32 : - (_theResult____h541722[23] ? + (_theResult____h541723[23] ? 6'd33 : - (_theResult____h541722[22] ? + (_theResult____h541723[22] ? 6'd34 : - (_theResult____h541722[21] ? + (_theResult____h541723[21] ? 6'd35 : - (_theResult____h541722[20] ? + (_theResult____h541723[20] ? 6'd36 : - (_theResult____h541722[19] ? + (_theResult____h541723[19] ? 6'd37 : - (_theResult____h541722[18] ? + (_theResult____h541723[18] ? 6'd38 : - (_theResult____h541722[17] ? + (_theResult____h541723[17] ? 6'd39 : - (_theResult____h541722[16] ? + (_theResult____h541723[16] ? 6'd40 : - (_theResult____h541722[15] ? + (_theResult____h541723[15] ? 6'd41 : - (_theResult____h541722[14] ? + (_theResult____h541723[14] ? 6'd42 : - (_theResult____h541722[13] ? + (_theResult____h541723[13] ? 6'd43 : - (_theResult____h541722[12] ? + (_theResult____h541723[12] ? 6'd44 : - (_theResult____h541722[11] ? + (_theResult____h541723[11] ? 6'd45 : - (_theResult____h541722[10] ? + (_theResult____h541723[10] ? 6'd46 : - (_theResult____h541722[9] ? + (_theResult____h541723[9] ? 6'd47 : - (_theResult____h541722[8] ? + (_theResult____h541723[8] ? 6'd48 : - (_theResult____h541722[7] ? + (_theResult____h541723[7] ? 6'd49 : - (_theResult____h541722[6] ? + (_theResult____h541723[6] ? 6'd50 : - (_theResult____h541722[5] ? + (_theResult____h541723[5] ? 6'd51 : - (_theResult____h541722[4] ? + (_theResult____h541723[4] ? 6'd52 : - (_theResult____h541722[3] ? + (_theResult____h541723[3] ? 6'd53 : - (_theResult____h541722[2] ? + (_theResult____h541723[2] ? 6'd54 : - (_theResult____h541722[1] ? + (_theResult____h541723[1] ? 6'd55 : - (_theResult____h541722[0] ? + (_theResult____h541723[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 = - (_theResult____h502869[56] ? + (_theResult____h502870[56] ? 6'd0 : - (_theResult____h502869[55] ? + (_theResult____h502870[55] ? 6'd1 : - (_theResult____h502869[54] ? + (_theResult____h502870[54] ? 6'd2 : - (_theResult____h502869[53] ? + (_theResult____h502870[53] ? 6'd3 : - (_theResult____h502869[52] ? + (_theResult____h502870[52] ? 6'd4 : - (_theResult____h502869[51] ? + (_theResult____h502870[51] ? 6'd5 : - (_theResult____h502869[50] ? + (_theResult____h502870[50] ? 6'd6 : - (_theResult____h502869[49] ? + (_theResult____h502870[49] ? 6'd7 : - (_theResult____h502869[48] ? + (_theResult____h502870[48] ? 6'd8 : - (_theResult____h502869[47] ? + (_theResult____h502870[47] ? 6'd9 : - (_theResult____h502869[46] ? + (_theResult____h502870[46] ? 6'd10 : - (_theResult____h502869[45] ? + (_theResult____h502870[45] ? 6'd11 : - (_theResult____h502869[44] ? + (_theResult____h502870[44] ? 6'd12 : - (_theResult____h502869[43] ? + (_theResult____h502870[43] ? 6'd13 : - (_theResult____h502869[42] ? + (_theResult____h502870[42] ? 6'd14 : - (_theResult____h502869[41] ? + (_theResult____h502870[41] ? 6'd15 : - (_theResult____h502869[40] ? + (_theResult____h502870[40] ? 6'd16 : - (_theResult____h502869[39] ? + (_theResult____h502870[39] ? 6'd17 : - (_theResult____h502869[38] ? + (_theResult____h502870[38] ? 6'd18 : - (_theResult____h502869[37] ? + (_theResult____h502870[37] ? 6'd19 : - (_theResult____h502869[36] ? + (_theResult____h502870[36] ? 6'd20 : - (_theResult____h502869[35] ? + (_theResult____h502870[35] ? 6'd21 : - (_theResult____h502869[34] ? + (_theResult____h502870[34] ? 6'd22 : - (_theResult____h502869[33] ? + (_theResult____h502870[33] ? 6'd23 : - (_theResult____h502869[32] ? + (_theResult____h502870[32] ? 6'd24 : - (_theResult____h502869[31] ? + (_theResult____h502870[31] ? 6'd25 : - (_theResult____h502869[30] ? + (_theResult____h502870[30] ? 6'd26 : - (_theResult____h502869[29] ? + (_theResult____h502870[29] ? 6'd27 : - (_theResult____h502869[28] ? + (_theResult____h502870[28] ? 6'd28 : - (_theResult____h502869[27] ? + (_theResult____h502870[27] ? 6'd29 : - (_theResult____h502869[26] ? + (_theResult____h502870[26] ? 6'd30 : - (_theResult____h502869[25] ? + (_theResult____h502870[25] ? 6'd31 : - (_theResult____h502869[24] ? + (_theResult____h502870[24] ? 6'd32 : - (_theResult____h502869[23] ? + (_theResult____h502870[23] ? 6'd33 : - (_theResult____h502869[22] ? + (_theResult____h502870[22] ? 6'd34 : - (_theResult____h502869[21] ? + (_theResult____h502870[21] ? 6'd35 : - (_theResult____h502869[20] ? + (_theResult____h502870[20] ? 6'd36 : - (_theResult____h502869[19] ? + (_theResult____h502870[19] ? 6'd37 : - (_theResult____h502869[18] ? + (_theResult____h502870[18] ? 6'd38 : - (_theResult____h502869[17] ? + (_theResult____h502870[17] ? 6'd39 : - (_theResult____h502869[16] ? + (_theResult____h502870[16] ? 6'd40 : - (_theResult____h502869[15] ? + (_theResult____h502870[15] ? 6'd41 : - (_theResult____h502869[14] ? + (_theResult____h502870[14] ? 6'd42 : - (_theResult____h502869[13] ? + (_theResult____h502870[13] ? 6'd43 : - (_theResult____h502869[12] ? + (_theResult____h502870[12] ? 6'd44 : - (_theResult____h502869[11] ? + (_theResult____h502870[11] ? 6'd45 : - (_theResult____h502869[10] ? + (_theResult____h502870[10] ? 6'd46 : - (_theResult____h502869[9] ? + (_theResult____h502870[9] ? 6'd47 : - (_theResult____h502869[8] ? + (_theResult____h502870[8] ? 6'd48 : - (_theResult____h502869[7] ? + (_theResult____h502870[7] ? 6'd49 : - (_theResult____h502869[6] ? + (_theResult____h502870[6] ? 6'd50 : - (_theResult____h502869[5] ? + (_theResult____h502870[5] ? 6'd51 : - (_theResult____h502869[4] ? + (_theResult____h502870[4] ? 6'd52 : - (_theResult____h502869[3] ? + (_theResult____h502870[3] ? 6'd53 : - (_theResult____h502869[2] ? + (_theResult____h502870[2] ? 6'd54 : - (_theResult____h502869[1] ? + (_theResult____h502870[1] ? 6'd55 : - (_theResult____h502869[0] ? + (_theResult____h502870[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 = - (_theResult____h581026[56] ? + (_theResult____h581027[56] ? 6'd0 : - (_theResult____h581026[55] ? + (_theResult____h581027[55] ? 6'd1 : - (_theResult____h581026[54] ? + (_theResult____h581027[54] ? 6'd2 : - (_theResult____h581026[53] ? + (_theResult____h581027[53] ? 6'd3 : - (_theResult____h581026[52] ? + (_theResult____h581027[52] ? 6'd4 : - (_theResult____h581026[51] ? + (_theResult____h581027[51] ? 6'd5 : - (_theResult____h581026[50] ? + (_theResult____h581027[50] ? 6'd6 : - (_theResult____h581026[49] ? + (_theResult____h581027[49] ? 6'd7 : - (_theResult____h581026[48] ? + (_theResult____h581027[48] ? 6'd8 : - (_theResult____h581026[47] ? + (_theResult____h581027[47] ? 6'd9 : - (_theResult____h581026[46] ? + (_theResult____h581027[46] ? 6'd10 : - (_theResult____h581026[45] ? + (_theResult____h581027[45] ? 6'd11 : - (_theResult____h581026[44] ? + (_theResult____h581027[44] ? 6'd12 : - (_theResult____h581026[43] ? + (_theResult____h581027[43] ? 6'd13 : - (_theResult____h581026[42] ? + (_theResult____h581027[42] ? 6'd14 : - (_theResult____h581026[41] ? + (_theResult____h581027[41] ? 6'd15 : - (_theResult____h581026[40] ? + (_theResult____h581027[40] ? 6'd16 : - (_theResult____h581026[39] ? + (_theResult____h581027[39] ? 6'd17 : - (_theResult____h581026[38] ? + (_theResult____h581027[38] ? 6'd18 : - (_theResult____h581026[37] ? + (_theResult____h581027[37] ? 6'd19 : - (_theResult____h581026[36] ? + (_theResult____h581027[36] ? 6'd20 : - (_theResult____h581026[35] ? + (_theResult____h581027[35] ? 6'd21 : - (_theResult____h581026[34] ? + (_theResult____h581027[34] ? 6'd22 : - (_theResult____h581026[33] ? + (_theResult____h581027[33] ? 6'd23 : - (_theResult____h581026[32] ? + (_theResult____h581027[32] ? 6'd24 : - (_theResult____h581026[31] ? + (_theResult____h581027[31] ? 6'd25 : - (_theResult____h581026[30] ? + (_theResult____h581027[30] ? 6'd26 : - (_theResult____h581026[29] ? + (_theResult____h581027[29] ? 6'd27 : - (_theResult____h581026[28] ? + (_theResult____h581027[28] ? 6'd28 : - (_theResult____h581026[27] ? + (_theResult____h581027[27] ? 6'd29 : - (_theResult____h581026[26] ? + (_theResult____h581027[26] ? 6'd30 : - (_theResult____h581026[25] ? + (_theResult____h581027[25] ? 6'd31 : - (_theResult____h581026[24] ? + (_theResult____h581027[24] ? 6'd32 : - (_theResult____h581026[23] ? + (_theResult____h581027[23] ? 6'd33 : - (_theResult____h581026[22] ? + (_theResult____h581027[22] ? 6'd34 : - (_theResult____h581026[21] ? + (_theResult____h581027[21] ? 6'd35 : - (_theResult____h581026[20] ? + (_theResult____h581027[20] ? 6'd36 : - (_theResult____h581026[19] ? + (_theResult____h581027[19] ? 6'd37 : - (_theResult____h581026[18] ? + (_theResult____h581027[18] ? 6'd38 : - (_theResult____h581026[17] ? + (_theResult____h581027[17] ? 6'd39 : - (_theResult____h581026[16] ? + (_theResult____h581027[16] ? 6'd40 : - (_theResult____h581026[15] ? + (_theResult____h581027[15] ? 6'd41 : - (_theResult____h581026[14] ? + (_theResult____h581027[14] ? 6'd42 : - (_theResult____h581026[13] ? + (_theResult____h581027[13] ? 6'd43 : - (_theResult____h581026[12] ? + (_theResult____h581027[12] ? 6'd44 : - (_theResult____h581026[11] ? + (_theResult____h581027[11] ? 6'd45 : - (_theResult____h581026[10] ? + (_theResult____h581027[10] ? 6'd46 : - (_theResult____h581026[9] ? + (_theResult____h581027[9] ? 6'd47 : - (_theResult____h581026[8] ? + (_theResult____h581027[8] ? 6'd48 : - (_theResult____h581026[7] ? + (_theResult____h581027[7] ? 6'd49 : - (_theResult____h581026[6] ? + (_theResult____h581027[6] ? 6'd50 : - (_theResult____h581026[5] ? + (_theResult____h581027[5] ? 6'd51 : - (_theResult____h581026[4] ? + (_theResult____h581027[4] ? 6'd52 : - (_theResult____h581026[3] ? + (_theResult____h581027[3] ? 6'd53 : - (_theResult____h581026[2] ? + (_theResult____h581027[2] ? 6'd54 : - (_theResult____h581026[1] ? + (_theResult____h581027[1] ? 6'd55 : - (_theResult____h581026[0] ? + (_theResult____h581027[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 = - (_theResult____h363724[56] ? + (_theResult____h363725[56] ? 6'd0 : - (_theResult____h363724[55] ? + (_theResult____h363725[55] ? 6'd1 : - (_theResult____h363724[54] ? + (_theResult____h363725[54] ? 6'd2 : - (_theResult____h363724[53] ? + (_theResult____h363725[53] ? 6'd3 : - (_theResult____h363724[52] ? + (_theResult____h363725[52] ? 6'd4 : - (_theResult____h363724[51] ? + (_theResult____h363725[51] ? 6'd5 : - (_theResult____h363724[50] ? + (_theResult____h363725[50] ? 6'd6 : - (_theResult____h363724[49] ? + (_theResult____h363725[49] ? 6'd7 : - (_theResult____h363724[48] ? + (_theResult____h363725[48] ? 6'd8 : - (_theResult____h363724[47] ? + (_theResult____h363725[47] ? 6'd9 : - (_theResult____h363724[46] ? + (_theResult____h363725[46] ? 6'd10 : - (_theResult____h363724[45] ? + (_theResult____h363725[45] ? 6'd11 : - (_theResult____h363724[44] ? + (_theResult____h363725[44] ? 6'd12 : - (_theResult____h363724[43] ? + (_theResult____h363725[43] ? 6'd13 : - (_theResult____h363724[42] ? + (_theResult____h363725[42] ? 6'd14 : - (_theResult____h363724[41] ? + (_theResult____h363725[41] ? 6'd15 : - (_theResult____h363724[40] ? + (_theResult____h363725[40] ? 6'd16 : - (_theResult____h363724[39] ? + (_theResult____h363725[39] ? 6'd17 : - (_theResult____h363724[38] ? + (_theResult____h363725[38] ? 6'd18 : - (_theResult____h363724[37] ? + (_theResult____h363725[37] ? 6'd19 : - (_theResult____h363724[36] ? + (_theResult____h363725[36] ? 6'd20 : - (_theResult____h363724[35] ? + (_theResult____h363725[35] ? 6'd21 : - (_theResult____h363724[34] ? + (_theResult____h363725[34] ? 6'd22 : - (_theResult____h363724[33] ? + (_theResult____h363725[33] ? 6'd23 : - (_theResult____h363724[32] ? + (_theResult____h363725[32] ? 6'd24 : - (_theResult____h363724[31] ? + (_theResult____h363725[31] ? 6'd25 : - (_theResult____h363724[30] ? + (_theResult____h363725[30] ? 6'd26 : - (_theResult____h363724[29] ? + (_theResult____h363725[29] ? 6'd27 : - (_theResult____h363724[28] ? + (_theResult____h363725[28] ? 6'd28 : - (_theResult____h363724[27] ? + (_theResult____h363725[27] ? 6'd29 : - (_theResult____h363724[26] ? + (_theResult____h363725[26] ? 6'd30 : - (_theResult____h363724[25] ? + (_theResult____h363725[25] ? 6'd31 : - (_theResult____h363724[24] ? + (_theResult____h363725[24] ? 6'd32 : - (_theResult____h363724[23] ? + (_theResult____h363725[23] ? 6'd33 : - (_theResult____h363724[22] ? + (_theResult____h363725[22] ? 6'd34 : - (_theResult____h363724[21] ? + (_theResult____h363725[21] ? 6'd35 : - (_theResult____h363724[20] ? + (_theResult____h363725[20] ? 6'd36 : - (_theResult____h363724[19] ? + (_theResult____h363725[19] ? 6'd37 : - (_theResult____h363724[18] ? + (_theResult____h363725[18] ? 6'd38 : - (_theResult____h363724[17] ? + (_theResult____h363725[17] ? 6'd39 : - (_theResult____h363724[16] ? + (_theResult____h363725[16] ? 6'd40 : - (_theResult____h363724[15] ? + (_theResult____h363725[15] ? 6'd41 : - (_theResult____h363724[14] ? + (_theResult____h363725[14] ? 6'd42 : - (_theResult____h363724[13] ? + (_theResult____h363725[13] ? 6'd43 : - (_theResult____h363724[12] ? + (_theResult____h363725[12] ? 6'd44 : - (_theResult____h363724[11] ? + (_theResult____h363725[11] ? 6'd45 : - (_theResult____h363724[10] ? + (_theResult____h363725[10] ? 6'd46 : - (_theResult____h363724[9] ? + (_theResult____h363725[9] ? 6'd47 : - (_theResult____h363724[8] ? + (_theResult____h363725[8] ? 6'd48 : - (_theResult____h363724[7] ? + (_theResult____h363725[7] ? 6'd49 : - (_theResult____h363724[6] ? + (_theResult____h363725[6] ? 6'd50 : - (_theResult____h363724[5] ? + (_theResult____h363725[5] ? 6'd51 : - (_theResult____h363724[4] ? + (_theResult____h363725[4] ? 6'd52 : - (_theResult____h363724[3] ? + (_theResult____h363725[3] ? 6'd53 : - (_theResult____h363724[2] ? + (_theResult____h363725[2] ? 6'd54 : - (_theResult____h363724[1] ? + (_theResult____h363725[1] ? 6'd55 : - (_theResult____h363724[0] ? + (_theResult____h363725[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 = - (_theResult____h409421[56] ? + (_theResult____h409422[56] ? 6'd0 : - (_theResult____h409421[55] ? + (_theResult____h409422[55] ? 6'd1 : - (_theResult____h409421[54] ? + (_theResult____h409422[54] ? 6'd2 : - (_theResult____h409421[53] ? + (_theResult____h409422[53] ? 6'd3 : - (_theResult____h409421[52] ? + (_theResult____h409422[52] ? 6'd4 : - (_theResult____h409421[51] ? + (_theResult____h409422[51] ? 6'd5 : - (_theResult____h409421[50] ? + (_theResult____h409422[50] ? 6'd6 : - (_theResult____h409421[49] ? + (_theResult____h409422[49] ? 6'd7 : - (_theResult____h409421[48] ? + (_theResult____h409422[48] ? 6'd8 : - (_theResult____h409421[47] ? + (_theResult____h409422[47] ? 6'd9 : - (_theResult____h409421[46] ? + (_theResult____h409422[46] ? 6'd10 : - (_theResult____h409421[45] ? + (_theResult____h409422[45] ? 6'd11 : - (_theResult____h409421[44] ? + (_theResult____h409422[44] ? 6'd12 : - (_theResult____h409421[43] ? + (_theResult____h409422[43] ? 6'd13 : - (_theResult____h409421[42] ? + (_theResult____h409422[42] ? 6'd14 : - (_theResult____h409421[41] ? + (_theResult____h409422[41] ? 6'd15 : - (_theResult____h409421[40] ? + (_theResult____h409422[40] ? 6'd16 : - (_theResult____h409421[39] ? + (_theResult____h409422[39] ? 6'd17 : - (_theResult____h409421[38] ? + (_theResult____h409422[38] ? 6'd18 : - (_theResult____h409421[37] ? + (_theResult____h409422[37] ? 6'd19 : - (_theResult____h409421[36] ? + (_theResult____h409422[36] ? 6'd20 : - (_theResult____h409421[35] ? + (_theResult____h409422[35] ? 6'd21 : - (_theResult____h409421[34] ? + (_theResult____h409422[34] ? 6'd22 : - (_theResult____h409421[33] ? + (_theResult____h409422[33] ? 6'd23 : - (_theResult____h409421[32] ? + (_theResult____h409422[32] ? 6'd24 : - (_theResult____h409421[31] ? + (_theResult____h409422[31] ? 6'd25 : - (_theResult____h409421[30] ? + (_theResult____h409422[30] ? 6'd26 : - (_theResult____h409421[29] ? + (_theResult____h409422[29] ? 6'd27 : - (_theResult____h409421[28] ? + (_theResult____h409422[28] ? 6'd28 : - (_theResult____h409421[27] ? + (_theResult____h409422[27] ? 6'd29 : - (_theResult____h409421[26] ? + (_theResult____h409422[26] ? 6'd30 : - (_theResult____h409421[25] ? + (_theResult____h409422[25] ? 6'd31 : - (_theResult____h409421[24] ? + (_theResult____h409422[24] ? 6'd32 : - (_theResult____h409421[23] ? + (_theResult____h409422[23] ? 6'd33 : - (_theResult____h409421[22] ? + (_theResult____h409422[22] ? 6'd34 : - (_theResult____h409421[21] ? + (_theResult____h409422[21] ? 6'd35 : - (_theResult____h409421[20] ? + (_theResult____h409422[20] ? 6'd36 : - (_theResult____h409421[19] ? + (_theResult____h409422[19] ? 6'd37 : - (_theResult____h409421[18] ? + (_theResult____h409422[18] ? 6'd38 : - (_theResult____h409421[17] ? + (_theResult____h409422[17] ? 6'd39 : - (_theResult____h409421[16] ? + (_theResult____h409422[16] ? 6'd40 : - (_theResult____h409421[15] ? + (_theResult____h409422[15] ? 6'd41 : - (_theResult____h409421[14] ? + (_theResult____h409422[14] ? 6'd42 : - (_theResult____h409421[13] ? + (_theResult____h409422[13] ? 6'd43 : - (_theResult____h409421[12] ? + (_theResult____h409422[12] ? 6'd44 : - (_theResult____h409421[11] ? + (_theResult____h409422[11] ? 6'd45 : - (_theResult____h409421[10] ? + (_theResult____h409422[10] ? 6'd46 : - (_theResult____h409421[9] ? + (_theResult____h409422[9] ? 6'd47 : - (_theResult____h409421[8] ? + (_theResult____h409422[8] ? 6'd48 : - (_theResult____h409421[7] ? + (_theResult____h409422[7] ? 6'd49 : - (_theResult____h409421[6] ? + (_theResult____h409422[6] ? 6'd50 : - (_theResult____h409421[5] ? + (_theResult____h409422[5] ? 6'd51 : - (_theResult____h409421[4] ? + (_theResult____h409422[4] ? 6'd52 : - (_theResult____h409421[3] ? + (_theResult____h409422[3] ? 6'd53 : - (_theResult____h409421[2] ? + (_theResult____h409422[2] ? 6'd54 : - (_theResult____h409421[1] ? + (_theResult____h409422[1] ? 6'd55 : - (_theResult____h409421[0] ? + (_theResult____h409422[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 = - (_theResult____h455116[56] ? + (_theResult____h455117[56] ? 6'd0 : - (_theResult____h455116[55] ? + (_theResult____h455117[55] ? 6'd1 : - (_theResult____h455116[54] ? + (_theResult____h455117[54] ? 6'd2 : - (_theResult____h455116[53] ? + (_theResult____h455117[53] ? 6'd3 : - (_theResult____h455116[52] ? + (_theResult____h455117[52] ? 6'd4 : - (_theResult____h455116[51] ? + (_theResult____h455117[51] ? 6'd5 : - (_theResult____h455116[50] ? + (_theResult____h455117[50] ? 6'd6 : - (_theResult____h455116[49] ? + (_theResult____h455117[49] ? 6'd7 : - (_theResult____h455116[48] ? + (_theResult____h455117[48] ? 6'd8 : - (_theResult____h455116[47] ? + (_theResult____h455117[47] ? 6'd9 : - (_theResult____h455116[46] ? + (_theResult____h455117[46] ? 6'd10 : - (_theResult____h455116[45] ? + (_theResult____h455117[45] ? 6'd11 : - (_theResult____h455116[44] ? + (_theResult____h455117[44] ? 6'd12 : - (_theResult____h455116[43] ? + (_theResult____h455117[43] ? 6'd13 : - (_theResult____h455116[42] ? + (_theResult____h455117[42] ? 6'd14 : - (_theResult____h455116[41] ? + (_theResult____h455117[41] ? 6'd15 : - (_theResult____h455116[40] ? + (_theResult____h455117[40] ? 6'd16 : - (_theResult____h455116[39] ? + (_theResult____h455117[39] ? 6'd17 : - (_theResult____h455116[38] ? + (_theResult____h455117[38] ? 6'd18 : - (_theResult____h455116[37] ? + (_theResult____h455117[37] ? 6'd19 : - (_theResult____h455116[36] ? + (_theResult____h455117[36] ? 6'd20 : - (_theResult____h455116[35] ? + (_theResult____h455117[35] ? 6'd21 : - (_theResult____h455116[34] ? + (_theResult____h455117[34] ? 6'd22 : - (_theResult____h455116[33] ? + (_theResult____h455117[33] ? 6'd23 : - (_theResult____h455116[32] ? + (_theResult____h455117[32] ? 6'd24 : - (_theResult____h455116[31] ? + (_theResult____h455117[31] ? 6'd25 : - (_theResult____h455116[30] ? + (_theResult____h455117[30] ? 6'd26 : - (_theResult____h455116[29] ? + (_theResult____h455117[29] ? 6'd27 : - (_theResult____h455116[28] ? + (_theResult____h455117[28] ? 6'd28 : - (_theResult____h455116[27] ? + (_theResult____h455117[27] ? 6'd29 : - (_theResult____h455116[26] ? + (_theResult____h455117[26] ? 6'd30 : - (_theResult____h455116[25] ? + (_theResult____h455117[25] ? 6'd31 : - (_theResult____h455116[24] ? + (_theResult____h455117[24] ? 6'd32 : - (_theResult____h455116[23] ? + (_theResult____h455117[23] ? 6'd33 : - (_theResult____h455116[22] ? + (_theResult____h455117[22] ? 6'd34 : - (_theResult____h455116[21] ? + (_theResult____h455117[21] ? 6'd35 : - (_theResult____h455116[20] ? + (_theResult____h455117[20] ? 6'd36 : - (_theResult____h455116[19] ? + (_theResult____h455117[19] ? 6'd37 : - (_theResult____h455116[18] ? + (_theResult____h455117[18] ? 6'd38 : - (_theResult____h455116[17] ? + (_theResult____h455117[17] ? 6'd39 : - (_theResult____h455116[16] ? + (_theResult____h455117[16] ? 6'd40 : - (_theResult____h455116[15] ? + (_theResult____h455117[15] ? 6'd41 : - (_theResult____h455116[14] ? + (_theResult____h455117[14] ? 6'd42 : - (_theResult____h455116[13] ? + (_theResult____h455117[13] ? 6'd43 : - (_theResult____h455116[12] ? + (_theResult____h455117[12] ? 6'd44 : - (_theResult____h455116[11] ? + (_theResult____h455117[11] ? 6'd45 : - (_theResult____h455116[10] ? + (_theResult____h455117[10] ? 6'd46 : - (_theResult____h455116[9] ? + (_theResult____h455117[9] ? 6'd47 : - (_theResult____h455116[8] ? + (_theResult____h455117[8] ? 6'd48 : - (_theResult____h455116[7] ? + (_theResult____h455117[7] ? 6'd49 : - (_theResult____h455116[6] ? + (_theResult____h455117[6] ? 6'd50 : - (_theResult____h455116[5] ? + (_theResult____h455117[5] ? 6'd51 : - (_theResult____h455116[4] ? + (_theResult____h455117[4] ? 6'd52 : - (_theResult____h455116[3] ? + (_theResult____h455117[3] ? 6'd53 : - (_theResult____h455116[2] ? + (_theResult____h455117[2] ? 6'd54 : - (_theResult____h455116[1] ? + (_theResult____h455117[1] ? 6'd55 : - (_theResult____h455116[0] ? + (_theResult____h455117[0] ? 6'd56 : 6'd57))))))))))))))))))))))))))))))))))))))))))))))))))))))))) - 6'd1 ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10424 = - (_theResult___fst_exp__h549958 == 11'd2047) ? + (_theResult___fst_exp__h549959 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -20908,10 +20908,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d10691 = - (_theResult___fst_exp__h549958 == 11'd2047) ? + (_theResult___fst_exp__h549959 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -20919,10 +20919,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d8939 = - (_theResult___fst_exp__h511105 == 11'd2047) ? + (_theResult___fst_exp__h511106 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -20930,10 +20930,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9654 = - (_theResult___fst_exp__h589262 == 11'd2047) ? + (_theResult___fst_exp__h589263 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -20941,10 +20941,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165) ; assign IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivE_ETC___d9922 = - (_theResult___fst_exp__h589262 == 11'd2047) ? + (_theResult___fst_exp__h589263 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -20952,538 +20952,538 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310 = - (guard__h346095 == 2'b0 || + (guard__h346096 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h354196 : - _theResult___exp__h354712 ; + _theResult___fst_exp__h354197 : + _theResult___exp__h354713 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313 = - (guard__h346095 == 2'b0) ? - _theResult___fst_exp__h354196 : + (guard__h346096 == 2'b0) ? + _theResult___fst_exp__h354197 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h354712 : - _theResult___fst_exp__h354196) ; + _theResult___exp__h354713 : + _theResult___fst_exp__h354197) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957 = - (guard__h346095 == 2'b0 || + (guard__h346096 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h354190[56:34] : - _theResult___sfd__h354713 ; + sfdin__h354191[56:34] : + _theResult___sfd__h354714 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959 = - (guard__h346095 == 2'b0) ? - sfdin__h354190[56:34] : + (guard__h346096 == 2'b0) ? + sfdin__h354191[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h354713 : - sfdin__h354190[56:34]) ; + _theResult___sfd__h354714 : + sfdin__h354191[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702 = - (guard__h391794 == 2'b0 || + (guard__h391795 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h399893 : - _theResult___exp__h400409 ; + _theResult___fst_exp__h399894 : + _theResult___exp__h400410 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705 = - (guard__h391794 == 2'b0) ? - _theResult___fst_exp__h399893 : + (guard__h391795 == 2'b0) ? + _theResult___fst_exp__h399894 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h400409 : - _theResult___fst_exp__h399893) ; + _theResult___exp__h400410 : + _theResult___fst_exp__h399894) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349 = - (guard__h391794 == 2'b0 || + (guard__h391795 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h399887[56:34] : - _theResult___sfd__h400410 ; + sfdin__h399888[56:34] : + _theResult___sfd__h400411 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351 = - (guard__h391794 == 2'b0) ? - sfdin__h399887[56:34] : + (guard__h391795 == 2'b0) ? + sfdin__h399888[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h400410 : - sfdin__h399887[56:34]) ; + _theResult___sfd__h400411 : + sfdin__h399888[56:34]) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094 = - (guard__h437489 == 2'b0 || + (guard__h437490 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h445588 : - _theResult___exp__h446104 ; + _theResult___fst_exp__h445589 : + _theResult___exp__h446105 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097 = - (guard__h437489 == 2'b0) ? - _theResult___fst_exp__h445588 : + (guard__h437490 == 2'b0) ? + _theResult___fst_exp__h445589 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h446104 : - _theResult___fst_exp__h445588) ; + _theResult___exp__h446105 : + _theResult___fst_exp__h445589) ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741 = - (guard__h437489 == 2'b0 || + (guard__h437490 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h445582[56:34] : - _theResult___sfd__h446105 ; + sfdin__h445583[56:34] : + _theResult___sfd__h446106 ; assign IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743 = - (guard__h437489 == 2'b0) ? - sfdin__h445582[56:34] : + (guard__h437490 == 2'b0) ? + sfdin__h445583[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h446105 : - sfdin__h445582[56:34]) ; + _theResult___sfd__h446106 : + sfdin__h445583[56:34]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536 = - (guard__h541732 == 2'b0 || + (guard__h541733 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h549958 : - _theResult___exp__h550687 ; + _theResult___fst_exp__h549959 : + _theResult___exp__h550688 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538 = - (guard__h541732 == 2'b0) ? - _theResult___fst_exp__h549958 : + (guard__h541733 == 2'b0) ? + _theResult___fst_exp__h549959 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h550687 : - _theResult___fst_exp__h549958) ; + _theResult___exp__h550688 : + _theResult___fst_exp__h549959) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619 = - (guard__h541732 == 2'b0 || + (guard__h541733 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - sfdin__h549952[56:5] : - _theResult___sfd__h550688 ; + sfdin__h549953[56:5] : + _theResult___sfd__h550689 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621 = - (guard__h541732 == 2'b0) ? - sfdin__h549952[56:5] : + (guard__h541733 == 2'b0) ? + sfdin__h549953[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h550688 : - sfdin__h549952[56:5]) ; + _theResult___sfd__h550689 : + sfdin__h549953[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056 = - (guard__h502879 == 2'b0 || + (guard__h502880 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h511105 : - _theResult___exp__h511834 ; + _theResult___fst_exp__h511106 : + _theResult___exp__h511835 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058 = - (guard__h502879 == 2'b0) ? - _theResult___fst_exp__h511105 : + (guard__h502880 == 2'b0) ? + _theResult___fst_exp__h511106 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h511834 : - _theResult___fst_exp__h511105) ; + _theResult___exp__h511835 : + _theResult___fst_exp__h511106) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140 = - (guard__h502879 == 2'b0 || + (guard__h502880 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - sfdin__h511099[56:5] : - _theResult___sfd__h511835 ; + sfdin__h511100[56:5] : + _theResult___sfd__h511836 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142 = - (guard__h502879 == 2'b0) ? - sfdin__h511099[56:5] : + (guard__h502880 == 2'b0) ? + sfdin__h511100[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h511835 : - sfdin__h511099[56:5]) ; + _theResult___sfd__h511836 : + sfdin__h511100[56:5]) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766 = - (guard__h581036 == 2'b0 || + (guard__h581037 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h589262 : - _theResult___exp__h589991 ; + _theResult___fst_exp__h589263 : + _theResult___exp__h589992 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768 = - (guard__h581036 == 2'b0) ? - _theResult___fst_exp__h589262 : + (guard__h581037 == 2'b0) ? + _theResult___fst_exp__h589263 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h589991 : - _theResult___fst_exp__h589262) ; + _theResult___exp__h589992 : + _theResult___fst_exp__h589263) ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849 = - (guard__h581036 == 2'b0 || + (guard__h581037 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - sfdin__h589256[56:5] : - _theResult___sfd__h589992 ; + sfdin__h589257[56:5] : + _theResult___sfd__h589993 ; assign IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851 = - (guard__h581036 == 2'b0) ? - sfdin__h589256[56:5] : + (guard__h581037 == 2'b0) ? + sfdin__h589257[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h589992 : - sfdin__h589256[56:5]) ; + _theResult___sfd__h589993 : + sfdin__h589257[56:5]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857 = - (guard__h363734 == 2'b0 || + (guard__h363735 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h371962 : - _theResult___exp__h372478 ; + _theResult___fst_exp__h371963 : + _theResult___exp__h372479 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859 = - (guard__h363734 == 2'b0) ? - _theResult___fst_exp__h371962 : + (guard__h363735 == 2'b0) ? + _theResult___fst_exp__h371963 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h372478 : - _theResult___fst_exp__h371962) ; + _theResult___exp__h372479 : + _theResult___fst_exp__h371963) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003 = - (guard__h363734 == 2'b0 || + (guard__h363735 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - sfdin__h371956[56:34] : - _theResult___sfd__h372479 ; + sfdin__h371957[56:34] : + _theResult___sfd__h372480 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005 = - (guard__h363734 == 2'b0) ? - sfdin__h371956[56:34] : + (guard__h363735 == 2'b0) ? + sfdin__h371957[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h372479 : - sfdin__h371956[56:34]) ; + _theResult___sfd__h372480 : + sfdin__h371957[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249 = - (guard__h409431 == 2'b0 || + (guard__h409432 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h417659 : - _theResult___exp__h418175 ; + _theResult___fst_exp__h417660 : + _theResult___exp__h418176 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251 = - (guard__h409431 == 2'b0) ? - _theResult___fst_exp__h417659 : + (guard__h409432 == 2'b0) ? + _theResult___fst_exp__h417660 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h418175 : - _theResult___fst_exp__h417659) ; + _theResult___exp__h418176 : + _theResult___fst_exp__h417660) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395 = - (guard__h409431 == 2'b0 || + (guard__h409432 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - sfdin__h417653[56:34] : - _theResult___sfd__h418176 ; + sfdin__h417654[56:34] : + _theResult___sfd__h418177 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397 = - (guard__h409431 == 2'b0) ? - sfdin__h417653[56:34] : + (guard__h409432 == 2'b0) ? + sfdin__h417654[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h418176 : - sfdin__h417653[56:34]) ; + _theResult___sfd__h418177 : + sfdin__h417654[56:34]) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641 = - (guard__h455126 == 2'b0 || + (guard__h455127 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h463354 : - _theResult___exp__h463870 ; + _theResult___fst_exp__h463355 : + _theResult___exp__h463871 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643 = - (guard__h455126 == 2'b0) ? - _theResult___fst_exp__h463354 : + (guard__h455127 == 2'b0) ? + _theResult___fst_exp__h463355 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h463870 : - _theResult___fst_exp__h463354) ; + _theResult___exp__h463871 : + _theResult___fst_exp__h463355) ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787 = - (guard__h455126 == 2'b0 || + (guard__h455127 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - sfdin__h463348[56:34] : - _theResult___sfd__h463871 ; + sfdin__h463349[56:34] : + _theResult___sfd__h463872 ; assign IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789 = - (guard__h455126 == 2'b0) ? - sfdin__h463348[56:34] : + (guard__h455127 == 2'b0) ? + sfdin__h463349[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h463871 : - sfdin__h463348[56:34]) ; + _theResult___sfd__h463872 : + sfdin__h463349[56:34]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498 = - (guard__h532420 == 2'b0 || + (guard__h532421 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h540381 : - _theResult___exp__h541036 ; + _theResult___fst_exp__h540382 : + _theResult___exp__h541037 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500 = - (guard__h532420 == 2'b0) ? - _theResult___fst_exp__h540381 : + (guard__h532421 == 2'b0) ? + _theResult___fst_exp__h540382 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h541036 : - _theResult___fst_exp__h540381) ; + _theResult___exp__h541037 : + _theResult___fst_exp__h540382) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567 = - (guard__h550801 == 2'b0 || + (guard__h550802 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___fst_exp__h558791 : - _theResult___exp__h559471 ; + _theResult___fst_exp__h558792 : + _theResult___exp__h559472 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569 = - (guard__h550801 == 2'b0) ? - _theResult___fst_exp__h558791 : + (guard__h550802 == 2'b0) ? + _theResult___fst_exp__h558792 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___exp__h559471 : - _theResult___fst_exp__h558791) ; + _theResult___exp__h559472 : + _theResult___fst_exp__h558792) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593 = - (guard__h532420 == 2'b0 || + (guard__h532421 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h540332[56:5] : - _theResult___sfd__h541037 ; + _theResult___snd__h540333[56:5] : + _theResult___sfd__h541038 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595 = - (guard__h532420 == 2'b0) ? - _theResult___snd__h540332[56:5] : + (guard__h532421 == 2'b0) ? + _theResult___snd__h540333[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h541037 : - _theResult___snd__h540332[56:5]) ; + _theResult___sfd__h541038 : + _theResult___snd__h540333[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638 = - (guard__h550801 == 2'b0 || + (guard__h550802 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___snd__h558737[56:5] : - _theResult___sfd__h559472 ; + _theResult___snd__h558738[56:5] : + _theResult___sfd__h559473 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640 = - (guard__h550801 == 2'b0) ? - _theResult___snd__h558737[56:5] : + (guard__h550802 == 2'b0) ? + _theResult___snd__h558738[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]) ? - _theResult___sfd__h559472 : - _theResult___snd__h558737[56:5]) ; + _theResult___sfd__h559473 : + _theResult___snd__h558738[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013 = - (guard__h493567 == 2'b0 || + (guard__h493568 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h501528 : - _theResult___exp__h502183 ; + _theResult___fst_exp__h501529 : + _theResult___exp__h502184 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015 = - (guard__h493567 == 2'b0) ? - _theResult___fst_exp__h501528 : + (guard__h493568 == 2'b0) ? + _theResult___fst_exp__h501529 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h502183 : - _theResult___fst_exp__h501528) ; + _theResult___exp__h502184 : + _theResult___fst_exp__h501529) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087 = - (guard__h511948 == 2'b0 || + (guard__h511949 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___fst_exp__h519938 : - _theResult___exp__h520618 ; + _theResult___fst_exp__h519939 : + _theResult___exp__h520619 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089 = - (guard__h511948 == 2'b0) ? - _theResult___fst_exp__h519938 : + (guard__h511949 == 2'b0) ? + _theResult___fst_exp__h519939 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___exp__h520618 : - _theResult___fst_exp__h519938) ; + _theResult___exp__h520619 : + _theResult___fst_exp__h519939) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113 = - (guard__h493567 == 2'b0 || + (guard__h493568 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h501479[56:5] : - _theResult___sfd__h502184 ; + _theResult___snd__h501480[56:5] : + _theResult___sfd__h502185 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115 = - (guard__h493567 == 2'b0) ? - _theResult___snd__h501479[56:5] : + (guard__h493568 == 2'b0) ? + _theResult___snd__h501480[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h502184 : - _theResult___snd__h501479[56:5]) ; + _theResult___sfd__h502185 : + _theResult___snd__h501480[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159 = - (guard__h511948 == 2'b0 || + (guard__h511949 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___snd__h519884[56:5] : - _theResult___sfd__h520619 ; + _theResult___snd__h519885[56:5] : + _theResult___sfd__h520620 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161 = - (guard__h511948 == 2'b0) ? - _theResult___snd__h519884[56:5] : + (guard__h511949 == 2'b0) ? + _theResult___snd__h519885[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]) ? - _theResult___sfd__h520619 : - _theResult___snd__h519884[56:5]) ; + _theResult___sfd__h520620 : + _theResult___snd__h519885[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728 = - (guard__h571724 == 2'b0 || + (guard__h571725 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h579685 : - _theResult___exp__h580340 ; + _theResult___fst_exp__h579686 : + _theResult___exp__h580341 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730 = - (guard__h571724 == 2'b0) ? - _theResult___fst_exp__h579685 : + (guard__h571725 == 2'b0) ? + _theResult___fst_exp__h579686 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h580340 : - _theResult___fst_exp__h579685) ; + _theResult___exp__h580341 : + _theResult___fst_exp__h579686) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797 = - (guard__h590105 == 2'b0 || + (guard__h590106 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___fst_exp__h598095 : - _theResult___exp__h598775 ; + _theResult___fst_exp__h598096 : + _theResult___exp__h598776 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799 = - (guard__h590105 == 2'b0) ? - _theResult___fst_exp__h598095 : + (guard__h590106 == 2'b0) ? + _theResult___fst_exp__h598096 : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___exp__h598775 : - _theResult___fst_exp__h598095) ; + _theResult___exp__h598776 : + _theResult___fst_exp__h598096) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823 = - (guard__h571724 == 2'b0 || + (guard__h571725 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h579636[56:5] : - _theResult___sfd__h580341 ; + _theResult___snd__h579637[56:5] : + _theResult___sfd__h580342 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825 = - (guard__h571724 == 2'b0) ? - _theResult___snd__h579636[56:5] : + (guard__h571725 == 2'b0) ? + _theResult___snd__h579637[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h580341 : - _theResult___snd__h579636[56:5]) ; + _theResult___sfd__h580342 : + _theResult___snd__h579637[56:5]) ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868 = - (guard__h590105 == 2'b0 || + (guard__h590106 == 2'b0 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___snd__h598041[56:5] : - _theResult___sfd__h598776 ; + _theResult___snd__h598042[56:5] : + _theResult___sfd__h598777 ; assign IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870 = - (guard__h590105 == 2'b0) ? - _theResult___snd__h598041[56:5] : + (guard__h590106 == 2'b0) ? + _theResult___snd__h598042[56:5] : ((coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]) ? - _theResult___sfd__h598776 : - _theResult___snd__h598041[56:5]) ; + _theResult___sfd__h598777 : + _theResult___snd__h598042[56:5]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532 = - (guard__h354804 == 2'b0 || + (guard__h354805 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h362852 : - _theResult___exp__h363294 ; + _theResult___fst_exp__h362853 : + _theResult___exp__h363295 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534 = - (guard__h354804 == 2'b0) ? - _theResult___fst_exp__h362852 : + (guard__h354805 == 2'b0) ? + _theResult___fst_exp__h362853 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h363294 : - _theResult___fst_exp__h362852) ; + _theResult___exp__h363295 : + _theResult___fst_exp__h362853) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926 = - (guard__h372570 == 2'b0 || + (guard__h372571 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___fst_exp__h380647 : - _theResult___exp__h381114 ; + _theResult___fst_exp__h380648 : + _theResult___exp__h381115 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928 = - (guard__h372570 == 2'b0) ? - _theResult___fst_exp__h380647 : + (guard__h372571 == 2'b0) ? + _theResult___fst_exp__h380648 : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___exp__h381114 : - _theResult___fst_exp__h380647) ; + _theResult___exp__h381115 : + _theResult___fst_exp__h380648) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976 = - (guard__h354804 == 2'b0 || + (guard__h354805 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h362803[56:34] : - _theResult___sfd__h363295 ; + _theResult___snd__h362804[56:34] : + _theResult___sfd__h363296 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978 = - (guard__h354804 == 2'b0) ? - _theResult___snd__h362803[56:34] : + (guard__h354805 == 2'b0) ? + _theResult___snd__h362804[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h363295 : - _theResult___snd__h362803[56:34]) ; + _theResult___sfd__h363296 : + _theResult___snd__h362804[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 = - (guard__h372570 == 2'b0 || + (guard__h372571 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]) ? - _theResult___snd__h380593[56:34] : - _theResult___sfd__h381115 ; + _theResult___snd__h380594[56:34] : + _theResult___sfd__h381116 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 = - (guard__h372570 == 2'b0) ? - _theResult___snd__h380593[56:34] : + (guard__h372571 == 2'b0) ? + _theResult___snd__h380594[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? - _theResult___sfd__h381115 : - _theResult___snd__h380593[56:34]) ; + _theResult___sfd__h381116 : + _theResult___snd__h380594[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924 = - (guard__h400501 == 2'b0 || + (guard__h400502 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h408549 : - _theResult___exp__h408991 ; + _theResult___fst_exp__h408550 : + _theResult___exp__h408992 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926 = - (guard__h400501 == 2'b0) ? - _theResult___fst_exp__h408549 : + (guard__h400502 == 2'b0) ? + _theResult___fst_exp__h408550 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h408991 : - _theResult___fst_exp__h408549) ; + _theResult___exp__h408992 : + _theResult___fst_exp__h408550) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318 = - (guard__h418267 == 2'b0 || + (guard__h418268 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___fst_exp__h426344 : - _theResult___exp__h426811 ; + _theResult___fst_exp__h426345 : + _theResult___exp__h426812 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320 = - (guard__h418267 == 2'b0) ? - _theResult___fst_exp__h426344 : + (guard__h418268 == 2'b0) ? + _theResult___fst_exp__h426345 : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___exp__h426811 : - _theResult___fst_exp__h426344) ; + _theResult___exp__h426812 : + _theResult___fst_exp__h426345) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368 = - (guard__h400501 == 2'b0 || + (guard__h400502 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h408500[56:34] : - _theResult___sfd__h408992 ; + _theResult___snd__h408501[56:34] : + _theResult___sfd__h408993 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370 = - (guard__h400501 == 2'b0) ? - _theResult___snd__h408500[56:34] : + (guard__h400502 == 2'b0) ? + _theResult___snd__h408501[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h408992 : - _theResult___snd__h408500[56:34]) ; + _theResult___sfd__h408993 : + _theResult___snd__h408501[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 = - (guard__h418267 == 2'b0 || + (guard__h418268 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]) ? - _theResult___snd__h426290[56:34] : - _theResult___sfd__h426812 ; + _theResult___snd__h426291[56:34] : + _theResult___sfd__h426813 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 = - (guard__h418267 == 2'b0) ? - _theResult___snd__h426290[56:34] : + (guard__h418268 == 2'b0) ? + _theResult___snd__h426291[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? - _theResult___sfd__h426812 : - _theResult___snd__h426290[56:34]) ; + _theResult___sfd__h426813 : + _theResult___snd__h426291[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316 = - (guard__h446196 == 2'b0 || + (guard__h446197 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h454244 : - _theResult___exp__h454686 ; + _theResult___fst_exp__h454245 : + _theResult___exp__h454687 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318 = - (guard__h446196 == 2'b0) ? - _theResult___fst_exp__h454244 : + (guard__h446197 == 2'b0) ? + _theResult___fst_exp__h454245 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h454686 : - _theResult___fst_exp__h454244) ; + _theResult___exp__h454687 : + _theResult___fst_exp__h454245) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710 = - (guard__h463962 == 2'b0 || + (guard__h463963 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___fst_exp__h472039 : - _theResult___exp__h472506 ; + _theResult___fst_exp__h472040 : + _theResult___exp__h472507 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712 = - (guard__h463962 == 2'b0) ? - _theResult___fst_exp__h472039 : + (guard__h463963 == 2'b0) ? + _theResult___fst_exp__h472040 : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___exp__h472506 : - _theResult___fst_exp__h472039) ; + _theResult___exp__h472507 : + _theResult___fst_exp__h472040) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760 = - (guard__h446196 == 2'b0 || + (guard__h446197 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h454195[56:34] : - _theResult___sfd__h454687 ; + _theResult___snd__h454196[56:34] : + _theResult___sfd__h454688 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762 = - (guard__h446196 == 2'b0) ? - _theResult___snd__h454195[56:34] : + (guard__h446197 == 2'b0) ? + _theResult___snd__h454196[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h454687 : - _theResult___snd__h454195[56:34]) ; + _theResult___sfd__h454688 : + _theResult___snd__h454196[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 = - (guard__h463962 == 2'b0 || + (guard__h463963 == 2'b0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]) ? - _theResult___snd__h471985[56:34] : - _theResult___sfd__h472507 ; + _theResult___snd__h471986[56:34] : + _theResult___sfd__h472508 ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 = - (guard__h463962 == 2'b0) ? - _theResult___snd__h471985[56:34] : + (guard__h463963 == 2'b0) ? + _theResult___snd__h471986[56:34] : (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? - _theResult___sfd__h472507 : - _theResult___snd__h471985[56:34]) ; + _theResult___sfd__h472508 : + _theResult___snd__h471986[56:34]) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10470 = - (_theResult___fst_exp__h558791 == 11'd2047) ? + (_theResult___fst_exp__h558792 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21491,10 +21491,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10676 = - (_theResult___fst_exp__h540381 == 11'd2047) ? + (_theResult___fst_exp__h540382 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21502,10 +21502,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d10703 = - (_theResult___fst_exp__h558791 == 11'd2047) ? + (_theResult___fst_exp__h558792 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -21513,10 +21513,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d8985 = - (_theResult___fst_exp__h519938 == 11'd2047) ? + (_theResult___fst_exp__h519939 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -21524,10 +21524,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9700 = - (_theResult___fst_exp__h598095 == 11'd2047) ? + (_theResult___fst_exp__h598096 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21535,10 +21535,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9907 = - (_theResult___fst_exp__h579685 == 11'd2047) ? + (_theResult___fst_exp__h579686 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21546,10 +21546,10 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173) ; assign IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_firs_ETC___d9934 = - (_theResult___fst_exp__h598095 == 11'd2047) ? + (_theResult___fst_exp__h598096 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -21557,7 +21557,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171) ; assign IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824 = (_theResult____h651118 == 16'd0 && @@ -21626,77 +21626,77 @@ module mkCore(CLK, checkForException___d13698[4] || csrf_fs_reg_read__1546_EQ_0_2997_AND_fetchStag_ETC___d13791 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 = - ((f2_exp__h521134 == 8'd0) ? - (f2_sfd__h521135[22] ? + ((f2_exp__h521135 == 8'd0) ? + (f2_sfd__h521136[22] ? 6'd2 : - (f2_sfd__h521135[21] ? + (f2_sfd__h521136[21] ? 6'd3 : - (f2_sfd__h521135[20] ? + (f2_sfd__h521136[20] ? 6'd4 : - (f2_sfd__h521135[19] ? + (f2_sfd__h521136[19] ? 6'd5 : - (f2_sfd__h521135[18] ? + (f2_sfd__h521136[18] ? 6'd6 : - (f2_sfd__h521135[17] ? + (f2_sfd__h521136[17] ? 6'd7 : - (f2_sfd__h521135[16] ? + (f2_sfd__h521136[16] ? 6'd8 : - (f2_sfd__h521135[15] ? + (f2_sfd__h521136[15] ? 6'd9 : - (f2_sfd__h521135[14] ? + (f2_sfd__h521136[14] ? 6'd10 : - (f2_sfd__h521135[13] ? + (f2_sfd__h521136[13] ? 6'd11 : - (f2_sfd__h521135[12] ? + (f2_sfd__h521136[12] ? 6'd12 : - (f2_sfd__h521135[11] ? + (f2_sfd__h521136[11] ? 6'd13 : - (f2_sfd__h521135[10] ? + (f2_sfd__h521136[10] ? 6'd14 : - (f2_sfd__h521135[9] ? + (f2_sfd__h521136[9] ? 6'd15 : - (f2_sfd__h521135[8] ? + (f2_sfd__h521136[8] ? 6'd16 : - (f2_sfd__h521135[7] ? + (f2_sfd__h521136[7] ? 6'd17 : - (f2_sfd__h521135[6] ? + (f2_sfd__h521136[6] ? 6'd18 : - (f2_sfd__h521135[5] ? + (f2_sfd__h521136[5] ? 6'd19 : - (f2_sfd__h521135[4] ? + (f2_sfd__h521136[4] ? 6'd20 : - (f2_sfd__h521135[3] ? + (f2_sfd__h521136[3] ? 6'd21 : - (f2_sfd__h521135[2] ? + (f2_sfd__h521136[2] ? 6'd22 : - (f2_sfd__h521135[1] ? + (f2_sfd__h521136[1] ? 6'd23 : - (f2_sfd__h521135[0] ? + (f2_sfd__h521136[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10474 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0 || - (f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0 || + (f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - ((f2_exp__h521134 == 8'd0) ? + ((f2_exp__h521135 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10129 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10472) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0) ? - _theResult___snd_fst_sfd__h521450 : - _theResult___fst_sfd__h559590 ; + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0) ? + _theResult___snd_fst_sfd__h521451 : + _theResult___fst_sfd__h559591 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10652 = - { (f2_exp__h521134 == 8'd255) ? + { (f2_exp__h521135 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h559586, + _theResult___fst_exp__h559587, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10651 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10706 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != @@ -21706,15 +21706,15 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10678) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10705 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10707 = - (f2_exp__h521134 == 8'd255 && f2_sfd__h521135 != 23'd0 || - (f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + (f2_exp__h521135 == 8'd255 && f2_sfd__h521136 != 23'd0 || + (f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10706 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[4] : @@ -21722,7 +21722,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10803 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[4] : @@ -21730,7 +21730,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10847 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[4] : @@ -21738,7 +21738,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[4] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10862 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[3] : @@ -21746,7 +21746,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10872 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[3] : @@ -21754,7 +21754,7 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10883 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[3] : @@ -21762,211 +21762,211 @@ module mkCore(CLK, SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 && _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[3] ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10902 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10916 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10914 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10931 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[2] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10929 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10948 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10946 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10960 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10958 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 && (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 || _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[1]) : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 && IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10971 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10990 = - (f1_exp__h482140 == 8'd0) ? + (f1_exp__h482141 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10988 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11002 = - (f2_exp__h521134 == 8'd0) ? + (f2_exp__h521135 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11000 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11015 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || !_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 && _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826[0] : !SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 || IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11013 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 = - ((f1_exp__h482140 == 8'd0) ? - (f1_sfd__h482141[22] ? + ((f1_exp__h482141 == 8'd0) ? + (f1_sfd__h482142[22] ? 6'd2 : - (f1_sfd__h482141[21] ? + (f1_sfd__h482142[21] ? 6'd3 : - (f1_sfd__h482141[20] ? + (f1_sfd__h482142[20] ? 6'd4 : - (f1_sfd__h482141[19] ? + (f1_sfd__h482142[19] ? 6'd5 : - (f1_sfd__h482141[18] ? + (f1_sfd__h482142[18] ? 6'd6 : - (f1_sfd__h482141[17] ? + (f1_sfd__h482142[17] ? 6'd7 : - (f1_sfd__h482141[16] ? + (f1_sfd__h482142[16] ? 6'd8 : - (f1_sfd__h482141[15] ? + (f1_sfd__h482142[15] ? 6'd9 : - (f1_sfd__h482141[14] ? + (f1_sfd__h482142[14] ? 6'd10 : - (f1_sfd__h482141[13] ? + (f1_sfd__h482142[13] ? 6'd11 : - (f1_sfd__h482141[12] ? + (f1_sfd__h482142[12] ? 6'd12 : - (f1_sfd__h482141[11] ? + (f1_sfd__h482142[11] ? 6'd13 : - (f1_sfd__h482141[10] ? + (f1_sfd__h482142[10] ? 6'd14 : - (f1_sfd__h482141[9] ? + (f1_sfd__h482142[9] ? 6'd15 : - (f1_sfd__h482141[8] ? + (f1_sfd__h482142[8] ? 6'd16 : - (f1_sfd__h482141[7] ? + (f1_sfd__h482142[7] ? 6'd17 : - (f1_sfd__h482141[6] ? + (f1_sfd__h482142[6] ? 6'd18 : - (f1_sfd__h482141[5] ? + (f1_sfd__h482142[5] ? 6'd19 : - (f1_sfd__h482141[4] ? + (f1_sfd__h482142[4] ? 6'd20 : - (f1_sfd__h482141[3] ? + (f1_sfd__h482142[3] ? 6'd21 : - (f1_sfd__h482141[2] ? + (f1_sfd__h482142[2] ? 6'd22 : - (f1_sfd__h482141[1] ? + (f1_sfd__h482142[1] ? 6'd23 : - (f1_sfd__h482141[0] ? + (f1_sfd__h482142[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8989 = - (f1_exp__h482140 == 8'd255 && f1_sfd__h482141 != 23'd0 || - (f1_exp__h482140 == 8'd255 || f1_exp__h482140 == 8'd0) && - f1_sfd__h482141 == 23'd0) ? + (f1_exp__h482141 == 8'd255 && f1_sfd__h482142 != 23'd0 || + (f1_exp__h482141 == 8'd255 || f1_exp__h482141 == 8'd0) && + f1_sfd__h482142 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - ((f1_exp__h482140 == 8'd0) ? + ((f1_exp__h482141 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8644 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8987) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172 = - (f1_exp__h482140 == 8'd255 && f1_sfd__h482141 != 23'd0) ? - _theResult___snd_fst_sfd__h482456 : - _theResult___fst_sfd__h520737 ; + (f1_exp__h482141 == 8'd255 && f1_sfd__h482142 != 23'd0) ? + _theResult___snd_fst_sfd__h482457 : + _theResult___fst_sfd__h520738 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9173 = { IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8989, - (f1_exp__h482140 == 8'd255) ? + (f1_exp__h482141 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h520733, + _theResult___fst_exp__h520734, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9172 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 = - ((f3_exp__h560438 == 8'd0) ? - (f3_sfd__h560439[22] ? + ((f3_exp__h560439 == 8'd0) ? + (f3_sfd__h560440[22] ? 6'd2 : - (f3_sfd__h560439[21] ? + (f3_sfd__h560440[21] ? 6'd3 : - (f3_sfd__h560439[20] ? + (f3_sfd__h560440[20] ? 6'd4 : - (f3_sfd__h560439[19] ? + (f3_sfd__h560440[19] ? 6'd5 : - (f3_sfd__h560439[18] ? + (f3_sfd__h560440[18] ? 6'd6 : - (f3_sfd__h560439[17] ? + (f3_sfd__h560440[17] ? 6'd7 : - (f3_sfd__h560439[16] ? + (f3_sfd__h560440[16] ? 6'd8 : - (f3_sfd__h560439[15] ? + (f3_sfd__h560440[15] ? 6'd9 : - (f3_sfd__h560439[14] ? + (f3_sfd__h560440[14] ? 6'd10 : - (f3_sfd__h560439[13] ? + (f3_sfd__h560440[13] ? 6'd11 : - (f3_sfd__h560439[12] ? + (f3_sfd__h560440[12] ? 6'd12 : - (f3_sfd__h560439[11] ? + (f3_sfd__h560440[11] ? 6'd13 : - (f3_sfd__h560439[10] ? + (f3_sfd__h560440[10] ? 6'd14 : - (f3_sfd__h560439[9] ? + (f3_sfd__h560440[9] ? 6'd15 : - (f3_sfd__h560439[8] ? + (f3_sfd__h560440[8] ? 6'd16 : - (f3_sfd__h560439[7] ? + (f3_sfd__h560440[7] ? 6'd17 : - (f3_sfd__h560439[6] ? + (f3_sfd__h560440[6] ? 6'd18 : - (f3_sfd__h560439[5] ? + (f3_sfd__h560440[5] ? 6'd19 : - (f3_sfd__h560439[4] ? + (f3_sfd__h560440[4] ? 6'd20 : - (f3_sfd__h560439[3] ? + (f3_sfd__h560440[3] ? 6'd21 : - (f3_sfd__h560439[2] ? + (f3_sfd__h560440[2] ? 6'd22 : - (f3_sfd__h560439[1] ? + (f3_sfd__h560440[1] ? 6'd23 : - (f3_sfd__h560439[0] ? + (f3_sfd__h560440[0] ? 6'd24 : 6'd57))))))))))))))))))))))) : 6'd1) - 6'd1 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9704 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0 || - (f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0 || + (f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - ((f3_exp__h560438 == 8'd0) ? + ((f3_exp__h560439 == 8'd0) ? IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9359 : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9702) ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0) ? - _theResult___snd_fst_sfd__h560754 : - _theResult___fst_sfd__h598894 ; + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0) ? + _theResult___snd_fst_sfd__h560755 : + _theResult___fst_sfd__h598895 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9882 = - { (f3_exp__h560438 == 8'd255) ? + { (f3_exp__h560439 == 8'd255) ? 11'd2047 : - _theResult___fst_exp__h598890, + _theResult___fst_exp__h598891, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9881 } ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9937 = - (f3_exp__h560438 == 8'd0) ? + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != @@ -21976,9 +21976,9 @@ module mkCore(CLK, IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9909) : IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9936 ; assign IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9938 = - (f3_exp__h560438 == 8'd255 && f3_sfd__h560439 != 23'd0 || - (f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + (f3_exp__h560439 == 8'd255 && f3_sfd__h560440 != 23'd0 || + (f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -22187,7 +22187,7 @@ module mkCore(CLK, assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d10129 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 || - _theResult___fst_exp__h540381 == 11'd2047) ? + _theResult___fst_exp__h540382 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : @@ -22195,12 +22195,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d8644 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 || - _theResult___fst_exp__h501528 == 11'd2047) ? + _theResult___fst_exp__h501529 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : @@ -22208,12 +22208,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146) ; assign IF_NOT_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMu_ETC___d9359 = (!_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 || _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 || - _theResult___fst_exp__h579685 == 11'd2047) ? + _theResult___fst_exp__h579686 == 11'd2047) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : @@ -22221,7 +22221,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163) ; assign IF_NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3__ETC___d13243 = IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824[0] ? @@ -22706,7 +22706,7 @@ module mkCore(CLK, 4'd9) ? 4'd14 : 4'd15)))))))))) ; - assign IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674 = + assign IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -22745,48 +22745,48 @@ module mkCore(CLK, assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10900 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[2] : - _theResult___fst_exp__h520721 == 11'd2047 && - _theResult___fst_sfd__h520722 == 52'd0 ; + _theResult___fst_exp__h520722 == 11'd2047 && + _theResult___fst_sfd__h520723 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10914 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[2] : - _theResult___fst_exp__h559574 == 11'd2047 && - _theResult___fst_sfd__h559575 == 52'd0 ; + _theResult___fst_exp__h559575 == 11'd2047 && + _theResult___fst_sfd__h559576 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10929 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[2] : - _theResult___fst_exp__h598878 == 11'd2047 && - _theResult___fst_sfd__h598879 == 52'd0 ; + _theResult___fst_exp__h598879 == 11'd2047 && + _theResult___fst_sfd__h598880 == 52'd0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10946 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[1] : - _theResult___fst_exp__h519938 == 11'd0 && - guard__h511948 != 2'b0 ; + _theResult___fst_exp__h519939 == 11'd0 && + guard__h511949 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10958 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[1] : - _theResult___fst_exp__h558791 == 11'd0 && - guard__h550801 != 2'b0 ; + _theResult___fst_exp__h558792 == 11'd0 && + guard__h550802 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10971 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[1] : - _theResult___fst_exp__h598095 == 11'd0 && - guard__h590105 != 2'b0 ; + _theResult___fst_exp__h598096 == 11'd0 && + guard__h590106 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10988 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758[0] : - _theResult___fst_exp__h519938 != 11'd2047 && - guard__h511948 != 2'b0 ; + _theResult___fst_exp__h519939 != 11'd2047 && + guard__h511949 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11000 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799[0] : - _theResult___fst_exp__h558791 != 11'd2047 && - guard__h550801 != 2'b0 ; + _theResult___fst_exp__h558792 != 11'd2047 && + guard__h550802 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d11013 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843[0] : - _theResult___fst_exp__h598095 != 11'd2047 && - guard__h590105 != 2'b0 ; + _theResult___fst_exp__h598096 != 11'd2047 && + guard__h590106 != 2'b0 ; assign IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8946 = ((SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? @@ -22832,35 +22832,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5099 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - ((_theResult___fst_exp__h371962 == 8'd255) ? + ((_theResult___fst_exp__h371963 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084) : - ((_theResult___fst_exp__h380647 == 8'd255) ? + ((_theResult___fst_exp__h380648 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5136 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - ((_theResult___fst_exp__h371962 == 8'd255) ? + ((_theResult___fst_exp__h371963 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127) : - ((_theResult___fst_exp__h380647 == 8'd255) ? + ((_theResult___fst_exp__h380648 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5227 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[2] : - _theResult___fst_exp__h381195 == 8'd255 && - _theResult___fst_sfd__h381196 == 23'd0 ; + _theResult___fst_exp__h381196 == 8'd255 && + _theResult___fst_sfd__h381197 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5240 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[1] : - _theResult___fst_exp__h380647 == 8'd0 && - guard__h372570 != 2'b0 ; + _theResult___fst_exp__h380648 == 8'd0 && + guard__h372571 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d5253 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198[0] : - _theResult___fst_exp__h380647 != 8'd255 && - guard__h372570 != 2'b0 ; + _theResult___fst_exp__h380648 != 8'd255 && + guard__h372571 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] == 8'd0) ? @@ -22870,35 +22870,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6491 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - ((_theResult___fst_exp__h417659 == 8'd255) ? + ((_theResult___fst_exp__h417660 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476) : - ((_theResult___fst_exp__h426344 == 8'd255) ? + ((_theResult___fst_exp__h426345 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6528 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - ((_theResult___fst_exp__h417659 == 8'd255) ? + ((_theResult___fst_exp__h417660 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519) : - ((_theResult___fst_exp__h426344 == 8'd255) ? + ((_theResult___fst_exp__h426345 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6619 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[2] : - _theResult___fst_exp__h426892 == 8'd255 && - _theResult___fst_sfd__h426893 == 23'd0 ; + _theResult___fst_exp__h426893 == 8'd255 && + _theResult___fst_sfd__h426894 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6632 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[1] : - _theResult___fst_exp__h426344 == 8'd0 && - guard__h418267 != 2'b0 ; + _theResult___fst_exp__h426345 == 8'd0 && + guard__h418268 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6645 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590[0] : - _theResult___fst_exp__h426344 != 8'd255 && - guard__h418267 != 2'b0 ; + _theResult___fst_exp__h426345 != 8'd255 && + guard__h418268 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656 = ((SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] == 8'd0) ? @@ -22908,35 +22908,35 @@ module mkCore(CLK, 9'd386 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7883 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - ((_theResult___fst_exp__h463354 == 8'd255) ? + ((_theResult___fst_exp__h463355 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868) : - ((_theResult___fst_exp__h472039 == 8'd255) ? + ((_theResult___fst_exp__h472040 == 8'd255) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7920 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - ((_theResult___fst_exp__h463354 == 8'd255) ? + ((_theResult___fst_exp__h463355 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911) : - ((_theResult___fst_exp__h472039 == 8'd255) ? + ((_theResult___fst_exp__h472040 == 8'd255) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918) ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8011 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[2] : - _theResult___fst_exp__h472587 == 8'd255 && - _theResult___fst_sfd__h472588 == 23'd0 ; + _theResult___fst_exp__h472588 == 8'd255 && + _theResult___fst_sfd__h472589 == 23'd0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8024 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[1] : - _theResult___fst_exp__h472039 == 8'd0 && - guard__h463962 != 2'b0 ; + _theResult___fst_exp__h472040 == 8'd0 && + guard__h463963 != 2'b0 ; assign IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d8037 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982[0] : - _theResult___fst_exp__h472039 != 8'd255 && - guard__h463962 != 2'b0 ; + _theResult___fst_exp__h472040 != 8'd255 && + guard__h463963 != 2'b0 ; assign IF_checkForException_3008_BIT_4_3009_THEN_IF_c_ETC___d13159 = checkForException___d13008[4] ? CASE_checkForException_3008_BITS_3_TO_0_0_chec_ETC__q234 : @@ -23631,39 +23631,39 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198 = { (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd7) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd6) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd5) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd4) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2198, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd3) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd2) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2208 = { IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2203, (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd1) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64], (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87] == 3'd0) ? - n___1__h198529 : + n___1__h198530 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2521 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == @@ -23716,7 +23716,7 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqMshr_ETC___d2567 = (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[81:79] == 3'd2) ? - x__h197126 : + x__h197127 : (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEh_ETC___d2150 ? 64'd0 : 64'd1) ; @@ -23728,7 +23728,7 @@ module mkCore(CLK, WILL_FIRE_RL_coreFix_memExe_dMem_cache_m_banks_0_cRqTransfer_retry || coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3058 = - _theResult_____2__h296521 == v__h295941 ; + _theResult_____2__h296522 == v__h295942 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3138 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23737,7 +23737,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_lat_0$whas || coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3160 = - _theResult_____2__h304517 == v__h299286 ; + _theResult_____2__h304518 == v__h299287 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3180 = EN_dCacheToParent_fromP_enq ? !coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[583] : @@ -23766,7 +23766,7 @@ module mkCore(CLK, EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[514:3] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[514:3], - x__h302151 } ; + x__h302152 } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_linkAdd_ETC___d3004 = !MUX_flush_reservation$write_1__SEL_1 && (coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_lat_0$whas ? @@ -23864,35 +23864,35 @@ module mkCore(CLK, assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998 = { (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd7) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd6) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd5) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d1998, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd4) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd3) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2008 = { IF_coreFix_memExe_dMem_cache_m_banks_0_process_ETC___d2003, (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd2) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128], (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91] == 3'd1) ? - n__h194454 : + n__h194455 : coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64] } ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqFromC_ETC___d2789 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? @@ -23920,7 +23920,7 @@ module mkCore(CLK, EN_dCacheToParent_rqToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3332 = - _theResult_____2__h310511 == v__h309800 ; + _theResult_____2__h310512 == v__h309801 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3405 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -23929,7 +23929,7 @@ module mkCore(CLK, EN_dCacheToParent_rsToP_deq || coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_rl ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3428 = - _theResult_____2__h318365 == v__h313676 ; + _theResult_____2__h318366 == v__h313677 ; assign IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3447 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? !coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[579] : @@ -24081,7 +24081,7 @@ module mkCore(CLK, !coreFix_aluExe_0_bypassWire_1$whas || coreFix_memExe_dispToRegQ$RDY_first ; assign IF_coreFix_memExe_forwardQ_deqReq_dummy2_2_rea_ETC___d3750 = - _theResult_____2__h331934 == v__h331502 ; + _theResult_____2__h331935 == v__h331503 ; assign IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3743 = WILL_FIRE_RL_coreFix_memExe_doRespLdForward || coreFix_memExe_forwardQ_deqReq_rl ; @@ -24130,7 +24130,7 @@ module mkCore(CLK, SEL_ARR_mmio_dataRespQ_data_0_101_BITS_31_TO_0_ETC___d1398 }) : IF_coreFix_memExe_lsq_firstLd__277_BIT_94_352__ETC___d1424 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_dummy2_2_r_ETC___d3656 = - _theResult_____2__h328709 == v__h328277 ; + _theResult_____2__h328710 == v__h328278 ; assign IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3649 = WILL_FIRE_RL_coreFix_memExe_doRespLdMem || coreFix_memExe_memRespLdQ_deqReq_rl ; @@ -24162,7 +24162,7 @@ module mkCore(CLK, coreFix_memExe_respLrScAmoQ_enqReq_rl[64] ; assign IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 = csrf_minstret_ehr_data_lat_0$whas ? - upd__h727048 : + upd__h726805 : csrf_minstret_ehr_data_rl ; assign IF_csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_c_ETC___d14920 = csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_comm_ETC___d14718 ? @@ -24288,17 +24288,17 @@ module mkCore(CLK, EN_mmioToPlatform_pRs_enq ? mmio_pRsQ_enqReq_lat_0$wget[67] : mmio_pRsQ_enqReq_rl[67] ; - assign IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 = - rob$deqPort_0_canDeq ? y_avValue_fst__h730270 : 5'd0 ; - assign IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 = + assign IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 = + rob$deqPort_0_canDeq ? y_avValue_fst__h730027 : 5'd0 ; + assign IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_fst__h730745 : + y_avValue_snd_snd_snd_fst__h730502 : 2'd0 ; assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15191 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? csrf_sepc_csr : csrf_mepc_csr ; - assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282 = + assign IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288 = (rob$deqPort_0_deq_data[329:325] == 5'd19) ? { csrf_mpp_reg, 3'd0, @@ -24321,52 +24321,52 @@ module mkCore(CLK, assign IF_rob_deqPort_0_deq_data__4339_BITS_97_TO_96__ETC___d14512 = { CASE_robdeqPort_0_deq_data_BITS_97_TO_96_0_ro_ETC__q252, rob$deqPort_0_deq_data[95:32] } ; - assign IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675 = + assign IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681 = rob$deqPort_1_canDeq ? - IF_NOT_rob_deqPort_1_deq_data__5322_BIT_25_532_ETC___d15674 : + IF_NOT_rob_deqPort_1_deq_data__5328_BIT_25_532_ETC___d15680 : rob$deqPort_0_canDeq && rob$deqPort_0_deq_data[26] ; - assign IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139 = - sfdin__h511099[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74 = - sfdin__h417653[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99 = - sfdin__h445582[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179 = - sfdin__h549952[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29 = - sfdin__h354190[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109 = - sfdin__h463348[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39 = - sfdin__h371956[33] ? 2'd2 : 2'd0 ; - assign IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156 = - sfdin__h589256[4] ? 2'd2 : 2'd0 ; - assign IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64 = - sfdin__h399887[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135 = - _theResult___snd__h501479[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66 = - _theResult___snd__h408500[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142 = - _theResult___snd__h519884[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79 = - _theResult___snd__h426290[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175 = - _theResult___snd__h540332[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101 = - _theResult___snd__h454195[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182 = - _theResult___snd__h558737[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31 = - _theResult___snd__h362803[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114 = - _theResult___snd__h471985[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152 = - _theResult___snd__h579636[4] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44 = - _theResult___snd__h380593[33] ? 2'd2 : 2'd0 ; - assign IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159 = - _theResult___snd__h598041[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139 = + sfdin__h511100[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74 = + sfdin__h417654[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99 = + sfdin__h445583[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179 = + sfdin__h549953[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29 = + sfdin__h354191[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109 = + sfdin__h463349[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39 = + sfdin__h371957[33] ? 2'd2 : 2'd0 ; + assign IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156 = + sfdin__h589257[4] ? 2'd2 : 2'd0 ; + assign IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64 = + sfdin__h399888[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135 = + _theResult___snd__h501480[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66 = + _theResult___snd__h408501[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142 = + _theResult___snd__h519885[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79 = + _theResult___snd__h426291[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175 = + _theResult___snd__h540333[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101 = + _theResult___snd__h454196[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182 = + _theResult___snd__h558738[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31 = + _theResult___snd__h362804[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114 = + _theResult___snd__h471986[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152 = + _theResult___snd__h579637[4] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44 = + _theResult___snd__h380594[33] ? 2'd2 : 2'd0 ; + assign IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159 = + _theResult___snd__h598042[4] ? 2'd2 : 2'd0 ; assign NOT_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivEx_ETC___d5221 = !_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 || (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? @@ -24457,132 +24457,132 @@ module mkCore(CLK, !IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_2788_27_ETC___d12824[15] && !checkForException___d13698[4] && NOT_csrf_fs_reg_read__1546_EQ_0_2997_2998_OR_N_ETC___d13723 ; - assign NOT_IF_NOT_rob_deqPort_0_canDeq__5314_5315_OR__ETC___d15680 = - (fflags__h733530 & csrf_fflags_reg) != fflags__h733530 || + assign NOT_IF_NOT_rob_deqPort_0_canDeq__5320_5321_OR__ETC___d15686 = + (fflags__h733287 & csrf_fflags_reg) != fflags__h733287 || csrf_fs_reg != 2'b11 && - (IF_rob_deqPort_1_canDeq__5319_THEN_IF_NOT_rob__ETC___d15675 || - fflags__h733530 != 5'd0) ; + (IF_rob_deqPort_1_canDeq__5325_THEN_IF_NOT_rob__ETC___d15681 || + fflags__h733287 != 5'd0) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 = - !f2_sfd__h521135[21] && !f2_sfd__h521135[20] && - !f2_sfd__h521135[19] && - !f2_sfd__h521135[18] && - !f2_sfd__h521135[17] && - !f2_sfd__h521135[16] && - !f2_sfd__h521135[15] && - !f2_sfd__h521135[14] && - !f2_sfd__h521135[13] && - !f2_sfd__h521135[12] && - !f2_sfd__h521135[11] && - !f2_sfd__h521135[10] && - !f2_sfd__h521135[9] && - !f2_sfd__h521135[8] && - !f2_sfd__h521135[7] && - !f2_sfd__h521135[6] && - !f2_sfd__h521135[5] && - !f2_sfd__h521135[4] && - !f2_sfd__h521135[3] && - !f2_sfd__h521135[2] && - !f2_sfd__h521135[1] && - !f2_sfd__h521135[0] ; + !f2_sfd__h521136[21] && !f2_sfd__h521136[20] && + !f2_sfd__h521136[19] && + !f2_sfd__h521136[18] && + !f2_sfd__h521136[17] && + !f2_sfd__h521136[16] && + !f2_sfd__h521136[15] && + !f2_sfd__h521136[14] && + !f2_sfd__h521136[13] && + !f2_sfd__h521136[12] && + !f2_sfd__h521136[11] && + !f2_sfd__h521136[10] && + !f2_sfd__h521136[9] && + !f2_sfd__h521136[8] && + !f2_sfd__h521136[7] && + !f2_sfd__h521136[6] && + !f2_sfd__h521136[5] && + !f2_sfd__h521136[4] && + !f2_sfd__h521136[3] && + !f2_sfd__h521136[2] && + !f2_sfd__h521136[1] && + !f2_sfd__h521136[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10762 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10765 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10803) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10865 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10862 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10865 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10872) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10905 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10902 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10920 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10905 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10916) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10951 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10948 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10964 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10951 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10960) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10993 = - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 == 23'd0) && - (f1_exp__h482140 != 8'd255 || f1_sfd__h482141 != 23'd0) && - (f1_exp__h482140 != 8'd0 || f1_sfd__h482141 != 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 == 23'd0) && + (f1_exp__h482141 != 8'd255 || f1_sfd__h482142 != 23'd0) && + (f1_exp__h482141 != 8'd0 || f1_sfd__h482142 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10990 ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11006 = NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10993 | - ((f2_exp__h521134 != 8'd255 || f2_sfd__h521135 == 23'd0) && - (f2_exp__h521134 != 8'd255 || f2_sfd__h521135 != 23'd0) && - (f2_exp__h521134 != 8'd0 || f2_sfd__h521135 != 23'd0) && + ((f2_exp__h521135 != 8'd255 || f2_sfd__h521136 == 23'd0) && + (f2_exp__h521135 != 8'd255 || f2_sfd__h521136 != 23'd0) && + (f2_exp__h521135 != 8'd0 || f2_sfd__h521136 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11002) ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 = - !f1_sfd__h482141[21] && !f1_sfd__h482141[20] && - !f1_sfd__h482141[19] && - !f1_sfd__h482141[18] && - !f1_sfd__h482141[17] && - !f1_sfd__h482141[16] && - !f1_sfd__h482141[15] && - !f1_sfd__h482141[14] && - !f1_sfd__h482141[13] && - !f1_sfd__h482141[12] && - !f1_sfd__h482141[11] && - !f1_sfd__h482141[10] && - !f1_sfd__h482141[9] && - !f1_sfd__h482141[8] && - !f1_sfd__h482141[7] && - !f1_sfd__h482141[6] && - !f1_sfd__h482141[5] && - !f1_sfd__h482141[4] && - !f1_sfd__h482141[3] && - !f1_sfd__h482141[2] && - !f1_sfd__h482141[1] && - !f1_sfd__h482141[0] ; + !f1_sfd__h482142[21] && !f1_sfd__h482142[20] && + !f1_sfd__h482142[19] && + !f1_sfd__h482142[18] && + !f1_sfd__h482142[17] && + !f1_sfd__h482142[16] && + !f1_sfd__h482142[15] && + !f1_sfd__h482142[14] && + !f1_sfd__h482142[13] && + !f1_sfd__h482142[12] && + !f1_sfd__h482142[11] && + !f1_sfd__h482142[10] && + !f1_sfd__h482142[9] && + !f1_sfd__h482142[8] && + !f1_sfd__h482142[7] && + !f1_sfd__h482142[6] && + !f1_sfd__h482142[5] && + !f1_sfd__h482142[4] && + !f1_sfd__h482142[3] && + !f1_sfd__h482142[2] && + !f1_sfd__h482142[1] && + !f1_sfd__h482142[0] ; assign NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 = - !f3_sfd__h560439[21] && !f3_sfd__h560439[20] && - !f3_sfd__h560439[19] && - !f3_sfd__h560439[18] && - !f3_sfd__h560439[17] && - !f3_sfd__h560439[16] && - !f3_sfd__h560439[15] && - !f3_sfd__h560439[14] && - !f3_sfd__h560439[13] && - !f3_sfd__h560439[12] && - !f3_sfd__h560439[11] && - !f3_sfd__h560439[10] && - !f3_sfd__h560439[9] && - !f3_sfd__h560439[8] && - !f3_sfd__h560439[7] && - !f3_sfd__h560439[6] && - !f3_sfd__h560439[5] && - !f3_sfd__h560439[4] && - !f3_sfd__h560439[3] && - !f3_sfd__h560439[2] && - !f3_sfd__h560439[1] && - !f3_sfd__h560439[0] ; + !f3_sfd__h560440[21] && !f3_sfd__h560440[20] && + !f3_sfd__h560440[19] && + !f3_sfd__h560440[18] && + !f3_sfd__h560440[17] && + !f3_sfd__h560440[16] && + !f3_sfd__h560440[15] && + !f3_sfd__h560440[14] && + !f3_sfd__h560440[13] && + !f3_sfd__h560440[12] && + !f3_sfd__h560440[11] && + !f3_sfd__h560440[10] && + !f3_sfd__h560440[9] && + !f3_sfd__h560440[8] && + !f3_sfd__h560440[7] && + !f3_sfd__h560440[6] && + !f3_sfd__h560440[5] && + !f3_sfd__h560440[4] && + !f3_sfd__h560440[3] && + !f3_sfd__h560440[2] && + !f3_sfd__h560440[1] && + !f3_sfd__h560440[0] ; assign NOT_SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__ETC___d13484 = !SEL_ARR_NOT_coreFix_aluExe_0_rsAlu_canEnq__343_ETC___d13482 && (fetchStage$pipelines_0_first[194:192] != 3'd1 || @@ -24641,7 +24641,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd19 || rob$deqPort_0_deq_data[329:325] == 5'd20) && _0b0_CONCAT_csrf_external_int_pend_vec_3_read___ETC___d14324 ; - assign NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15368 = + assign NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15374 = NOT_commitStage_rg_run_state_4345_4346_AND_NOT_ETC___d15005 && rob$deqPort_0_deq_data[329:325] != 5'd0 && rob$deqPort_0_deq_data[329:325] != 5'd21 && @@ -25537,14 +25537,14 @@ module mkCore(CLK, NOT_IF_IF_NOT_csrf_prv_reg_read__2787_EQ_3_278_ETC___d13725 && rob$enqPort_1_canEnq && epochManager_checkEpoch_1_check_fetchStage_pip_ETC___d13894 ; - assign NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_RDY_ETC___d15356 = + assign NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_RDY_ETC___d15362 = (!rob$deqPort_0_canDeq || rob$RDY_deqPort_0_deq && regRenamingTable$RDY_commit_0_commit && v_f_to_TV_0$FULL_N) && (!rob$deqPort_1_canDeq || rob$RDY_deqPort_1_deq_data && - NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353) ; - assign NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 = + NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359) ; + assign NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 = (!rob$deqPort_0_canDeq || rob$deqPort_0_deq_data[25] && !rob$deqPort_0_deq_data[18] && !rob$deqPort_0_deq_data[167] && @@ -25566,7 +25566,7 @@ module mkCore(CLK, (IF_rob_deqPort_0_deq_data__4339_BIT_181_4414_T_ETC___d14983 != 6'd6 || csrf_terminate_module_terminateQ$FULL_N) ; - assign NOT_rob_deqPort_1_deq_data__5322_BIT_25_5323_5_ETC___d15353 = + assign NOT_rob_deqPort_1_deq_data__5328_BIT_25_5329_5_ETC___d15359 = !rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -25611,27 +25611,27 @@ module mkCore(CLK, { CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q267, !CASE_coreFix_memExe_dMem_cache_m_banks_0_fromP_ETC__q268, SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_fr_ETC___d2938, - x__h291616 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16096 = + x__h291617 } ; + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rq_ETC___d16102 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q269, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q270, CASE_coreFix_memExe_dMem_cache_m_banks_0_rqToP_ETC__q271 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052 = + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058 = { CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q253, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q254, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q255, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q256 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16052, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16058, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q257, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q258 } ; - assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16070 = - { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16061, + assign SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16076 = + { SEL_ARR_coreFix_memExe_dMem_cache_m_banks_0_rs_ETC___d16067, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q262, CASE_coreFix_memExe_dMem_cache_m_banks_0_rsToP_ETC__q263 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10131 = - { {4{f2_exp21134_MINUS_127__q176[7]}}, - f2_exp21134_MINUS_127__q176 } ; + { {4{f2_exp21135_MINUS_127__q176[7]}}, + f2_exp21135_MINUS_127__q176 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10131 ^ 12'h800) <= @@ -25641,8 +25641,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8646 = - { {4{f1_exp82140_MINUS_127__q136[7]}}, - f1_exp82140_MINUS_127__q136 } ; + { {4{f1_exp82141_MINUS_127__q136[7]}}, + f1_exp82141_MINUS_127__q136 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8646 ^ 12'h800) <= @@ -25652,8 +25652,8 @@ module mkCore(CLK, 12'h800) < 12'd1026 ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9361 = - { {4{f3_exp60438_MINUS_127__q153[7]}}, - f3_exp60438_MINUS_127__q153 } ; + { {4{f3_exp60439_MINUS_127__q153[7]}}, + f3_exp60439_MINUS_127__q153 } ; assign SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9361 ^ 12'h800) <= @@ -25738,15 +25738,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5169 = { 3'd0, - _theResult___fst_exp__h354196 == 8'd0 && - (sfdin__h354190[56:34] == 23'd0 || guard__h346095 != 2'b0), + _theResult___fst_exp__h354197 == 8'd0 && + (sfdin__h354191[56:34] == 23'd0 || guard__h346096 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h354793 == 8'd255 && - _theResult___fst_sfd__h354794 == 23'd0, + _theResult___fst_exp__h354794 == 8'd255 && + _theResult___fst_sfd__h354795 == 23'd0, 1'd0, - _theResult___fst_exp__h354196 != 8'd255 && - guard__h346095 != 2'b0 } ; + _theResult___fst_exp__h354197 != 8'd255 && + guard__h346096 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 } ^ @@ -25754,15 +25754,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d6561 = { 3'd0, - _theResult___fst_exp__h399893 == 8'd0 && - (sfdin__h399887[56:34] == 23'd0 || guard__h391794 != 2'b0), + _theResult___fst_exp__h399894 == 8'd0 && + (sfdin__h399888[56:34] == 23'd0 || guard__h391795 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h400490 == 8'd255 && - _theResult___fst_sfd__h400491 == 23'd0, + _theResult___fst_exp__h400491 == 8'd255 && + _theResult___fst_sfd__h400492 == 23'd0, 1'd0, - _theResult___fst_exp__h399893 != 8'd255 && - guard__h391794 != 2'b0 } ; + _theResult___fst_exp__h399894 != 8'd255 && + guard__h391795 != 2'b0 } ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033 = ({ 3'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 } ^ @@ -25770,15 +25770,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7953 = { 3'd0, - _theResult___fst_exp__h445588 == 8'd0 && - (sfdin__h445582[56:34] == 23'd0 || guard__h437489 != 2'b0), + _theResult___fst_exp__h445589 == 8'd0 && + (sfdin__h445583[56:34] == 23'd0 || guard__h437490 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h446185 == 8'd255 && - _theResult___fst_sfd__h446186 == 23'd0, + _theResult___fst_exp__h446186 == 8'd255 && + _theResult___fst_sfd__h446187 == 23'd0, 1'd0, - _theResult___fst_exp__h445588 != 8'd255 && - guard__h437489 != 2'b0 } ; + _theResult___fst_exp__h445589 != 8'd255 && + guard__h437490 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 } ^ @@ -25786,37 +25786,37 @@ module mkCore(CLK, 12'd2048 ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10758 = { 3'd0, - _theResult___fst_exp__h511105 == 11'd0 && - (sfdin__h511099[56:5] == 52'd0 || guard__h502879 != 2'b0), + _theResult___fst_exp__h511106 == 11'd0 && + (sfdin__h511100[56:5] == 52'd0 || guard__h502880 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h511937 == 11'd2047 && - _theResult___fst_sfd__h511938 == 52'd0, + _theResult___fst_exp__h511938 == 11'd2047 && + _theResult___fst_sfd__h511939 == 52'd0, 1'd0, - _theResult___fst_exp__h511105 != 11'd2047 && - guard__h502879 != 2'b0 } ; + _theResult___fst_exp__h511106 != 11'd2047 && + guard__h502880 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10799 = { 3'd0, - _theResult___fst_exp__h549958 == 11'd0 && - (sfdin__h549952[56:5] == 52'd0 || guard__h541732 != 2'b0), + _theResult___fst_exp__h549959 == 11'd0 && + (sfdin__h549953[56:5] == 52'd0 || guard__h541733 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h550790 == 11'd2047 && - _theResult___fst_sfd__h550791 == 52'd0, + _theResult___fst_exp__h550791 == 11'd2047 && + _theResult___fst_sfd__h550792 == 52'd0, 1'd0, - _theResult___fst_exp__h549958 != 11'd2047 && - guard__h541732 != 2'b0 } ; + _theResult___fst_exp__h549959 != 11'd2047 && + guard__h541733 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10843 = { 3'd0, - _theResult___fst_exp__h589262 == 11'd0 && - (sfdin__h589256[56:5] == 52'd0 || guard__h581036 != 2'b0), + _theResult___fst_exp__h589263 == 11'd0 && + (sfdin__h589257[56:5] == 52'd0 || guard__h581037 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h590094 == 11'd2047 && - _theResult___fst_sfd__h590095 == 52'd0, + _theResult___fst_exp__h590095 == 11'd2047 && + _theResult___fst_sfd__h590096 == 52'd0, 1'd0, - _theResult___fst_exp__h589262 != 11'd2047 && - guard__h581036 != 2'b0 } ; + _theResult___fst_exp__h589263 != 11'd2047 && + guard__h581037 != 2'b0 } ; assign _0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897 = ({ 6'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 } ^ @@ -25834,15 +25834,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d5198 = { 3'd0, - _theResult___fst_exp__h371962 == 8'd0 && - (sfdin__h371956[56:34] == 23'd0 || guard__h363734 != 2'b0), + _theResult___fst_exp__h371963 == 8'd0 && + (sfdin__h371957[56:34] == 23'd0 || guard__h363735 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h372559 == 8'd255 && - _theResult___fst_sfd__h372560 == 23'd0, + _theResult___fst_exp__h372560 == 8'd255 && + _theResult___fst_sfd__h372561 == 23'd0, 1'd0, - _theResult___fst_exp__h371962 != 8'd255 && - guard__h363734 != 2'b0 } ; + _theResult___fst_exp__h371963 != 8'd255 && + guard__h363735 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 } ^ @@ -25850,15 +25850,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6590 = { 3'd0, - _theResult___fst_exp__h417659 == 8'd0 && - (sfdin__h417653[56:34] == 23'd0 || guard__h409431 != 2'b0), + _theResult___fst_exp__h417660 == 8'd0 && + (sfdin__h417654[56:34] == 23'd0 || guard__h409432 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h418256 == 8'd255 && - _theResult___fst_sfd__h418257 == 23'd0, + _theResult___fst_exp__h418257 == 8'd255 && + _theResult___fst_sfd__h418258 == 23'd0, 1'd0, - _theResult___fst_exp__h417659 != 8'd255 && - guard__h409431 != 2'b0 } ; + _theResult___fst_exp__h417660 != 8'd255 && + guard__h409432 != 2'b0 } ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584 = ({ 3'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 } ^ @@ -25866,15 +25866,15 @@ module mkCore(CLK, 9'd256 ; assign _0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7982 = { 3'd0, - _theResult___fst_exp__h463354 == 8'd0 && - (sfdin__h463348[56:34] == 23'd0 || guard__h455126 != 2'b0), + _theResult___fst_exp__h463355 == 8'd0 && + (sfdin__h463349[56:34] == 23'd0 || guard__h455127 != 2'b0), 1'd0 } | { 2'd0, - _theResult___fst_exp__h463951 == 8'd255 && - _theResult___fst_sfd__h463952 == 23'd0, + _theResult___fst_exp__h463952 == 8'd255 && + _theResult___fst_sfd__h463953 == 23'd0, 1'd0, - _theResult___fst_exp__h463354 != 8'd255 && - guard__h455126 != 2'b0 } ; + _theResult___fst_exp__h463355 != 8'd255 && + guard__h455127 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ^ @@ -25888,37 +25888,37 @@ module mkCore(CLK, 12'h800) ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10741 = { 3'd0, - _theResult___fst_exp__h501528 == 11'd0 && - guard__h493567 != 2'b0, + _theResult___fst_exp__h501529 == 11'd0 && + guard__h493568 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h502286 == 11'd2047 && - _theResult___fst_sfd__h502287 == 52'd0, + _theResult___fst_exp__h502287 == 11'd2047 && + _theResult___fst_sfd__h502288 == 52'd0, 1'd0, - _theResult___fst_exp__h501528 != 11'd2047 && - guard__h493567 != 2'b0 } ; + _theResult___fst_exp__h501529 != 11'd2047 && + guard__h493568 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10782 = { 3'd0, - _theResult___fst_exp__h540381 == 11'd0 && - guard__h532420 != 2'b0, + _theResult___fst_exp__h540382 == 11'd0 && + guard__h532421 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h541139 == 11'd2047 && - _theResult___fst_sfd__h541140 == 52'd0, + _theResult___fst_exp__h541140 == 11'd2047 && + _theResult___fst_sfd__h541141 == 52'd0, 1'd0, - _theResult___fst_exp__h540381 != 11'd2047 && - guard__h532420 != 2'b0 } ; + _theResult___fst_exp__h540382 != 11'd2047 && + guard__h532421 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10826 = { 3'd0, - _theResult___fst_exp__h579685 == 11'd0 && - guard__h571724 != 2'b0, + _theResult___fst_exp__h579686 == 11'd0 && + guard__h571725 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h580443 == 11'd2047 && - _theResult___fst_sfd__h580444 == 52'd0, + _theResult___fst_exp__h580444 == 11'd2047 && + _theResult___fst_sfd__h580445 == 52'd0, 1'd0, - _theResult___fst_exp__h579685 != 11'd2047 && - guard__h571724 != 2'b0 } ; + _theResult___fst_exp__h579686 != 11'd2047 && + guard__h571725 != 2'b0 } ; assign _0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585 = ({ 6'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ^ @@ -25954,15 +25954,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5181 = { 3'd0, - _theResult___fst_exp__h362852 == 8'd0 && - guard__h354804 != 2'b0, + _theResult___fst_exp__h362853 == 8'd0 && + guard__h354805 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h363375 == 8'd255 && - _theResult___fst_sfd__h363376 == 23'd0, + _theResult___fst_exp__h363376 == 8'd255 && + _theResult___fst_sfd__h363377 == 23'd0, 1'd0, - _theResult___fst_exp__h362852 != 8'd255 && - guard__h354804 != 2'b0 } ; + _theResult___fst_exp__h362853 != 8'd255 && + guard__h354805 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ^ @@ -25976,15 +25976,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6573 = { 3'd0, - _theResult___fst_exp__h408549 == 8'd0 && - guard__h400501 != 2'b0, + _theResult___fst_exp__h408550 == 8'd0 && + guard__h400502 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h409072 == 8'd255 && - _theResult___fst_sfd__h409073 == 23'd0, + _theResult___fst_exp__h409073 == 8'd255 && + _theResult___fst_sfd__h409074 == 23'd0, 1'd0, - _theResult___fst_exp__h408549 != 8'd255 && - guard__h400501 != 2'b0 } ; + _theResult___fst_exp__h408550 != 8'd255 && + guard__h400502 != 2'b0 } ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264 = ({ 3'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ^ @@ -25998,15 +25998,15 @@ module mkCore(CLK, 9'h100) ; assign _0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7965 = { 3'd0, - _theResult___fst_exp__h454244 == 8'd0 && - guard__h446196 != 2'b0, + _theResult___fst_exp__h454245 == 8'd0 && + guard__h446197 != 2'b0, 1'd0 } | { 2'd0, - _theResult___fst_exp__h454767 == 8'd255 && - _theResult___fst_sfd__h454768 == 23'd0, + _theResult___fst_exp__h454768 == 8'd255 && + _theResult___fst_sfd__h454769 == 23'd0, 1'd0, - _theResult___fst_exp__h454244 != 8'd255 && - guard__h446196 != 2'b0 } ; + _theResult___fst_exp__h454245 != 8'd255 && + guard__h446197 != 2'b0 } ; assign _0_CONCAT_csrf_external_int_en_vec_3_read__1664_ETC___d12798 = { 4'd0, csrf_external_int_en_vec_3 & csrf_external_int_pend_vec_3, @@ -26034,26 +26034,26 @@ module mkCore(CLK, specTagManager$RDY_nextSpecTag) && CASE_fetchStage_pipelines_0_canDeq__2755_AND_N_ETC__q241 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138 = - sfd__h521496 >> + sfd__h521497 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653 = - sfd__h482502 >> + sfd__h482503 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ; assign _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368 = - sfd__h560800 >> + sfd__h560801 >> _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558 = - sfd__h338480 >> + sfd__h338481 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950 = - sfd__h384182 >> + sfd__h384183 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946) ; assign _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342 = - sfd__h429877 >> + sfd__h429878 >> (_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338[11] ? 12'hAAA : _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338) ; @@ -26468,51 +26468,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10009 = 12'd3970 - { 7'd0, - f2_sfd__h521135[22] ? + f2_sfd__h521136[22] ? 5'd0 : - (f2_sfd__h521135[21] ? + (f2_sfd__h521136[21] ? 5'd1 : - (f2_sfd__h521135[20] ? + (f2_sfd__h521136[20] ? 5'd2 : - (f2_sfd__h521135[19] ? + (f2_sfd__h521136[19] ? 5'd3 : - (f2_sfd__h521135[18] ? + (f2_sfd__h521136[18] ? 5'd4 : - (f2_sfd__h521135[17] ? + (f2_sfd__h521136[17] ? 5'd5 : - (f2_sfd__h521135[16] ? + (f2_sfd__h521136[16] ? 5'd6 : - (f2_sfd__h521135[15] ? + (f2_sfd__h521136[15] ? 5'd7 : - (f2_sfd__h521135[14] ? + (f2_sfd__h521136[14] ? 5'd8 : - (f2_sfd__h521135[13] ? + (f2_sfd__h521136[13] ? 5'd9 : - (f2_sfd__h521135[12] ? + (f2_sfd__h521136[12] ? 5'd10 : - (f2_sfd__h521135[11] ? + (f2_sfd__h521136[11] ? 5'd11 : - (f2_sfd__h521135[10] ? + (f2_sfd__h521136[10] ? 5'd12 : - (f2_sfd__h521135[9] ? + (f2_sfd__h521136[9] ? 5'd13 : - (f2_sfd__h521135[8] ? + (f2_sfd__h521136[8] ? 5'd14 : - (f2_sfd__h521135[7] ? + (f2_sfd__h521136[7] ? 5'd15 : - (f2_sfd__h521135[6] ? + (f2_sfd__h521136[6] ? 5'd16 : - (f2_sfd__h521135[5] ? + (f2_sfd__h521136[5] ? 5'd17 : - (f2_sfd__h521135[4] ? + (f2_sfd__h521136[4] ? 5'd18 : - (f2_sfd__h521135[3] ? + (f2_sfd__h521136[3] ? 5'd19 : - (f2_sfd__h521135[2] ? + (f2_sfd__h521136[2] ? 5'd20 : - (f2_sfd__h521135[1] ? + (f2_sfd__h521136[1] ? 5'd21 : - (f2_sfd__h521135[0] ? + (f2_sfd__h521136[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 = @@ -26526,51 +26526,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8509 = 12'd3970 - { 7'd0, - f1_sfd__h482141[22] ? + f1_sfd__h482142[22] ? 5'd0 : - (f1_sfd__h482141[21] ? + (f1_sfd__h482142[21] ? 5'd1 : - (f1_sfd__h482141[20] ? + (f1_sfd__h482142[20] ? 5'd2 : - (f1_sfd__h482141[19] ? + (f1_sfd__h482142[19] ? 5'd3 : - (f1_sfd__h482141[18] ? + (f1_sfd__h482142[18] ? 5'd4 : - (f1_sfd__h482141[17] ? + (f1_sfd__h482142[17] ? 5'd5 : - (f1_sfd__h482141[16] ? + (f1_sfd__h482142[16] ? 5'd6 : - (f1_sfd__h482141[15] ? + (f1_sfd__h482142[15] ? 5'd7 : - (f1_sfd__h482141[14] ? + (f1_sfd__h482142[14] ? 5'd8 : - (f1_sfd__h482141[13] ? + (f1_sfd__h482142[13] ? 5'd9 : - (f1_sfd__h482141[12] ? + (f1_sfd__h482142[12] ? 5'd10 : - (f1_sfd__h482141[11] ? + (f1_sfd__h482142[11] ? 5'd11 : - (f1_sfd__h482141[10] ? + (f1_sfd__h482142[10] ? 5'd12 : - (f1_sfd__h482141[9] ? + (f1_sfd__h482142[9] ? 5'd13 : - (f1_sfd__h482141[8] ? + (f1_sfd__h482142[8] ? 5'd14 : - (f1_sfd__h482141[7] ? + (f1_sfd__h482142[7] ? 5'd15 : - (f1_sfd__h482141[6] ? + (f1_sfd__h482142[6] ? 5'd16 : - (f1_sfd__h482141[5] ? + (f1_sfd__h482142[5] ? 5'd17 : - (f1_sfd__h482141[4] ? + (f1_sfd__h482142[4] ? 5'd18 : - (f1_sfd__h482141[3] ? + (f1_sfd__h482142[3] ? 5'd19 : - (f1_sfd__h482141[2] ? + (f1_sfd__h482142[2] ? 5'd20 : - (f1_sfd__h482141[1] ? + (f1_sfd__h482142[1] ? 5'd21 : - (f1_sfd__h482141[0] ? + (f1_sfd__h482142[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 = @@ -26584,51 +26584,51 @@ module mkCore(CLK, assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9239 = 12'd3970 - { 7'd0, - f3_sfd__h560439[22] ? + f3_sfd__h560440[22] ? 5'd0 : - (f3_sfd__h560439[21] ? + (f3_sfd__h560440[21] ? 5'd1 : - (f3_sfd__h560439[20] ? + (f3_sfd__h560440[20] ? 5'd2 : - (f3_sfd__h560439[19] ? + (f3_sfd__h560440[19] ? 5'd3 : - (f3_sfd__h560439[18] ? + (f3_sfd__h560440[18] ? 5'd4 : - (f3_sfd__h560439[17] ? + (f3_sfd__h560440[17] ? 5'd5 : - (f3_sfd__h560439[16] ? + (f3_sfd__h560440[16] ? 5'd6 : - (f3_sfd__h560439[15] ? + (f3_sfd__h560440[15] ? 5'd7 : - (f3_sfd__h560439[14] ? + (f3_sfd__h560440[14] ? 5'd8 : - (f3_sfd__h560439[13] ? + (f3_sfd__h560440[13] ? 5'd9 : - (f3_sfd__h560439[12] ? + (f3_sfd__h560440[12] ? 5'd10 : - (f3_sfd__h560439[11] ? + (f3_sfd__h560440[11] ? 5'd11 : - (f3_sfd__h560439[10] ? + (f3_sfd__h560440[10] ? 5'd12 : - (f3_sfd__h560439[9] ? + (f3_sfd__h560440[9] ? 5'd13 : - (f3_sfd__h560439[8] ? + (f3_sfd__h560440[8] ? 5'd14 : - (f3_sfd__h560439[7] ? + (f3_sfd__h560440[7] ? 5'd15 : - (f3_sfd__h560439[6] ? + (f3_sfd__h560440[6] ? 5'd16 : - (f3_sfd__h560439[5] ? + (f3_sfd__h560440[5] ? 5'd17 : - (f3_sfd__h560439[4] ? + (f3_sfd__h560440[4] ? 5'd18 : - (f3_sfd__h560439[3] ? + (f3_sfd__h560440[3] ? 5'd19 : - (f3_sfd__h560439[2] ? + (f3_sfd__h560440[2] ? 5'd20 : - (f3_sfd__h560439[1] ? + (f3_sfd__h560440[1] ? 5'd21 : - (f3_sfd__h560439[0] ? + (f3_sfd__h560440[0] ? 5'd22 : 5'd23)))))))))))))))))))))) } ; assign _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 = @@ -26781,1421 +26781,1421 @@ module mkCore(CLK, assign _dor1sbCons$EN_setReady_1_put = WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_F || WILL_FIRE_RL_coreFix_aluExe_1_doFinishAlu_T ; - assign _theResult_____2__h296521 = + assign _theResult_____2__h296522 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3046) ? - next_deqP___1__h296800 : + next_deqP___1__h296801 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP ; - assign _theResult_____2__h304517 = + assign _theResult_____2__h304518 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3153) ? - next_deqP___1__h304796 : + next_deqP___1__h304797 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP ; - assign _theResult_____2__h310511 = + assign _theResult_____2__h310512 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3324) ? - next_deqP___1__h311077 : + next_deqP___1__h311078 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP ; - assign _theResult_____2__h318365 = + assign _theResult_____2__h318366 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3420) ? - next_deqP___1__h318931 : + next_deqP___1__h318932 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP ; - assign _theResult_____2__h328709 = + assign _theResult_____2__h328710 = (coreFix_memExe_memRespLdQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_deqReq_lat_1_whas_ETC___d3649) ? - next_deqP___1__h328988 : + next_deqP___1__h328989 : coreFix_memExe_memRespLdQ_deqP ; - assign _theResult_____2__h331934 = + assign _theResult_____2__h331935 = (coreFix_memExe_forwardQ_deqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_deqReq_lat_1_whas___ETC___d3743) ? - next_deqP___1__h332213 : + next_deqP___1__h332214 : coreFix_memExe_forwardQ_deqP ; - assign _theResult____h346085 = - (value__h346707 == 54'd0) ? sfd__h338480 : 57'd1 ; - assign _theResult____h363724 = + assign _theResult____h346086 = + (value__h346708 == 54'd0) ? sfd__h338481 : 57'd1 ; + assign _theResult____h363725 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554 ^ 12'h800) < 12'd2105) ? - result__h364337 : - _theResult____h346085 ; - assign _theResult____h391784 = - (value__h392404 == 54'd0) ? sfd__h384182 : 57'd1 ; - assign _theResult____h409421 = + result__h364338 : + _theResult____h346086 ; + assign _theResult____h391785 = + (value__h392405 == 54'd0) ? sfd__h384183 : 57'd1 ; + assign _theResult____h409422 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946 ^ 12'h800) < 12'd2105) ? - result__h410034 : - _theResult____h391784 ; - assign _theResult____h437479 = - (value__h438099 == 54'd0) ? sfd__h429877 : 57'd1 ; - assign _theResult____h455116 = + result__h410035 : + _theResult____h391785 ; + assign _theResult____h437480 = + (value__h438100 == 54'd0) ? sfd__h429878 : 57'd1 ; + assign _theResult____h455117 = ((_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338 ^ 12'h800) < 12'd2105) ? - result__h455729 : - _theResult____h437479 ; - assign _theResult____h502869 = + result__h455730 : + _theResult____h437480 ; + assign _theResult____h502870 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ^ 12'h800) < 12'd2105) ? - result__h503482 : - ((value__h487085 == 25'd0) ? sfd__h482502 : 57'd1) ; - assign _theResult____h541722 = + result__h503483 : + ((value__h487086 == 25'd0) ? sfd__h482503 : 57'd1) ; + assign _theResult____h541723 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ^ 12'h800) < 12'd2105) ? - result__h542335 : - ((value__h525938 == 25'd0) ? sfd__h521496 : 57'd1) ; - assign _theResult____h581026 = + result__h542336 : + ((value__h525939 == 25'd0) ? sfd__h521497 : 57'd1) ; + assign _theResult____h581027 = ((_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ^ 12'h800) < 12'd2105) ? - result__h581639 : - ((value__h565242 == 25'd0) ? sfd__h560800 : 57'd1) ; + result__h581640 : + ((value__h565243 == 25'd0) ? sfd__h560801 : 57'd1) ; assign _theResult____h651118 = (csrf_prv_reg != 2'd3 || csrf_ie_vec_3) ? enabled_ints___1__h651643 : 16'd0 ; - assign _theResult___exp__h354712 = - sfd__h354288[24] ? - ((_theResult___fst_exp__h354196 == 8'd254) ? + assign _theResult___exp__h354713 = + sfd__h354289[24] ? + ((_theResult___fst_exp__h354197 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381229) : - ((_theResult___fst_exp__h354196 == 8'd0 && - sfd__h354288[24:23] == 2'b01) ? + din_inc___2_exp__h381230) : + ((_theResult___fst_exp__h354197 == 8'd0 && + sfd__h354289[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h354196) ; - assign _theResult___exp__h363294 = - sfd__h362870[24] ? - ((_theResult___fst_exp__h362852 == 8'd254) ? + _theResult___fst_exp__h354197) ; + assign _theResult___exp__h363295 = + sfd__h362871[24] ? + ((_theResult___fst_exp__h362853 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381253) : - ((_theResult___fst_exp__h362852 == 8'd0 && - sfd__h362870[24:23] == 2'b01) ? + din_inc___2_exp__h381254) : + ((_theResult___fst_exp__h362853 == 8'd0 && + sfd__h362871[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h362852) ; - assign _theResult___exp__h372478 = - sfd__h372054[24] ? - ((_theResult___fst_exp__h371962 == 8'd254) ? + _theResult___fst_exp__h362853) ; + assign _theResult___exp__h372479 = + sfd__h372055[24] ? + ((_theResult___fst_exp__h371963 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381283) : - ((_theResult___fst_exp__h371962 == 8'd0 && - sfd__h372054[24:23] == 2'b01) ? + din_inc___2_exp__h381284) : + ((_theResult___fst_exp__h371963 == 8'd0 && + sfd__h372055[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h371962) ; - assign _theResult___exp__h381114 = - sfd__h380666[24] ? - ((_theResult___fst_exp__h380647 == 8'd254) ? + _theResult___fst_exp__h371963) ; + assign _theResult___exp__h381115 = + sfd__h380667[24] ? + ((_theResult___fst_exp__h380648 == 8'd254) ? 8'd255 : - din_inc___2_exp__h381307) : - ((_theResult___fst_exp__h380647 == 8'd0 && - sfd__h380666[24:23] == 2'b01) ? + din_inc___2_exp__h381308) : + ((_theResult___fst_exp__h380648 == 8'd0 && + sfd__h380667[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h380647) ; - assign _theResult___exp__h381216 = + _theResult___fst_exp__h380648) ; + assign _theResult___exp__h381217 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h381207 ; - assign _theResult___exp__h400409 = - sfd__h399985[24] ? - ((_theResult___fst_exp__h399893 == 8'd254) ? + _theResult___fst_exp__h381208 ; + assign _theResult___exp__h400410 = + sfd__h399986[24] ? + ((_theResult___fst_exp__h399894 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426926) : - ((_theResult___fst_exp__h399893 == 8'd0 && - sfd__h399985[24:23] == 2'b01) ? + din_inc___2_exp__h426927) : + ((_theResult___fst_exp__h399894 == 8'd0 && + sfd__h399986[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h399893) ; - assign _theResult___exp__h408991 = - sfd__h408567[24] ? - ((_theResult___fst_exp__h408549 == 8'd254) ? + _theResult___fst_exp__h399894) ; + assign _theResult___exp__h408992 = + sfd__h408568[24] ? + ((_theResult___fst_exp__h408550 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426950) : - ((_theResult___fst_exp__h408549 == 8'd0 && - sfd__h408567[24:23] == 2'b01) ? + din_inc___2_exp__h426951) : + ((_theResult___fst_exp__h408550 == 8'd0 && + sfd__h408568[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h408549) ; - assign _theResult___exp__h418175 = - sfd__h417751[24] ? - ((_theResult___fst_exp__h417659 == 8'd254) ? + _theResult___fst_exp__h408550) ; + assign _theResult___exp__h418176 = + sfd__h417752[24] ? + ((_theResult___fst_exp__h417660 == 8'd254) ? 8'd255 : - din_inc___2_exp__h426980) : - ((_theResult___fst_exp__h417659 == 8'd0 && - sfd__h417751[24:23] == 2'b01) ? + din_inc___2_exp__h426981) : + ((_theResult___fst_exp__h417660 == 8'd0 && + sfd__h417752[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h417659) ; - assign _theResult___exp__h426811 = - sfd__h426363[24] ? - ((_theResult___fst_exp__h426344 == 8'd254) ? + _theResult___fst_exp__h417660) ; + assign _theResult___exp__h426812 = + sfd__h426364[24] ? + ((_theResult___fst_exp__h426345 == 8'd254) ? 8'd255 : - din_inc___2_exp__h427004) : - ((_theResult___fst_exp__h426344 == 8'd0 && - sfd__h426363[24:23] == 2'b01) ? + din_inc___2_exp__h427005) : + ((_theResult___fst_exp__h426345 == 8'd0 && + sfd__h426364[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h426344) ; - assign _theResult___exp__h426913 = + _theResult___fst_exp__h426345) ; + assign _theResult___exp__h426914 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h426904 ; - assign _theResult___exp__h446104 = - sfd__h445680[24] ? - ((_theResult___fst_exp__h445588 == 8'd254) ? + _theResult___fst_exp__h426905 ; + assign _theResult___exp__h446105 = + sfd__h445681[24] ? + ((_theResult___fst_exp__h445589 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472621) : - ((_theResult___fst_exp__h445588 == 8'd0 && - sfd__h445680[24:23] == 2'b01) ? + din_inc___2_exp__h472622) : + ((_theResult___fst_exp__h445589 == 8'd0 && + sfd__h445681[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h445588) ; - assign _theResult___exp__h454686 = - sfd__h454262[24] ? - ((_theResult___fst_exp__h454244 == 8'd254) ? + _theResult___fst_exp__h445589) ; + assign _theResult___exp__h454687 = + sfd__h454263[24] ? + ((_theResult___fst_exp__h454245 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472645) : - ((_theResult___fst_exp__h454244 == 8'd0 && - sfd__h454262[24:23] == 2'b01) ? + din_inc___2_exp__h472646) : + ((_theResult___fst_exp__h454245 == 8'd0 && + sfd__h454263[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h454244) ; - assign _theResult___exp__h463870 = - sfd__h463446[24] ? - ((_theResult___fst_exp__h463354 == 8'd254) ? + _theResult___fst_exp__h454245) ; + assign _theResult___exp__h463871 = + sfd__h463447[24] ? + ((_theResult___fst_exp__h463355 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472675) : - ((_theResult___fst_exp__h463354 == 8'd0 && - sfd__h463446[24:23] == 2'b01) ? + din_inc___2_exp__h472676) : + ((_theResult___fst_exp__h463355 == 8'd0 && + sfd__h463447[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h463354) ; - assign _theResult___exp__h472506 = - sfd__h472058[24] ? - ((_theResult___fst_exp__h472039 == 8'd254) ? + _theResult___fst_exp__h463355) ; + assign _theResult___exp__h472507 = + sfd__h472059[24] ? + ((_theResult___fst_exp__h472040 == 8'd254) ? 8'd255 : - din_inc___2_exp__h472699) : - ((_theResult___fst_exp__h472039 == 8'd0 && - sfd__h472058[24:23] == 2'b01) ? + din_inc___2_exp__h472700) : + ((_theResult___fst_exp__h472040 == 8'd0 && + sfd__h472059[24:23] == 2'b01) ? 8'd1 : - _theResult___fst_exp__h472039) ; - assign _theResult___exp__h472608 = + _theResult___fst_exp__h472040) ; + assign _theResult___exp__h472609 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h472599 ; - assign _theResult___exp__h502183 = - sfd__h501546[53] ? - ((_theResult___fst_exp__h501528 == 11'd2046) ? + _theResult___fst_exp__h472600 ; + assign _theResult___exp__h502184 = + sfd__h501547[53] ? + ((_theResult___fst_exp__h501529 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520778) : - ((_theResult___fst_exp__h501528 == 11'd0 && - sfd__h501546[53:52] == 2'b01) ? + din_inc___2_exp__h520779) : + ((_theResult___fst_exp__h501529 == 11'd0 && + sfd__h501547[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h501528) ; - assign _theResult___exp__h511834 = - sfd__h511197[53] ? - ((_theResult___fst_exp__h511105 == 11'd2046) ? + _theResult___fst_exp__h501529) ; + assign _theResult___exp__h511835 = + sfd__h511198[53] ? + ((_theResult___fst_exp__h511106 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520813) : - ((_theResult___fst_exp__h511105 == 11'd0 && - sfd__h511197[53:52] == 2'b01) ? + din_inc___2_exp__h520814) : + ((_theResult___fst_exp__h511106 == 11'd0 && + sfd__h511198[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h511105) ; - assign _theResult___exp__h520618 = - sfd__h519957[53] ? - ((_theResult___fst_exp__h519938 == 11'd2046) ? + _theResult___fst_exp__h511106) ; + assign _theResult___exp__h520619 = + sfd__h519958[53] ? + ((_theResult___fst_exp__h519939 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h520839) : - ((_theResult___fst_exp__h519938 == 11'd0 && - sfd__h519957[53:52] == 2'b01) ? + din_inc___2_exp__h520840) : + ((_theResult___fst_exp__h519939 == 11'd0 && + sfd__h519958[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h519938) ; - assign _theResult___exp__h541036 = - sfd__h540399[53] ? - ((_theResult___fst_exp__h540381 == 11'd2046) ? + _theResult___fst_exp__h519939) ; + assign _theResult___exp__h541037 = + sfd__h540400[53] ? + ((_theResult___fst_exp__h540382 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559631) : - ((_theResult___fst_exp__h540381 == 11'd0 && - sfd__h540399[53:52] == 2'b01) ? + din_inc___2_exp__h559632) : + ((_theResult___fst_exp__h540382 == 11'd0 && + sfd__h540400[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h540381) ; - assign _theResult___exp__h550687 = - sfd__h550050[53] ? - ((_theResult___fst_exp__h549958 == 11'd2046) ? + _theResult___fst_exp__h540382) ; + assign _theResult___exp__h550688 = + sfd__h550051[53] ? + ((_theResult___fst_exp__h549959 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559666) : - ((_theResult___fst_exp__h549958 == 11'd0 && - sfd__h550050[53:52] == 2'b01) ? + din_inc___2_exp__h559667) : + ((_theResult___fst_exp__h549959 == 11'd0 && + sfd__h550051[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h549958) ; - assign _theResult___exp__h559471 = - sfd__h558810[53] ? - ((_theResult___fst_exp__h558791 == 11'd2046) ? + _theResult___fst_exp__h549959) ; + assign _theResult___exp__h559472 = + sfd__h558811[53] ? + ((_theResult___fst_exp__h558792 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h559692) : - ((_theResult___fst_exp__h558791 == 11'd0 && - sfd__h558810[53:52] == 2'b01) ? + din_inc___2_exp__h559693) : + ((_theResult___fst_exp__h558792 == 11'd0 && + sfd__h558811[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h558791) ; - assign _theResult___exp__h580340 = - sfd__h579703[53] ? - ((_theResult___fst_exp__h579685 == 11'd2046) ? + _theResult___fst_exp__h558792) ; + assign _theResult___exp__h580341 = + sfd__h579704[53] ? + ((_theResult___fst_exp__h579686 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598935) : - ((_theResult___fst_exp__h579685 == 11'd0 && - sfd__h579703[53:52] == 2'b01) ? + din_inc___2_exp__h598936) : + ((_theResult___fst_exp__h579686 == 11'd0 && + sfd__h579704[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h579685) ; - assign _theResult___exp__h589991 = - sfd__h589354[53] ? - ((_theResult___fst_exp__h589262 == 11'd2046) ? + _theResult___fst_exp__h579686) ; + assign _theResult___exp__h589992 = + sfd__h589355[53] ? + ((_theResult___fst_exp__h589263 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598970) : - ((_theResult___fst_exp__h589262 == 11'd0 && - sfd__h589354[53:52] == 2'b01) ? + din_inc___2_exp__h598971) : + ((_theResult___fst_exp__h589263 == 11'd0 && + sfd__h589355[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h589262) ; - assign _theResult___exp__h598775 = - sfd__h598114[53] ? - ((_theResult___fst_exp__h598095 == 11'd2046) ? + _theResult___fst_exp__h589263) ; + assign _theResult___exp__h598776 = + sfd__h598115[53] ? + ((_theResult___fst_exp__h598096 == 11'd2046) ? 11'd2047 : - din_inc___2_exp__h598996) : - ((_theResult___fst_exp__h598095 == 11'd0 && - sfd__h598114[53:52] == 2'b01) ? + din_inc___2_exp__h598997) : + ((_theResult___fst_exp__h598096 == 11'd0 && + sfd__h598115[53:52] == 2'b01) ? 11'd1 : - _theResult___fst_exp__h598095) ; - assign _theResult___fst__h603370 = - a__h602948[63] ? a___1__h603375 : a__h602948 ; - assign _theResult___fst_exp__h354196 = - _theResult____h346085[56] ? + _theResult___fst_exp__h598096) ; + assign _theResult___fst__h603371 = + a__h602949[63] ? a___1__h603376 : a__h602949 ; + assign _theResult___fst_exp__h354197 = + _theResult____h346086[56] ? 8'd2 : - _theResult___fst_exp__h354270 ; - assign _theResult___fst_exp__h354261 = + _theResult___fst_exp__h354271 ; + assign _theResult___fst_exp__h354262 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 } ; - assign _theResult___fst_exp__h354267 = - (!_theResult____h346085[56] && !_theResult____h346085[55] && - !_theResult____h346085[54] && - !_theResult____h346085[53] && - !_theResult____h346085[52] && - !_theResult____h346085[51] && - !_theResult____h346085[50] && - !_theResult____h346085[49] && - !_theResult____h346085[48] && - !_theResult____h346085[47] && - !_theResult____h346085[46] && - !_theResult____h346085[45] && - !_theResult____h346085[44] && - !_theResult____h346085[43] && - !_theResult____h346085[42] && - !_theResult____h346085[41] && - !_theResult____h346085[40] && - !_theResult____h346085[39] && - !_theResult____h346085[38] && - !_theResult____h346085[37] && - !_theResult____h346085[36] && - !_theResult____h346085[35] && - !_theResult____h346085[34] && - !_theResult____h346085[33] && - !_theResult____h346085[32] && - !_theResult____h346085[31] && - !_theResult____h346085[30] && - !_theResult____h346085[29] && - !_theResult____h346085[28] && - !_theResult____h346085[27] && - !_theResult____h346085[26] && - !_theResult____h346085[25] && - !_theResult____h346085[24] && - !_theResult____h346085[23] && - !_theResult____h346085[22] && - !_theResult____h346085[21] && - !_theResult____h346085[20] && - !_theResult____h346085[19] && - !_theResult____h346085[18] && - !_theResult____h346085[17] && - !_theResult____h346085[16] && - !_theResult____h346085[15] && - !_theResult____h346085[14] && - !_theResult____h346085[13] && - !_theResult____h346085[12] && - !_theResult____h346085[11] && - !_theResult____h346085[10] && - !_theResult____h346085[9] && - !_theResult____h346085[8] && - !_theResult____h346085[7] && - !_theResult____h346085[6] && - !_theResult____h346085[5] && - !_theResult____h346085[4] && - !_theResult____h346085[3] && - !_theResult____h346085[2] && - !_theResult____h346085[1] && - !_theResult____h346085[0] || + assign _theResult___fst_exp__h354268 = + (!_theResult____h346086[56] && !_theResult____h346086[55] && + !_theResult____h346086[54] && + !_theResult____h346086[53] && + !_theResult____h346086[52] && + !_theResult____h346086[51] && + !_theResult____h346086[50] && + !_theResult____h346086[49] && + !_theResult____h346086[48] && + !_theResult____h346086[47] && + !_theResult____h346086[46] && + !_theResult____h346086[45] && + !_theResult____h346086[44] && + !_theResult____h346086[43] && + !_theResult____h346086[42] && + !_theResult____h346086[41] && + !_theResult____h346086[40] && + !_theResult____h346086[39] && + !_theResult____h346086[38] && + !_theResult____h346086[37] && + !_theResult____h346086[36] && + !_theResult____h346086[35] && + !_theResult____h346086[34] && + !_theResult____h346086[33] && + !_theResult____h346086[32] && + !_theResult____h346086[31] && + !_theResult____h346086[30] && + !_theResult____h346086[29] && + !_theResult____h346086[28] && + !_theResult____h346086[27] && + !_theResult____h346086[26] && + !_theResult____h346086[25] && + !_theResult____h346086[24] && + !_theResult____h346086[23] && + !_theResult____h346086[22] && + !_theResult____h346086[21] && + !_theResult____h346086[20] && + !_theResult____h346086[19] && + !_theResult____h346086[18] && + !_theResult____h346086[17] && + !_theResult____h346086[16] && + !_theResult____h346086[15] && + !_theResult____h346086[14] && + !_theResult____h346086[13] && + !_theResult____h346086[12] && + !_theResult____h346086[11] && + !_theResult____h346086[10] && + !_theResult____h346086[9] && + !_theResult____h346086[8] && + !_theResult____h346086[7] && + !_theResult____h346086[6] && + !_theResult____h346086[5] && + !_theResult____h346086[4] && + !_theResult____h346086[3] && + !_theResult____h346086[2] && + !_theResult____h346086[1] && + !_theResult____h346086[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d4249) ? 8'd0 : - _theResult___fst_exp__h354261 ; - assign _theResult___fst_exp__h354270 = - (!_theResult____h346085[56] && _theResult____h346085[55]) ? + _theResult___fst_exp__h354262 ; + assign _theResult___fst_exp__h354271 = + (!_theResult____h346086[56] && _theResult____h346086[55]) ? 8'd1 : - _theResult___fst_exp__h354267 ; - assign _theResult___fst_exp__h354793 = - (_theResult___fst_exp__h354196 == 8'd255) ? - _theResult___fst_exp__h354196 : - _theResult___fst_exp__h354790 ; - assign _theResult___fst_exp__h362843 = + _theResult___fst_exp__h354268 ; + assign _theResult___fst_exp__h354794 = + (_theResult___fst_exp__h354197 == 8'd255) ? + _theResult___fst_exp__h354197 : + _theResult___fst_exp__h354791 ; + assign _theResult___fst_exp__h362844 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 } ; - assign _theResult___fst_exp__h362849 = + assign _theResult___fst_exp__h362850 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4480) ? 8'd0 : - _theResult___fst_exp__h362843 ; - assign _theResult___fst_exp__h362852 = + _theResult___fst_exp__h362844 ; + assign _theResult___fst_exp__h362853 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h362849 : + _theResult___fst_exp__h362850 : 8'd129 ; - assign _theResult___fst_exp__h363375 = - (_theResult___fst_exp__h362852 == 8'd255) ? - _theResult___fst_exp__h362852 : - _theResult___fst_exp__h363372 ; - assign _theResult___fst_exp__h371962 = - _theResult____h363724[56] ? + assign _theResult___fst_exp__h363376 = + (_theResult___fst_exp__h362853 == 8'd255) ? + _theResult___fst_exp__h362853 : + _theResult___fst_exp__h363373 ; + assign _theResult___fst_exp__h371963 = + _theResult____h363725[56] ? 8'd2 : - _theResult___fst_exp__h372036 ; - assign _theResult___fst_exp__h372027 = + _theResult___fst_exp__h372037 ; + assign _theResult___fst_exp__h372028 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 } ; - assign _theResult___fst_exp__h372033 = - (!_theResult____h363724[56] && !_theResult____h363724[55] && - !_theResult____h363724[54] && - !_theResult____h363724[53] && - !_theResult____h363724[52] && - !_theResult____h363724[51] && - !_theResult____h363724[50] && - !_theResult____h363724[49] && - !_theResult____h363724[48] && - !_theResult____h363724[47] && - !_theResult____h363724[46] && - !_theResult____h363724[45] && - !_theResult____h363724[44] && - !_theResult____h363724[43] && - !_theResult____h363724[42] && - !_theResult____h363724[41] && - !_theResult____h363724[40] && - !_theResult____h363724[39] && - !_theResult____h363724[38] && - !_theResult____h363724[37] && - !_theResult____h363724[36] && - !_theResult____h363724[35] && - !_theResult____h363724[34] && - !_theResult____h363724[33] && - !_theResult____h363724[32] && - !_theResult____h363724[31] && - !_theResult____h363724[30] && - !_theResult____h363724[29] && - !_theResult____h363724[28] && - !_theResult____h363724[27] && - !_theResult____h363724[26] && - !_theResult____h363724[25] && - !_theResult____h363724[24] && - !_theResult____h363724[23] && - !_theResult____h363724[22] && - !_theResult____h363724[21] && - !_theResult____h363724[20] && - !_theResult____h363724[19] && - !_theResult____h363724[18] && - !_theResult____h363724[17] && - !_theResult____h363724[16] && - !_theResult____h363724[15] && - !_theResult____h363724[14] && - !_theResult____h363724[13] && - !_theResult____h363724[12] && - !_theResult____h363724[11] && - !_theResult____h363724[10] && - !_theResult____h363724[9] && - !_theResult____h363724[8] && - !_theResult____h363724[7] && - !_theResult____h363724[6] && - !_theResult____h363724[5] && - !_theResult____h363724[4] && - !_theResult____h363724[3] && - !_theResult____h363724[2] && - !_theResult____h363724[1] && - !_theResult____h363724[0] || + assign _theResult___fst_exp__h372034 = + (!_theResult____h363725[56] && !_theResult____h363725[55] && + !_theResult____h363725[54] && + !_theResult____h363725[53] && + !_theResult____h363725[52] && + !_theResult____h363725[51] && + !_theResult____h363725[50] && + !_theResult____h363725[49] && + !_theResult____h363725[48] && + !_theResult____h363725[47] && + !_theResult____h363725[46] && + !_theResult____h363725[45] && + !_theResult____h363725[44] && + !_theResult____h363725[43] && + !_theResult____h363725[42] && + !_theResult____h363725[41] && + !_theResult____h363725[40] && + !_theResult____h363725[39] && + !_theResult____h363725[38] && + !_theResult____h363725[37] && + !_theResult____h363725[36] && + !_theResult____h363725[35] && + !_theResult____h363725[34] && + !_theResult____h363725[33] && + !_theResult____h363725[32] && + !_theResult____h363725[31] && + !_theResult____h363725[30] && + !_theResult____h363725[29] && + !_theResult____h363725[28] && + !_theResult____h363725[27] && + !_theResult____h363725[26] && + !_theResult____h363725[25] && + !_theResult____h363725[24] && + !_theResult____h363725[23] && + !_theResult____h363725[22] && + !_theResult____h363725[21] && + !_theResult____h363725[20] && + !_theResult____h363725[19] && + !_theResult____h363725[18] && + !_theResult____h363725[17] && + !_theResult____h363725[16] && + !_theResult____h363725[15] && + !_theResult____h363725[14] && + !_theResult____h363725[13] && + !_theResult____h363725[12] && + !_theResult____h363725[11] && + !_theResult____h363725[10] && + !_theResult____h363725[9] && + !_theResult____h363725[8] && + !_theResult____h363725[7] && + !_theResult____h363725[6] && + !_theResult____h363725[5] && + !_theResult____h363725[4] && + !_theResult____h363725[3] && + !_theResult____h363725[2] && + !_theResult____h363725[1] && + !_theResult____h363725[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d4800) ? 8'd0 : - _theResult___fst_exp__h372027 ; - assign _theResult___fst_exp__h372036 = - (!_theResult____h363724[56] && _theResult____h363724[55]) ? + _theResult___fst_exp__h372028 ; + assign _theResult___fst_exp__h372037 = + (!_theResult____h363725[56] && _theResult____h363725[55]) ? 8'd1 : - _theResult___fst_exp__h372033 ; - assign _theResult___fst_exp__h372559 = - (_theResult___fst_exp__h371962 == 8'd255) ? - _theResult___fst_exp__h371962 : - _theResult___fst_exp__h372556 ; - assign _theResult___fst_exp__h380599 = + _theResult___fst_exp__h372034 ; + assign _theResult___fst_exp__h372560 = + (_theResult___fst_exp__h371963 == 8'd255) ? + _theResult___fst_exp__h371963 : + _theResult___fst_exp__h372557 ; + assign _theResult___fst_exp__h380600 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] ; - assign _theResult___fst_exp__h380638 = + assign _theResult___fst_exp__h380639 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC__q37[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 } ; - assign _theResult___fst_exp__h380644 = + assign _theResult___fst_exp__h380645 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d4873) ? 8'd0 : - _theResult___fst_exp__h380638 ; - assign _theResult___fst_exp__h380647 = + _theResult___fst_exp__h380639 ; + assign _theResult___fst_exp__h380648 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h380644 : - _theResult___fst_exp__h380599 ; - assign _theResult___fst_exp__h381195 = - (_theResult___fst_exp__h380647 == 8'd255) ? - _theResult___fst_exp__h380647 : - _theResult___fst_exp__h381192 ; - assign _theResult___fst_exp__h381204 = + _theResult___fst_exp__h380645 : + _theResult___fst_exp__h380600 ; + assign _theResult___fst_exp__h381196 = + (_theResult___fst_exp__h380648 == 8'd255) ? + _theResult___fst_exp__h380648 : + _theResult___fst_exp__h381193 ; + assign _theResult___fst_exp__h381205 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 ? - _theResult___snd_fst_exp__h363378 : - _theResult___fst_exp__h346067) : + _theResult___snd_fst_exp__h363379 : + _theResult___fst_exp__h346068) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4552 ? - _theResult___snd_fst_exp__h381198 : - _theResult___fst_exp__h346067) ; - assign _theResult___fst_exp__h381207 = + _theResult___snd_fst_exp__h381199 : + _theResult___fst_exp__h346068) ; + assign _theResult___fst_exp__h381208 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h381204 ; - assign _theResult___fst_exp__h399893 = - _theResult____h391784[56] ? + _theResult___fst_exp__h381205 ; + assign _theResult___fst_exp__h399894 = + _theResult____h391785[56] ? 8'd2 : - _theResult___fst_exp__h399967 ; - assign _theResult___fst_exp__h399958 = + _theResult___fst_exp__h399968 ; + assign _theResult___fst_exp__h399959 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 } ; - assign _theResult___fst_exp__h399964 = - (!_theResult____h391784[56] && !_theResult____h391784[55] && - !_theResult____h391784[54] && - !_theResult____h391784[53] && - !_theResult____h391784[52] && - !_theResult____h391784[51] && - !_theResult____h391784[50] && - !_theResult____h391784[49] && - !_theResult____h391784[48] && - !_theResult____h391784[47] && - !_theResult____h391784[46] && - !_theResult____h391784[45] && - !_theResult____h391784[44] && - !_theResult____h391784[43] && - !_theResult____h391784[42] && - !_theResult____h391784[41] && - !_theResult____h391784[40] && - !_theResult____h391784[39] && - !_theResult____h391784[38] && - !_theResult____h391784[37] && - !_theResult____h391784[36] && - !_theResult____h391784[35] && - !_theResult____h391784[34] && - !_theResult____h391784[33] && - !_theResult____h391784[32] && - !_theResult____h391784[31] && - !_theResult____h391784[30] && - !_theResult____h391784[29] && - !_theResult____h391784[28] && - !_theResult____h391784[27] && - !_theResult____h391784[26] && - !_theResult____h391784[25] && - !_theResult____h391784[24] && - !_theResult____h391784[23] && - !_theResult____h391784[22] && - !_theResult____h391784[21] && - !_theResult____h391784[20] && - !_theResult____h391784[19] && - !_theResult____h391784[18] && - !_theResult____h391784[17] && - !_theResult____h391784[16] && - !_theResult____h391784[15] && - !_theResult____h391784[14] && - !_theResult____h391784[13] && - !_theResult____h391784[12] && - !_theResult____h391784[11] && - !_theResult____h391784[10] && - !_theResult____h391784[9] && - !_theResult____h391784[8] && - !_theResult____h391784[7] && - !_theResult____h391784[6] && - !_theResult____h391784[5] && - !_theResult____h391784[4] && - !_theResult____h391784[3] && - !_theResult____h391784[2] && - !_theResult____h391784[1] && - !_theResult____h391784[0] || + assign _theResult___fst_exp__h399965 = + (!_theResult____h391785[56] && !_theResult____h391785[55] && + !_theResult____h391785[54] && + !_theResult____h391785[53] && + !_theResult____h391785[52] && + !_theResult____h391785[51] && + !_theResult____h391785[50] && + !_theResult____h391785[49] && + !_theResult____h391785[48] && + !_theResult____h391785[47] && + !_theResult____h391785[46] && + !_theResult____h391785[45] && + !_theResult____h391785[44] && + !_theResult____h391785[43] && + !_theResult____h391785[42] && + !_theResult____h391785[41] && + !_theResult____h391785[40] && + !_theResult____h391785[39] && + !_theResult____h391785[38] && + !_theResult____h391785[37] && + !_theResult____h391785[36] && + !_theResult____h391785[35] && + !_theResult____h391785[34] && + !_theResult____h391785[33] && + !_theResult____h391785[32] && + !_theResult____h391785[31] && + !_theResult____h391785[30] && + !_theResult____h391785[29] && + !_theResult____h391785[28] && + !_theResult____h391785[27] && + !_theResult____h391785[26] && + !_theResult____h391785[25] && + !_theResult____h391785[24] && + !_theResult____h391785[23] && + !_theResult____h391785[22] && + !_theResult____h391785[21] && + !_theResult____h391785[20] && + !_theResult____h391785[19] && + !_theResult____h391785[18] && + !_theResult____h391785[17] && + !_theResult____h391785[16] && + !_theResult____h391785[15] && + !_theResult____h391785[14] && + !_theResult____h391785[13] && + !_theResult____h391785[12] && + !_theResult____h391785[11] && + !_theResult____h391785[10] && + !_theResult____h391785[9] && + !_theResult____h391785[8] && + !_theResult____h391785[7] && + !_theResult____h391785[6] && + !_theResult____h391785[5] && + !_theResult____h391785[4] && + !_theResult____h391785[3] && + !_theResult____h391785[2] && + !_theResult____h391785[1] && + !_theResult____h391785[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d5641) ? 8'd0 : - _theResult___fst_exp__h399958 ; - assign _theResult___fst_exp__h399967 = - (!_theResult____h391784[56] && _theResult____h391784[55]) ? + _theResult___fst_exp__h399959 ; + assign _theResult___fst_exp__h399968 = + (!_theResult____h391785[56] && _theResult____h391785[55]) ? 8'd1 : - _theResult___fst_exp__h399964 ; - assign _theResult___fst_exp__h400490 = - (_theResult___fst_exp__h399893 == 8'd255) ? - _theResult___fst_exp__h399893 : - _theResult___fst_exp__h400487 ; - assign _theResult___fst_exp__h408540 = + _theResult___fst_exp__h399965 ; + assign _theResult___fst_exp__h400491 = + (_theResult___fst_exp__h399894 == 8'd255) ? + _theResult___fst_exp__h399894 : + _theResult___fst_exp__h400488 ; + assign _theResult___fst_exp__h408541 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ; - assign _theResult___fst_exp__h408546 = + assign _theResult___fst_exp__h408547 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d5872) ? 8'd0 : - _theResult___fst_exp__h408540 ; - assign _theResult___fst_exp__h408549 = + _theResult___fst_exp__h408541 ; + assign _theResult___fst_exp__h408550 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h408546 : + _theResult___fst_exp__h408547 : 8'd129 ; - assign _theResult___fst_exp__h409072 = - (_theResult___fst_exp__h408549 == 8'd255) ? - _theResult___fst_exp__h408549 : - _theResult___fst_exp__h409069 ; - assign _theResult___fst_exp__h417659 = - _theResult____h409421[56] ? + assign _theResult___fst_exp__h409073 = + (_theResult___fst_exp__h408550 == 8'd255) ? + _theResult___fst_exp__h408550 : + _theResult___fst_exp__h409070 ; + assign _theResult___fst_exp__h417660 = + _theResult____h409422[56] ? 8'd2 : - _theResult___fst_exp__h417733 ; - assign _theResult___fst_exp__h417724 = + _theResult___fst_exp__h417734 ; + assign _theResult___fst_exp__h417725 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 } ; - assign _theResult___fst_exp__h417730 = - (!_theResult____h409421[56] && !_theResult____h409421[55] && - !_theResult____h409421[54] && - !_theResult____h409421[53] && - !_theResult____h409421[52] && - !_theResult____h409421[51] && - !_theResult____h409421[50] && - !_theResult____h409421[49] && - !_theResult____h409421[48] && - !_theResult____h409421[47] && - !_theResult____h409421[46] && - !_theResult____h409421[45] && - !_theResult____h409421[44] && - !_theResult____h409421[43] && - !_theResult____h409421[42] && - !_theResult____h409421[41] && - !_theResult____h409421[40] && - !_theResult____h409421[39] && - !_theResult____h409421[38] && - !_theResult____h409421[37] && - !_theResult____h409421[36] && - !_theResult____h409421[35] && - !_theResult____h409421[34] && - !_theResult____h409421[33] && - !_theResult____h409421[32] && - !_theResult____h409421[31] && - !_theResult____h409421[30] && - !_theResult____h409421[29] && - !_theResult____h409421[28] && - !_theResult____h409421[27] && - !_theResult____h409421[26] && - !_theResult____h409421[25] && - !_theResult____h409421[24] && - !_theResult____h409421[23] && - !_theResult____h409421[22] && - !_theResult____h409421[21] && - !_theResult____h409421[20] && - !_theResult____h409421[19] && - !_theResult____h409421[18] && - !_theResult____h409421[17] && - !_theResult____h409421[16] && - !_theResult____h409421[15] && - !_theResult____h409421[14] && - !_theResult____h409421[13] && - !_theResult____h409421[12] && - !_theResult____h409421[11] && - !_theResult____h409421[10] && - !_theResult____h409421[9] && - !_theResult____h409421[8] && - !_theResult____h409421[7] && - !_theResult____h409421[6] && - !_theResult____h409421[5] && - !_theResult____h409421[4] && - !_theResult____h409421[3] && - !_theResult____h409421[2] && - !_theResult____h409421[1] && - !_theResult____h409421[0] || + assign _theResult___fst_exp__h417731 = + (!_theResult____h409422[56] && !_theResult____h409422[55] && + !_theResult____h409422[54] && + !_theResult____h409422[53] && + !_theResult____h409422[52] && + !_theResult____h409422[51] && + !_theResult____h409422[50] && + !_theResult____h409422[49] && + !_theResult____h409422[48] && + !_theResult____h409422[47] && + !_theResult____h409422[46] && + !_theResult____h409422[45] && + !_theResult____h409422[44] && + !_theResult____h409422[43] && + !_theResult____h409422[42] && + !_theResult____h409422[41] && + !_theResult____h409422[40] && + !_theResult____h409422[39] && + !_theResult____h409422[38] && + !_theResult____h409422[37] && + !_theResult____h409422[36] && + !_theResult____h409422[35] && + !_theResult____h409422[34] && + !_theResult____h409422[33] && + !_theResult____h409422[32] && + !_theResult____h409422[31] && + !_theResult____h409422[30] && + !_theResult____h409422[29] && + !_theResult____h409422[28] && + !_theResult____h409422[27] && + !_theResult____h409422[26] && + !_theResult____h409422[25] && + !_theResult____h409422[24] && + !_theResult____h409422[23] && + !_theResult____h409422[22] && + !_theResult____h409422[21] && + !_theResult____h409422[20] && + !_theResult____h409422[19] && + !_theResult____h409422[18] && + !_theResult____h409422[17] && + !_theResult____h409422[16] && + !_theResult____h409422[15] && + !_theResult____h409422[14] && + !_theResult____h409422[13] && + !_theResult____h409422[12] && + !_theResult____h409422[11] && + !_theResult____h409422[10] && + !_theResult____h409422[9] && + !_theResult____h409422[8] && + !_theResult____h409422[7] && + !_theResult____h409422[6] && + !_theResult____h409422[5] && + !_theResult____h409422[4] && + !_theResult____h409422[3] && + !_theResult____h409422[2] && + !_theResult____h409422[1] && + !_theResult____h409422[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d6192) ? 8'd0 : - _theResult___fst_exp__h417724 ; - assign _theResult___fst_exp__h417733 = - (!_theResult____h409421[56] && _theResult____h409421[55]) ? + _theResult___fst_exp__h417725 ; + assign _theResult___fst_exp__h417734 = + (!_theResult____h409422[56] && _theResult____h409422[55]) ? 8'd1 : - _theResult___fst_exp__h417730 ; - assign _theResult___fst_exp__h418256 = - (_theResult___fst_exp__h417659 == 8'd255) ? - _theResult___fst_exp__h417659 : - _theResult___fst_exp__h418253 ; - assign _theResult___fst_exp__h426296 = + _theResult___fst_exp__h417731 ; + assign _theResult___fst_exp__h418257 = + (_theResult___fst_exp__h417660 == 8'd255) ? + _theResult___fst_exp__h417660 : + _theResult___fst_exp__h418254 ; + assign _theResult___fst_exp__h426297 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] ; - assign _theResult___fst_exp__h426335 = + assign _theResult___fst_exp__h426336 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC__q72[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 } ; - assign _theResult___fst_exp__h426341 = + assign _theResult___fst_exp__h426342 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d6265) ? 8'd0 : - _theResult___fst_exp__h426335 ; - assign _theResult___fst_exp__h426344 = + _theResult___fst_exp__h426336 ; + assign _theResult___fst_exp__h426345 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h426341 : - _theResult___fst_exp__h426296 ; - assign _theResult___fst_exp__h426892 = - (_theResult___fst_exp__h426344 == 8'd255) ? - _theResult___fst_exp__h426344 : - _theResult___fst_exp__h426889 ; - assign _theResult___fst_exp__h426901 = + _theResult___fst_exp__h426342 : + _theResult___fst_exp__h426297 ; + assign _theResult___fst_exp__h426893 = + (_theResult___fst_exp__h426345 == 8'd255) ? + _theResult___fst_exp__h426345 : + _theResult___fst_exp__h426890 ; + assign _theResult___fst_exp__h426902 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5404 ? - _theResult___snd_fst_exp__h409075 : - _theResult___fst_exp__h391766) : + _theResult___snd_fst_exp__h409076 : + _theResult___fst_exp__h391767) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5944 ? - _theResult___snd_fst_exp__h426895 : - _theResult___fst_exp__h391766) ; - assign _theResult___fst_exp__h426904 = + _theResult___snd_fst_exp__h426896 : + _theResult___fst_exp__h391767) ; + assign _theResult___fst_exp__h426905 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h426901 ; - assign _theResult___fst_exp__h445588 = - _theResult____h437479[56] ? + _theResult___fst_exp__h426902 ; + assign _theResult___fst_exp__h445589 = + _theResult____h437480[56] ? 8'd2 : - _theResult___fst_exp__h445662 ; - assign _theResult___fst_exp__h445653 = + _theResult___fst_exp__h445663 ; + assign _theResult___fst_exp__h445654 = 8'd0 - { 2'd0, IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 } ; - assign _theResult___fst_exp__h445659 = - (!_theResult____h437479[56] && !_theResult____h437479[55] && - !_theResult____h437479[54] && - !_theResult____h437479[53] && - !_theResult____h437479[52] && - !_theResult____h437479[51] && - !_theResult____h437479[50] && - !_theResult____h437479[49] && - !_theResult____h437479[48] && - !_theResult____h437479[47] && - !_theResult____h437479[46] && - !_theResult____h437479[45] && - !_theResult____h437479[44] && - !_theResult____h437479[43] && - !_theResult____h437479[42] && - !_theResult____h437479[41] && - !_theResult____h437479[40] && - !_theResult____h437479[39] && - !_theResult____h437479[38] && - !_theResult____h437479[37] && - !_theResult____h437479[36] && - !_theResult____h437479[35] && - !_theResult____h437479[34] && - !_theResult____h437479[33] && - !_theResult____h437479[32] && - !_theResult____h437479[31] && - !_theResult____h437479[30] && - !_theResult____h437479[29] && - !_theResult____h437479[28] && - !_theResult____h437479[27] && - !_theResult____h437479[26] && - !_theResult____h437479[25] && - !_theResult____h437479[24] && - !_theResult____h437479[23] && - !_theResult____h437479[22] && - !_theResult____h437479[21] && - !_theResult____h437479[20] && - !_theResult____h437479[19] && - !_theResult____h437479[18] && - !_theResult____h437479[17] && - !_theResult____h437479[16] && - !_theResult____h437479[15] && - !_theResult____h437479[14] && - !_theResult____h437479[13] && - !_theResult____h437479[12] && - !_theResult____h437479[11] && - !_theResult____h437479[10] && - !_theResult____h437479[9] && - !_theResult____h437479[8] && - !_theResult____h437479[7] && - !_theResult____h437479[6] && - !_theResult____h437479[5] && - !_theResult____h437479[4] && - !_theResult____h437479[3] && - !_theResult____h437479[2] && - !_theResult____h437479[1] && - !_theResult____h437479[0] || + assign _theResult___fst_exp__h445660 = + (!_theResult____h437480[56] && !_theResult____h437480[55] && + !_theResult____h437480[54] && + !_theResult____h437480[53] && + !_theResult____h437480[52] && + !_theResult____h437480[51] && + !_theResult____h437480[50] && + !_theResult____h437480[49] && + !_theResult____h437480[48] && + !_theResult____h437480[47] && + !_theResult____h437480[46] && + !_theResult____h437480[45] && + !_theResult____h437480[44] && + !_theResult____h437480[43] && + !_theResult____h437480[42] && + !_theResult____h437480[41] && + !_theResult____h437480[40] && + !_theResult____h437480[39] && + !_theResult____h437480[38] && + !_theResult____h437480[37] && + !_theResult____h437480[36] && + !_theResult____h437480[35] && + !_theResult____h437480[34] && + !_theResult____h437480[33] && + !_theResult____h437480[32] && + !_theResult____h437480[31] && + !_theResult____h437480[30] && + !_theResult____h437480[29] && + !_theResult____h437480[28] && + !_theResult____h437480[27] && + !_theResult____h437480[26] && + !_theResult____h437480[25] && + !_theResult____h437480[24] && + !_theResult____h437480[23] && + !_theResult____h437480[22] && + !_theResult____h437480[21] && + !_theResult____h437480[20] && + !_theResult____h437480[19] && + !_theResult____h437480[18] && + !_theResult____h437480[17] && + !_theResult____h437480[16] && + !_theResult____h437480[15] && + !_theResult____h437480[14] && + !_theResult____h437480[13] && + !_theResult____h437480[12] && + !_theResult____h437480[11] && + !_theResult____h437480[10] && + !_theResult____h437480[9] && + !_theResult____h437480[8] && + !_theResult____h437480[7] && + !_theResult____h437480[6] && + !_theResult____h437480[5] && + !_theResult____h437480[4] && + !_theResult____h437480[3] && + !_theResult____h437480[2] && + !_theResult____h437480[1] && + !_theResult____h437480[0] || !_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDi_ETC___d7033) ? 8'd0 : - _theResult___fst_exp__h445653 ; - assign _theResult___fst_exp__h445662 = - (!_theResult____h437479[56] && _theResult____h437479[55]) ? + _theResult___fst_exp__h445654 ; + assign _theResult___fst_exp__h445663 = + (!_theResult____h437480[56] && _theResult____h437480[55]) ? 8'd1 : - _theResult___fst_exp__h445659 ; - assign _theResult___fst_exp__h446185 = - (_theResult___fst_exp__h445588 == 8'd255) ? - _theResult___fst_exp__h445588 : - _theResult___fst_exp__h446182 ; - assign _theResult___fst_exp__h454235 = + _theResult___fst_exp__h445660 ; + assign _theResult___fst_exp__h446186 = + (_theResult___fst_exp__h445589 == 8'd255) ? + _theResult___fst_exp__h445589 : + _theResult___fst_exp__h446183 ; + assign _theResult___fst_exp__h454236 = 8'd129 - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ; - assign _theResult___fst_exp__h454241 = + assign _theResult___fst_exp__h454242 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7264) ? 8'd0 : - _theResult___fst_exp__h454235 ; - assign _theResult___fst_exp__h454244 = + _theResult___fst_exp__h454236 ; + assign _theResult___fst_exp__h454245 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h454241 : + _theResult___fst_exp__h454242 : 8'd129 ; - assign _theResult___fst_exp__h454767 = - (_theResult___fst_exp__h454244 == 8'd255) ? - _theResult___fst_exp__h454244 : - _theResult___fst_exp__h454764 ; - assign _theResult___fst_exp__h463354 = - _theResult____h455116[56] ? + assign _theResult___fst_exp__h454768 = + (_theResult___fst_exp__h454245 == 8'd255) ? + _theResult___fst_exp__h454245 : + _theResult___fst_exp__h454765 ; + assign _theResult___fst_exp__h463355 = + _theResult____h455117[56] ? 8'd2 : - _theResult___fst_exp__h463428 ; - assign _theResult___fst_exp__h463419 = + _theResult___fst_exp__h463429 ; + assign _theResult___fst_exp__h463420 = 8'd0 - { 2'd0, IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 } ; - assign _theResult___fst_exp__h463425 = - (!_theResult____h455116[56] && !_theResult____h455116[55] && - !_theResult____h455116[54] && - !_theResult____h455116[53] && - !_theResult____h455116[52] && - !_theResult____h455116[51] && - !_theResult____h455116[50] && - !_theResult____h455116[49] && - !_theResult____h455116[48] && - !_theResult____h455116[47] && - !_theResult____h455116[46] && - !_theResult____h455116[45] && - !_theResult____h455116[44] && - !_theResult____h455116[43] && - !_theResult____h455116[42] && - !_theResult____h455116[41] && - !_theResult____h455116[40] && - !_theResult____h455116[39] && - !_theResult____h455116[38] && - !_theResult____h455116[37] && - !_theResult____h455116[36] && - !_theResult____h455116[35] && - !_theResult____h455116[34] && - !_theResult____h455116[33] && - !_theResult____h455116[32] && - !_theResult____h455116[31] && - !_theResult____h455116[30] && - !_theResult____h455116[29] && - !_theResult____h455116[28] && - !_theResult____h455116[27] && - !_theResult____h455116[26] && - !_theResult____h455116[25] && - !_theResult____h455116[24] && - !_theResult____h455116[23] && - !_theResult____h455116[22] && - !_theResult____h455116[21] && - !_theResult____h455116[20] && - !_theResult____h455116[19] && - !_theResult____h455116[18] && - !_theResult____h455116[17] && - !_theResult____h455116[16] && - !_theResult____h455116[15] && - !_theResult____h455116[14] && - !_theResult____h455116[13] && - !_theResult____h455116[12] && - !_theResult____h455116[11] && - !_theResult____h455116[10] && - !_theResult____h455116[9] && - !_theResult____h455116[8] && - !_theResult____h455116[7] && - !_theResult____h455116[6] && - !_theResult____h455116[5] && - !_theResult____h455116[4] && - !_theResult____h455116[3] && - !_theResult____h455116[2] && - !_theResult____h455116[1] && - !_theResult____h455116[0] || + assign _theResult___fst_exp__h463426 = + (!_theResult____h455117[56] && !_theResult____h455117[55] && + !_theResult____h455117[54] && + !_theResult____h455117[53] && + !_theResult____h455117[52] && + !_theResult____h455117[51] && + !_theResult____h455117[50] && + !_theResult____h455117[49] && + !_theResult____h455117[48] && + !_theResult____h455117[47] && + !_theResult____h455117[46] && + !_theResult____h455117[45] && + !_theResult____h455117[44] && + !_theResult____h455117[43] && + !_theResult____h455117[42] && + !_theResult____h455117[41] && + !_theResult____h455117[40] && + !_theResult____h455117[39] && + !_theResult____h455117[38] && + !_theResult____h455117[37] && + !_theResult____h455117[36] && + !_theResult____h455117[35] && + !_theResult____h455117[34] && + !_theResult____h455117[33] && + !_theResult____h455117[32] && + !_theResult____h455117[31] && + !_theResult____h455117[30] && + !_theResult____h455117[29] && + !_theResult____h455117[28] && + !_theResult____h455117[27] && + !_theResult____h455117[26] && + !_theResult____h455117[25] && + !_theResult____h455117[24] && + !_theResult____h455117[23] && + !_theResult____h455117[22] && + !_theResult____h455117[21] && + !_theResult____h455117[20] && + !_theResult____h455117[19] && + !_theResult____h455117[18] && + !_theResult____h455117[17] && + !_theResult____h455117[16] && + !_theResult____h455117[15] && + !_theResult____h455117[14] && + !_theResult____h455117[13] && + !_theResult____h455117[12] && + !_theResult____h455117[11] && + !_theResult____h455117[10] && + !_theResult____h455117[9] && + !_theResult____h455117[8] && + !_theResult____h455117[7] && + !_theResult____h455117[6] && + !_theResult____h455117[5] && + !_theResult____h455117[4] && + !_theResult____h455117[3] && + !_theResult____h455117[2] && + !_theResult____h455117[1] && + !_theResult____h455117[0] || !_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulD_ETC___d7584) ? 8'd0 : - _theResult___fst_exp__h463419 ; - assign _theResult___fst_exp__h463428 = - (!_theResult____h455116[56] && _theResult____h455116[55]) ? + _theResult___fst_exp__h463420 ; + assign _theResult___fst_exp__h463429 = + (!_theResult____h455117[56] && _theResult____h455117[55]) ? 8'd1 : - _theResult___fst_exp__h463425 ; - assign _theResult___fst_exp__h463951 = - (_theResult___fst_exp__h463354 == 8'd255) ? - _theResult___fst_exp__h463354 : - _theResult___fst_exp__h463948 ; - assign _theResult___fst_exp__h471991 = + _theResult___fst_exp__h463426 ; + assign _theResult___fst_exp__h463952 = + (_theResult___fst_exp__h463355 == 8'd255) ? + _theResult___fst_exp__h463355 : + _theResult___fst_exp__h463949 ; + assign _theResult___fst_exp__h471992 = (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] == 8'd0) ? 8'd1 : SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] ; - assign _theResult___fst_exp__h472030 = + assign _theResult___fst_exp__h472031 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC__q107[7:0] - { 2'd0, IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 } ; - assign _theResult___fst_exp__h472036 = + assign _theResult___fst_exp__h472037 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207 || !_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec_dou_ETC___d7657) ? 8'd0 : - _theResult___fst_exp__h472030 ; - assign _theResult___fst_exp__h472039 = + _theResult___fst_exp__h472031 ; + assign _theResult___fst_exp__h472040 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___fst_exp__h472036 : - _theResult___fst_exp__h471991 ; - assign _theResult___fst_exp__h472587 = - (_theResult___fst_exp__h472039 == 8'd255) ? - _theResult___fst_exp__h472039 : - _theResult___fst_exp__h472584 ; - assign _theResult___fst_exp__h472596 = + _theResult___fst_exp__h472037 : + _theResult___fst_exp__h471992 ; + assign _theResult___fst_exp__h472588 = + (_theResult___fst_exp__h472040 == 8'd255) ? + _theResult___fst_exp__h472040 : + _theResult___fst_exp__h472585 ; + assign _theResult___fst_exp__h472597 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6796 ? - _theResult___snd_fst_exp__h454770 : - _theResult___fst_exp__h437461) : + _theResult___snd_fst_exp__h454771 : + _theResult___fst_exp__h437462) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7336 ? - _theResult___snd_fst_exp__h472590 : - _theResult___fst_exp__h437461) ; - assign _theResult___fst_exp__h472599 = + _theResult___snd_fst_exp__h472591 : + _theResult___fst_exp__h437462) ; + assign _theResult___fst_exp__h472600 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 8'd0 : - _theResult___fst_exp__h472596 ; - assign _theResult___fst_exp__h486455 = + _theResult___fst_exp__h472597 ; + assign _theResult___fst_exp__h486456 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q14 ; - assign _theResult___fst_exp__h501519 = + assign _theResult___fst_exp__h501520 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ; - assign _theResult___fst_exp__h501525 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___fst_exp__h501526 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8585) ? 11'd0 : - _theResult___fst_exp__h501519 ; - assign _theResult___fst_exp__h501528 = - (f1_exp__h482140 == 8'd0) ? - _theResult___fst_exp__h501525 : + _theResult___fst_exp__h501520 ; + assign _theResult___fst_exp__h501529 = + (f1_exp__h482141 == 8'd0) ? + _theResult___fst_exp__h501526 : 11'd897 ; - assign _theResult___fst_exp__h502283 = + assign _theResult___fst_exp__h502284 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 : + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 ; - assign _theResult___fst_exp__h502286 = - (_theResult___fst_exp__h501528 == 11'd2047) ? - _theResult___fst_exp__h501528 : - _theResult___fst_exp__h502283 ; - assign _theResult___fst_exp__h511105 = - _theResult____h502869[56] ? + assign _theResult___fst_exp__h502287 = + (_theResult___fst_exp__h501529 == 11'd2047) ? + _theResult___fst_exp__h501529 : + _theResult___fst_exp__h502284 ; + assign _theResult___fst_exp__h511106 = + _theResult____h502870[56] ? 11'd2 : - _theResult___fst_exp__h511179 ; - assign _theResult___fst_exp__h511170 = + _theResult___fst_exp__h511180 ; + assign _theResult___fst_exp__h511171 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 } ; - assign _theResult___fst_exp__h511176 = - (!_theResult____h502869[56] && !_theResult____h502869[55] && - !_theResult____h502869[54] && - !_theResult____h502869[53] && - !_theResult____h502869[52] && - !_theResult____h502869[51] && - !_theResult____h502869[50] && - !_theResult____h502869[49] && - !_theResult____h502869[48] && - !_theResult____h502869[47] && - !_theResult____h502869[46] && - !_theResult____h502869[45] && - !_theResult____h502869[44] && - !_theResult____h502869[43] && - !_theResult____h502869[42] && - !_theResult____h502869[41] && - !_theResult____h502869[40] && - !_theResult____h502869[39] && - !_theResult____h502869[38] && - !_theResult____h502869[37] && - !_theResult____h502869[36] && - !_theResult____h502869[35] && - !_theResult____h502869[34] && - !_theResult____h502869[33] && - !_theResult____h502869[32] && - !_theResult____h502869[31] && - !_theResult____h502869[30] && - !_theResult____h502869[29] && - !_theResult____h502869[28] && - !_theResult____h502869[27] && - !_theResult____h502869[26] && - !_theResult____h502869[25] && - !_theResult____h502869[24] && - !_theResult____h502869[23] && - !_theResult____h502869[22] && - !_theResult____h502869[21] && - !_theResult____h502869[20] && - !_theResult____h502869[19] && - !_theResult____h502869[18] && - !_theResult____h502869[17] && - !_theResult____h502869[16] && - !_theResult____h502869[15] && - !_theResult____h502869[14] && - !_theResult____h502869[13] && - !_theResult____h502869[12] && - !_theResult____h502869[11] && - !_theResult____h502869[10] && - !_theResult____h502869[9] && - !_theResult____h502869[8] && - !_theResult____h502869[7] && - !_theResult____h502869[6] && - !_theResult____h502869[5] && - !_theResult____h502869[4] && - !_theResult____h502869[3] && - !_theResult____h502869[2] && - !_theResult____h502869[1] && - !_theResult____h502869[0] || + assign _theResult___fst_exp__h511177 = + (!_theResult____h502870[56] && !_theResult____h502870[55] && + !_theResult____h502870[54] && + !_theResult____h502870[53] && + !_theResult____h502870[52] && + !_theResult____h502870[51] && + !_theResult____h502870[50] && + !_theResult____h502870[49] && + !_theResult____h502870[48] && + !_theResult____h502870[47] && + !_theResult____h502870[46] && + !_theResult____h502870[45] && + !_theResult____h502870[44] && + !_theResult____h502870[43] && + !_theResult____h502870[42] && + !_theResult____h502870[41] && + !_theResult____h502870[40] && + !_theResult____h502870[39] && + !_theResult____h502870[38] && + !_theResult____h502870[37] && + !_theResult____h502870[36] && + !_theResult____h502870[35] && + !_theResult____h502870[34] && + !_theResult____h502870[33] && + !_theResult____h502870[32] && + !_theResult____h502870[31] && + !_theResult____h502870[30] && + !_theResult____h502870[29] && + !_theResult____h502870[28] && + !_theResult____h502870[27] && + !_theResult____h502870[26] && + !_theResult____h502870[25] && + !_theResult____h502870[24] && + !_theResult____h502870[23] && + !_theResult____h502870[22] && + !_theResult____h502870[21] && + !_theResult____h502870[20] && + !_theResult____h502870[19] && + !_theResult____h502870[18] && + !_theResult____h502870[17] && + !_theResult____h502870[16] && + !_theResult____h502870[15] && + !_theResult____h502870[14] && + !_theResult____h502870[13] && + !_theResult____h502870[12] && + !_theResult____h502870[11] && + !_theResult____h502870[10] && + !_theResult____h502870[9] && + !_theResult____h502870[8] && + !_theResult____h502870[7] && + !_theResult____h502870[6] && + !_theResult____h502870[5] && + !_theResult____h502870[4] && + !_theResult____h502870[3] && + !_theResult____h502870[2] && + !_theResult____h502870[1] && + !_theResult____h502870[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d8897) ? 11'd0 : - _theResult___fst_exp__h511170 ; - assign _theResult___fst_exp__h511179 = - (!_theResult____h502869[56] && _theResult____h502869[55]) ? + _theResult___fst_exp__h511171 ; + assign _theResult___fst_exp__h511180 = + (!_theResult____h502870[56] && _theResult____h502870[55]) ? 11'd1 : - _theResult___fst_exp__h511176 ; - assign _theResult___fst_exp__h511934 = + _theResult___fst_exp__h511177 ; + assign _theResult___fst_exp__h511935 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 : + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 ; - assign _theResult___fst_exp__h511937 = - (_theResult___fst_exp__h511105 == 11'd2047) ? - _theResult___fst_exp__h511105 : - _theResult___fst_exp__h511934 ; - assign _theResult___fst_exp__h519890 = + assign _theResult___fst_exp__h511938 = + (_theResult___fst_exp__h511106 == 11'd2047) ? + _theResult___fst_exp__h511106 : + _theResult___fst_exp__h511935 ; + assign _theResult___fst_exp__h519891 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] ; - assign _theResult___fst_exp__h519929 = + assign _theResult___fst_exp__h519930 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q137[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 } ; - assign _theResult___fst_exp__h519935 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___fst_exp__h519936 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d8947) ? 11'd0 : - _theResult___fst_exp__h519929 ; - assign _theResult___fst_exp__h519938 = - (f1_exp__h482140 == 8'd0) ? - _theResult___fst_exp__h519935 : - _theResult___fst_exp__h519890 ; - assign _theResult___fst_exp__h520718 = + _theResult___fst_exp__h519930 ; + assign _theResult___fst_exp__h519939 = + (f1_exp__h482141 == 8'd0) ? + _theResult___fst_exp__h519936 : + _theResult___fst_exp__h519891 ; + assign _theResult___fst_exp__h520719 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 : + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 ; - assign _theResult___fst_exp__h520721 = - (_theResult___fst_exp__h519938 == 11'd2047) ? - _theResult___fst_exp__h519938 : - _theResult___fst_exp__h520718 ; - assign _theResult___fst_exp__h520730 = - (f1_exp__h482140 == 8'd0) ? + assign _theResult___fst_exp__h520722 = + (_theResult___fst_exp__h519939 == 11'd2047) ? + _theResult___fst_exp__h519939 : + _theResult___fst_exp__h520719 ; + assign _theResult___fst_exp__h520731 = + (f1_exp__h482141 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 ? - _theResult___snd_fst_exp__h502289 : - _theResult___fst_exp__h486455) : + _theResult___snd_fst_exp__h502290 : + _theResult___fst_exp__h486456) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 ? - _theResult___snd_fst_exp__h520724 : - _theResult___fst_exp__h486455) ; - assign _theResult___fst_exp__h520733 = - (f1_exp__h482140 == 8'd0 && f1_sfd__h482141 == 23'd0) ? + _theResult___snd_fst_exp__h520725 : + _theResult___fst_exp__h486456) ; + assign _theResult___fst_exp__h520734 = + (f1_exp__h482141 == 8'd0 && f1_sfd__h482142 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h520730 ; - assign _theResult___fst_exp__h525308 = + _theResult___fst_exp__h520731 ; + assign _theResult___fst_exp__h525309 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q16 ; - assign _theResult___fst_exp__h540372 = + assign _theResult___fst_exp__h540373 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ; - assign _theResult___fst_exp__h540378 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___fst_exp__h540379 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10085) ? 11'd0 : - _theResult___fst_exp__h540372 ; - assign _theResult___fst_exp__h540381 = - (f2_exp__h521134 == 8'd0) ? - _theResult___fst_exp__h540378 : + _theResult___fst_exp__h540373 ; + assign _theResult___fst_exp__h540382 = + (f2_exp__h521135 == 8'd0) ? + _theResult___fst_exp__h540379 : 11'd897 ; - assign _theResult___fst_exp__h541136 = + assign _theResult___fst_exp__h541137 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 : + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 ; - assign _theResult___fst_exp__h541139 = - (_theResult___fst_exp__h540381 == 11'd2047) ? - _theResult___fst_exp__h540381 : - _theResult___fst_exp__h541136 ; - assign _theResult___fst_exp__h549958 = - _theResult____h541722[56] ? + assign _theResult___fst_exp__h541140 = + (_theResult___fst_exp__h540382 == 11'd2047) ? + _theResult___fst_exp__h540382 : + _theResult___fst_exp__h541137 ; + assign _theResult___fst_exp__h549959 = + _theResult____h541723[56] ? 11'd2 : - _theResult___fst_exp__h550032 ; - assign _theResult___fst_exp__h550023 = + _theResult___fst_exp__h550033 ; + assign _theResult___fst_exp__h550024 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 } ; - assign _theResult___fst_exp__h550029 = - (!_theResult____h541722[56] && !_theResult____h541722[55] && - !_theResult____h541722[54] && - !_theResult____h541722[53] && - !_theResult____h541722[52] && - !_theResult____h541722[51] && - !_theResult____h541722[50] && - !_theResult____h541722[49] && - !_theResult____h541722[48] && - !_theResult____h541722[47] && - !_theResult____h541722[46] && - !_theResult____h541722[45] && - !_theResult____h541722[44] && - !_theResult____h541722[43] && - !_theResult____h541722[42] && - !_theResult____h541722[41] && - !_theResult____h541722[40] && - !_theResult____h541722[39] && - !_theResult____h541722[38] && - !_theResult____h541722[37] && - !_theResult____h541722[36] && - !_theResult____h541722[35] && - !_theResult____h541722[34] && - !_theResult____h541722[33] && - !_theResult____h541722[32] && - !_theResult____h541722[31] && - !_theResult____h541722[30] && - !_theResult____h541722[29] && - !_theResult____h541722[28] && - !_theResult____h541722[27] && - !_theResult____h541722[26] && - !_theResult____h541722[25] && - !_theResult____h541722[24] && - !_theResult____h541722[23] && - !_theResult____h541722[22] && - !_theResult____h541722[21] && - !_theResult____h541722[20] && - !_theResult____h541722[19] && - !_theResult____h541722[18] && - !_theResult____h541722[17] && - !_theResult____h541722[16] && - !_theResult____h541722[15] && - !_theResult____h541722[14] && - !_theResult____h541722[13] && - !_theResult____h541722[12] && - !_theResult____h541722[11] && - !_theResult____h541722[10] && - !_theResult____h541722[9] && - !_theResult____h541722[8] && - !_theResult____h541722[7] && - !_theResult____h541722[6] && - !_theResult____h541722[5] && - !_theResult____h541722[4] && - !_theResult____h541722[3] && - !_theResult____h541722[2] && - !_theResult____h541722[1] && - !_theResult____h541722[0] || + assign _theResult___fst_exp__h550030 = + (!_theResult____h541723[56] && !_theResult____h541723[55] && + !_theResult____h541723[54] && + !_theResult____h541723[53] && + !_theResult____h541723[52] && + !_theResult____h541723[51] && + !_theResult____h541723[50] && + !_theResult____h541723[49] && + !_theResult____h541723[48] && + !_theResult____h541723[47] && + !_theResult____h541723[46] && + !_theResult____h541723[45] && + !_theResult____h541723[44] && + !_theResult____h541723[43] && + !_theResult____h541723[42] && + !_theResult____h541723[41] && + !_theResult____h541723[40] && + !_theResult____h541723[39] && + !_theResult____h541723[38] && + !_theResult____h541723[37] && + !_theResult____h541723[36] && + !_theResult____h541723[35] && + !_theResult____h541723[34] && + !_theResult____h541723[33] && + !_theResult____h541723[32] && + !_theResult____h541723[31] && + !_theResult____h541723[30] && + !_theResult____h541723[29] && + !_theResult____h541723[28] && + !_theResult____h541723[27] && + !_theResult____h541723[26] && + !_theResult____h541723[25] && + !_theResult____h541723[24] && + !_theResult____h541723[23] && + !_theResult____h541723[22] && + !_theResult____h541723[21] && + !_theResult____h541723[20] && + !_theResult____h541723[19] && + !_theResult____h541723[18] && + !_theResult____h541723[17] && + !_theResult____h541723[16] && + !_theResult____h541723[15] && + !_theResult____h541723[14] && + !_theResult____h541723[13] && + !_theResult____h541723[12] && + !_theResult____h541723[11] && + !_theResult____h541723[10] && + !_theResult____h541723[9] && + !_theResult____h541723[8] && + !_theResult____h541723[7] && + !_theResult____h541723[6] && + !_theResult____h541723[5] && + !_theResult____h541723[4] && + !_theResult____h541723[3] && + !_theResult____h541723[2] && + !_theResult____h541723[1] && + !_theResult____h541723[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d10382) ? 11'd0 : - _theResult___fst_exp__h550023 ; - assign _theResult___fst_exp__h550032 = - (!_theResult____h541722[56] && _theResult____h541722[55]) ? + _theResult___fst_exp__h550024 ; + assign _theResult___fst_exp__h550033 = + (!_theResult____h541723[56] && _theResult____h541723[55]) ? 11'd1 : - _theResult___fst_exp__h550029 ; - assign _theResult___fst_exp__h550787 = + _theResult___fst_exp__h550030 ; + assign _theResult___fst_exp__h550788 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 : + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 ; - assign _theResult___fst_exp__h550790 = - (_theResult___fst_exp__h549958 == 11'd2047) ? - _theResult___fst_exp__h549958 : - _theResult___fst_exp__h550787 ; - assign _theResult___fst_exp__h558743 = + assign _theResult___fst_exp__h550791 = + (_theResult___fst_exp__h549959 == 11'd2047) ? + _theResult___fst_exp__h549959 : + _theResult___fst_exp__h550788 ; + assign _theResult___fst_exp__h558744 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] ; - assign _theResult___fst_exp__h558782 = + assign _theResult___fst_exp__h558783 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q177[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 } ; - assign _theResult___fst_exp__h558788 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___fst_exp__h558789 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d10432) ? 11'd0 : - _theResult___fst_exp__h558782 ; - assign _theResult___fst_exp__h558791 = - (f2_exp__h521134 == 8'd0) ? - _theResult___fst_exp__h558788 : - _theResult___fst_exp__h558743 ; - assign _theResult___fst_exp__h559571 = + _theResult___fst_exp__h558783 ; + assign _theResult___fst_exp__h558792 = + (f2_exp__h521135 == 8'd0) ? + _theResult___fst_exp__h558789 : + _theResult___fst_exp__h558744 ; + assign _theResult___fst_exp__h559572 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 : + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 ; - assign _theResult___fst_exp__h559574 = - (_theResult___fst_exp__h558791 == 11'd2047) ? - _theResult___fst_exp__h558791 : - _theResult___fst_exp__h559571 ; - assign _theResult___fst_exp__h559583 = - (f2_exp__h521134 == 8'd0) ? + assign _theResult___fst_exp__h559575 = + (_theResult___fst_exp__h558792 == 11'd2047) ? + _theResult___fst_exp__h558792 : + _theResult___fst_exp__h559572 ; + assign _theResult___fst_exp__h559584 = + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? - _theResult___snd_fst_exp__h541142 : - _theResult___fst_exp__h525308) : + _theResult___snd_fst_exp__h541143 : + _theResult___fst_exp__h525309) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 ? - _theResult___snd_fst_exp__h559577 : - _theResult___fst_exp__h525308) ; - assign _theResult___fst_exp__h559586 = - (f2_exp__h521134 == 8'd0 && f2_sfd__h521135 == 23'd0) ? + _theResult___snd_fst_exp__h559578 : + _theResult___fst_exp__h525309) ; + assign _theResult___fst_exp__h559587 = + (f2_exp__h521135 == 8'd0 && f2_sfd__h521136 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h559583 ; - assign _theResult___fst_exp__h564612 = + _theResult___fst_exp__h559584 ; + assign _theResult___fst_exp__h564613 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 11'd2047 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q18 ; - assign _theResult___fst_exp__h579676 = + assign _theResult___fst_exp__h579677 = 11'd897 - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 } ; - assign _theResult___fst_exp__h579682 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___fst_exp__h579683 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9315) ? 11'd0 : - _theResult___fst_exp__h579676 ; - assign _theResult___fst_exp__h579685 = - (f3_exp__h560438 == 8'd0) ? - _theResult___fst_exp__h579682 : + _theResult___fst_exp__h579677 ; + assign _theResult___fst_exp__h579686 = + (f3_exp__h560439 == 8'd0) ? + _theResult___fst_exp__h579683 : 11'd897 ; - assign _theResult___fst_exp__h580440 = + assign _theResult___fst_exp__h580441 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 : + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 ; - assign _theResult___fst_exp__h580443 = - (_theResult___fst_exp__h579685 == 11'd2047) ? - _theResult___fst_exp__h579685 : - _theResult___fst_exp__h580440 ; - assign _theResult___fst_exp__h589262 = - _theResult____h581026[56] ? + assign _theResult___fst_exp__h580444 = + (_theResult___fst_exp__h579686 == 11'd2047) ? + _theResult___fst_exp__h579686 : + _theResult___fst_exp__h580441 ; + assign _theResult___fst_exp__h589263 = + _theResult____h581027[56] ? 11'd2 : - _theResult___fst_exp__h589336 ; - assign _theResult___fst_exp__h589327 = + _theResult___fst_exp__h589337 ; + assign _theResult___fst_exp__h589328 = 11'd0 - { 5'd0, IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 } ; - assign _theResult___fst_exp__h589333 = - (!_theResult____h581026[56] && !_theResult____h581026[55] && - !_theResult____h581026[54] && - !_theResult____h581026[53] && - !_theResult____h581026[52] && - !_theResult____h581026[51] && - !_theResult____h581026[50] && - !_theResult____h581026[49] && - !_theResult____h581026[48] && - !_theResult____h581026[47] && - !_theResult____h581026[46] && - !_theResult____h581026[45] && - !_theResult____h581026[44] && - !_theResult____h581026[43] && - !_theResult____h581026[42] && - !_theResult____h581026[41] && - !_theResult____h581026[40] && - !_theResult____h581026[39] && - !_theResult____h581026[38] && - !_theResult____h581026[37] && - !_theResult____h581026[36] && - !_theResult____h581026[35] && - !_theResult____h581026[34] && - !_theResult____h581026[33] && - !_theResult____h581026[32] && - !_theResult____h581026[31] && - !_theResult____h581026[30] && - !_theResult____h581026[29] && - !_theResult____h581026[28] && - !_theResult____h581026[27] && - !_theResult____h581026[26] && - !_theResult____h581026[25] && - !_theResult____h581026[24] && - !_theResult____h581026[23] && - !_theResult____h581026[22] && - !_theResult____h581026[21] && - !_theResult____h581026[20] && - !_theResult____h581026[19] && - !_theResult____h581026[18] && - !_theResult____h581026[17] && - !_theResult____h581026[16] && - !_theResult____h581026[15] && - !_theResult____h581026[14] && - !_theResult____h581026[13] && - !_theResult____h581026[12] && - !_theResult____h581026[11] && - !_theResult____h581026[10] && - !_theResult____h581026[9] && - !_theResult____h581026[8] && - !_theResult____h581026[7] && - !_theResult____h581026[6] && - !_theResult____h581026[5] && - !_theResult____h581026[4] && - !_theResult____h581026[3] && - !_theResult____h581026[2] && - !_theResult____h581026[1] && - !_theResult____h581026[0] || + assign _theResult___fst_exp__h589334 = + (!_theResult____h581027[56] && !_theResult____h581027[55] && + !_theResult____h581027[54] && + !_theResult____h581027[53] && + !_theResult____h581027[52] && + !_theResult____h581027[51] && + !_theResult____h581027[50] && + !_theResult____h581027[49] && + !_theResult____h581027[48] && + !_theResult____h581027[47] && + !_theResult____h581027[46] && + !_theResult____h581027[45] && + !_theResult____h581027[44] && + !_theResult____h581027[43] && + !_theResult____h581027[42] && + !_theResult____h581027[41] && + !_theResult____h581027[40] && + !_theResult____h581027[39] && + !_theResult____h581027[38] && + !_theResult____h581027[37] && + !_theResult____h581027[36] && + !_theResult____h581027[35] && + !_theResult____h581027[34] && + !_theResult____h581027[33] && + !_theResult____h581027[32] && + !_theResult____h581027[31] && + !_theResult____h581027[30] && + !_theResult____h581027[29] && + !_theResult____h581027[28] && + !_theResult____h581027[27] && + !_theResult____h581027[26] && + !_theResult____h581027[25] && + !_theResult____h581027[24] && + !_theResult____h581027[23] && + !_theResult____h581027[22] && + !_theResult____h581027[21] && + !_theResult____h581027[20] && + !_theResult____h581027[19] && + !_theResult____h581027[18] && + !_theResult____h581027[17] && + !_theResult____h581027[16] && + !_theResult____h581027[15] && + !_theResult____h581027[14] && + !_theResult____h581027[13] && + !_theResult____h581027[12] && + !_theResult____h581027[11] && + !_theResult____h581027[10] && + !_theResult____h581027[9] && + !_theResult____h581027[8] && + !_theResult____h581027[7] && + !_theResult____h581027[6] && + !_theResult____h581027[5] && + !_theResult____h581027[4] && + !_theResult____h581027[3] && + !_theResult____h581027[2] && + !_theResult____h581027[1] && + !_theResult____h581027[0] || !_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuM_ETC___d9612) ? 11'd0 : - _theResult___fst_exp__h589327 ; - assign _theResult___fst_exp__h589336 = - (!_theResult____h581026[56] && _theResult____h581026[55]) ? + _theResult___fst_exp__h589328 ; + assign _theResult___fst_exp__h589337 = + (!_theResult____h581027[56] && _theResult____h581027[55]) ? 11'd1 : - _theResult___fst_exp__h589333 ; - assign _theResult___fst_exp__h590091 = + _theResult___fst_exp__h589334 ; + assign _theResult___fst_exp__h590092 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 : + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 ; - assign _theResult___fst_exp__h590094 = - (_theResult___fst_exp__h589262 == 11'd2047) ? - _theResult___fst_exp__h589262 : - _theResult___fst_exp__h590091 ; - assign _theResult___fst_exp__h598047 = + assign _theResult___fst_exp__h590095 = + (_theResult___fst_exp__h589263 == 11'd2047) ? + _theResult___fst_exp__h589263 : + _theResult___fst_exp__h590092 ; + assign _theResult___fst_exp__h598048 = (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] == 11'd0) ? 11'd1 : SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] ; - assign _theResult___fst_exp__h598086 = + assign _theResult___fst_exp__h598087 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC__q154[10:0] - { 5'd0, IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 } ; - assign _theResult___fst_exp__h598092 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___fst_exp__h598093 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286 || !_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regToExe_ETC___d9662) ? 11'd0 : - _theResult___fst_exp__h598086 ; - assign _theResult___fst_exp__h598095 = - (f3_exp__h560438 == 8'd0) ? - _theResult___fst_exp__h598092 : - _theResult___fst_exp__h598047 ; - assign _theResult___fst_exp__h598875 = + _theResult___fst_exp__h598087 ; + assign _theResult___fst_exp__h598096 = + (f3_exp__h560439 == 8'd0) ? + _theResult___fst_exp__h598093 : + _theResult___fst_exp__h598048 ; + assign _theResult___fst_exp__h598876 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 : + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 ; - assign _theResult___fst_exp__h598878 = - (_theResult___fst_exp__h598095 == 11'd2047) ? - _theResult___fst_exp__h598095 : - _theResult___fst_exp__h598875 ; - assign _theResult___fst_exp__h598887 = - (f3_exp__h560438 == 8'd0) ? + assign _theResult___fst_exp__h598879 = + (_theResult___fst_exp__h598096 == 11'd2047) ? + _theResult___fst_exp__h598096 : + _theResult___fst_exp__h598876 ; + assign _theResult___fst_exp__h598888 = + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? - _theResult___snd_fst_exp__h580446 : - _theResult___fst_exp__h564612) : + _theResult___snd_fst_exp__h580447 : + _theResult___fst_exp__h564613) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 ? - _theResult___snd_fst_exp__h598881 : - _theResult___fst_exp__h564612) ; - assign _theResult___fst_exp__h598890 = - (f3_exp__h560438 == 8'd0 && f3_sfd__h560439 == 23'd0) ? + _theResult___snd_fst_exp__h598882 : + _theResult___fst_exp__h564613) ; + assign _theResult___fst_exp__h598891 = + (f3_exp__h560439 == 8'd0 && f3_sfd__h560440 == 23'd0) ? 11'd0 : - _theResult___fst_exp__h598887 ; - assign _theResult___fst_sfd__h354794 = - (_theResult___fst_exp__h354196 == 8'd255) ? - sfdin__h354190[56:34] : - _theResult___fst_sfd__h354791 ; - assign _theResult___fst_sfd__h363376 = - (_theResult___fst_exp__h362852 == 8'd255) ? - _theResult___snd__h362803[56:34] : - _theResult___fst_sfd__h363373 ; - assign _theResult___fst_sfd__h372560 = - (_theResult___fst_exp__h371962 == 8'd255) ? - sfdin__h371956[56:34] : - _theResult___fst_sfd__h372557 ; - assign _theResult___fst_sfd__h381196 = - (_theResult___fst_exp__h380647 == 8'd255) ? - _theResult___snd__h380593[56:34] : - _theResult___fst_sfd__h381193 ; - assign _theResult___fst_sfd__h381205 = + _theResult___fst_exp__h598888 ; + assign _theResult___fst_sfd__h354795 = + (_theResult___fst_exp__h354197 == 8'd255) ? + sfdin__h354191[56:34] : + _theResult___fst_sfd__h354792 ; + assign _theResult___fst_sfd__h363377 = + (_theResult___fst_exp__h362853 == 8'd255) ? + _theResult___snd__h362804[56:34] : + _theResult___fst_sfd__h363374 ; + assign _theResult___fst_sfd__h372561 = + (_theResult___fst_exp__h371963 == 8'd255) ? + sfdin__h371957[56:34] : + _theResult___fst_sfd__h372558 ; + assign _theResult___fst_sfd__h381197 = + (_theResult___fst_exp__h380648 == 8'd255) ? + _theResult___snd__h380594[56:34] : + _theResult___fst_sfd__h381194 ; + assign _theResult___fst_sfd__h381206 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4012 ? - _theResult___snd_fst_sfd__h363379 : - _theResult___fst_sfd__h346068) : + _theResult___snd_fst_sfd__h363380 : + _theResult___fst_sfd__h346069) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4552 ? - _theResult___snd_fst_sfd__h381199 : - _theResult___fst_sfd__h346068) ; - assign _theResult___fst_sfd__h381211 = + _theResult___snd_fst_sfd__h381200 : + _theResult___fst_sfd__h346069) ; + assign _theResult___fst_sfd__h381212 = ((coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == @@ -28203,33 +28203,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h381205 ; - assign _theResult___fst_sfd__h400491 = - (_theResult___fst_exp__h399893 == 8'd255) ? - sfdin__h399887[56:34] : - _theResult___fst_sfd__h400488 ; - assign _theResult___fst_sfd__h409073 = - (_theResult___fst_exp__h408549 == 8'd255) ? - _theResult___snd__h408500[56:34] : - _theResult___fst_sfd__h409070 ; - assign _theResult___fst_sfd__h418257 = - (_theResult___fst_exp__h417659 == 8'd255) ? - sfdin__h417653[56:34] : - _theResult___fst_sfd__h418254 ; - assign _theResult___fst_sfd__h426893 = - (_theResult___fst_exp__h426344 == 8'd255) ? - _theResult___snd__h426290[56:34] : - _theResult___fst_sfd__h426890 ; - assign _theResult___fst_sfd__h426902 = + _theResult___fst_sfd__h381206 ; + assign _theResult___fst_sfd__h400492 = + (_theResult___fst_exp__h399894 == 8'd255) ? + sfdin__h399888[56:34] : + _theResult___fst_sfd__h400489 ; + assign _theResult___fst_sfd__h409074 = + (_theResult___fst_exp__h408550 == 8'd255) ? + _theResult___snd__h408501[56:34] : + _theResult___fst_sfd__h409071 ; + assign _theResult___fst_sfd__h418258 = + (_theResult___fst_exp__h417660 == 8'd255) ? + sfdin__h417654[56:34] : + _theResult___fst_sfd__h418255 ; + assign _theResult___fst_sfd__h426894 = + (_theResult___fst_exp__h426345 == 8'd255) ? + _theResult___snd__h426291[56:34] : + _theResult___fst_sfd__h426891 ; + assign _theResult___fst_sfd__h426903 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5404 ? - _theResult___snd_fst_sfd__h409076 : - _theResult___fst_sfd__h391767) : + _theResult___snd_fst_sfd__h409077 : + _theResult___fst_sfd__h391768) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5944 ? - _theResult___snd_fst_sfd__h426896 : - _theResult___fst_sfd__h391767) ; - assign _theResult___fst_sfd__h426908 = + _theResult___snd_fst_sfd__h426897 : + _theResult___fst_sfd__h391768) ; + assign _theResult___fst_sfd__h426909 = ((coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == @@ -28237,33 +28237,33 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h426902 ; - assign _theResult___fst_sfd__h446186 = - (_theResult___fst_exp__h445588 == 8'd255) ? - sfdin__h445582[56:34] : - _theResult___fst_sfd__h446183 ; - assign _theResult___fst_sfd__h454768 = - (_theResult___fst_exp__h454244 == 8'd255) ? - _theResult___snd__h454195[56:34] : - _theResult___fst_sfd__h454765 ; - assign _theResult___fst_sfd__h463952 = - (_theResult___fst_exp__h463354 == 8'd255) ? - sfdin__h463348[56:34] : - _theResult___fst_sfd__h463949 ; - assign _theResult___fst_sfd__h472588 = - (_theResult___fst_exp__h472039 == 8'd255) ? - _theResult___snd__h471985[56:34] : - _theResult___fst_sfd__h472585 ; - assign _theResult___fst_sfd__h472597 = + _theResult___fst_sfd__h426903 ; + assign _theResult___fst_sfd__h446187 = + (_theResult___fst_exp__h445589 == 8'd255) ? + sfdin__h445583[56:34] : + _theResult___fst_sfd__h446184 ; + assign _theResult___fst_sfd__h454769 = + (_theResult___fst_exp__h454245 == 8'd255) ? + _theResult___snd__h454196[56:34] : + _theResult___fst_sfd__h454766 ; + assign _theResult___fst_sfd__h463953 = + (_theResult___fst_exp__h463355 == 8'd255) ? + sfdin__h463349[56:34] : + _theResult___fst_sfd__h463950 ; + assign _theResult___fst_sfd__h472589 = + (_theResult___fst_exp__h472040 == 8'd255) ? + _theResult___snd__h471986[56:34] : + _theResult___fst_sfd__h472586 ; + assign _theResult___fst_sfd__h472598 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? (_3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6796 ? - _theResult___snd_fst_sfd__h454771 : - _theResult___fst_sfd__h437462) : + _theResult___snd_fst_sfd__h454772 : + _theResult___fst_sfd__h437463) : (SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7336 ? - _theResult___snd_fst_sfd__h472591 : - _theResult___fst_sfd__h437462) ; - assign _theResult___fst_sfd__h472603 = + _theResult___snd_fst_sfd__h472592 : + _theResult___fst_sfd__h437463) ; + assign _theResult___fst_sfd__h472604 = ((coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == @@ -28271,1303 +28271,1303 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == 52'd0) ? 23'd0 : - _theResult___fst_sfd__h472597 ; - assign _theResult___fst_sfd__h486456 = + _theResult___fst_sfd__h472598 ; + assign _theResult___fst_sfd__h486457 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q15 ; - assign _theResult___fst_sfd__h502284 = + assign _theResult___fst_sfd__h502285 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 : + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 ; - assign _theResult___fst_sfd__h502287 = - (_theResult___fst_exp__h501528 == 11'd2047) ? - _theResult___snd__h501479[56:5] : - _theResult___fst_sfd__h502284 ; - assign _theResult___fst_sfd__h511935 = + assign _theResult___fst_sfd__h502288 = + (_theResult___fst_exp__h501529 == 11'd2047) ? + _theResult___snd__h501480[56:5] : + _theResult___fst_sfd__h502285 ; + assign _theResult___fst_sfd__h511936 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 : + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 ; - assign _theResult___fst_sfd__h511938 = - (_theResult___fst_exp__h511105 == 11'd2047) ? - sfdin__h511099[56:5] : - _theResult___fst_sfd__h511935 ; - assign _theResult___fst_sfd__h520719 = + assign _theResult___fst_sfd__h511939 = + (_theResult___fst_exp__h511106 == 11'd2047) ? + sfdin__h511100[56:5] : + _theResult___fst_sfd__h511936 ; + assign _theResult___fst_sfd__h520720 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 : + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 ; - assign _theResult___fst_sfd__h520722 = - (_theResult___fst_exp__h519938 == 11'd2047) ? - _theResult___snd__h519884[56:5] : - _theResult___fst_sfd__h520719 ; - assign _theResult___fst_sfd__h520731 = - (f1_exp__h482140 == 8'd0) ? + assign _theResult___fst_sfd__h520723 = + (_theResult___fst_exp__h519939 == 11'd2047) ? + _theResult___snd__h519885[56:5] : + _theResult___fst_sfd__h520720 ; + assign _theResult___fst_sfd__h520732 = + (f1_exp__h482141 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8510 ? - _theResult___snd_fst_sfd__h502290 : - _theResult___fst_sfd__h486456) : + _theResult___snd_fst_sfd__h502291 : + _theResult___fst_sfd__h486457) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8647 ? - _theResult___snd_fst_sfd__h520725 : - _theResult___fst_sfd__h486456) ; - assign _theResult___fst_sfd__h520737 = - ((f1_exp__h482140 == 8'd255 || f1_exp__h482140 == 8'd0) && - f1_sfd__h482141 == 23'd0) ? + _theResult___snd_fst_sfd__h520726 : + _theResult___fst_sfd__h486457) ; + assign _theResult___fst_sfd__h520738 = + ((f1_exp__h482141 == 8'd255 || f1_exp__h482141 == 8'd0) && + f1_sfd__h482142 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h520731 ; - assign _theResult___fst_sfd__h525309 = + _theResult___fst_sfd__h520732 ; + assign _theResult___fst_sfd__h525310 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q17 ; - assign _theResult___fst_sfd__h541137 = + assign _theResult___fst_sfd__h541138 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 : + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 ; - assign _theResult___fst_sfd__h541140 = - (_theResult___fst_exp__h540381 == 11'd2047) ? - _theResult___snd__h540332[56:5] : - _theResult___fst_sfd__h541137 ; - assign _theResult___fst_sfd__h550788 = + assign _theResult___fst_sfd__h541141 = + (_theResult___fst_exp__h540382 == 11'd2047) ? + _theResult___snd__h540333[56:5] : + _theResult___fst_sfd__h541138 ; + assign _theResult___fst_sfd__h550789 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 : + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 ; - assign _theResult___fst_sfd__h550791 = - (_theResult___fst_exp__h549958 == 11'd2047) ? - sfdin__h549952[56:5] : - _theResult___fst_sfd__h550788 ; - assign _theResult___fst_sfd__h559572 = + assign _theResult___fst_sfd__h550792 = + (_theResult___fst_exp__h549959 == 11'd2047) ? + sfdin__h549953[56:5] : + _theResult___fst_sfd__h550789 ; + assign _theResult___fst_sfd__h559573 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 : + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 ; - assign _theResult___fst_sfd__h559575 = - (_theResult___fst_exp__h558791 == 11'd2047) ? - _theResult___snd__h558737[56:5] : - _theResult___fst_sfd__h559572 ; - assign _theResult___fst_sfd__h559584 = - (f2_exp__h521134 == 8'd0) ? + assign _theResult___fst_sfd__h559576 = + (_theResult___fst_exp__h558792 == 11'd2047) ? + _theResult___snd__h558738[56:5] : + _theResult___fst_sfd__h559573 ; + assign _theResult___fst_sfd__h559585 = + (f2_exp__h521135 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10010 ? - _theResult___snd_fst_sfd__h541143 : - _theResult___fst_sfd__h525309) : + _theResult___snd_fst_sfd__h541144 : + _theResult___fst_sfd__h525310) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10132 ? - _theResult___snd_fst_sfd__h559578 : - _theResult___fst_sfd__h525309) ; - assign _theResult___fst_sfd__h559590 = - ((f2_exp__h521134 == 8'd255 || f2_exp__h521134 == 8'd0) && - f2_sfd__h521135 == 23'd0) ? + _theResult___snd_fst_sfd__h559579 : + _theResult___fst_sfd__h525310) ; + assign _theResult___fst_sfd__h559591 = + ((f2_exp__h521135 == 8'd255 || f2_exp__h521135 == 8'd0) && + f2_sfd__h521136 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h559584 ; - assign _theResult___fst_sfd__h564613 = + _theResult___fst_sfd__h559585 ; + assign _theResult___fst_sfd__h564614 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3) ? 52'd0 : CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q19 ; - assign _theResult___fst_sfd__h580441 = + assign _theResult___fst_sfd__h580442 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 : + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 ; - assign _theResult___fst_sfd__h580444 = - (_theResult___fst_exp__h579685 == 11'd2047) ? - _theResult___snd__h579636[56:5] : - _theResult___fst_sfd__h580441 ; - assign _theResult___fst_sfd__h590092 = + assign _theResult___fst_sfd__h580445 = + (_theResult___fst_exp__h579686 == 11'd2047) ? + _theResult___snd__h579637[56:5] : + _theResult___fst_sfd__h580442 ; + assign _theResult___fst_sfd__h590093 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 : + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 ; - assign _theResult___fst_sfd__h590095 = - (_theResult___fst_exp__h589262 == 11'd2047) ? - sfdin__h589256[56:5] : - _theResult___fst_sfd__h590092 ; - assign _theResult___fst_sfd__h598876 = + assign _theResult___fst_sfd__h590096 = + (_theResult___fst_exp__h589263 == 11'd2047) ? + sfdin__h589257[56:5] : + _theResult___fst_sfd__h590093 ; + assign _theResult___fst_sfd__h598877 = (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd1 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd2 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd3 && coreFix_fpuMulDivExe_0_regToExeQ$first[228:226] != 3'd4) ? - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 : + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 : IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 ; - assign _theResult___fst_sfd__h598879 = - (_theResult___fst_exp__h598095 == 11'd2047) ? - _theResult___snd__h598041[56:5] : - _theResult___fst_sfd__h598876 ; - assign _theResult___fst_sfd__h598888 = - (f3_exp__h560438 == 8'd0) ? + assign _theResult___fst_sfd__h598880 = + (_theResult___fst_exp__h598096 == 11'd2047) ? + _theResult___snd__h598042[56:5] : + _theResult___fst_sfd__h598877 ; + assign _theResult___fst_sfd__h598889 = + (f3_exp__h560439 == 8'd0) ? (_3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9240 ? - _theResult___snd_fst_sfd__h580447 : - _theResult___fst_sfd__h564613) : + _theResult___snd_fst_sfd__h580448 : + _theResult___fst_sfd__h564614) : (SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9362 ? - _theResult___snd_fst_sfd__h598882 : - _theResult___fst_sfd__h564613) ; - assign _theResult___fst_sfd__h598894 = - ((f3_exp__h560438 == 8'd255 || f3_exp__h560438 == 8'd0) && - f3_sfd__h560439 == 23'd0) ? + _theResult___snd_fst_sfd__h598883 : + _theResult___fst_sfd__h564614) ; + assign _theResult___fst_sfd__h598895 = + ((f3_exp__h560439 == 8'd255 || f3_exp__h560439 == 8'd0) && + f3_sfd__h560440 == 23'd0) ? 52'd0 : - _theResult___fst_sfd__h598888 ; - assign _theResult___sfd__h354713 = - sfd__h354288[24] ? - ((_theResult___fst_exp__h354196 == 8'd254) ? + _theResult___fst_sfd__h598889 ; + assign _theResult___sfd__h354714 = + sfd__h354289[24] ? + ((_theResult___fst_exp__h354197 == 8'd254) ? 23'd0 : - sfd__h354288[23:1]) : - sfd__h354288[22:0] ; - assign _theResult___sfd__h363295 = - sfd__h362870[24] ? - ((_theResult___fst_exp__h362852 == 8'd254) ? + sfd__h354289[23:1]) : + sfd__h354289[22:0] ; + assign _theResult___sfd__h363296 = + sfd__h362871[24] ? + ((_theResult___fst_exp__h362853 == 8'd254) ? 23'd0 : - sfd__h362870[23:1]) : - sfd__h362870[22:0] ; - assign _theResult___sfd__h372479 = - sfd__h372054[24] ? - ((_theResult___fst_exp__h371962 == 8'd254) ? + sfd__h362871[23:1]) : + sfd__h362871[22:0] ; + assign _theResult___sfd__h372480 = + sfd__h372055[24] ? + ((_theResult___fst_exp__h371963 == 8'd254) ? 23'd0 : - sfd__h372054[23:1]) : - sfd__h372054[22:0] ; - assign _theResult___sfd__h381115 = - sfd__h380666[24] ? - ((_theResult___fst_exp__h380647 == 8'd254) ? + sfd__h372055[23:1]) : + sfd__h372055[22:0] ; + assign _theResult___sfd__h381116 = + sfd__h380667[24] ? + ((_theResult___fst_exp__h380648 == 8'd254) ? 23'd0 : - sfd__h380666[23:1]) : - sfd__h380666[22:0] ; - assign _theResult___sfd__h381217 = + sfd__h380667[23:1]) : + sfd__h380667[22:0] ; + assign _theResult___sfd__h381218 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h338430 : - _theResult___fst_sfd__h381211 ; - assign _theResult___sfd__h400410 = - sfd__h399985[24] ? - ((_theResult___fst_exp__h399893 == 8'd254) ? + _theResult___snd_fst_sfd__h338431 : + _theResult___fst_sfd__h381212 ; + assign _theResult___sfd__h400411 = + sfd__h399986[24] ? + ((_theResult___fst_exp__h399894 == 8'd254) ? 23'd0 : - sfd__h399985[23:1]) : - sfd__h399985[22:0] ; - assign _theResult___sfd__h408992 = - sfd__h408567[24] ? - ((_theResult___fst_exp__h408549 == 8'd254) ? + sfd__h399986[23:1]) : + sfd__h399986[22:0] ; + assign _theResult___sfd__h408993 = + sfd__h408568[24] ? + ((_theResult___fst_exp__h408550 == 8'd254) ? 23'd0 : - sfd__h408567[23:1]) : - sfd__h408567[22:0] ; - assign _theResult___sfd__h418176 = - sfd__h417751[24] ? - ((_theResult___fst_exp__h417659 == 8'd254) ? + sfd__h408568[23:1]) : + sfd__h408568[22:0] ; + assign _theResult___sfd__h418177 = + sfd__h417752[24] ? + ((_theResult___fst_exp__h417660 == 8'd254) ? 23'd0 : - sfd__h417751[23:1]) : - sfd__h417751[22:0] ; - assign _theResult___sfd__h426812 = - sfd__h426363[24] ? - ((_theResult___fst_exp__h426344 == 8'd254) ? + sfd__h417752[23:1]) : + sfd__h417752[22:0] ; + assign _theResult___sfd__h426813 = + sfd__h426364[24] ? + ((_theResult___fst_exp__h426345 == 8'd254) ? 23'd0 : - sfd__h426363[23:1]) : - sfd__h426363[22:0] ; - assign _theResult___sfd__h426914 = + sfd__h426364[23:1]) : + sfd__h426364[22:0] ; + assign _theResult___sfd__h426915 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h384132 : - _theResult___fst_sfd__h426908 ; - assign _theResult___sfd__h446105 = - sfd__h445680[24] ? - ((_theResult___fst_exp__h445588 == 8'd254) ? + _theResult___snd_fst_sfd__h384133 : + _theResult___fst_sfd__h426909 ; + assign _theResult___sfd__h446106 = + sfd__h445681[24] ? + ((_theResult___fst_exp__h445589 == 8'd254) ? 23'd0 : - sfd__h445680[23:1]) : - sfd__h445680[22:0] ; - assign _theResult___sfd__h454687 = - sfd__h454262[24] ? - ((_theResult___fst_exp__h454244 == 8'd254) ? + sfd__h445681[23:1]) : + sfd__h445681[22:0] ; + assign _theResult___sfd__h454688 = + sfd__h454263[24] ? + ((_theResult___fst_exp__h454245 == 8'd254) ? 23'd0 : - sfd__h454262[23:1]) : - sfd__h454262[22:0] ; - assign _theResult___sfd__h463871 = - sfd__h463446[24] ? - ((_theResult___fst_exp__h463354 == 8'd254) ? + sfd__h454263[23:1]) : + sfd__h454263[22:0] ; + assign _theResult___sfd__h463872 = + sfd__h463447[24] ? + ((_theResult___fst_exp__h463355 == 8'd254) ? 23'd0 : - sfd__h463446[23:1]) : - sfd__h463446[22:0] ; - assign _theResult___sfd__h472507 = - sfd__h472058[24] ? - ((_theResult___fst_exp__h472039 == 8'd254) ? + sfd__h463447[23:1]) : + sfd__h463447[22:0] ; + assign _theResult___sfd__h472508 = + sfd__h472059[24] ? + ((_theResult___fst_exp__h472040 == 8'd254) ? 23'd0 : - sfd__h472058[23:1]) : - sfd__h472058[22:0] ; - assign _theResult___sfd__h472609 = + sfd__h472059[23:1]) : + sfd__h472059[22:0] ; + assign _theResult___sfd__h472610 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) ? - _theResult___snd_fst_sfd__h429827 : - _theResult___fst_sfd__h472603 ; - assign _theResult___sfd__h502184 = - sfd__h501546[53] ? - ((_theResult___fst_exp__h501528 == 11'd2046) ? + _theResult___snd_fst_sfd__h429828 : + _theResult___fst_sfd__h472604 ; + assign _theResult___sfd__h502185 = + sfd__h501547[53] ? + ((_theResult___fst_exp__h501529 == 11'd2046) ? 52'd0 : - sfd__h501546[52:1]) : - sfd__h501546[51:0] ; - assign _theResult___sfd__h511835 = - sfd__h511197[53] ? - ((_theResult___fst_exp__h511105 == 11'd2046) ? + sfd__h501547[52:1]) : + sfd__h501547[51:0] ; + assign _theResult___sfd__h511836 = + sfd__h511198[53] ? + ((_theResult___fst_exp__h511106 == 11'd2046) ? 52'd0 : - sfd__h511197[52:1]) : - sfd__h511197[51:0] ; - assign _theResult___sfd__h520619 = - sfd__h519957[53] ? - ((_theResult___fst_exp__h519938 == 11'd2046) ? + sfd__h511198[52:1]) : + sfd__h511198[51:0] ; + assign _theResult___sfd__h520620 = + sfd__h519958[53] ? + ((_theResult___fst_exp__h519939 == 11'd2046) ? 52'd0 : - sfd__h519957[52:1]) : - sfd__h519957[51:0] ; - assign _theResult___sfd__h541037 = - sfd__h540399[53] ? - ((_theResult___fst_exp__h540381 == 11'd2046) ? + sfd__h519958[52:1]) : + sfd__h519958[51:0] ; + assign _theResult___sfd__h541038 = + sfd__h540400[53] ? + ((_theResult___fst_exp__h540382 == 11'd2046) ? 52'd0 : - sfd__h540399[52:1]) : - sfd__h540399[51:0] ; - assign _theResult___sfd__h550688 = - sfd__h550050[53] ? - ((_theResult___fst_exp__h549958 == 11'd2046) ? + sfd__h540400[52:1]) : + sfd__h540400[51:0] ; + assign _theResult___sfd__h550689 = + sfd__h550051[53] ? + ((_theResult___fst_exp__h549959 == 11'd2046) ? 52'd0 : - sfd__h550050[52:1]) : - sfd__h550050[51:0] ; - assign _theResult___sfd__h559472 = - sfd__h558810[53] ? - ((_theResult___fst_exp__h558791 == 11'd2046) ? + sfd__h550051[52:1]) : + sfd__h550051[51:0] ; + assign _theResult___sfd__h559473 = + sfd__h558811[53] ? + ((_theResult___fst_exp__h558792 == 11'd2046) ? 52'd0 : - sfd__h558810[52:1]) : - sfd__h558810[51:0] ; - assign _theResult___sfd__h580341 = - sfd__h579703[53] ? - ((_theResult___fst_exp__h579685 == 11'd2046) ? + sfd__h558811[52:1]) : + sfd__h558811[51:0] ; + assign _theResult___sfd__h580342 = + sfd__h579704[53] ? + ((_theResult___fst_exp__h579686 == 11'd2046) ? 52'd0 : - sfd__h579703[52:1]) : - sfd__h579703[51:0] ; - assign _theResult___sfd__h589992 = - sfd__h589354[53] ? - ((_theResult___fst_exp__h589262 == 11'd2046) ? + sfd__h579704[52:1]) : + sfd__h579704[51:0] ; + assign _theResult___sfd__h589993 = + sfd__h589355[53] ? + ((_theResult___fst_exp__h589263 == 11'd2046) ? 52'd0 : - sfd__h589354[52:1]) : - sfd__h589354[51:0] ; - assign _theResult___sfd__h598776 = - sfd__h598114[53] ? - ((_theResult___fst_exp__h598095 == 11'd2046) ? + sfd__h589355[52:1]) : + sfd__h589355[51:0] ; + assign _theResult___sfd__h598777 = + sfd__h598115[53] ? + ((_theResult___fst_exp__h598096 == 11'd2046) ? 52'd0 : - sfd__h598114[52:1]) : - sfd__h598114[51:0] ; - assign _theResult___snd__h354207 = { _theResult____h346085[55:0], 1'd0 } ; - assign _theResult___snd__h354218 = - (!_theResult____h346085[56] && _theResult____h346085[55]) ? - _theResult___snd__h354220 : - _theResult___snd__h354230 ; - assign _theResult___snd__h354220 = { _theResult____h346085[54:0], 2'd0 } ; - assign _theResult___snd__h354230 = - (!_theResult____h346085[56] && !_theResult____h346085[55] && - !_theResult____h346085[54] && - !_theResult____h346085[53] && - !_theResult____h346085[52] && - !_theResult____h346085[51] && - !_theResult____h346085[50] && - !_theResult____h346085[49] && - !_theResult____h346085[48] && - !_theResult____h346085[47] && - !_theResult____h346085[46] && - !_theResult____h346085[45] && - !_theResult____h346085[44] && - !_theResult____h346085[43] && - !_theResult____h346085[42] && - !_theResult____h346085[41] && - !_theResult____h346085[40] && - !_theResult____h346085[39] && - !_theResult____h346085[38] && - !_theResult____h346085[37] && - !_theResult____h346085[36] && - !_theResult____h346085[35] && - !_theResult____h346085[34] && - !_theResult____h346085[33] && - !_theResult____h346085[32] && - !_theResult____h346085[31] && - !_theResult____h346085[30] && - !_theResult____h346085[29] && - !_theResult____h346085[28] && - !_theResult____h346085[27] && - !_theResult____h346085[26] && - !_theResult____h346085[25] && - !_theResult____h346085[24] && - !_theResult____h346085[23] && - !_theResult____h346085[22] && - !_theResult____h346085[21] && - !_theResult____h346085[20] && - !_theResult____h346085[19] && - !_theResult____h346085[18] && - !_theResult____h346085[17] && - !_theResult____h346085[16] && - !_theResult____h346085[15] && - !_theResult____h346085[14] && - !_theResult____h346085[13] && - !_theResult____h346085[12] && - !_theResult____h346085[11] && - !_theResult____h346085[10] && - !_theResult____h346085[9] && - !_theResult____h346085[8] && - !_theResult____h346085[7] && - !_theResult____h346085[6] && - !_theResult____h346085[5] && - !_theResult____h346085[4] && - !_theResult____h346085[3] && - !_theResult____h346085[2] && - !_theResult____h346085[1] && - !_theResult____h346085[0]) ? - _theResult____h346085 : - _theResult___snd__h354236 ; - assign _theResult___snd__h354236 = + sfd__h598115[52:1]) : + sfd__h598115[51:0] ; + assign _theResult___snd__h354208 = { _theResult____h346086[55:0], 1'd0 } ; + assign _theResult___snd__h354219 = + (!_theResult____h346086[56] && _theResult____h346086[55]) ? + _theResult___snd__h354221 : + _theResult___snd__h354231 ; + assign _theResult___snd__h354221 = { _theResult____h346086[54:0], 2'd0 } ; + assign _theResult___snd__h354231 = + (!_theResult____h346086[56] && !_theResult____h346086[55] && + !_theResult____h346086[54] && + !_theResult____h346086[53] && + !_theResult____h346086[52] && + !_theResult____h346086[51] && + !_theResult____h346086[50] && + !_theResult____h346086[49] && + !_theResult____h346086[48] && + !_theResult____h346086[47] && + !_theResult____h346086[46] && + !_theResult____h346086[45] && + !_theResult____h346086[44] && + !_theResult____h346086[43] && + !_theResult____h346086[42] && + !_theResult____h346086[41] && + !_theResult____h346086[40] && + !_theResult____h346086[39] && + !_theResult____h346086[38] && + !_theResult____h346086[37] && + !_theResult____h346086[36] && + !_theResult____h346086[35] && + !_theResult____h346086[34] && + !_theResult____h346086[33] && + !_theResult____h346086[32] && + !_theResult____h346086[31] && + !_theResult____h346086[30] && + !_theResult____h346086[29] && + !_theResult____h346086[28] && + !_theResult____h346086[27] && + !_theResult____h346086[26] && + !_theResult____h346086[25] && + !_theResult____h346086[24] && + !_theResult____h346086[23] && + !_theResult____h346086[22] && + !_theResult____h346086[21] && + !_theResult____h346086[20] && + !_theResult____h346086[19] && + !_theResult____h346086[18] && + !_theResult____h346086[17] && + !_theResult____h346086[16] && + !_theResult____h346086[15] && + !_theResult____h346086[14] && + !_theResult____h346086[13] && + !_theResult____h346086[12] && + !_theResult____h346086[11] && + !_theResult____h346086[10] && + !_theResult____h346086[9] && + !_theResult____h346086[8] && + !_theResult____h346086[7] && + !_theResult____h346086[6] && + !_theResult____h346086[5] && + !_theResult____h346086[4] && + !_theResult____h346086[3] && + !_theResult____h346086[2] && + !_theResult____h346086[1] && + !_theResult____h346086[0]) ? + _theResult____h346086 : + _theResult___snd__h354237 ; + assign _theResult___snd__h354237 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q28[54:0], 2'd0 } ; - assign _theResult___snd__h354259 = - _theResult____h346085 << + assign _theResult___snd__h354260 = + _theResult____h346086 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d4247 ; - assign _theResult___snd__h362803 = + assign _theResult___snd__h362804 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h362812 : - _theResult___snd__h362805 ; - assign _theResult___snd__h362805 = + _theResult___snd__h362813 : + _theResult___snd__h362806 ; + assign _theResult___snd__h362806 = { coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h362812 = + assign _theResult___snd__h362813 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423) ? - sfd__h338480 : - _theResult___snd__h362818 ; - assign _theResult___snd__h362818 = + sfd__h338481 : + _theResult___snd__h362819 ; + assign _theResult___snd__h362819 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q30[54:0], 2'd0 } ; - assign _theResult___snd__h362841 = - sfd__h338480 << + assign _theResult___snd__h362842 = + sfd__h338481 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d4478 ; - assign _theResult___snd__h371973 = { _theResult____h363724[55:0], 1'd0 } ; - assign _theResult___snd__h371984 = - (!_theResult____h363724[56] && _theResult____h363724[55]) ? - _theResult___snd__h371986 : - _theResult___snd__h371996 ; - assign _theResult___snd__h371986 = { _theResult____h363724[54:0], 2'd0 } ; - assign _theResult___snd__h371996 = - (!_theResult____h363724[56] && !_theResult____h363724[55] && - !_theResult____h363724[54] && - !_theResult____h363724[53] && - !_theResult____h363724[52] && - !_theResult____h363724[51] && - !_theResult____h363724[50] && - !_theResult____h363724[49] && - !_theResult____h363724[48] && - !_theResult____h363724[47] && - !_theResult____h363724[46] && - !_theResult____h363724[45] && - !_theResult____h363724[44] && - !_theResult____h363724[43] && - !_theResult____h363724[42] && - !_theResult____h363724[41] && - !_theResult____h363724[40] && - !_theResult____h363724[39] && - !_theResult____h363724[38] && - !_theResult____h363724[37] && - !_theResult____h363724[36] && - !_theResult____h363724[35] && - !_theResult____h363724[34] && - !_theResult____h363724[33] && - !_theResult____h363724[32] && - !_theResult____h363724[31] && - !_theResult____h363724[30] && - !_theResult____h363724[29] && - !_theResult____h363724[28] && - !_theResult____h363724[27] && - !_theResult____h363724[26] && - !_theResult____h363724[25] && - !_theResult____h363724[24] && - !_theResult____h363724[23] && - !_theResult____h363724[22] && - !_theResult____h363724[21] && - !_theResult____h363724[20] && - !_theResult____h363724[19] && - !_theResult____h363724[18] && - !_theResult____h363724[17] && - !_theResult____h363724[16] && - !_theResult____h363724[15] && - !_theResult____h363724[14] && - !_theResult____h363724[13] && - !_theResult____h363724[12] && - !_theResult____h363724[11] && - !_theResult____h363724[10] && - !_theResult____h363724[9] && - !_theResult____h363724[8] && - !_theResult____h363724[7] && - !_theResult____h363724[6] && - !_theResult____h363724[5] && - !_theResult____h363724[4] && - !_theResult____h363724[3] && - !_theResult____h363724[2] && - !_theResult____h363724[1] && - !_theResult____h363724[0]) ? - _theResult____h363724 : - _theResult___snd__h372002 ; - assign _theResult___snd__h372002 = + assign _theResult___snd__h371974 = { _theResult____h363725[55:0], 1'd0 } ; + assign _theResult___snd__h371985 = + (!_theResult____h363725[56] && _theResult____h363725[55]) ? + _theResult___snd__h371987 : + _theResult___snd__h371997 ; + assign _theResult___snd__h371987 = { _theResult____h363725[54:0], 2'd0 } ; + assign _theResult___snd__h371997 = + (!_theResult____h363725[56] && !_theResult____h363725[55] && + !_theResult____h363725[54] && + !_theResult____h363725[53] && + !_theResult____h363725[52] && + !_theResult____h363725[51] && + !_theResult____h363725[50] && + !_theResult____h363725[49] && + !_theResult____h363725[48] && + !_theResult____h363725[47] && + !_theResult____h363725[46] && + !_theResult____h363725[45] && + !_theResult____h363725[44] && + !_theResult____h363725[43] && + !_theResult____h363725[42] && + !_theResult____h363725[41] && + !_theResult____h363725[40] && + !_theResult____h363725[39] && + !_theResult____h363725[38] && + !_theResult____h363725[37] && + !_theResult____h363725[36] && + !_theResult____h363725[35] && + !_theResult____h363725[34] && + !_theResult____h363725[33] && + !_theResult____h363725[32] && + !_theResult____h363725[31] && + !_theResult____h363725[30] && + !_theResult____h363725[29] && + !_theResult____h363725[28] && + !_theResult____h363725[27] && + !_theResult____h363725[26] && + !_theResult____h363725[25] && + !_theResult____h363725[24] && + !_theResult____h363725[23] && + !_theResult____h363725[22] && + !_theResult____h363725[21] && + !_theResult____h363725[20] && + !_theResult____h363725[19] && + !_theResult____h363725[18] && + !_theResult____h363725[17] && + !_theResult____h363725[16] && + !_theResult____h363725[15] && + !_theResult____h363725[14] && + !_theResult____h363725[13] && + !_theResult____h363725[12] && + !_theResult____h363725[11] && + !_theResult____h363725[10] && + !_theResult____h363725[9] && + !_theResult____h363725[8] && + !_theResult____h363725[7] && + !_theResult____h363725[6] && + !_theResult____h363725[5] && + !_theResult____h363725[4] && + !_theResult____h363725[3] && + !_theResult____h363725[2] && + !_theResult____h363725[1] && + !_theResult____h363725[0]) ? + _theResult____h363725 : + _theResult___snd__h372003 ; + assign _theResult___snd__h372003 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q38[54:0], 2'd0 } ; - assign _theResult___snd__h372025 = - _theResult____h363724 << + assign _theResult___snd__h372026 = + _theResult____h363725 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d4798 ; - assign _theResult___snd__h380593 = + assign _theResult___snd__h380594 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0) ? - _theResult___snd__h380607 : - _theResult___snd__h362805 ; - assign _theResult___snd__h380607 = + _theResult___snd__h380608 : + _theResult___snd__h362806 ; + assign _theResult___snd__h380608 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_fma__ETC___d4423) ? - sfd__h338480 : - _theResult___snd__h380613 ; - assign _theResult___snd__h380613 = + sfd__h338481 : + _theResult___snd__h380614 ; + assign _theResult___snd__h380614 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q43[54:0], 2'd0 } ; - assign _theResult___snd__h380631 = - sfd__h338480 << + assign _theResult___snd__h380632 = + sfd__h338481 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d4872) ; - assign _theResult___snd__h399904 = { _theResult____h391784[55:0], 1'd0 } ; - assign _theResult___snd__h399915 = - (!_theResult____h391784[56] && _theResult____h391784[55]) ? - _theResult___snd__h399917 : - _theResult___snd__h399927 ; - assign _theResult___snd__h399917 = { _theResult____h391784[54:0], 2'd0 } ; - assign _theResult___snd__h399927 = - (!_theResult____h391784[56] && !_theResult____h391784[55] && - !_theResult____h391784[54] && - !_theResult____h391784[53] && - !_theResult____h391784[52] && - !_theResult____h391784[51] && - !_theResult____h391784[50] && - !_theResult____h391784[49] && - !_theResult____h391784[48] && - !_theResult____h391784[47] && - !_theResult____h391784[46] && - !_theResult____h391784[45] && - !_theResult____h391784[44] && - !_theResult____h391784[43] && - !_theResult____h391784[42] && - !_theResult____h391784[41] && - !_theResult____h391784[40] && - !_theResult____h391784[39] && - !_theResult____h391784[38] && - !_theResult____h391784[37] && - !_theResult____h391784[36] && - !_theResult____h391784[35] && - !_theResult____h391784[34] && - !_theResult____h391784[33] && - !_theResult____h391784[32] && - !_theResult____h391784[31] && - !_theResult____h391784[30] && - !_theResult____h391784[29] && - !_theResult____h391784[28] && - !_theResult____h391784[27] && - !_theResult____h391784[26] && - !_theResult____h391784[25] && - !_theResult____h391784[24] && - !_theResult____h391784[23] && - !_theResult____h391784[22] && - !_theResult____h391784[21] && - !_theResult____h391784[20] && - !_theResult____h391784[19] && - !_theResult____h391784[18] && - !_theResult____h391784[17] && - !_theResult____h391784[16] && - !_theResult____h391784[15] && - !_theResult____h391784[14] && - !_theResult____h391784[13] && - !_theResult____h391784[12] && - !_theResult____h391784[11] && - !_theResult____h391784[10] && - !_theResult____h391784[9] && - !_theResult____h391784[8] && - !_theResult____h391784[7] && - !_theResult____h391784[6] && - !_theResult____h391784[5] && - !_theResult____h391784[4] && - !_theResult____h391784[3] && - !_theResult____h391784[2] && - !_theResult____h391784[1] && - !_theResult____h391784[0]) ? - _theResult____h391784 : - _theResult___snd__h399933 ; - assign _theResult___snd__h399933 = + assign _theResult___snd__h399905 = { _theResult____h391785[55:0], 1'd0 } ; + assign _theResult___snd__h399916 = + (!_theResult____h391785[56] && _theResult____h391785[55]) ? + _theResult___snd__h399918 : + _theResult___snd__h399928 ; + assign _theResult___snd__h399918 = { _theResult____h391785[54:0], 2'd0 } ; + assign _theResult___snd__h399928 = + (!_theResult____h391785[56] && !_theResult____h391785[55] && + !_theResult____h391785[54] && + !_theResult____h391785[53] && + !_theResult____h391785[52] && + !_theResult____h391785[51] && + !_theResult____h391785[50] && + !_theResult____h391785[49] && + !_theResult____h391785[48] && + !_theResult____h391785[47] && + !_theResult____h391785[46] && + !_theResult____h391785[45] && + !_theResult____h391785[44] && + !_theResult____h391785[43] && + !_theResult____h391785[42] && + !_theResult____h391785[41] && + !_theResult____h391785[40] && + !_theResult____h391785[39] && + !_theResult____h391785[38] && + !_theResult____h391785[37] && + !_theResult____h391785[36] && + !_theResult____h391785[35] && + !_theResult____h391785[34] && + !_theResult____h391785[33] && + !_theResult____h391785[32] && + !_theResult____h391785[31] && + !_theResult____h391785[30] && + !_theResult____h391785[29] && + !_theResult____h391785[28] && + !_theResult____h391785[27] && + !_theResult____h391785[26] && + !_theResult____h391785[25] && + !_theResult____h391785[24] && + !_theResult____h391785[23] && + !_theResult____h391785[22] && + !_theResult____h391785[21] && + !_theResult____h391785[20] && + !_theResult____h391785[19] && + !_theResult____h391785[18] && + !_theResult____h391785[17] && + !_theResult____h391785[16] && + !_theResult____h391785[15] && + !_theResult____h391785[14] && + !_theResult____h391785[13] && + !_theResult____h391785[12] && + !_theResult____h391785[11] && + !_theResult____h391785[10] && + !_theResult____h391785[9] && + !_theResult____h391785[8] && + !_theResult____h391785[7] && + !_theResult____h391785[6] && + !_theResult____h391785[5] && + !_theResult____h391785[4] && + !_theResult____h391785[3] && + !_theResult____h391785[2] && + !_theResult____h391785[1] && + !_theResult____h391785[0]) ? + _theResult____h391785 : + _theResult___snd__h399934 ; + assign _theResult___snd__h399934 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q63[54:0], 2'd0 } ; - assign _theResult___snd__h399956 = - _theResult____h391784 << + assign _theResult___snd__h399957 = + _theResult____h391785 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d5639 ; - assign _theResult___snd__h408500 = + assign _theResult___snd__h408501 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h408509 : - _theResult___snd__h408502 ; - assign _theResult___snd__h408502 = + _theResult___snd__h408510 : + _theResult___snd__h408503 ; + assign _theResult___snd__h408503 = { coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h408509 = + assign _theResult___snd__h408510 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815) ? - sfd__h384182 : - _theResult___snd__h408515 ; - assign _theResult___snd__h408515 = + sfd__h384183 : + _theResult___snd__h408516 ; + assign _theResult___snd__h408516 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q65[54:0], 2'd0 } ; - assign _theResult___snd__h408538 = - sfd__h384182 << + assign _theResult___snd__h408539 = + sfd__h384183 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d5870 ; - assign _theResult___snd__h417670 = { _theResult____h409421[55:0], 1'd0 } ; - assign _theResult___snd__h417681 = - (!_theResult____h409421[56] && _theResult____h409421[55]) ? - _theResult___snd__h417683 : - _theResult___snd__h417693 ; - assign _theResult___snd__h417683 = { _theResult____h409421[54:0], 2'd0 } ; - assign _theResult___snd__h417693 = - (!_theResult____h409421[56] && !_theResult____h409421[55] && - !_theResult____h409421[54] && - !_theResult____h409421[53] && - !_theResult____h409421[52] && - !_theResult____h409421[51] && - !_theResult____h409421[50] && - !_theResult____h409421[49] && - !_theResult____h409421[48] && - !_theResult____h409421[47] && - !_theResult____h409421[46] && - !_theResult____h409421[45] && - !_theResult____h409421[44] && - !_theResult____h409421[43] && - !_theResult____h409421[42] && - !_theResult____h409421[41] && - !_theResult____h409421[40] && - !_theResult____h409421[39] && - !_theResult____h409421[38] && - !_theResult____h409421[37] && - !_theResult____h409421[36] && - !_theResult____h409421[35] && - !_theResult____h409421[34] && - !_theResult____h409421[33] && - !_theResult____h409421[32] && - !_theResult____h409421[31] && - !_theResult____h409421[30] && - !_theResult____h409421[29] && - !_theResult____h409421[28] && - !_theResult____h409421[27] && - !_theResult____h409421[26] && - !_theResult____h409421[25] && - !_theResult____h409421[24] && - !_theResult____h409421[23] && - !_theResult____h409421[22] && - !_theResult____h409421[21] && - !_theResult____h409421[20] && - !_theResult____h409421[19] && - !_theResult____h409421[18] && - !_theResult____h409421[17] && - !_theResult____h409421[16] && - !_theResult____h409421[15] && - !_theResult____h409421[14] && - !_theResult____h409421[13] && - !_theResult____h409421[12] && - !_theResult____h409421[11] && - !_theResult____h409421[10] && - !_theResult____h409421[9] && - !_theResult____h409421[8] && - !_theResult____h409421[7] && - !_theResult____h409421[6] && - !_theResult____h409421[5] && - !_theResult____h409421[4] && - !_theResult____h409421[3] && - !_theResult____h409421[2] && - !_theResult____h409421[1] && - !_theResult____h409421[0]) ? - _theResult____h409421 : - _theResult___snd__h417699 ; - assign _theResult___snd__h417699 = + assign _theResult___snd__h417671 = { _theResult____h409422[55:0], 1'd0 } ; + assign _theResult___snd__h417682 = + (!_theResult____h409422[56] && _theResult____h409422[55]) ? + _theResult___snd__h417684 : + _theResult___snd__h417694 ; + assign _theResult___snd__h417684 = { _theResult____h409422[54:0], 2'd0 } ; + assign _theResult___snd__h417694 = + (!_theResult____h409422[56] && !_theResult____h409422[55] && + !_theResult____h409422[54] && + !_theResult____h409422[53] && + !_theResult____h409422[52] && + !_theResult____h409422[51] && + !_theResult____h409422[50] && + !_theResult____h409422[49] && + !_theResult____h409422[48] && + !_theResult____h409422[47] && + !_theResult____h409422[46] && + !_theResult____h409422[45] && + !_theResult____h409422[44] && + !_theResult____h409422[43] && + !_theResult____h409422[42] && + !_theResult____h409422[41] && + !_theResult____h409422[40] && + !_theResult____h409422[39] && + !_theResult____h409422[38] && + !_theResult____h409422[37] && + !_theResult____h409422[36] && + !_theResult____h409422[35] && + !_theResult____h409422[34] && + !_theResult____h409422[33] && + !_theResult____h409422[32] && + !_theResult____h409422[31] && + !_theResult____h409422[30] && + !_theResult____h409422[29] && + !_theResult____h409422[28] && + !_theResult____h409422[27] && + !_theResult____h409422[26] && + !_theResult____h409422[25] && + !_theResult____h409422[24] && + !_theResult____h409422[23] && + !_theResult____h409422[22] && + !_theResult____h409422[21] && + !_theResult____h409422[20] && + !_theResult____h409422[19] && + !_theResult____h409422[18] && + !_theResult____h409422[17] && + !_theResult____h409422[16] && + !_theResult____h409422[15] && + !_theResult____h409422[14] && + !_theResult____h409422[13] && + !_theResult____h409422[12] && + !_theResult____h409422[11] && + !_theResult____h409422[10] && + !_theResult____h409422[9] && + !_theResult____h409422[8] && + !_theResult____h409422[7] && + !_theResult____h409422[6] && + !_theResult____h409422[5] && + !_theResult____h409422[4] && + !_theResult____h409422[3] && + !_theResult____h409422[2] && + !_theResult____h409422[1] && + !_theResult____h409422[0]) ? + _theResult____h409422 : + _theResult___snd__h417700 ; + assign _theResult___snd__h417700 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q73[54:0], 2'd0 } ; - assign _theResult___snd__h417722 = - _theResult____h409421 << + assign _theResult___snd__h417723 = + _theResult____h409422 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d6190 ; - assign _theResult___snd__h426290 = + assign _theResult___snd__h426291 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0) ? - _theResult___snd__h426304 : - _theResult___snd__h408502 ; - assign _theResult___snd__h426304 = + _theResult___snd__h426305 : + _theResult___snd__h408503 ; + assign _theResult___snd__h426305 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_div__ETC___d5815) ? - sfd__h384182 : - _theResult___snd__h426310 ; - assign _theResult___snd__h426310 = + sfd__h384183 : + _theResult___snd__h426311 ; + assign _theResult___snd__h426311 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q78[54:0], 2'd0 } ; - assign _theResult___snd__h426328 = - sfd__h384182 << + assign _theResult___snd__h426329 = + sfd__h384183 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d6264) ; - assign _theResult___snd__h445599 = { _theResult____h437479[55:0], 1'd0 } ; - assign _theResult___snd__h445610 = - (!_theResult____h437479[56] && _theResult____h437479[55]) ? - _theResult___snd__h445612 : - _theResult___snd__h445622 ; - assign _theResult___snd__h445612 = { _theResult____h437479[54:0], 2'd0 } ; - assign _theResult___snd__h445622 = - (!_theResult____h437479[56] && !_theResult____h437479[55] && - !_theResult____h437479[54] && - !_theResult____h437479[53] && - !_theResult____h437479[52] && - !_theResult____h437479[51] && - !_theResult____h437479[50] && - !_theResult____h437479[49] && - !_theResult____h437479[48] && - !_theResult____h437479[47] && - !_theResult____h437479[46] && - !_theResult____h437479[45] && - !_theResult____h437479[44] && - !_theResult____h437479[43] && - !_theResult____h437479[42] && - !_theResult____h437479[41] && - !_theResult____h437479[40] && - !_theResult____h437479[39] && - !_theResult____h437479[38] && - !_theResult____h437479[37] && - !_theResult____h437479[36] && - !_theResult____h437479[35] && - !_theResult____h437479[34] && - !_theResult____h437479[33] && - !_theResult____h437479[32] && - !_theResult____h437479[31] && - !_theResult____h437479[30] && - !_theResult____h437479[29] && - !_theResult____h437479[28] && - !_theResult____h437479[27] && - !_theResult____h437479[26] && - !_theResult____h437479[25] && - !_theResult____h437479[24] && - !_theResult____h437479[23] && - !_theResult____h437479[22] && - !_theResult____h437479[21] && - !_theResult____h437479[20] && - !_theResult____h437479[19] && - !_theResult____h437479[18] && - !_theResult____h437479[17] && - !_theResult____h437479[16] && - !_theResult____h437479[15] && - !_theResult____h437479[14] && - !_theResult____h437479[13] && - !_theResult____h437479[12] && - !_theResult____h437479[11] && - !_theResult____h437479[10] && - !_theResult____h437479[9] && - !_theResult____h437479[8] && - !_theResult____h437479[7] && - !_theResult____h437479[6] && - !_theResult____h437479[5] && - !_theResult____h437479[4] && - !_theResult____h437479[3] && - !_theResult____h437479[2] && - !_theResult____h437479[1] && - !_theResult____h437479[0]) ? - _theResult____h437479 : - _theResult___snd__h445628 ; - assign _theResult___snd__h445628 = + assign _theResult___snd__h445600 = { _theResult____h437480[55:0], 1'd0 } ; + assign _theResult___snd__h445611 = + (!_theResult____h437480[56] && _theResult____h437480[55]) ? + _theResult___snd__h445613 : + _theResult___snd__h445623 ; + assign _theResult___snd__h445613 = { _theResult____h437480[54:0], 2'd0 } ; + assign _theResult___snd__h445623 = + (!_theResult____h437480[56] && !_theResult____h437480[55] && + !_theResult____h437480[54] && + !_theResult____h437480[53] && + !_theResult____h437480[52] && + !_theResult____h437480[51] && + !_theResult____h437480[50] && + !_theResult____h437480[49] && + !_theResult____h437480[48] && + !_theResult____h437480[47] && + !_theResult____h437480[46] && + !_theResult____h437480[45] && + !_theResult____h437480[44] && + !_theResult____h437480[43] && + !_theResult____h437480[42] && + !_theResult____h437480[41] && + !_theResult____h437480[40] && + !_theResult____h437480[39] && + !_theResult____h437480[38] && + !_theResult____h437480[37] && + !_theResult____h437480[36] && + !_theResult____h437480[35] && + !_theResult____h437480[34] && + !_theResult____h437480[33] && + !_theResult____h437480[32] && + !_theResult____h437480[31] && + !_theResult____h437480[30] && + !_theResult____h437480[29] && + !_theResult____h437480[28] && + !_theResult____h437480[27] && + !_theResult____h437480[26] && + !_theResult____h437480[25] && + !_theResult____h437480[24] && + !_theResult____h437480[23] && + !_theResult____h437480[22] && + !_theResult____h437480[21] && + !_theResult____h437480[20] && + !_theResult____h437480[19] && + !_theResult____h437480[18] && + !_theResult____h437480[17] && + !_theResult____h437480[16] && + !_theResult____h437480[15] && + !_theResult____h437480[14] && + !_theResult____h437480[13] && + !_theResult____h437480[12] && + !_theResult____h437480[11] && + !_theResult____h437480[10] && + !_theResult____h437480[9] && + !_theResult____h437480[8] && + !_theResult____h437480[7] && + !_theResult____h437480[6] && + !_theResult____h437480[5] && + !_theResult____h437480[4] && + !_theResult____h437480[3] && + !_theResult____h437480[2] && + !_theResult____h437480[1] && + !_theResult____h437480[0]) ? + _theResult____h437480 : + _theResult___snd__h445629 ; + assign _theResult___snd__h445629 = { IF_0_CONCAT_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMu_ETC__q98[54:0], 2'd0 } ; - assign _theResult___snd__h445651 = - _theResult____h437479 << + assign _theResult___snd__h445652 = + _theResult____h437480 << IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fp_ETC___d7031 ; - assign _theResult___snd__h454195 = + assign _theResult___snd__h454196 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h454204 : - _theResult___snd__h454197 ; - assign _theResult___snd__h454197 = + _theResult___snd__h454205 : + _theResult___snd__h454198 ; + assign _theResult___snd__h454198 = { coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5], 5'd0 } ; - assign _theResult___snd__h454204 = + assign _theResult___snd__h454205 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207) ? - sfd__h429877 : - _theResult___snd__h454210 ; - assign _theResult___snd__h454210 = + sfd__h429878 : + _theResult___snd__h454211 ; + assign _theResult___snd__h454211 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q100[54:0], 2'd0 } ; - assign _theResult___snd__h454233 = - sfd__h429877 << + assign _theResult___snd__h454234 = + sfd__h429878 << IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d7262 ; - assign _theResult___snd__h463365 = { _theResult____h455116[55:0], 1'd0 } ; - assign _theResult___snd__h463376 = - (!_theResult____h455116[56] && _theResult____h455116[55]) ? - _theResult___snd__h463378 : - _theResult___snd__h463388 ; - assign _theResult___snd__h463378 = { _theResult____h455116[54:0], 2'd0 } ; - assign _theResult___snd__h463388 = - (!_theResult____h455116[56] && !_theResult____h455116[55] && - !_theResult____h455116[54] && - !_theResult____h455116[53] && - !_theResult____h455116[52] && - !_theResult____h455116[51] && - !_theResult____h455116[50] && - !_theResult____h455116[49] && - !_theResult____h455116[48] && - !_theResult____h455116[47] && - !_theResult____h455116[46] && - !_theResult____h455116[45] && - !_theResult____h455116[44] && - !_theResult____h455116[43] && - !_theResult____h455116[42] && - !_theResult____h455116[41] && - !_theResult____h455116[40] && - !_theResult____h455116[39] && - !_theResult____h455116[38] && - !_theResult____h455116[37] && - !_theResult____h455116[36] && - !_theResult____h455116[35] && - !_theResult____h455116[34] && - !_theResult____h455116[33] && - !_theResult____h455116[32] && - !_theResult____h455116[31] && - !_theResult____h455116[30] && - !_theResult____h455116[29] && - !_theResult____h455116[28] && - !_theResult____h455116[27] && - !_theResult____h455116[26] && - !_theResult____h455116[25] && - !_theResult____h455116[24] && - !_theResult____h455116[23] && - !_theResult____h455116[22] && - !_theResult____h455116[21] && - !_theResult____h455116[20] && - !_theResult____h455116[19] && - !_theResult____h455116[18] && - !_theResult____h455116[17] && - !_theResult____h455116[16] && - !_theResult____h455116[15] && - !_theResult____h455116[14] && - !_theResult____h455116[13] && - !_theResult____h455116[12] && - !_theResult____h455116[11] && - !_theResult____h455116[10] && - !_theResult____h455116[9] && - !_theResult____h455116[8] && - !_theResult____h455116[7] && - !_theResult____h455116[6] && - !_theResult____h455116[5] && - !_theResult____h455116[4] && - !_theResult____h455116[3] && - !_theResult____h455116[2] && - !_theResult____h455116[1] && - !_theResult____h455116[0]) ? - _theResult____h455116 : - _theResult___snd__h463394 ; - assign _theResult___snd__h463394 = + assign _theResult___snd__h463366 = { _theResult____h455117[55:0], 1'd0 } ; + assign _theResult___snd__h463377 = + (!_theResult____h455117[56] && _theResult____h455117[55]) ? + _theResult___snd__h463379 : + _theResult___snd__h463389 ; + assign _theResult___snd__h463379 = { _theResult____h455117[54:0], 2'd0 } ; + assign _theResult___snd__h463389 = + (!_theResult____h455117[56] && !_theResult____h455117[55] && + !_theResult____h455117[54] && + !_theResult____h455117[53] && + !_theResult____h455117[52] && + !_theResult____h455117[51] && + !_theResult____h455117[50] && + !_theResult____h455117[49] && + !_theResult____h455117[48] && + !_theResult____h455117[47] && + !_theResult____h455117[46] && + !_theResult____h455117[45] && + !_theResult____h455117[44] && + !_theResult____h455117[43] && + !_theResult____h455117[42] && + !_theResult____h455117[41] && + !_theResult____h455117[40] && + !_theResult____h455117[39] && + !_theResult____h455117[38] && + !_theResult____h455117[37] && + !_theResult____h455117[36] && + !_theResult____h455117[35] && + !_theResult____h455117[34] && + !_theResult____h455117[33] && + !_theResult____h455117[32] && + !_theResult____h455117[31] && + !_theResult____h455117[30] && + !_theResult____h455117[29] && + !_theResult____h455117[28] && + !_theResult____h455117[27] && + !_theResult____h455117[26] && + !_theResult____h455117[25] && + !_theResult____h455117[24] && + !_theResult____h455117[23] && + !_theResult____h455117[22] && + !_theResult____h455117[21] && + !_theResult____h455117[20] && + !_theResult____h455117[19] && + !_theResult____h455117[18] && + !_theResult____h455117[17] && + !_theResult____h455117[16] && + !_theResult____h455117[15] && + !_theResult____h455117[14] && + !_theResult____h455117[13] && + !_theResult____h455117[12] && + !_theResult____h455117[11] && + !_theResult____h455117[10] && + !_theResult____h455117[9] && + !_theResult____h455117[8] && + !_theResult____h455117[7] && + !_theResult____h455117[6] && + !_theResult____h455117[5] && + !_theResult____h455117[4] && + !_theResult____h455117[3] && + !_theResult____h455117[2] && + !_theResult____h455117[1] && + !_theResult____h455117[0]) ? + _theResult____h455117 : + _theResult___snd__h463395 ; + assign _theResult___snd__h463395 = { IF_0_CONCAT_IF_IF_3970_MINUS_SEXT_coreFix_fpuM_ETC__q108[54:0], 2'd0 } ; - assign _theResult___snd__h463417 = - _theResult____h455116 << + assign _theResult___snd__h463418 = + _theResult____h455117 << IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_f_ETC___d7582 ; - assign _theResult___snd__h471985 = + assign _theResult___snd__h471986 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0) ? - _theResult___snd__h471999 : - _theResult___snd__h454197 ; - assign _theResult___snd__h471999 = + _theResult___snd__h472000 : + _theResult___snd__h454198 ; + assign _theResult___snd__h472000 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd0 && NOT_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt_ETC___d7207) ? - sfd__h429877 : - _theResult___snd__h472005 ; - assign _theResult___snd__h472005 = + sfd__h429878 : + _theResult___snd__h472006 ; + assign _theResult___snd__h472006 = { IF_0_CONCAT_IF_coreFix_fpuMulDivExe_0_fpuExec__ETC__q113[54:0], 2'd0 } ; - assign _theResult___snd__h472023 = - sfd__h429877 << + assign _theResult___snd__h472024 = + sfd__h429878 << (IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656[8] ? 9'h0AA : IF_SEXT_coreFix_fpuMulDivExe_0_fpuExec_double__ETC___d7656) ; - assign _theResult___snd__h501479 = - (f1_exp__h482140 == 8'd0) ? - _theResult___snd__h501488 : - _theResult___snd__h501481 ; - assign _theResult___snd__h501481 = { f1_sfd__h482141, 34'd0 } ; - assign _theResult___snd__h501488 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___snd__h501480 = + (f1_exp__h482141 == 8'd0) ? + _theResult___snd__h501489 : + _theResult___snd__h501482 ; + assign _theResult___snd__h501482 = { f1_sfd__h482142, 34'd0 } ; + assign _theResult___snd__h501489 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556) ? - sfd__h482502 : - _theResult___snd__h501494 ; - assign _theResult___snd__h501494 = + sfd__h482503 : + _theResult___snd__h501495 ; + assign _theResult___snd__h501495 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q134[54:0], 2'd0 } ; - assign _theResult___snd__h501517 = - sfd__h482502 << + assign _theResult___snd__h501518 = + sfd__h482503 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d8583 ; - assign _theResult___snd__h511116 = { _theResult____h502869[55:0], 1'd0 } ; - assign _theResult___snd__h511127 = - (!_theResult____h502869[56] && _theResult____h502869[55]) ? - _theResult___snd__h511129 : - _theResult___snd__h511139 ; - assign _theResult___snd__h511129 = { _theResult____h502869[54:0], 2'd0 } ; - assign _theResult___snd__h511139 = - (!_theResult____h502869[56] && !_theResult____h502869[55] && - !_theResult____h502869[54] && - !_theResult____h502869[53] && - !_theResult____h502869[52] && - !_theResult____h502869[51] && - !_theResult____h502869[50] && - !_theResult____h502869[49] && - !_theResult____h502869[48] && - !_theResult____h502869[47] && - !_theResult____h502869[46] && - !_theResult____h502869[45] && - !_theResult____h502869[44] && - !_theResult____h502869[43] && - !_theResult____h502869[42] && - !_theResult____h502869[41] && - !_theResult____h502869[40] && - !_theResult____h502869[39] && - !_theResult____h502869[38] && - !_theResult____h502869[37] && - !_theResult____h502869[36] && - !_theResult____h502869[35] && - !_theResult____h502869[34] && - !_theResult____h502869[33] && - !_theResult____h502869[32] && - !_theResult____h502869[31] && - !_theResult____h502869[30] && - !_theResult____h502869[29] && - !_theResult____h502869[28] && - !_theResult____h502869[27] && - !_theResult____h502869[26] && - !_theResult____h502869[25] && - !_theResult____h502869[24] && - !_theResult____h502869[23] && - !_theResult____h502869[22] && - !_theResult____h502869[21] && - !_theResult____h502869[20] && - !_theResult____h502869[19] && - !_theResult____h502869[18] && - !_theResult____h502869[17] && - !_theResult____h502869[16] && - !_theResult____h502869[15] && - !_theResult____h502869[14] && - !_theResult____h502869[13] && - !_theResult____h502869[12] && - !_theResult____h502869[11] && - !_theResult____h502869[10] && - !_theResult____h502869[9] && - !_theResult____h502869[8] && - !_theResult____h502869[7] && - !_theResult____h502869[6] && - !_theResult____h502869[5] && - !_theResult____h502869[4] && - !_theResult____h502869[3] && - !_theResult____h502869[2] && - !_theResult____h502869[1] && - !_theResult____h502869[0]) ? - _theResult____h502869 : - _theResult___snd__h511145 ; - assign _theResult___snd__h511145 = + assign _theResult___snd__h511117 = { _theResult____h502870[55:0], 1'd0 } ; + assign _theResult___snd__h511128 = + (!_theResult____h502870[56] && _theResult____h502870[55]) ? + _theResult___snd__h511130 : + _theResult___snd__h511140 ; + assign _theResult___snd__h511130 = { _theResult____h502870[54:0], 2'd0 } ; + assign _theResult___snd__h511140 = + (!_theResult____h502870[56] && !_theResult____h502870[55] && + !_theResult____h502870[54] && + !_theResult____h502870[53] && + !_theResult____h502870[52] && + !_theResult____h502870[51] && + !_theResult____h502870[50] && + !_theResult____h502870[49] && + !_theResult____h502870[48] && + !_theResult____h502870[47] && + !_theResult____h502870[46] && + !_theResult____h502870[45] && + !_theResult____h502870[44] && + !_theResult____h502870[43] && + !_theResult____h502870[42] && + !_theResult____h502870[41] && + !_theResult____h502870[40] && + !_theResult____h502870[39] && + !_theResult____h502870[38] && + !_theResult____h502870[37] && + !_theResult____h502870[36] && + !_theResult____h502870[35] && + !_theResult____h502870[34] && + !_theResult____h502870[33] && + !_theResult____h502870[32] && + !_theResult____h502870[31] && + !_theResult____h502870[30] && + !_theResult____h502870[29] && + !_theResult____h502870[28] && + !_theResult____h502870[27] && + !_theResult____h502870[26] && + !_theResult____h502870[25] && + !_theResult____h502870[24] && + !_theResult____h502870[23] && + !_theResult____h502870[22] && + !_theResult____h502870[21] && + !_theResult____h502870[20] && + !_theResult____h502870[19] && + !_theResult____h502870[18] && + !_theResult____h502870[17] && + !_theResult____h502870[16] && + !_theResult____h502870[15] && + !_theResult____h502870[14] && + !_theResult____h502870[13] && + !_theResult____h502870[12] && + !_theResult____h502870[11] && + !_theResult____h502870[10] && + !_theResult____h502870[9] && + !_theResult____h502870[8] && + !_theResult____h502870[7] && + !_theResult____h502870[6] && + !_theResult____h502870[5] && + !_theResult____h502870[4] && + !_theResult____h502870[3] && + !_theResult____h502870[2] && + !_theResult____h502870[1] && + !_theResult____h502870[0]) ? + _theResult____h502870 : + _theResult___snd__h511146 ; + assign _theResult___snd__h511146 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q138[54:0], 2'd0 } ; - assign _theResult___snd__h511168 = - _theResult____h502869 << + assign _theResult___snd__h511169 = + _theResult____h502870 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d8895 ; - assign _theResult___snd__h519884 = - (f1_exp__h482140 == 8'd0) ? - _theResult___snd__h519898 : - _theResult___snd__h501481 ; - assign _theResult___snd__h519898 = - (f1_exp__h482140 == 8'd0 && !f1_sfd__h482141[22] && + assign _theResult___snd__h519885 = + (f1_exp__h482141 == 8'd0) ? + _theResult___snd__h519899 : + _theResult___snd__h501482 ; + assign _theResult___snd__h519899 = + (f1_exp__h482141 == 8'd0 && !f1_sfd__h482142[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d8556) ? - sfd__h482502 : - _theResult___snd__h519904 ; - assign _theResult___snd__h519904 = + sfd__h482503 : + _theResult___snd__h519905 ; + assign _theResult___snd__h519905 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q141[54:0], 2'd0 } ; - assign _theResult___snd__h519922 = - sfd__h482502 << + assign _theResult___snd__h519923 = + sfd__h482503 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d8946 ; - assign _theResult___snd__h540332 = - (f2_exp__h521134 == 8'd0) ? - _theResult___snd__h540341 : - _theResult___snd__h540334 ; - assign _theResult___snd__h540334 = { f2_sfd__h521135, 34'd0 } ; - assign _theResult___snd__h540341 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___snd__h540333 = + (f2_exp__h521135 == 8'd0) ? + _theResult___snd__h540342 : + _theResult___snd__h540335 ; + assign _theResult___snd__h540335 = { f2_sfd__h521136, 34'd0 } ; + assign _theResult___snd__h540342 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056) ? - sfd__h521496 : - _theResult___snd__h540347 ; - assign _theResult___snd__h540347 = + sfd__h521497 : + _theResult___snd__h540348 ; + assign _theResult___snd__h540348 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q174[54:0], 2'd0 } ; - assign _theResult___snd__h540370 = - sfd__h521496 << + assign _theResult___snd__h540371 = + sfd__h521497 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10083 ; - assign _theResult___snd__h549969 = { _theResult____h541722[55:0], 1'd0 } ; - assign _theResult___snd__h549980 = - (!_theResult____h541722[56] && _theResult____h541722[55]) ? - _theResult___snd__h549982 : - _theResult___snd__h549992 ; - assign _theResult___snd__h549982 = { _theResult____h541722[54:0], 2'd0 } ; - assign _theResult___snd__h549992 = - (!_theResult____h541722[56] && !_theResult____h541722[55] && - !_theResult____h541722[54] && - !_theResult____h541722[53] && - !_theResult____h541722[52] && - !_theResult____h541722[51] && - !_theResult____h541722[50] && - !_theResult____h541722[49] && - !_theResult____h541722[48] && - !_theResult____h541722[47] && - !_theResult____h541722[46] && - !_theResult____h541722[45] && - !_theResult____h541722[44] && - !_theResult____h541722[43] && - !_theResult____h541722[42] && - !_theResult____h541722[41] && - !_theResult____h541722[40] && - !_theResult____h541722[39] && - !_theResult____h541722[38] && - !_theResult____h541722[37] && - !_theResult____h541722[36] && - !_theResult____h541722[35] && - !_theResult____h541722[34] && - !_theResult____h541722[33] && - !_theResult____h541722[32] && - !_theResult____h541722[31] && - !_theResult____h541722[30] && - !_theResult____h541722[29] && - !_theResult____h541722[28] && - !_theResult____h541722[27] && - !_theResult____h541722[26] && - !_theResult____h541722[25] && - !_theResult____h541722[24] && - !_theResult____h541722[23] && - !_theResult____h541722[22] && - !_theResult____h541722[21] && - !_theResult____h541722[20] && - !_theResult____h541722[19] && - !_theResult____h541722[18] && - !_theResult____h541722[17] && - !_theResult____h541722[16] && - !_theResult____h541722[15] && - !_theResult____h541722[14] && - !_theResult____h541722[13] && - !_theResult____h541722[12] && - !_theResult____h541722[11] && - !_theResult____h541722[10] && - !_theResult____h541722[9] && - !_theResult____h541722[8] && - !_theResult____h541722[7] && - !_theResult____h541722[6] && - !_theResult____h541722[5] && - !_theResult____h541722[4] && - !_theResult____h541722[3] && - !_theResult____h541722[2] && - !_theResult____h541722[1] && - !_theResult____h541722[0]) ? - _theResult____h541722 : - _theResult___snd__h549998 ; - assign _theResult___snd__h549998 = + assign _theResult___snd__h549970 = { _theResult____h541723[55:0], 1'd0 } ; + assign _theResult___snd__h549981 = + (!_theResult____h541723[56] && _theResult____h541723[55]) ? + _theResult___snd__h549983 : + _theResult___snd__h549993 ; + assign _theResult___snd__h549983 = { _theResult____h541723[54:0], 2'd0 } ; + assign _theResult___snd__h549993 = + (!_theResult____h541723[56] && !_theResult____h541723[55] && + !_theResult____h541723[54] && + !_theResult____h541723[53] && + !_theResult____h541723[52] && + !_theResult____h541723[51] && + !_theResult____h541723[50] && + !_theResult____h541723[49] && + !_theResult____h541723[48] && + !_theResult____h541723[47] && + !_theResult____h541723[46] && + !_theResult____h541723[45] && + !_theResult____h541723[44] && + !_theResult____h541723[43] && + !_theResult____h541723[42] && + !_theResult____h541723[41] && + !_theResult____h541723[40] && + !_theResult____h541723[39] && + !_theResult____h541723[38] && + !_theResult____h541723[37] && + !_theResult____h541723[36] && + !_theResult____h541723[35] && + !_theResult____h541723[34] && + !_theResult____h541723[33] && + !_theResult____h541723[32] && + !_theResult____h541723[31] && + !_theResult____h541723[30] && + !_theResult____h541723[29] && + !_theResult____h541723[28] && + !_theResult____h541723[27] && + !_theResult____h541723[26] && + !_theResult____h541723[25] && + !_theResult____h541723[24] && + !_theResult____h541723[23] && + !_theResult____h541723[22] && + !_theResult____h541723[21] && + !_theResult____h541723[20] && + !_theResult____h541723[19] && + !_theResult____h541723[18] && + !_theResult____h541723[17] && + !_theResult____h541723[16] && + !_theResult____h541723[15] && + !_theResult____h541723[14] && + !_theResult____h541723[13] && + !_theResult____h541723[12] && + !_theResult____h541723[11] && + !_theResult____h541723[10] && + !_theResult____h541723[9] && + !_theResult____h541723[8] && + !_theResult____h541723[7] && + !_theResult____h541723[6] && + !_theResult____h541723[5] && + !_theResult____h541723[4] && + !_theResult____h541723[3] && + !_theResult____h541723[2] && + !_theResult____h541723[1] && + !_theResult____h541723[0]) ? + _theResult____h541723 : + _theResult___snd__h549999 ; + assign _theResult___snd__h549999 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q178[54:0], 2'd0 } ; - assign _theResult___snd__h550021 = - _theResult____h541722 << + assign _theResult___snd__h550022 = + _theResult____h541723 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d10380 ; - assign _theResult___snd__h558737 = - (f2_exp__h521134 == 8'd0) ? - _theResult___snd__h558751 : - _theResult___snd__h540334 ; - assign _theResult___snd__h558751 = - (f2_exp__h521134 == 8'd0 && !f2_sfd__h521135[22] && + assign _theResult___snd__h558738 = + (f2_exp__h521135 == 8'd0) ? + _theResult___snd__h558752 : + _theResult___snd__h540335 ; + assign _theResult___snd__h558752 = + (f2_exp__h521135 == 8'd0 && !f2_sfd__h521136[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10056) ? - sfd__h521496 : - _theResult___snd__h558757 ; - assign _theResult___snd__h558757 = + sfd__h521497 : + _theResult___snd__h558758 ; + assign _theResult___snd__h558758 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q181[54:0], 2'd0 } ; - assign _theResult___snd__h558775 = - sfd__h521496 << + assign _theResult___snd__h558776 = + sfd__h521497 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d10431 ; - assign _theResult___snd__h579636 = - (f3_exp__h560438 == 8'd0) ? - _theResult___snd__h579645 : - _theResult___snd__h579638 ; - assign _theResult___snd__h579638 = { f3_sfd__h560439, 34'd0 } ; - assign _theResult___snd__h579645 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___snd__h579637 = + (f3_exp__h560439 == 8'd0) ? + _theResult___snd__h579646 : + _theResult___snd__h579639 ; + assign _theResult___snd__h579639 = { f3_sfd__h560440, 34'd0 } ; + assign _theResult___snd__h579646 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286) ? - sfd__h560800 : - _theResult___snd__h579651 ; - assign _theResult___snd__h579651 = + sfd__h560801 : + _theResult___snd__h579652 ; + assign _theResult___snd__h579652 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q151[54:0], 2'd0 } ; - assign _theResult___snd__h579674 = - sfd__h560800 << + assign _theResult___snd__h579675 = + sfd__h560801 << IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d9313 ; - assign _theResult___snd__h589273 = { _theResult____h581026[55:0], 1'd0 } ; - assign _theResult___snd__h589284 = - (!_theResult____h581026[56] && _theResult____h581026[55]) ? - _theResult___snd__h589286 : - _theResult___snd__h589296 ; - assign _theResult___snd__h589286 = { _theResult____h581026[54:0], 2'd0 } ; - assign _theResult___snd__h589296 = - (!_theResult____h581026[56] && !_theResult____h581026[55] && - !_theResult____h581026[54] && - !_theResult____h581026[53] && - !_theResult____h581026[52] && - !_theResult____h581026[51] && - !_theResult____h581026[50] && - !_theResult____h581026[49] && - !_theResult____h581026[48] && - !_theResult____h581026[47] && - !_theResult____h581026[46] && - !_theResult____h581026[45] && - !_theResult____h581026[44] && - !_theResult____h581026[43] && - !_theResult____h581026[42] && - !_theResult____h581026[41] && - !_theResult____h581026[40] && - !_theResult____h581026[39] && - !_theResult____h581026[38] && - !_theResult____h581026[37] && - !_theResult____h581026[36] && - !_theResult____h581026[35] && - !_theResult____h581026[34] && - !_theResult____h581026[33] && - !_theResult____h581026[32] && - !_theResult____h581026[31] && - !_theResult____h581026[30] && - !_theResult____h581026[29] && - !_theResult____h581026[28] && - !_theResult____h581026[27] && - !_theResult____h581026[26] && - !_theResult____h581026[25] && - !_theResult____h581026[24] && - !_theResult____h581026[23] && - !_theResult____h581026[22] && - !_theResult____h581026[21] && - !_theResult____h581026[20] && - !_theResult____h581026[19] && - !_theResult____h581026[18] && - !_theResult____h581026[17] && - !_theResult____h581026[16] && - !_theResult____h581026[15] && - !_theResult____h581026[14] && - !_theResult____h581026[13] && - !_theResult____h581026[12] && - !_theResult____h581026[11] && - !_theResult____h581026[10] && - !_theResult____h581026[9] && - !_theResult____h581026[8] && - !_theResult____h581026[7] && - !_theResult____h581026[6] && - !_theResult____h581026[5] && - !_theResult____h581026[4] && - !_theResult____h581026[3] && - !_theResult____h581026[2] && - !_theResult____h581026[1] && - !_theResult____h581026[0]) ? - _theResult____h581026 : - _theResult___snd__h589302 ; - assign _theResult___snd__h589302 = + assign _theResult___snd__h589274 = { _theResult____h581027[55:0], 1'd0 } ; + assign _theResult___snd__h589285 = + (!_theResult____h581027[56] && _theResult____h581027[55]) ? + _theResult___snd__h589287 : + _theResult___snd__h589297 ; + assign _theResult___snd__h589287 = { _theResult____h581027[54:0], 2'd0 } ; + assign _theResult___snd__h589297 = + (!_theResult____h581027[56] && !_theResult____h581027[55] && + !_theResult____h581027[54] && + !_theResult____h581027[53] && + !_theResult____h581027[52] && + !_theResult____h581027[51] && + !_theResult____h581027[50] && + !_theResult____h581027[49] && + !_theResult____h581027[48] && + !_theResult____h581027[47] && + !_theResult____h581027[46] && + !_theResult____h581027[45] && + !_theResult____h581027[44] && + !_theResult____h581027[43] && + !_theResult____h581027[42] && + !_theResult____h581027[41] && + !_theResult____h581027[40] && + !_theResult____h581027[39] && + !_theResult____h581027[38] && + !_theResult____h581027[37] && + !_theResult____h581027[36] && + !_theResult____h581027[35] && + !_theResult____h581027[34] && + !_theResult____h581027[33] && + !_theResult____h581027[32] && + !_theResult____h581027[31] && + !_theResult____h581027[30] && + !_theResult____h581027[29] && + !_theResult____h581027[28] && + !_theResult____h581027[27] && + !_theResult____h581027[26] && + !_theResult____h581027[25] && + !_theResult____h581027[24] && + !_theResult____h581027[23] && + !_theResult____h581027[22] && + !_theResult____h581027[21] && + !_theResult____h581027[20] && + !_theResult____h581027[19] && + !_theResult____h581027[18] && + !_theResult____h581027[17] && + !_theResult____h581027[16] && + !_theResult____h581027[15] && + !_theResult____h581027[14] && + !_theResult____h581027[13] && + !_theResult____h581027[12] && + !_theResult____h581027[11] && + !_theResult____h581027[10] && + !_theResult____h581027[9] && + !_theResult____h581027[8] && + !_theResult____h581027[7] && + !_theResult____h581027[6] && + !_theResult____h581027[5] && + !_theResult____h581027[4] && + !_theResult____h581027[3] && + !_theResult____h581027[2] && + !_theResult____h581027[1] && + !_theResult____h581027[0]) ? + _theResult____h581027 : + _theResult___snd__h589303 ; + assign _theResult___snd__h589303 = { IF_0_CONCAT_IF_IF_3074_MINUS_SEXT_IF_coreFix_f_ETC__q155[54:0], 2'd0 } ; - assign _theResult___snd__h589325 = - _theResult____h581026 << + assign _theResult___snd__h589326 = + _theResult____h581027 << IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe__ETC___d9610 ; - assign _theResult___snd__h598041 = - (f3_exp__h560438 == 8'd0) ? - _theResult___snd__h598055 : - _theResult___snd__h579638 ; - assign _theResult___snd__h598055 = - (f3_exp__h560438 == 8'd0 && !f3_sfd__h560439[22] && + assign _theResult___snd__h598042 = + (f3_exp__h560439 == 8'd0) ? + _theResult___snd__h598056 : + _theResult___snd__h579639 ; + assign _theResult___snd__h598056 = + (f3_exp__h560439 == 8'd0 && !f3_sfd__h560440[22] && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d9286) ? - sfd__h560800 : - _theResult___snd__h598061 ; - assign _theResult___snd__h598061 = + sfd__h560801 : + _theResult___snd__h598062 ; + assign _theResult___snd__h598062 = { IF_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_0_regTo_ETC__q158[54:0], 2'd0 } ; - assign _theResult___snd__h598079 = - sfd__h560800 << + assign _theResult___snd__h598080 = + sfd__h560801 << IF_SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_fi_ETC___d9661 ; - assign _theResult___snd__h603371 = - b__h602949[63] ? b___1__h603420 : b__h602949 ; - assign _theResult___snd_fst_exp__h363378 = + assign _theResult___snd__h603372 = + b__h602950[63] ? b___1__h603421 : b__h602950 ; + assign _theResult___snd_fst_exp__h363379 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - _theResult___fst_exp__h354793 : - _theResult___fst_exp__h363375 ; - assign _theResult___snd_fst_exp__h381198 = + _theResult___fst_exp__h354794 : + _theResult___fst_exp__h363376 ; + assign _theResult___snd_fst_exp__h381199 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - _theResult___fst_exp__h372559 : - _theResult___fst_exp__h381195 ; - assign _theResult___snd_fst_exp__h409075 = + _theResult___fst_exp__h372560 : + _theResult___fst_exp__h381196 ; + assign _theResult___snd_fst_exp__h409076 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - _theResult___fst_exp__h400490 : - _theResult___fst_exp__h409072 ; - assign _theResult___snd_fst_exp__h426895 = + _theResult___fst_exp__h400491 : + _theResult___fst_exp__h409073 ; + assign _theResult___snd_fst_exp__h426896 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - _theResult___fst_exp__h418256 : - _theResult___fst_exp__h426892 ; - assign _theResult___snd_fst_exp__h454770 = + _theResult___fst_exp__h418257 : + _theResult___fst_exp__h426893 ; + assign _theResult___snd_fst_exp__h454771 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - _theResult___fst_exp__h446185 : - _theResult___fst_exp__h454767 ; - assign _theResult___snd_fst_exp__h472590 = + _theResult___fst_exp__h446186 : + _theResult___fst_exp__h454768 ; + assign _theResult___snd_fst_exp__h472591 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - _theResult___fst_exp__h463951 : - _theResult___fst_exp__h472587 ; - assign _theResult___snd_fst_exp__h502289 = + _theResult___fst_exp__h463952 : + _theResult___fst_exp__h472588 ; + assign _theResult___snd_fst_exp__h502290 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 ? 11'd0 : - _theResult___fst_exp__h502286 ; - assign _theResult___snd_fst_exp__h520724 = + _theResult___fst_exp__h502287 ; + assign _theResult___snd_fst_exp__h520725 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? - _theResult___fst_exp__h511937 : - _theResult___fst_exp__h520721 ; - assign _theResult___snd_fst_exp__h541142 = + _theResult___fst_exp__h511938 : + _theResult___fst_exp__h520722 ; + assign _theResult___snd_fst_exp__h541143 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? 11'd0 : - _theResult___fst_exp__h541139 ; - assign _theResult___snd_fst_exp__h559577 = + _theResult___fst_exp__h541140 ; + assign _theResult___snd_fst_exp__h559578 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? - _theResult___fst_exp__h550790 : - _theResult___fst_exp__h559574 ; - assign _theResult___snd_fst_exp__h580446 = + _theResult___fst_exp__h550791 : + _theResult___fst_exp__h559575 ; + assign _theResult___snd_fst_exp__h580447 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? 11'd0 : - _theResult___fst_exp__h580443 ; - assign _theResult___snd_fst_exp__h598881 = + _theResult___fst_exp__h580444 ; + assign _theResult___snd_fst_exp__h598882 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? - _theResult___fst_exp__h590094 : - _theResult___fst_exp__h598878 ; - assign _theResult___snd_fst_sfd__h338430 = + _theResult___fst_exp__h590095 : + _theResult___fst_exp__h598879 ; + assign _theResult___snd_fst_sfd__h338431 = (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h363379 = + assign _theResult___snd_fst_sfd__h363380 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d4013 ? - _theResult___fst_sfd__h354794 : - _theResult___fst_sfd__h363376 ; - assign _theResult___snd_fst_sfd__h381199 = + _theResult___fst_sfd__h354795 : + _theResult___fst_sfd__h363377 ; + assign _theResult___snd_fst_sfd__h381200 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_fma_ETC___d4553 ? - _theResult___fst_sfd__h372560 : - _theResult___fst_sfd__h381196 ; - assign _theResult___snd_fst_sfd__h384132 = + _theResult___fst_sfd__h372561 : + _theResult___fst_sfd__h381197 ; + assign _theResult___snd_fst_sfd__h384133 = (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h409076 = + assign _theResult___snd_fst_sfd__h409077 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d5405 ? - _theResult___fst_sfd__h400491 : - _theResult___fst_sfd__h409073 ; - assign _theResult___snd_fst_sfd__h426896 = + _theResult___fst_sfd__h400492 : + _theResult___fst_sfd__h409074 ; + assign _theResult___snd_fst_sfd__h426897 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_div_ETC___d5945 ? - _theResult___fst_sfd__h418257 : - _theResult___fst_sfd__h426893 ; - assign _theResult___snd_fst_sfd__h429827 = + _theResult___fst_sfd__h418258 : + _theResult___fst_sfd__h426894 ; + assign _theResult___snd_fst_sfd__h429828 = (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] == 23'd0) ? 23'd2097152 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:34] ; - assign _theResult___snd_fst_sfd__h454771 = + assign _theResult___snd_fst_sfd__h454772 = _3074_MINUS_0_CONCAT_IF_coreFix_fpuMulDivExe_0__ETC___d6797 ? - _theResult___fst_sfd__h446186 : - _theResult___fst_sfd__h454768 ; - assign _theResult___snd_fst_sfd__h472591 = + _theResult___fst_sfd__h446187 : + _theResult___fst_sfd__h454769 ; + assign _theResult___snd_fst_sfd__h472592 = SEXT_coreFix_fpuMulDivExe_0_fpuExec_double_sqr_ETC___d7337 ? - _theResult___fst_sfd__h463952 : - _theResult___fst_sfd__h472588 ; - assign _theResult___snd_fst_sfd__h482456 = - (f1_sfd__h482141 == 23'd0) ? + _theResult___fst_sfd__h463953 : + _theResult___fst_sfd__h472589 ; + assign _theResult___snd_fst_sfd__h482457 = + (f1_sfd__h482142 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h482204 ; - assign _theResult___snd_fst_sfd__h502290 = + out___1_sfd__h482205 ; + assign _theResult___snd_fst_sfd__h502291 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d8512 ? 52'd0 : - _theResult___fst_sfd__h502287 ; - assign _theResult___snd_fst_sfd__h520725 = + _theResult___fst_sfd__h502288 ; + assign _theResult___snd_fst_sfd__h520726 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d8648 ? - _theResult___fst_sfd__h511938 : - _theResult___fst_sfd__h520722 ; - assign _theResult___snd_fst_sfd__h521450 = - (f2_sfd__h521135 == 23'd0) ? + _theResult___fst_sfd__h511939 : + _theResult___fst_sfd__h520723 ; + assign _theResult___snd_fst_sfd__h521451 = + (f2_sfd__h521136 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h521198 ; - assign _theResult___snd_fst_sfd__h541143 = + out___1_sfd__h521199 ; + assign _theResult___snd_fst_sfd__h541144 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d10012 ? 52'd0 : - _theResult___fst_sfd__h541140 ; - assign _theResult___snd_fst_sfd__h559578 = + _theResult___fst_sfd__h541141 ; + assign _theResult___snd_fst_sfd__h559579 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d10133 ? - _theResult___fst_sfd__h550791 : - _theResult___fst_sfd__h559575 ; - assign _theResult___snd_fst_sfd__h560754 = - (f3_sfd__h560439 == 23'd0) ? + _theResult___fst_sfd__h550792 : + _theResult___fst_sfd__h559576 ; + assign _theResult___snd_fst_sfd__h560755 = + (f3_sfd__h560440 == 23'd0) ? 52'h4000000000000 : - out___1_sfd__h560502 ; - assign _theResult___snd_fst_sfd__h580447 = + out___1_sfd__h560503 ; + assign _theResult___snd_fst_sfd__h580448 = _3970_MINUS_0_CONCAT_IF_IF_coreFix_fpuMulDivExe_ETC___d9242 ? 52'd0 : - _theResult___fst_sfd__h580444 ; - assign _theResult___snd_fst_sfd__h598882 = + _theResult___fst_sfd__h580445 ; + assign _theResult___snd_fst_sfd__h598883 = SEXT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first_ETC___d9363 ? - _theResult___fst_sfd__h590095 : - _theResult___fst_sfd__h598879 ; - assign a___1__h603089 = + _theResult___fst_sfd__h590096 : + _theResult___fst_sfd__h598880 ; + assign a___1__h603090 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd1) ? { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[171:140] } : { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_17_ETC__q11 } ; - assign a___1__h603375 = 64'd0 - a__h602948 ; - assign a__h602948 = + assign a___1__h603376 = 64'd0 - a__h602949 ; + assign a__h602949 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - a___1__h603089 : + a___1__h603090 : coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign b___1__h603090 = + assign b___1__h603091 = (coreFix_fpuMulDivExe_0_regToExeQ$first[226:225] == 2'd0) ? { {32{coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12[31]}}, coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12 } : { 32'd0, coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] } ; - assign b___1__h603420 = 64'd0 - b__h602949 ; - assign b__h602949 = + assign b___1__h603421 = 64'd0 - b__h602950 ; + assign b__h602950 = coreFix_fpuMulDivExe_0_regToExeQ$first[227] ? - b___1__h603090 : + b___1__h603091 : coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; assign base__h712403 = { csrf_stvec_base_hi_reg, 2'b0 } ; assign base__h712423 = { csrf_mtvec_base_hi_reg, 2'b0 } ; @@ -29594,8 +29594,8 @@ module mkCore(CLK, CASE_commitStage_f_rob_dataD_OUT_BITS_165_TO__ETC__q251, trap_val__h709444, IF_commitStage_f_rob_data_first__4755_BITS_97__ETC___d14926 } ; - assign commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450 = - commitStage_rg_serial_num + y__h730732 ; + assign commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456 = + commitStage_rg_serial_num + y__h730489 ; assign coreFix_aluExe_0_bypassWire_0_wget__2203_BITS__ETC___d12205 = coreFix_aluExe_0_bypassWire_0$wget[70:64] == coreFix_aluExe_0_dispToRegQ$first[84:78] ; @@ -29743,9 +29743,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10807 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10847) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10888 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29753,9 +29753,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10876 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10883) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10936 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29763,9 +29763,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10920 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10931) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10978 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29773,9 +29773,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d10964 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d10973) ; assign coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d11020 = (coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd25 || @@ -29783,9 +29783,9 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd27 || coreFix_fpuMulDivExe_0_regToExeQ$first[233:229] == 5'd28) && NOT_IF_coreFix_fpuMulDivExe_0_regToExeQ_first__ETC___d11006 | - ((f3_exp__h560438 != 8'd255 || f3_sfd__h560439 == 23'd0) && - (f3_exp__h560438 != 8'd255 || f3_sfd__h560439 != 23'd0) && - (f3_exp__h560438 != 8'd0 || f3_sfd__h560439 != 23'd0) && + ((f3_exp__h560439 != 8'd255 || f3_sfd__h560440 == 23'd0) && + (f3_exp__h560439 != 8'd255 || f3_sfd__h560440 != 23'd0) && + (f3_exp__h560439 != 8'd0 || f3_sfd__h560440 != 23'd0) && IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_first___ETC___d11015) ; assign coreFix_fpuMulDivExe_0_regToExeQfirst_BITS_10_ETC__q12 = coreFix_fpuMulDivExe_0_regToExeQ$first[107:76] ; @@ -29825,7 +29825,7 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_dummy2_1$Q_OUT && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[58] && coreFix_memExe_dMem_cache_m_banks_0_linkAddrEhr_rl[57:0] == - y__h254803 ; + y__h254804 ; assign coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIn_ETC___d3067 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3031 || @@ -30043,15 +30043,15 @@ module mkCore(CLK, !coreFix_memExe_forwardQ_deqReq_rl) && coreFix_memExe_forwardQ_full ; assign coreFix_memExe_lsq_getOrigBE_coreFix_memExe_re_ETC___d1706 = - { coreFix_memExe_lsq$getOrigBE << x__h183902[2:0], - x__h183902, + { coreFix_memExe_lsq$getOrigBE << x__h183903[2:0], + x__h183903, coreFix_memExe_regToExeQ$first[75:12], coreFix_memExe_lsq$getOrigBE, coreFix_memExe_lsq$getOrigBE[7] ? - x__h183902[2:0] != 3'd0 : + x__h183903[2:0] != 3'd0 : (coreFix_memExe_lsq$getOrigBE[3] ? - x__h183902[1:0] != 2'd0 : - coreFix_memExe_lsq$getOrigBE[1] && x__h183902[0]) } ; + x__h183903[1:0] != 2'd0 : + coreFix_memExe_lsq$getOrigBE[1] && x__h183903[0]) } ; assign coreFix_memExe_memRespLdQ_enqReq_dummy2_2_read_ETC___d3665 = coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3634 || @@ -30181,18 +30181,18 @@ module mkCore(CLK, csrf_rg_dcsr[2] || !fetchStage$pipelines_0_canDeq || fetchStage$RDY_pipelines_0_first && IF_fetchStage_RDY_pipelines_0_first__2754_AND__ETC___d13435 ; - assign data75282_BITS_31_TO_0__q13 = data__h475282[31:0] ; - assign data___1__h475008 = + assign data75283_BITS_31_TO_0__q13 = data__h475283[31:0] ; + assign data___1__h475009 = { {32{IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC__q133[31]}}, IF_coreFix_fpuMulDivExe_0_mulDivExec_mulQ_firs_ETC__q133 } ; - assign data___1__h475816 = - { {32{data75282_BITS_31_TO_0__q13[31]}}, - data75282_BITS_31_TO_0__q13 } ; - assign data__h475282 = + assign data___1__h475817 = + { {32{data75283_BITS_31_TO_0__q13[31]}}, + data75283_BITS_31_TO_0__q13 } ; + assign data__h475283 = (coreFix_fpuMulDivExe_0_mulDivExec_divQ$first_data[35:34] == 2'd2) ? - x_quotient__h475196 : - x_remainder__h475197 ; + x_quotient__h475197 : + x_remainder__h475198 ; assign dcsr_cause__h708962 = (commitStage_commitTrap[36] && commitStage_commitTrap[35:32] == 4'd14) ? @@ -30210,27 +30210,27 @@ module mkCore(CLK, commitStage_commitTrap[35:32] != 4'd14) ? 3'd4 : 3'd1) ; - assign din_inc___2_exp__h381229 = _theResult___fst_exp__h354196 + 8'd1 ; - assign din_inc___2_exp__h381253 = _theResult___fst_exp__h362852 + 8'd1 ; - assign din_inc___2_exp__h381283 = _theResult___fst_exp__h371962 + 8'd1 ; - assign din_inc___2_exp__h381307 = _theResult___fst_exp__h380647 + 8'd1 ; - assign din_inc___2_exp__h426926 = _theResult___fst_exp__h399893 + 8'd1 ; - assign din_inc___2_exp__h426950 = _theResult___fst_exp__h408549 + 8'd1 ; - assign din_inc___2_exp__h426980 = _theResult___fst_exp__h417659 + 8'd1 ; - assign din_inc___2_exp__h427004 = _theResult___fst_exp__h426344 + 8'd1 ; - assign din_inc___2_exp__h472621 = _theResult___fst_exp__h445588 + 8'd1 ; - assign din_inc___2_exp__h472645 = _theResult___fst_exp__h454244 + 8'd1 ; - assign din_inc___2_exp__h472675 = _theResult___fst_exp__h463354 + 8'd1 ; - assign din_inc___2_exp__h472699 = _theResult___fst_exp__h472039 + 8'd1 ; - assign din_inc___2_exp__h520778 = _theResult___fst_exp__h501528 + 11'd1 ; - assign din_inc___2_exp__h520813 = _theResult___fst_exp__h511105 + 11'd1 ; - assign din_inc___2_exp__h520839 = _theResult___fst_exp__h519938 + 11'd1 ; - assign din_inc___2_exp__h559631 = _theResult___fst_exp__h540381 + 11'd1 ; - assign din_inc___2_exp__h559666 = _theResult___fst_exp__h549958 + 11'd1 ; - assign din_inc___2_exp__h559692 = _theResult___fst_exp__h558791 + 11'd1 ; - assign din_inc___2_exp__h598935 = _theResult___fst_exp__h579685 + 11'd1 ; - assign din_inc___2_exp__h598970 = _theResult___fst_exp__h589262 + 11'd1 ; - assign din_inc___2_exp__h598996 = _theResult___fst_exp__h598095 + 11'd1 ; + assign din_inc___2_exp__h381230 = _theResult___fst_exp__h354197 + 8'd1 ; + assign din_inc___2_exp__h381254 = _theResult___fst_exp__h362853 + 8'd1 ; + assign din_inc___2_exp__h381284 = _theResult___fst_exp__h371963 + 8'd1 ; + assign din_inc___2_exp__h381308 = _theResult___fst_exp__h380648 + 8'd1 ; + assign din_inc___2_exp__h426927 = _theResult___fst_exp__h399894 + 8'd1 ; + assign din_inc___2_exp__h426951 = _theResult___fst_exp__h408550 + 8'd1 ; + assign din_inc___2_exp__h426981 = _theResult___fst_exp__h417660 + 8'd1 ; + assign din_inc___2_exp__h427005 = _theResult___fst_exp__h426345 + 8'd1 ; + assign din_inc___2_exp__h472622 = _theResult___fst_exp__h445589 + 8'd1 ; + assign din_inc___2_exp__h472646 = _theResult___fst_exp__h454245 + 8'd1 ; + assign din_inc___2_exp__h472676 = _theResult___fst_exp__h463355 + 8'd1 ; + assign din_inc___2_exp__h472700 = _theResult___fst_exp__h472040 + 8'd1 ; + assign din_inc___2_exp__h520779 = _theResult___fst_exp__h501529 + 11'd1 ; + assign din_inc___2_exp__h520814 = _theResult___fst_exp__h511106 + 11'd1 ; + assign din_inc___2_exp__h520840 = _theResult___fst_exp__h519939 + 11'd1 ; + assign din_inc___2_exp__h559632 = _theResult___fst_exp__h540382 + 11'd1 ; + assign din_inc___2_exp__h559667 = _theResult___fst_exp__h549959 + 11'd1 ; + assign din_inc___2_exp__h559693 = _theResult___fst_exp__h558792 + 11'd1 ; + assign din_inc___2_exp__h598936 = _theResult___fst_exp__h579686 + 11'd1 ; + assign din_inc___2_exp__h598971 = _theResult___fst_exp__h589263 + 11'd1 ; + assign din_inc___2_exp__h598997 = _theResult___fst_exp__h598096 + 11'd1 ; assign enabled_ints___1__h651643 = pend_ints__h651116 & y__h651655 ; assign enabled_ints__h651689 = pend_ints__h651116 & @@ -30256,38 +30256,38 @@ module mkCore(CLK, specTagManager$canClaim) && regRenamingTable_rename_0_canRename__3403_AND__ETC___d13479 && IF_fetchStage_pipelines_0_first__2757_BITS_194_ETC___d13890) ; - assign f1_exp82140_MINUS_127__q136 = f1_exp__h482140 - 8'd127 ; - assign f1_exp__h482140 = + assign f1_exp82141_MINUS_127__q136 = f1_exp__h482141 - 8'd127 ; + assign f1_exp__h482141 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[170:163] : 8'd255 ; - assign f1_sfd__h482141 = + assign f1_sfd__h482142 = (coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[162:140] : 23'd4194304 ; - assign f2_exp21134_MINUS_127__q176 = f2_exp__h521134 - 8'd127 ; - assign f2_exp__h521134 = + assign f2_exp21135_MINUS_127__q176 = f2_exp__h521135 - 8'd127 ; + assign f2_exp__h521135 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[106:99] : 8'd255 ; - assign f2_sfd__h521135 = + assign f2_sfd__h521136 = (coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[98:76] : 23'd4194304 ; - assign f3_exp60438_MINUS_127__q153 = f3_exp__h560438 - 8'd127 ; - assign f3_exp__h560438 = + assign f3_exp60439_MINUS_127__q153 = f3_exp__h560439 - 8'd127 ; + assign f3_exp__h560439 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[42:35] : 8'd255 ; - assign f3_sfd__h560439 = + assign f3_sfd__h560440 = (coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF) ? coreFix_fpuMulDivExe_0_regToExeQ$first[34:12] : 23'd4194304 ; - assign f_csr_rsps_i_notFull__5790_AND_f_csr_reqs_firs_ETC___d15893 = + assign f_csr_rsps_i_notFull__5796_AND_f_csr_reqs_firs_ETC___d15899 = f_csr_rsps$FULL_N && (f_csr_reqs$D_OUT[75:64] != 12'd2049 || csrf_stats_module_writeQ$FULL_N) && @@ -30483,7 +30483,7 @@ module mkCore(CLK, assign fetchStage_pipelines_1_first__2766_BIT_173_358_ETC___d13676 = { fetchStage$pipelines_1_first[173], CASE_fetchStagepipelines_1_first_BITS_172_TO__ETC__q235 } ; - assign fflags__h728257 = + assign fflags__h728014 = ({ rob$deqPort_0_deq_data[361:356], 1'd0, rob$deqPort_0_deq_data[354:350], @@ -30493,8 +30493,8 @@ module mkCore(CLK, rob$deqPort_0_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h728242 ; - assign fflags__h730910 = + po_fflags__h727999 ; + assign fflags__h730667 = ({ rob$deqPort_1_deq_data[361:356], 1'd0, rob$deqPort_1_deq_data[354:350], @@ -30504,82 +30504,82 @@ module mkCore(CLK, rob$deqPort_1_deq_data[336:330] } == 32'hE0000053) ? 5'b0 : - po_fflags__h730895 ; - assign fflags__h733530 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_fst__h733467 : - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 ; + po_fflags__h730652 ; + assign fflags__h733287 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_fst__h733224 : + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 ; assign fflags_csr__read__h609352 = { 59'd0, csrf_fflags_reg } ; assign frm_csr__read__h609363 = { 61'd0, csrf_frm_reg } ; - assign guard__h346095 = - { IF_sfdin54190_BIT_33_THEN_2_ELSE_0__q29[1], - { sfdin__h354190[32:0], 23'd0 } != 56'd0 } ; - assign guard__h354804 = - { IF_theResult___snd62803_BIT_33_THEN_2_ELSE_0__q31[1], - { _theResult___snd__h362803[32:0], 23'd0 } != 56'd0 } ; - assign guard__h363734 = - { IF_sfdin71956_BIT_33_THEN_2_ELSE_0__q39[1], - { sfdin__h371956[32:0], 23'd0 } != 56'd0 } ; - assign guard__h364332 = x__h364434 != 57'd0 ; - assign guard__h372570 = - { IF_theResult___snd80593_BIT_33_THEN_2_ELSE_0__q44[1], - { _theResult___snd__h380593[32:0], 23'd0 } != 56'd0 } ; - assign guard__h391794 = - { IF_sfdin99887_BIT_33_THEN_2_ELSE_0__q64[1], - { sfdin__h399887[32:0], 23'd0 } != 56'd0 } ; - assign guard__h400501 = - { IF_theResult___snd08500_BIT_33_THEN_2_ELSE_0__q66[1], - { _theResult___snd__h408500[32:0], 23'd0 } != 56'd0 } ; - assign guard__h409431 = - { IF_sfdin17653_BIT_33_THEN_2_ELSE_0__q74[1], - { sfdin__h417653[32:0], 23'd0 } != 56'd0 } ; - assign guard__h410029 = x__h410131 != 57'd0 ; - assign guard__h418267 = - { IF_theResult___snd26290_BIT_33_THEN_2_ELSE_0__q79[1], - { _theResult___snd__h426290[32:0], 23'd0 } != 56'd0 } ; - assign guard__h437489 = - { IF_sfdin45582_BIT_33_THEN_2_ELSE_0__q99[1], - { sfdin__h445582[32:0], 23'd0 } != 56'd0 } ; - assign guard__h446196 = - { IF_theResult___snd54195_BIT_33_THEN_2_ELSE_0__q101[1], - { _theResult___snd__h454195[32:0], 23'd0 } != 56'd0 } ; - assign guard__h455126 = - { IF_sfdin63348_BIT_33_THEN_2_ELSE_0__q109[1], - { sfdin__h463348[32:0], 23'd0 } != 56'd0 } ; - assign guard__h455724 = x__h455826 != 57'd0 ; - assign guard__h463962 = - { IF_theResult___snd71985_BIT_33_THEN_2_ELSE_0__q114[1], - { _theResult___snd__h471985[32:0], 23'd0 } != 56'd0 } ; - assign guard__h493567 = - { IF_theResult___snd01479_BIT_4_THEN_2_ELSE_0__q135[1], - { _theResult___snd__h501479[3:0], 52'd0 } != 56'd0 } ; - assign guard__h502879 = - { IF_sfdin11099_BIT_4_THEN_2_ELSE_0__q139[1], - { sfdin__h511099[3:0], 52'd0 } != 56'd0 } ; - assign guard__h503477 = x__h503577 != 57'd0 ; - assign guard__h511948 = - { IF_theResult___snd19884_BIT_4_THEN_2_ELSE_0__q142[1], - { _theResult___snd__h519884[3:0], 52'd0 } != 56'd0 } ; - assign guard__h532420 = - { IF_theResult___snd40332_BIT_4_THEN_2_ELSE_0__q175[1], - { _theResult___snd__h540332[3:0], 52'd0 } != 56'd0 } ; - assign guard__h541732 = - { IF_sfdin49952_BIT_4_THEN_2_ELSE_0__q179[1], - { sfdin__h549952[3:0], 52'd0 } != 56'd0 } ; - assign guard__h542330 = x__h542430 != 57'd0 ; - assign guard__h550801 = - { IF_theResult___snd58737_BIT_4_THEN_2_ELSE_0__q182[1], - { _theResult___snd__h558737[3:0], 52'd0 } != 56'd0 } ; - assign guard__h571724 = - { IF_theResult___snd79636_BIT_4_THEN_2_ELSE_0__q152[1], - { _theResult___snd__h579636[3:0], 52'd0 } != 56'd0 } ; - assign guard__h581036 = - { IF_sfdin89256_BIT_4_THEN_2_ELSE_0__q156[1], - { sfdin__h589256[3:0], 52'd0 } != 56'd0 } ; - assign guard__h581634 = x__h581734 != 57'd0 ; - assign guard__h590105 = - { IF_theResult___snd98041_BIT_4_THEN_2_ELSE_0__q159[1], - { _theResult___snd__h598041[3:0], 52'd0 } != 56'd0 } ; + assign guard__h346096 = + { IF_sfdin54191_BIT_33_THEN_2_ELSE_0__q29[1], + { sfdin__h354191[32:0], 23'd0 } != 56'd0 } ; + assign guard__h354805 = + { IF_theResult___snd62804_BIT_33_THEN_2_ELSE_0__q31[1], + { _theResult___snd__h362804[32:0], 23'd0 } != 56'd0 } ; + assign guard__h363735 = + { IF_sfdin71957_BIT_33_THEN_2_ELSE_0__q39[1], + { sfdin__h371957[32:0], 23'd0 } != 56'd0 } ; + assign guard__h364333 = x__h364435 != 57'd0 ; + assign guard__h372571 = + { IF_theResult___snd80594_BIT_33_THEN_2_ELSE_0__q44[1], + { _theResult___snd__h380594[32:0], 23'd0 } != 56'd0 } ; + assign guard__h391795 = + { IF_sfdin99888_BIT_33_THEN_2_ELSE_0__q64[1], + { sfdin__h399888[32:0], 23'd0 } != 56'd0 } ; + assign guard__h400502 = + { IF_theResult___snd08501_BIT_33_THEN_2_ELSE_0__q66[1], + { _theResult___snd__h408501[32:0], 23'd0 } != 56'd0 } ; + assign guard__h409432 = + { IF_sfdin17654_BIT_33_THEN_2_ELSE_0__q74[1], + { sfdin__h417654[32:0], 23'd0 } != 56'd0 } ; + assign guard__h410030 = x__h410132 != 57'd0 ; + assign guard__h418268 = + { IF_theResult___snd26291_BIT_33_THEN_2_ELSE_0__q79[1], + { _theResult___snd__h426291[32:0], 23'd0 } != 56'd0 } ; + assign guard__h437490 = + { IF_sfdin45583_BIT_33_THEN_2_ELSE_0__q99[1], + { sfdin__h445583[32:0], 23'd0 } != 56'd0 } ; + assign guard__h446197 = + { IF_theResult___snd54196_BIT_33_THEN_2_ELSE_0__q101[1], + { _theResult___snd__h454196[32:0], 23'd0 } != 56'd0 } ; + assign guard__h455127 = + { IF_sfdin63349_BIT_33_THEN_2_ELSE_0__q109[1], + { sfdin__h463349[32:0], 23'd0 } != 56'd0 } ; + assign guard__h455725 = x__h455827 != 57'd0 ; + assign guard__h463963 = + { IF_theResult___snd71986_BIT_33_THEN_2_ELSE_0__q114[1], + { _theResult___snd__h471986[32:0], 23'd0 } != 56'd0 } ; + assign guard__h493568 = + { IF_theResult___snd01480_BIT_4_THEN_2_ELSE_0__q135[1], + { _theResult___snd__h501480[3:0], 52'd0 } != 56'd0 } ; + assign guard__h502880 = + { IF_sfdin11100_BIT_4_THEN_2_ELSE_0__q139[1], + { sfdin__h511100[3:0], 52'd0 } != 56'd0 } ; + assign guard__h503478 = x__h503578 != 57'd0 ; + assign guard__h511949 = + { IF_theResult___snd19885_BIT_4_THEN_2_ELSE_0__q142[1], + { _theResult___snd__h519885[3:0], 52'd0 } != 56'd0 } ; + assign guard__h532421 = + { IF_theResult___snd40333_BIT_4_THEN_2_ELSE_0__q175[1], + { _theResult___snd__h540333[3:0], 52'd0 } != 56'd0 } ; + assign guard__h541733 = + { IF_sfdin49953_BIT_4_THEN_2_ELSE_0__q179[1], + { sfdin__h549953[3:0], 52'd0 } != 56'd0 } ; + assign guard__h542331 = x__h542431 != 57'd0 ; + assign guard__h550802 = + { IF_theResult___snd58738_BIT_4_THEN_2_ELSE_0__q182[1], + { _theResult___snd__h558738[3:0], 52'd0 } != 56'd0 } ; + assign guard__h571725 = + { IF_theResult___snd79637_BIT_4_THEN_2_ELSE_0__q152[1], + { _theResult___snd__h579637[3:0], 52'd0 } != 56'd0 } ; + assign guard__h581037 = + { IF_sfdin89257_BIT_4_THEN_2_ELSE_0__q156[1], + { sfdin__h589257[3:0], 52'd0 } != 56'd0 } ; + assign guard__h581635 = x__h581735 != 57'd0 ; + assign guard__h590106 = + { IF_theResult___snd98042_BIT_4_THEN_2_ELSE_0__q159[1], + { _theResult___snd__h598042[3:0], 52'd0 } != 56'd0 } ; assign idx__h685370 = fetchStage$pipelines_0_canDeq && NOT_fetchStage_pipelines_0_first__2757_BITS_19_ETC___d13746 || @@ -30686,35 +30686,35 @@ module mkCore(CLK, (!mmio_pRsQ_deqReq_dummy2_2$Q_OUT || !mmio_pRsQ_deqReq_lat_0$whas && !mmio_pRsQ_deqReq_rl) && mmio_pRsQ_full ; - assign msip__h76122 = csrf_software_int_pend_vec_3 ; + assign msip__h76123 = csrf_software_int_pend_vec_3 ; assign mstatus_csr__read__h610223 = { r1__read__h614221, csrf_ie_vec_0 } ; assign mtvec_csr__read__h610672 = { r1__read__h614480, csrf_mtvec_mode_low_reg } ; - assign n___1__h198529 = + assign n___1__h198530 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[78] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[70:63] : - x__h197126[63:56], + x__h197127[63:56], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[77] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[62:55] : - x__h197126[55:48], + x__h197127[55:48], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[76] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[54:47] : - x__h197126[47:40], + x__h197127[47:40], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[75] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[46:39] : - x__h197126[39:32], + x__h197127[39:32], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[74] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[38:31] : - x__h197126[31:24], + x__h197127[31:24], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[73] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[30:23] : - x__h197126[23:16], + x__h197127[23:16], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[72] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[22:15] : - x__h197126[15:8], + x__h197127[15:8], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[71] ? coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[14:7] : - x__h197126[7:0] } ; + x__h197127[7:0] } ; assign n__read__h611356 = (csrf_mcycle_ehr_data_dummy2_0$Q_OUT && csrf_mcycle_ehr_data_dummy2_1$Q_OUT) ? @@ -30725,244 +30725,244 @@ module mkCore(CLK, csrf_minstret_ehr_data_dummy2_1$Q_OUT) ? csrf_minstret_ehr_data_rl : 64'd0 ; - assign n__read__h6759 = + assign n__read__h6760 = csrf_mcycle_ehr_data_dummy2_1$Q_OUT ? (csrf_mcycle_ehr_data_lat_0$whas ? - upd__h6873 : + upd__h6874 : csrf_mcycle_ehr_data_rl) : 64'd0 ; - assign n__read__h726937 = + assign n__read__h726694 = csrf_minstret_ehr_data_dummy2_1$Q_OUT ? IF_csrf_minstret_ehr_data_lat_0_whas_THEN_csrf_ETC___d8 : 64'd0 ; - assign next_deqP___1__h296800 = + assign next_deqP___1__h296801 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP + 3'd1 ; - assign next_deqP___1__h304796 = + assign next_deqP___1__h304797 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP + 1'd1 ; - assign next_deqP___1__h311077 = + assign next_deqP___1__h311078 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_deqP + 1'd1 ; - assign next_deqP___1__h318931 = + assign next_deqP___1__h318932 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_deqP + 1'd1 ; - assign next_deqP___1__h328988 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; - assign next_deqP___1__h332213 = coreFix_memExe_forwardQ_deqP + 1'd1 ; + assign next_deqP___1__h328989 = coreFix_memExe_memRespLdQ_deqP + 1'd1 ; + assign next_deqP___1__h332214 = coreFix_memExe_forwardQ_deqP + 1'd1 ; assign next_pc__h722452 = (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? rob$deqPort_0_deq_data[95:32] : rob$deqPort_0_deq_data[425:362] + 64'd4 ; - assign old_fflags__h733017 = + assign old_fflags__h732774 = csrf_fflags_reg | rob$deqPort_0_deq_data[31:27] ; - assign out___1_sfd__h482204 = { f1_sfd__h482141, 29'd0 } ; - assign out___1_sfd__h521198 = { f2_sfd__h521135, 29'd0 } ; - assign out___1_sfd__h560502 = { f3_sfd__h560439, 29'd0 } ; - assign out_exp__h354715 = - sfdin__h354190[34] ? - _theResult___exp__h354712 : - _theResult___fst_exp__h354196 ; - assign out_exp__h363297 = - _theResult___snd__h362803[34] ? - _theResult___exp__h363294 : - _theResult___fst_exp__h362852 ; - assign out_exp__h372481 = - sfdin__h371956[34] ? - _theResult___exp__h372478 : - _theResult___fst_exp__h371962 ; - assign out_exp__h381117 = - _theResult___snd__h380593[34] ? - _theResult___exp__h381114 : - _theResult___fst_exp__h380647 ; - assign out_exp__h400412 = - sfdin__h399887[34] ? - _theResult___exp__h400409 : - _theResult___fst_exp__h399893 ; - assign out_exp__h408994 = - _theResult___snd__h408500[34] ? - _theResult___exp__h408991 : - _theResult___fst_exp__h408549 ; - assign out_exp__h418178 = - sfdin__h417653[34] ? - _theResult___exp__h418175 : - _theResult___fst_exp__h417659 ; - assign out_exp__h426814 = - _theResult___snd__h426290[34] ? - _theResult___exp__h426811 : - _theResult___fst_exp__h426344 ; - assign out_exp__h446107 = - sfdin__h445582[34] ? - _theResult___exp__h446104 : - _theResult___fst_exp__h445588 ; - assign out_exp__h454689 = - _theResult___snd__h454195[34] ? - _theResult___exp__h454686 : - _theResult___fst_exp__h454244 ; - assign out_exp__h463873 = - sfdin__h463348[34] ? - _theResult___exp__h463870 : - _theResult___fst_exp__h463354 ; - assign out_exp__h472509 = - _theResult___snd__h471985[34] ? - _theResult___exp__h472506 : - _theResult___fst_exp__h472039 ; - assign out_exp__h502186 = - _theResult___snd__h501479[5] ? - _theResult___exp__h502183 : - _theResult___fst_exp__h501528 ; - assign out_exp__h511837 = - sfdin__h511099[5] ? - _theResult___exp__h511834 : - _theResult___fst_exp__h511105 ; - assign out_exp__h520621 = - _theResult___snd__h519884[5] ? - _theResult___exp__h520618 : - _theResult___fst_exp__h519938 ; - assign out_exp__h541039 = - _theResult___snd__h540332[5] ? - _theResult___exp__h541036 : - _theResult___fst_exp__h540381 ; - assign out_exp__h550690 = - sfdin__h549952[5] ? - _theResult___exp__h550687 : - _theResult___fst_exp__h549958 ; - assign out_exp__h559474 = - _theResult___snd__h558737[5] ? - _theResult___exp__h559471 : - _theResult___fst_exp__h558791 ; - assign out_exp__h580343 = - _theResult___snd__h579636[5] ? - _theResult___exp__h580340 : - _theResult___fst_exp__h579685 ; - assign out_exp__h589994 = - sfdin__h589256[5] ? - _theResult___exp__h589991 : - _theResult___fst_exp__h589262 ; - assign out_exp__h598778 = - _theResult___snd__h598041[5] ? - _theResult___exp__h598775 : - _theResult___fst_exp__h598095 ; - assign out_f_exp__h381493 = - (_theResult___exp__h381216 == 8'd255 && - _theResult___sfd__h381217 != 23'd0 || + assign out___1_sfd__h482205 = { f1_sfd__h482142, 29'd0 } ; + assign out___1_sfd__h521199 = { f2_sfd__h521136, 29'd0 } ; + assign out___1_sfd__h560503 = { f3_sfd__h560440, 29'd0 } ; + assign out_exp__h354716 = + sfdin__h354191[34] ? + _theResult___exp__h354713 : + _theResult___fst_exp__h354197 ; + assign out_exp__h363298 = + _theResult___snd__h362804[34] ? + _theResult___exp__h363295 : + _theResult___fst_exp__h362853 ; + assign out_exp__h372482 = + sfdin__h371957[34] ? + _theResult___exp__h372479 : + _theResult___fst_exp__h371963 ; + assign out_exp__h381118 = + _theResult___snd__h380594[34] ? + _theResult___exp__h381115 : + _theResult___fst_exp__h380648 ; + assign out_exp__h400413 = + sfdin__h399888[34] ? + _theResult___exp__h400410 : + _theResult___fst_exp__h399894 ; + assign out_exp__h408995 = + _theResult___snd__h408501[34] ? + _theResult___exp__h408992 : + _theResult___fst_exp__h408550 ; + assign out_exp__h418179 = + sfdin__h417654[34] ? + _theResult___exp__h418176 : + _theResult___fst_exp__h417660 ; + assign out_exp__h426815 = + _theResult___snd__h426291[34] ? + _theResult___exp__h426812 : + _theResult___fst_exp__h426345 ; + assign out_exp__h446108 = + sfdin__h445583[34] ? + _theResult___exp__h446105 : + _theResult___fst_exp__h445589 ; + assign out_exp__h454690 = + _theResult___snd__h454196[34] ? + _theResult___exp__h454687 : + _theResult___fst_exp__h454245 ; + assign out_exp__h463874 = + sfdin__h463349[34] ? + _theResult___exp__h463871 : + _theResult___fst_exp__h463355 ; + assign out_exp__h472510 = + _theResult___snd__h471986[34] ? + _theResult___exp__h472507 : + _theResult___fst_exp__h472040 ; + assign out_exp__h502187 = + _theResult___snd__h501480[5] ? + _theResult___exp__h502184 : + _theResult___fst_exp__h501529 ; + assign out_exp__h511838 = + sfdin__h511100[5] ? + _theResult___exp__h511835 : + _theResult___fst_exp__h511106 ; + assign out_exp__h520622 = + _theResult___snd__h519885[5] ? + _theResult___exp__h520619 : + _theResult___fst_exp__h519939 ; + assign out_exp__h541040 = + _theResult___snd__h540333[5] ? + _theResult___exp__h541037 : + _theResult___fst_exp__h540382 ; + assign out_exp__h550691 = + sfdin__h549953[5] ? + _theResult___exp__h550688 : + _theResult___fst_exp__h549959 ; + assign out_exp__h559475 = + _theResult___snd__h558738[5] ? + _theResult___exp__h559472 : + _theResult___fst_exp__h558792 ; + assign out_exp__h580344 = + _theResult___snd__h579637[5] ? + _theResult___exp__h580341 : + _theResult___fst_exp__h579686 ; + assign out_exp__h589995 = + sfdin__h589257[5] ? + _theResult___exp__h589992 : + _theResult___fst_exp__h589263 ; + assign out_exp__h598779 = + _theResult___snd__h598042[5] ? + _theResult___exp__h598776 : + _theResult___fst_exp__h598096 ; + assign out_f_exp__h381494 = + (_theResult___exp__h381217 == 8'd255 && + _theResult___sfd__h381218 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h381207 ; - assign out_f_exp__h427190 = - (_theResult___exp__h426913 == 8'd255 && - _theResult___sfd__h426914 != 23'd0 || + _theResult___fst_exp__h381208 ; + assign out_f_exp__h427191 = + (_theResult___exp__h426914 == 8'd255 && + _theResult___sfd__h426915 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h426904 ; - assign out_f_exp__h472885 = - (_theResult___exp__h472608 == 8'd255 && - _theResult___sfd__h472609 != 23'd0 || + _theResult___fst_exp__h426905 ; + assign out_f_exp__h472886 = + (_theResult___exp__h472609 == 8'd255 && + _theResult___sfd__h472610 != 23'd0 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] == 11'd2047) ? 8'd255 : - _theResult___fst_exp__h472599 ; - assign out_f_sfd__h381494 = - (_theResult___exp__h381216 == 8'd255 && - _theResult___sfd__h381217 != 23'd0) ? + _theResult___fst_exp__h472600 ; + assign out_f_sfd__h381495 = + (_theResult___exp__h381217 == 8'd255 && + _theResult___sfd__h381218 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h381217 ; - assign out_f_sfd__h427191 = - (_theResult___exp__h426913 == 8'd255 && - _theResult___sfd__h426914 != 23'd0) ? + _theResult___sfd__h381218 ; + assign out_f_sfd__h427192 = + (_theResult___exp__h426914 == 8'd255 && + _theResult___sfd__h426915 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h426914 ; - assign out_f_sfd__h472886 = - (_theResult___exp__h472608 == 8'd255 && - _theResult___sfd__h472609 != 23'd0) ? + _theResult___sfd__h426915 ; + assign out_f_sfd__h472887 = + (_theResult___exp__h472609 == 8'd255 && + _theResult___sfd__h472610 != 23'd0) ? 23'd4194304 : - _theResult___sfd__h472609 ; - assign out_sfd__h354716 = - sfdin__h354190[34] ? - _theResult___sfd__h354713 : - sfdin__h354190[56:34] ; - assign out_sfd__h363298 = - _theResult___snd__h362803[34] ? - _theResult___sfd__h363295 : - _theResult___snd__h362803[56:34] ; - assign out_sfd__h372482 = - sfdin__h371956[34] ? - _theResult___sfd__h372479 : - sfdin__h371956[56:34] ; - assign out_sfd__h381118 = - _theResult___snd__h380593[34] ? - _theResult___sfd__h381115 : - _theResult___snd__h380593[56:34] ; - assign out_sfd__h400413 = - sfdin__h399887[34] ? - _theResult___sfd__h400410 : - sfdin__h399887[56:34] ; - assign out_sfd__h408995 = - _theResult___snd__h408500[34] ? - _theResult___sfd__h408992 : - _theResult___snd__h408500[56:34] ; - assign out_sfd__h418179 = - sfdin__h417653[34] ? - _theResult___sfd__h418176 : - sfdin__h417653[56:34] ; - assign out_sfd__h426815 = - _theResult___snd__h426290[34] ? - _theResult___sfd__h426812 : - _theResult___snd__h426290[56:34] ; - assign out_sfd__h446108 = - sfdin__h445582[34] ? - _theResult___sfd__h446105 : - sfdin__h445582[56:34] ; - assign out_sfd__h454690 = - _theResult___snd__h454195[34] ? - _theResult___sfd__h454687 : - _theResult___snd__h454195[56:34] ; - assign out_sfd__h463874 = - sfdin__h463348[34] ? - _theResult___sfd__h463871 : - sfdin__h463348[56:34] ; - assign out_sfd__h472510 = - _theResult___snd__h471985[34] ? - _theResult___sfd__h472507 : - _theResult___snd__h471985[56:34] ; - assign out_sfd__h502187 = - _theResult___snd__h501479[5] ? - _theResult___sfd__h502184 : - _theResult___snd__h501479[56:5] ; - assign out_sfd__h511838 = - sfdin__h511099[5] ? - _theResult___sfd__h511835 : - sfdin__h511099[56:5] ; - assign out_sfd__h520622 = - _theResult___snd__h519884[5] ? - _theResult___sfd__h520619 : - _theResult___snd__h519884[56:5] ; - assign out_sfd__h541040 = - _theResult___snd__h540332[5] ? - _theResult___sfd__h541037 : - _theResult___snd__h540332[56:5] ; - assign out_sfd__h550691 = - sfdin__h549952[5] ? - _theResult___sfd__h550688 : - sfdin__h549952[56:5] ; - assign out_sfd__h559475 = - _theResult___snd__h558737[5] ? - _theResult___sfd__h559472 : - _theResult___snd__h558737[56:5] ; - assign out_sfd__h580344 = - _theResult___snd__h579636[5] ? - _theResult___sfd__h580341 : - _theResult___snd__h579636[56:5] ; - assign out_sfd__h589995 = - sfdin__h589256[5] ? - _theResult___sfd__h589992 : - sfdin__h589256[56:5] ; - assign out_sfd__h598779 = - _theResult___snd__h598041[5] ? - _theResult___sfd__h598776 : - _theResult___snd__h598041[56:5] ; + _theResult___sfd__h472610 ; + assign out_sfd__h354717 = + sfdin__h354191[34] ? + _theResult___sfd__h354714 : + sfdin__h354191[56:34] ; + assign out_sfd__h363299 = + _theResult___snd__h362804[34] ? + _theResult___sfd__h363296 : + _theResult___snd__h362804[56:34] ; + assign out_sfd__h372483 = + sfdin__h371957[34] ? + _theResult___sfd__h372480 : + sfdin__h371957[56:34] ; + assign out_sfd__h381119 = + _theResult___snd__h380594[34] ? + _theResult___sfd__h381116 : + _theResult___snd__h380594[56:34] ; + assign out_sfd__h400414 = + sfdin__h399888[34] ? + _theResult___sfd__h400411 : + sfdin__h399888[56:34] ; + assign out_sfd__h408996 = + _theResult___snd__h408501[34] ? + _theResult___sfd__h408993 : + _theResult___snd__h408501[56:34] ; + assign out_sfd__h418180 = + sfdin__h417654[34] ? + _theResult___sfd__h418177 : + sfdin__h417654[56:34] ; + assign out_sfd__h426816 = + _theResult___snd__h426291[34] ? + _theResult___sfd__h426813 : + _theResult___snd__h426291[56:34] ; + assign out_sfd__h446109 = + sfdin__h445583[34] ? + _theResult___sfd__h446106 : + sfdin__h445583[56:34] ; + assign out_sfd__h454691 = + _theResult___snd__h454196[34] ? + _theResult___sfd__h454688 : + _theResult___snd__h454196[56:34] ; + assign out_sfd__h463875 = + sfdin__h463349[34] ? + _theResult___sfd__h463872 : + sfdin__h463349[56:34] ; + assign out_sfd__h472511 = + _theResult___snd__h471986[34] ? + _theResult___sfd__h472508 : + _theResult___snd__h471986[56:34] ; + assign out_sfd__h502188 = + _theResult___snd__h501480[5] ? + _theResult___sfd__h502185 : + _theResult___snd__h501480[56:5] ; + assign out_sfd__h511839 = + sfdin__h511100[5] ? + _theResult___sfd__h511836 : + sfdin__h511100[56:5] ; + assign out_sfd__h520623 = + _theResult___snd__h519885[5] ? + _theResult___sfd__h520620 : + _theResult___snd__h519885[56:5] ; + assign out_sfd__h541041 = + _theResult___snd__h540333[5] ? + _theResult___sfd__h541038 : + _theResult___snd__h540333[56:5] ; + assign out_sfd__h550692 = + sfdin__h549953[5] ? + _theResult___sfd__h550689 : + sfdin__h549953[56:5] ; + assign out_sfd__h559476 = + _theResult___snd__h558738[5] ? + _theResult___sfd__h559473 : + _theResult___snd__h558738[56:5] ; + assign out_sfd__h580345 = + _theResult___snd__h579637[5] ? + _theResult___sfd__h580342 : + _theResult___snd__h579637[56:5] ; + assign out_sfd__h589996 = + sfdin__h589257[5] ? + _theResult___sfd__h589993 : + sfdin__h589257[56:5] ; + assign out_sfd__h598780 = + _theResult___snd__h598042[5] ? + _theResult___sfd__h598777 : + _theResult___snd__h598042[56:5] ; assign pc__h712387 = csrf_prv_reg_read__2787_ULE_1_4696_AND_IF_comm_ETC___d14718 ? y_avValue_new_pc__h712179 : @@ -30973,12 +30973,12 @@ module mkCore(CLK, 1'd0, csrf_software_int_en_vec_1 & csrf_software_int_pend_vec_1, 1'd0 } ; - assign po_fflags__h728242 = old_fflags__h733017 ; - assign po_fflags__h730895 = - old_fflags__h733017 | rob$deqPort_1_deq_data[31:27] ; - assign prv__h735199 = csrf_prv_reg ; - assign prv__h735243 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; - assign q___1__h475881 = + assign po_fflags__h727999 = old_fflags__h732774 ; + assign po_fflags__h730652 = + old_fflags__h732774 | rob$deqPort_1_deq_data[31:27] ; + assign prv__h734956 = csrf_prv_reg ; + assign prv__h735000 = csrf_mprv_reg ? csrf_mpp_reg : csrf_prv_reg ; + assign q___1__h475882 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[127:64] ; assign r1__read_BITS_13_TO_0___h651665 = @@ -30990,7 +30990,7 @@ module mkCore(CLK, csrf_mideleg_5_3_reg, 1'b0 } ; assign r1__read_BITS_13_TO_12___h655197 = csrf_fs_reg ; - assign r1__read_BITS_62_TO_14___h729920 = { r1__read__h614245, 2'd0 } ; + assign r1__read_BITS_62_TO_14___h729677 = { r1__read__h614245, 2'd0 } ; assign r1__read_BIT_20___h655893 = csrf_tw_reg ; assign r1__read__h613050 = { r1__read__h613052, csrf_ie_vec_1 } ; assign r1__read__h613052 = { r1__read__h613054, 2'b0 } ; @@ -31040,7 +31040,7 @@ module mkCore(CLK, assign r1__read__h614237 = { r1__read__h614239, 2'b0 } ; assign r1__read__h614239 = { r1__read__h614241, csrf_mpp_reg } ; assign r1__read__h614241 = - { r1__read_BITS_62_TO_14___h729920, csrf_fs_reg } ; + { r1__read_BITS_62_TO_14___h729677, csrf_fs_reg } ; assign r1__read__h614245 = { r1__read__h614247, csrf_mprv_reg } ; assign r1__read__h614247 = { r1__read__h614249, csrf_sum_reg } ; assign r1__read__h614249 = { r1__read__h614251, csrf_mxr_reg } ; @@ -31096,9 +31096,9 @@ module mkCore(CLK, assign r1__read__h614522 = { r1__read__h614524, 1'b0 } ; assign r1__read__h614524 = { 52'b0, csrf_external_int_pend_vec_3 } ; assign r1__read__h614601 = { 4'd0, csrf_rg_tdata1_dmode } ; - assign rVal1__h481761 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; - assign rVal2__h481762 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; - assign r___1__h475907 = + assign rVal1__h481762 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:140] ; + assign rVal2__h481763 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:76] ; + assign r___1__h475908 = 64'd0 - coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[63:0] ; assign regRenamingTable_RDY_rename_0_getRename__3300__ETC___d13309 = @@ -31323,8 +31323,8 @@ module mkCore(CLK, fetchStage$pipelines_0_canDeq ? y_avValue_fst__h681634 : specTagManager$currentSpecBits ; - assign res_data__h337869 = { 32'hFFFFFFFF, x__h337884 } ; - assign res_data__h337874 = + assign res_data__h337870 = { 32'hFFFFFFFF, x__h337885 } ; + assign res_data__h337875 = { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] == @@ -31337,8 +31337,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:5] } ; - assign res_data__h383571 = { 32'hFFFFFFFF, x__h383586 } ; - assign res_data__h383576 = + assign res_data__h383572 = { 32'hFFFFFFFF, x__h383587 } ; + assign res_data__h383577 = { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] == @@ -31351,8 +31351,8 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:5] } ; - assign res_data__h429266 = { 32'hFFFFFFFF, x__h429281 } ; - assign res_data__h429271 = + assign res_data__h429267 = { 32'hFFFFFFFF, x__h429282 } ; + assign res_data__h429272 = { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd2047 || coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] == @@ -31365,7 +31365,7 @@ module mkCore(CLK, 52'd0) ? 63'h7FF8000000000000 : coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:5] } ; - assign res_fflags__h337870 = + assign res_fflags__h337871 = coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != @@ -31433,7 +31433,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_fma_r_ETC___d5255 } ; - assign res_fflags__h383572 = + assign res_fflags__h383573 = coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != @@ -31501,7 +31501,7 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_div_r_ETC___d6647 } ; - assign res_fflags__h429267 = + assign res_fflags__h429268 = coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[38:34] | coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[4:0] | { (coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != @@ -31569,36 +31569,36 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] != 52'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_double_sqrt__ETC___d8039 } ; - assign resp_addr__h291971 = + assign resp_addr__h291972 = { coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getSlot[52:1], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$sendRsToP_cRq_getRq[95:84] } ; - assign result__h364337 = + assign result__h364338 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d4558[0] | - guard__h364332 } ; - assign result__h410034 = + guard__h364333 } ; + assign result__h410035 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d5950[0] | - guard__h410029 } ; - assign result__h455729 = + guard__h410030 } ; + assign result__h455730 = { _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342[56:1], _0b0_CONCAT_NOT_coreFix_fpuMulDivExe_0_fpuExec__ETC___d7342[0] | - guard__h455724 } ; - assign result__h503482 = + guard__h455725 } ; + assign result__h503483 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d8653[0] | - guard__h503477 } ; - assign result__h542335 = + guard__h503478 } ; + assign result__h542336 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d10138[0] | - guard__h542330 } ; - assign result__h581639 = + guard__h542331 } ; + assign result__h581640 = { _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368[56:1], _0b0_CONCAT_NOT_IF_coreFix_fpuMulDivExe_0_regTo_ETC___d9368[0] | - guard__h581634 } ; + guard__h581635 } ; assign result__h646695 = w__h646690 & y__h646724 ; assign result__h646746 = ~x__h646745 ; - assign rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15729 = + assign rg_core_run_state_read__3058_EQ_2_3059_AND_NOT_ETC___d15735 = rg_core_run_state == 2'd2 && !flush_reservation && !flush_tlbs && !update_vm_info && fetchStage$iTlbIfc_flush_done && @@ -31613,7 +31613,7 @@ module mkCore(CLK, fetchStage$iTlbIfc_noPendingReq && coreFix_memExe_dTlb$noPendingReq && NOT_rob_deqPort_0_deq_data__4339_BITS_329_TO_3_ETC___d14993 ; - assign rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15292 = + assign rob_deqPort_0_deq_data__4339_BITS_161_TO_98_43_ETC___d15298 = { rob$deqPort_0_deq_data[161:98], (rob$deqPort_0_deq_data[329:325] != 5'd13 && rob$deqPort_0_deq_data[97:96] == 2'd0) ? @@ -31630,7 +31630,7 @@ module mkCore(CLK, 64'hAAAAAAAAAAAAAAAA, x_prv__h723013, 64'hAAAAAAAAAAAAAAAA, - x__h726431, + x__h726188, 128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ; assign rob_deqPort_0_deq_data__4339_BIT_166_4355_CONC_ETC___d14404 = { rob$deqPort_0_deq_data[166], @@ -31667,7 +31667,7 @@ module mkCore(CLK, (sbCons$lazyLookup_3_get[2] || IF_coreFix_memExe_dispToRegQ_RDY_first__549_AN_ETC___d1612 && IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1629) ; - assign sbIdx__h157151 = + assign sbIdx__h157152 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[65:64] : @@ -31677,155 +31677,155 @@ module mkCore(CLK, { r1__read__h613982, csrf_scause_code_reg } ; assign scounteren_csr__read__h609739 = { r1__read__h613969, csrf_scounteren_cy_reg } ; - assign sfd__h338480 = { value__h346707, 3'd0 } ; - assign sfd__h354288 = + assign sfd__h338481 = { value__h346708, 3'd0 } ; + assign sfd__h354289 = { 1'b0, - _theResult___fst_exp__h354196 != 8'd0, - sfdin__h354190[56:34] } + + _theResult___fst_exp__h354197 != 8'd0, + sfdin__h354191[56:34] } + 25'd1 ; - assign sfd__h362870 = + assign sfd__h362871 = { 1'b0, - _theResult___fst_exp__h362852 != 8'd0, - _theResult___snd__h362803[56:34] } + + _theResult___fst_exp__h362853 != 8'd0, + _theResult___snd__h362804[56:34] } + 25'd1 ; - assign sfd__h372054 = + assign sfd__h372055 = { 1'b0, - _theResult___fst_exp__h371962 != 8'd0, - sfdin__h371956[56:34] } + + _theResult___fst_exp__h371963 != 8'd0, + sfdin__h371957[56:34] } + 25'd1 ; - assign sfd__h380666 = + assign sfd__h380667 = { 1'b0, - _theResult___fst_exp__h380647 != 8'd0, - _theResult___snd__h380593[56:34] } + + _theResult___fst_exp__h380648 != 8'd0, + _theResult___snd__h380594[56:34] } + 25'd1 ; - assign sfd__h384182 = { value__h392404, 3'd0 } ; - assign sfd__h399985 = + assign sfd__h384183 = { value__h392405, 3'd0 } ; + assign sfd__h399986 = { 1'b0, - _theResult___fst_exp__h399893 != 8'd0, - sfdin__h399887[56:34] } + + _theResult___fst_exp__h399894 != 8'd0, + sfdin__h399888[56:34] } + 25'd1 ; - assign sfd__h408567 = + assign sfd__h408568 = { 1'b0, - _theResult___fst_exp__h408549 != 8'd0, - _theResult___snd__h408500[56:34] } + + _theResult___fst_exp__h408550 != 8'd0, + _theResult___snd__h408501[56:34] } + 25'd1 ; - assign sfd__h417751 = + assign sfd__h417752 = { 1'b0, - _theResult___fst_exp__h417659 != 8'd0, - sfdin__h417653[56:34] } + + _theResult___fst_exp__h417660 != 8'd0, + sfdin__h417654[56:34] } + 25'd1 ; - assign sfd__h426363 = + assign sfd__h426364 = { 1'b0, - _theResult___fst_exp__h426344 != 8'd0, - _theResult___snd__h426290[56:34] } + + _theResult___fst_exp__h426345 != 8'd0, + _theResult___snd__h426291[56:34] } + 25'd1 ; - assign sfd__h429877 = { value__h438099, 3'd0 } ; - assign sfd__h445680 = + assign sfd__h429878 = { value__h438100, 3'd0 } ; + assign sfd__h445681 = { 1'b0, - _theResult___fst_exp__h445588 != 8'd0, - sfdin__h445582[56:34] } + + _theResult___fst_exp__h445589 != 8'd0, + sfdin__h445583[56:34] } + 25'd1 ; - assign sfd__h454262 = + assign sfd__h454263 = { 1'b0, - _theResult___fst_exp__h454244 != 8'd0, - _theResult___snd__h454195[56:34] } + + _theResult___fst_exp__h454245 != 8'd0, + _theResult___snd__h454196[56:34] } + 25'd1 ; - assign sfd__h463446 = + assign sfd__h463447 = { 1'b0, - _theResult___fst_exp__h463354 != 8'd0, - sfdin__h463348[56:34] } + + _theResult___fst_exp__h463355 != 8'd0, + sfdin__h463349[56:34] } + 25'd1 ; - assign sfd__h472058 = + assign sfd__h472059 = { 1'b0, - _theResult___fst_exp__h472039 != 8'd0, - _theResult___snd__h471985[56:34] } + + _theResult___fst_exp__h472040 != 8'd0, + _theResult___snd__h471986[56:34] } + 25'd1 ; - assign sfd__h482502 = { value__h487085, 32'd0 } ; - assign sfd__h501546 = + assign sfd__h482503 = { value__h487086, 32'd0 } ; + assign sfd__h501547 = { 1'b0, - _theResult___fst_exp__h501528 != 11'd0, - _theResult___snd__h501479[56:5] } + + _theResult___fst_exp__h501529 != 11'd0, + _theResult___snd__h501480[56:5] } + 54'd1 ; - assign sfd__h511197 = + assign sfd__h511198 = { 1'b0, - _theResult___fst_exp__h511105 != 11'd0, - sfdin__h511099[56:5] } + + _theResult___fst_exp__h511106 != 11'd0, + sfdin__h511100[56:5] } + 54'd1 ; - assign sfd__h519957 = + assign sfd__h519958 = { 1'b0, - _theResult___fst_exp__h519938 != 11'd0, - _theResult___snd__h519884[56:5] } + + _theResult___fst_exp__h519939 != 11'd0, + _theResult___snd__h519885[56:5] } + 54'd1 ; - assign sfd__h521496 = { value__h525938, 32'd0 } ; - assign sfd__h540399 = + assign sfd__h521497 = { value__h525939, 32'd0 } ; + assign sfd__h540400 = { 1'b0, - _theResult___fst_exp__h540381 != 11'd0, - _theResult___snd__h540332[56:5] } + + _theResult___fst_exp__h540382 != 11'd0, + _theResult___snd__h540333[56:5] } + 54'd1 ; - assign sfd__h550050 = + assign sfd__h550051 = { 1'b0, - _theResult___fst_exp__h549958 != 11'd0, - sfdin__h549952[56:5] } + + _theResult___fst_exp__h549959 != 11'd0, + sfdin__h549953[56:5] } + 54'd1 ; - assign sfd__h558810 = + assign sfd__h558811 = { 1'b0, - _theResult___fst_exp__h558791 != 11'd0, - _theResult___snd__h558737[56:5] } + + _theResult___fst_exp__h558792 != 11'd0, + _theResult___snd__h558738[56:5] } + 54'd1 ; - assign sfd__h560800 = { value__h565242, 32'd0 } ; - assign sfd__h579703 = + assign sfd__h560801 = { value__h565243, 32'd0 } ; + assign sfd__h579704 = { 1'b0, - _theResult___fst_exp__h579685 != 11'd0, - _theResult___snd__h579636[56:5] } + + _theResult___fst_exp__h579686 != 11'd0, + _theResult___snd__h579637[56:5] } + 54'd1 ; - assign sfd__h589354 = + assign sfd__h589355 = { 1'b0, - _theResult___fst_exp__h589262 != 11'd0, - sfdin__h589256[56:5] } + + _theResult___fst_exp__h589263 != 11'd0, + sfdin__h589257[56:5] } + 54'd1 ; - assign sfd__h598114 = + assign sfd__h598115 = { 1'b0, - _theResult___fst_exp__h598095 != 11'd0, - _theResult___snd__h598041[56:5] } + + _theResult___fst_exp__h598096 != 11'd0, + _theResult___snd__h598042[56:5] } + 54'd1 ; - assign sfdin__h354190 = - _theResult____h346085[56] ? - _theResult___snd__h354207 : - _theResult___snd__h354218 ; - assign sfdin__h371956 = - _theResult____h363724[56] ? - _theResult___snd__h371973 : - _theResult___snd__h371984 ; - assign sfdin__h399887 = - _theResult____h391784[56] ? - _theResult___snd__h399904 : - _theResult___snd__h399915 ; - assign sfdin__h417653 = - _theResult____h409421[56] ? - _theResult___snd__h417670 : - _theResult___snd__h417681 ; - assign sfdin__h445582 = - _theResult____h437479[56] ? - _theResult___snd__h445599 : - _theResult___snd__h445610 ; - assign sfdin__h463348 = - _theResult____h455116[56] ? - _theResult___snd__h463365 : - _theResult___snd__h463376 ; - assign sfdin__h511099 = - _theResult____h502869[56] ? - _theResult___snd__h511116 : - _theResult___snd__h511127 ; - assign sfdin__h549952 = - _theResult____h541722[56] ? - _theResult___snd__h549969 : - _theResult___snd__h549980 ; - assign sfdin__h589256 = - _theResult____h581026[56] ? - _theResult___snd__h589273 : - _theResult___snd__h589284 ; - assign shiftData__h181567 = - coreFix_memExe_regToExeQ$first[75:12] << x__h181699 ; + assign sfdin__h354191 = + _theResult____h346086[56] ? + _theResult___snd__h354208 : + _theResult___snd__h354219 ; + assign sfdin__h371957 = + _theResult____h363725[56] ? + _theResult___snd__h371974 : + _theResult___snd__h371985 ; + assign sfdin__h399888 = + _theResult____h391785[56] ? + _theResult___snd__h399905 : + _theResult___snd__h399916 ; + assign sfdin__h417654 = + _theResult____h409422[56] ? + _theResult___snd__h417671 : + _theResult___snd__h417682 ; + assign sfdin__h445583 = + _theResult____h437480[56] ? + _theResult___snd__h445600 : + _theResult___snd__h445611 ; + assign sfdin__h463349 = + _theResult____h455117[56] ? + _theResult___snd__h463366 : + _theResult___snd__h463377 ; + assign sfdin__h511100 = + _theResult____h502870[56] ? + _theResult___snd__h511117 : + _theResult___snd__h511128 ; + assign sfdin__h549953 = + _theResult____h541723[56] ? + _theResult___snd__h549970 : + _theResult___snd__h549981 ; + assign sfdin__h589257 = + _theResult____h581027[56] ? + _theResult___snd__h589274 : + _theResult___snd__h589285 ; + assign shiftData__h181568 = + coreFix_memExe_regToExeQ$first[75:12] << x__h181700 ; assign sie_csr__read__h609643 = { r1__read__h613454, 1'b0 } ; assign sip_csr__read__h610017 = { r1__read__h613988, 1'b0 } ; assign spec_bits__h688398 = specTagManager$currentSpecBits | y__h688411 ; @@ -31834,236 +31834,236 @@ module mkCore(CLK, { r1__read__h613964, csrf_stvec_mode_low_reg } ; assign trap_val__h709444 = commitStage_commitTrap[36] ? 64'd0 : trap_val__h710482 ; - assign tsr_val__h726551 = csrf_tsr_reg ; - assign tvm_val__h726553 = csrf_tvm_reg ; - assign upd__h3993 = + assign tsr_val__h726308 = csrf_tsr_reg ; + assign tvm_val__h726310 = csrf_tvm_reg ; + assign upd__h3994 = WILL_FIRE_RL_commitStage_doCommitSystemInst ? MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_1 : MUX_csrf_minstret_ehr_data_lat_1$wset_1__VAL_2 ; - assign upd__h5310 = n__read__h6759 + 64'd1 ; - assign upd__h6873 = + assign upd__h5311 = n__read__h6760 + 64'd1 ; + assign upd__h6874 = MUX_csrf_mcycle_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign upd__h727048 = + assign upd__h726805 = MUX_csrf_minstret_ehr_data_dummy2_0$write_1__SEL_1 ? f_csr_reqs$D_OUT[63:0] : rob$deqPort_0_deq_data[95:32] ; - assign v__h295941 = + assign v__h295942 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_cRqRetr_ETC___d3031) ? - v__h296172 : + v__h296173 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP ; - assign v__h296172 = + assign v__h296173 = (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP == 3'd7) ? 3'd0 : coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_enqP + 3'd1 ; - assign v__h299286 = + assign v__h299287 = (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_fromPQ__ETC___d3138) ? - v__h299804 : + v__h299805 : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP ; - assign v__h299804 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; - assign v__h309800 = + assign v__h299805 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqP + 1'd1 ; + assign v__h309801 = (coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rqToPQ__ETC___d3309) ? - v__h310031 : + v__h310032 : coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP ; - assign v__h310031 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; - assign v__h313676 = + assign v__h310032 = coreFix_memExe_dMem_cache_m_banks_0_rqToPQ_enqP + 1'd1 ; + assign v__h313677 = (coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_dMem_cache_m_banks_0_rsToPQ__ETC___d3405) ? - v__h313907 : + v__h313908 : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP ; - assign v__h313907 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; - assign v__h328277 = + assign v__h313908 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqP + 1'd1 ; + assign v__h328278 = (coreFix_memExe_memRespLdQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_memRespLdQ_enqReq_lat_1_whas_ETC___d3634) ? - v__h328508 : + v__h328509 : coreFix_memExe_memRespLdQ_enqP ; - assign v__h328508 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; - assign v__h331502 = + assign v__h328509 = coreFix_memExe_memRespLdQ_enqP + 1'd1 ; + assign v__h331503 = (coreFix_memExe_forwardQ_enqReq_dummy2_2$Q_OUT && IF_coreFix_memExe_forwardQ_enqReq_lat_1_whas___ETC___d3728) ? - v__h331733 : + v__h331734 : coreFix_memExe_forwardQ_enqP ; - assign v__h331733 = coreFix_memExe_forwardQ_enqP + 1'd1 ; - assign v__h603883 = + assign v__h331734 = coreFix_memExe_forwardQ_enqP + 1'd1 ; + assign v__h603884 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_deqEn$whas ? - v__h603893 : + v__h603894 : coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit ; - assign v__h603893 = + assign v__h603894 = coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_credit + 2'd1 ; - assign v__h604528 = v__h603883 - 2'd1 ; + assign v__h604529 = v__h603884 - 2'd1 ; assign v__h607935 = sbCons$lazyLookup_1_get[3] ? rf$read_1_rd1 : y_avValue__h608841 ; assign v__h632818 = sbCons$lazyLookup_0_get[3] ? rf$read_0_rd1 : y_avValue__h633571 ; - assign value__h346707 = + assign value__h346708 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[56:5] } ; - assign value__h392404 = + assign value__h392405 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[56:5] } ; - assign value__h438099 = + assign value__h438100 = { 1'b0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[67:57] != 11'd0, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[56:5] } ; - assign value__h487085 = { 1'b0, f1_exp__h482140 != 8'd0, f1_sfd__h482141 } ; - assign value__h525938 = { 1'b0, f2_exp__h521134 != 8'd0, f2_sfd__h521135 } ; - assign value__h565242 = { 1'b0, f3_exp__h560438 != 8'd0, f3_sfd__h560439 } ; + assign value__h487086 = { 1'b0, f1_exp__h482141 != 8'd0, f1_sfd__h482142 } ; + assign value__h525939 = { 1'b0, f2_exp__h521135 != 8'd0, f2_sfd__h521136 } ; + assign value__h565243 = { 1'b0, f3_exp__h560439 != 8'd0, f3_sfd__h560440 } ; assign vm_mode_reg__read__h614204 = { csrf_vm_mode_sv39_reg, 3'b0 } ; assign w__h646690 = coreFix_globalSpecUpdate_correctSpecTag_0$whas ? result__h646746 : 12'd4095 ; - assign x__h153725 = + assign x__h153726 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[68:64] : coreFix_memExe_reqLdQ_data_0_rl[68:64]) : 5'd0 ; - assign x__h153731 = + assign x__h153732 = coreFix_memExe_reqLdQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLdQ_data_0_lat_0$whas ? coreFix_memExe_reqLdQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqLdQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h157272 = { 3'd0, sbIdx__h157151 } ; - assign x__h157278 = + assign x__h157273 = { 3'd0, sbIdx__h157152 } ; + assign x__h157279 = coreFix_memExe_reqStQ_data_0_dummy2_1$Q_OUT ? (CAN_FIRE_RL_coreFix_memExe_doIssueSB ? coreFix_memExe_reqStQ_data_0_lat_0$wget[63:0] : coreFix_memExe_reqStQ_data_0_rl[63:0]) : 64'd0 ; - assign x__h160088 = + assign x__h160089 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[152:148] : coreFix_memExe_reqLrScAmoQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h160092 = + assign x__h160093 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[147:84] : coreFix_memExe_reqLrScAmoQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h161940 = + assign x__h161941 = coreFix_memExe_reqLrScAmoQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_reqLrScAmoQ_data_0_lat_0$whas ? coreFix_memExe_reqLrScAmoQ_data_0_lat_0$wget[70:7] : coreFix_memExe_reqLrScAmoQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h181476 = - sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h180564 ; assign x__h181477 = - sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h181170 ; - assign x__h181699 = { x__h183902[2:0], 3'b0 } ; - assign x__h18385 = + sbCons$lazyLookup_3_get[3] ? rf$read_3_rd1 : y_avValue__h180565 ; + assign x__h181478 = + sbCons$lazyLookup_3_get[2] ? rf$read_3_rd2 : y_avValue__h181171 ; + assign x__h181700 = { x__h183903[2:0], 3'b0 } ; + assign x__h18386 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[141:78] : mmio_dataReqQ_enqReq_rl[141:78] ; - assign x__h183902 = + assign x__h183903 = coreFix_memExe_regToExeQ$first[139:76] + { {32{coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10[31]}}, coreFix_memExe_regToExeQfirst_BITS_189_TO_158__q10 } ; - assign x__h193679 = + assign x__h193680 = coreFix_memExe_dMem_cache_m_banks_0_processAmo[90] ? - curData__h192916[63:32] : - curData__h192916[31:0] ; - assign x__h20923 = + curData__h192917[63:32] : + curData__h192917[31:0] ; + assign x__h20924 = mmio_dataReqQ_enqReq_lat_0$whas ? mmio_dataReqQ_enqReq_lat_0$wget[63:0] : mmio_dataReqQ_enqReq_rl[63:0] ; - assign x__h287279 = + assign x__h287280 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[152:148] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[152:148]) : 5'd0 ; - assign x__h287291 = + assign x__h287292 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[147:84] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[147:84]) : 64'd0 ; - assign x__h289145 = + assign x__h289146 = coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_dummy2_1$Q_OUT ? (coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_lat_0$wget[70:7] : coreFix_memExe_dMem_cache_m_banks_0_rqFromCQ_data_0_rl[70:7]) : 64'd0 ; - assign x__h302151 = + assign x__h302152 = EN_dCacheToParent_fromP_enq ? coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_lat_0$wget[2:0] : coreFix_memExe_dMem_cache_m_banks_0_fromPQ_enqReq_rl[2:0] ; - assign x__h337884 = - { (_theResult___exp__h381216 != 8'd255 || - _theResult___sfd__h381217 == 23'd0) && + assign x__h337885 = + { (_theResult___exp__h381217 != 8'd255 || + _theResult___sfd__h381218 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5140, - out_f_exp__h381493, - out_f_sfd__h381494 } ; - assign x__h364434 = - sfd__h338480 << (x__h364467[11] ? 12'hAAA : x__h364467) ; - assign x__h364467 = + out_f_exp__h381494, + out_f_sfd__h381495 } ; + assign x__h364435 = + sfd__h338481 << (x__h364468[11] ? 12'hAAA : x__h364468) ; + assign x__h364468 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d4554 ; - assign x__h383586 = - { (_theResult___exp__h426913 != 8'd255 || - _theResult___sfd__h426914 == 23'd0) && + assign x__h383587 = + { (_theResult___exp__h426914 != 8'd255 || + _theResult___sfd__h426915 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6532, - out_f_exp__h427190, - out_f_sfd__h427191 } ; - assign x__h410131 = - sfd__h384182 << (x__h410164[11] ? 12'hAAA : x__h410164) ; - assign x__h410164 = + out_f_exp__h427191, + out_f_sfd__h427192 } ; + assign x__h410132 = + sfd__h384183 << (x__h410165[11] ? 12'hAAA : x__h410165) ; + assign x__h410165 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d5946 ; - assign x__h429281 = - { (_theResult___exp__h472608 != 8'd255 || - _theResult___sfd__h472609 == 23'd0) && + assign x__h429282 = + { (_theResult___exp__h472609 != 8'd255 || + _theResult___sfd__h472610 == 23'd0) && IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7924, - out_f_exp__h472885, - out_f_sfd__h472886 } ; - assign x__h455826 = - sfd__h429877 << (x__h455859[11] ? 12'hAAA : x__h455859) ; - assign x__h455859 = + out_f_exp__h472886, + out_f_sfd__h472887 } ; + assign x__h455827 = + sfd__h429878 << (x__h455860[11] ? 12'hAAA : x__h455860) ; + assign x__h455860 = 12'd57 - _3970_MINUS_SEXT_coreFix_fpuMulDivExe_0_fpuExec_ETC___d7338 ; - assign x__h46292 = + assign x__h46293 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[141:78] : mmio_cRqQ_enqReq_rl[141:78] ; - assign x__h481670 = - sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h478806 ; assign x__h481671 = - sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h479414 ; + sbCons$lazyLookup_2_get[3] ? rf$read_2_rd1 : y_avValue__h478807 ; assign x__h481672 = - sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h480016 ; - assign x__h48828 = + sbCons$lazyLookup_2_get[2] ? rf$read_2_rd2 : y_avValue__h479415 ; + assign x__h481673 = + sbCons$lazyLookup_2_get[1] ? rf$read_2_rd3 : y_avValue__h480017 ; + assign x__h48829 = mmio_cRqQ_enqReq_lat_0$whas ? mmio_cRqQ_enqReq_lat_0$wget[63:0] : mmio_cRqQ_enqReq_rl[63:0] ; - assign x__h503577 = sfd__h482502 << x__h503610 ; - assign x__h503610 = + assign x__h503578 = sfd__h482503 << x__h503611 ; + assign x__h503611 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d8649 ; - assign x__h542430 = sfd__h521496 << x__h542463 ; - assign x__h542463 = + assign x__h542431 = sfd__h521497 << x__h542464 ; + assign x__h542464 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d10134 ; - assign x__h581734 = sfd__h560800 << x__h581767 ; - assign x__h581767 = + assign x__h581735 = sfd__h560801 << x__h581768 ; + assign x__h581768 = 12'd57 - _3074_MINUS_SEXT_IF_coreFix_fpuMulDivExe_0_regT_ETC___d9364 ; - assign x__h603384 = a__h602948[63] ^ b__h602949[63] ; + assign x__h603385 = a__h602949[63] ^ b__h602950[63] ; assign x__h613035 = { csrf_frm_reg, csrf_fflags_reg } ; assign x__h617232 = coreFix_aluExe_1_dispToRegQ$first[131] ? @@ -32092,7 +32092,7 @@ module mkCore(CLK, assign x__h714837 = { commitStage_commitTrap[36], 59'b0, cause_code__h709443 } ; assign x__h722556 = { 1'b0, csrf_spp_reg } ; - assign x__h726431 = + assign x__h726188 = { csrf_fs_reg == 2'b11, 40'd5120, csrf_tsr_reg, @@ -32103,9 +32103,9 @@ module mkCore(CLK, csrf_mprv_reg, 2'd0, csrf_fs_reg, - IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15282 } ; - assign x__h729900 = - { r1__read_BITS_62_TO_14___h729920, + IF_rob_deqPort_0_deq_data__4339_BITS_329_TO_32_ETC___d15288 } ; + assign x__h729657 = + { r1__read_BITS_62_TO_14___h729677, 2'b11, csrf_mpp_reg, 2'b0, @@ -32118,20 +32118,20 @@ module mkCore(CLK, 1'b0, csrf_ie_vec_1, csrf_ie_vec_0 } ; - assign x__h733045 = - { y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027[63:15], + assign x__h732802 = + { y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784[63:15], 2'b11, - y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027[12:0] } ; - assign x__h733794 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_snd_snd_snd_fst__h733604 : - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 ; - assign x__h76237 = mmio_pRqQ_data_0[31:0] ; - assign x_addr__h314074 = + y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784[12:0] } ; + assign x__h733551 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_snd_snd_snd_fst__h733361 : + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 ; + assign x__h76238 = mmio_pRqQ_data_0[31:0] ; + assign x_addr__h314075 = coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$whas ? coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_lat_0$wget[578:515] : coreFix_memExe_dMem_cache_m_banks_0_rsToPQ_enqReq_rl[578:515] ; - assign x_data__h66086 = + assign x_data__h66087 = EN_mmioToPlatform_pRq_enq ? mmio_pRqQ_enqReq_lat_0$wget[31:0] : mmio_pRqQ_enqReq_rl[31:0] ; @@ -32146,22 +32146,22 @@ module mkCore(CLK, (rob$deqPort_0_deq_data[329:325] == 5'd19) ? x__h722556 : csrf_mpp_reg ; - assign x_quotient__h475196 = + assign x_quotient__h475197 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[75] ? 64'hFFFFFFFFFFFFFFFF : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[9]) ? - q___1__h475881 : + q___1__h475882 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[127:64]) ; assign x_reg_ifc__read__h609482 = { 63'd0, csrf_stats_module_doStats } ; - assign x_remainder__h475197 = + assign x_remainder__h475198 = coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[75] ? coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[74:11] : ((coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[10] && coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tuser[8]) ? - r___1__h475907 : + r___1__h475908 : coreFix_fpuMulDivExe_0_mulDivExec_divUnit_divIfc$m_axis_dout_tdata[63:0]) ; - assign y__h254803 = + assign y__h254804 = { coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[569:518], coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[95:90] } ; assign y__h646724 = ~x__h646694 ; @@ -32175,31 +32175,31 @@ module mkCore(CLK, 1'd1, ~csrf_mideleg_1_0_reg } ; assign y__h688411 = 12'd1 << specTagManager$nextSpecTag ; - assign y__h730732 = + assign y__h730489 = rob$deqPort_0_canDeq ? - y_avValue_snd_snd_snd_snd_snd_fst__h730755 : + y_avValue_snd_snd_snd_snd_snd_fst__h730512 : 64'd0 ; - assign y__h733553 = - NOT_rob_deqPort_0_canDeq__5314_5315_OR_rob_deq_ETC___d15658 ? - y_avValue_snd_snd_snd_snd_snd_fst__h733614 : - y__h730732 ; - assign y_avValue__h180564 = + assign y__h733310 = + NOT_rob_deqPort_0_canDeq__5320_5321_OR_rob_deq_ETC___d15664 ? + y_avValue_snd_snd_snd_snd_snd_fst__h733371 : + y__h730489 ; + assign y_avValue__h180565 = NOT_coreFix_memExe_bypassWire_0_whas__568_574__ETC___d1595 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1649 ; - assign y_avValue__h181170 = + assign y_avValue__h181171 = NOT_coreFix_memExe_bypassWire_0_whas__568_574__ETC___d1622 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_memExe_bypassWire_0_whas__568_5_ETC___d1660 ; - assign y_avValue__h478806 = + assign y_avValue__h478807 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8233 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8337 ; - assign y_avValue__h479414 = + assign y_avValue__h479415 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8260 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8348 ; - assign y_avValue__h480016 = + assign y_avValue__h480017 = NOT_coreFix_fpuMulDivExe_0_bypassWire_0_whas___ETC___d8284 ? coreFix_aluExe_0_bypassWire_3$wget[63:0] : IF_NOT_coreFix_fpuMulDivExe_0_bypassWire_0_wha_ETC___d8359 ; @@ -32233,7 +32233,7 @@ module mkCore(CLK, regRenamingTable_rename_0_canRename__3403_AND__ETC___d13429) ? y_avValue_fst__h681600 : specTagManager$currentSpecBits ; - assign y_avValue_fst__h730270 = + assign y_avValue_fst__h730027 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32247,10 +32247,10 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 5'd0 : rob$deqPort_0_deq_data[31:27] ; - assign y_avValue_fst__h733435 = - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 | + assign y_avValue_fst__h733192 = + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 | rob$deqPort_1_deq_data[31:27] ; - assign y_avValue_fst__h733467 = + assign y_avValue_fst__h733224 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32262,8 +32262,8 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15664 : - y_avValue_fst__h733435 ; + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15670 : + y_avValue_fst__h733192 ; assign y_avValue_new_pc__h712179 = (csrf_stvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h712403 + { 58'd0, x__h712418 } : @@ -32272,7 +32272,7 @@ module mkCore(CLK, (csrf_mtvec_mode_low_reg && commitStage_commitTrap[36]) ? base__h712423 + { 58'd0, x__h712418 } : base__h712423 ; - assign y_avValue_snd_snd_snd_fst__h730745 = + assign y_avValue_snd_snd_snd_fst__h730502 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32286,7 +32286,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 2'd0 : 2'd1 ; - assign y_avValue_snd_snd_snd_fst__h733604 = + assign y_avValue_snd_snd_snd_fst__h733361 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32298,12 +32298,12 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 : - y_avValue_snd_snd_snd_fst__h733640 ; - assign y_avValue_snd_snd_snd_fst__h733640 = - IF_rob_deqPort_0_canDeq__5314_THEN_IF_NOT_rob__ETC___d15683 + + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 : + y_avValue_snd_snd_snd_fst__h733397 ; + assign y_avValue_snd_snd_snd_fst__h733397 = + IF_rob_deqPort_0_canDeq__5320_THEN_IF_NOT_rob__ETC___d15689 + 2'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h730755 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h730512 = (!rob$deqPort_0_deq_data[25] || rob$deqPort_0_deq_data[18] || rob$deqPort_0_deq_data[167] || rob$deqPort_0_deq_data[329:325] == 5'd0 || @@ -32317,7 +32317,7 @@ module mkCore(CLK, rob$deqPort_0_deq_data[329:325] == 5'd20) ? 64'd0 : 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h733614 = + assign y_avValue_snd_snd_snd_snd_snd_fst__h733371 = (!rob$deqPort_1_deq_data[25] || rob$deqPort_1_deq_data[18] || rob$deqPort_1_deq_data[167] || rob$deqPort_1_deq_data[329:325] == 5'd0 || @@ -32329,10 +32329,10 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] == 5'd15 || rob$deqPort_1_deq_data[329:325] == 5'd19 || rob$deqPort_1_deq_data[329:325] == 5'd20) ? - y__h730732 : - y_avValue_snd_snd_snd_snd_snd_fst__h733650 ; - assign y_avValue_snd_snd_snd_snd_snd_fst__h733650 = y__h730732 + 64'd1 ; - assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h733027 = x__h729900 ; + y__h730489 : + y_avValue_snd_snd_snd_snd_snd_fst__h733407 ; + assign y_avValue_snd_snd_snd_snd_snd_fst__h733407 = y__h730489 + 64'd1 ; + assign y_avValue_snd_snd_snd_snd_snd_snd_snd__h732784 = x__h729657 ; always@(v_f_to_TV_1$D_OUT) begin case (v_f_to_TV_1$D_OUT[475:464]) @@ -32533,28 +32533,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqMshr$pipelineResp_getRq[89:87]) 3'd0: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - x__h197126 = + x__h197127 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -32570,28 +32570,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_deqP) 3'd0: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_0; 3'd1: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_1; 3'd2: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_2; 3'd3: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_3; 3'd4: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_4; 3'd5: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_5; 3'd6: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_6; 3'd7: - x__h285846 = + x__h285847 = coreFix_memExe_dMem_cache_m_banks_0_cRqRetryIndexQ_data_7; endcase end @@ -32601,10 +32601,10 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - addr__h290067 = + addr__h290068 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[581:518]; 1'd1: - addr__h290067 = + addr__h290068 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[581:518]; endcase end @@ -32613,28 +32613,28 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_processAmo[93:91]) 3'd0: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[63:0]; 3'd1: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[127:64]; 3'd2: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[191:128]; 3'd3: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[255:192]; 3'd4: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[319:256]; 3'd5: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[383:320]; 3'd6: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[447:384]; 3'd7: - curData__h192916 = + curData__h192917 = coreFix_memExe_dMem_cache_m_banks_0_pipeline$first[511:448]; endcase end @@ -32657,9 +32657,9 @@ module mkCore(CLK, begin case (coreFix_memExe_dMem_cache_m_banks_0_fromPQ_deqP) 1'd0: - x__h291616 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; + x__h291617 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_0[2:0]; 1'd1: - x__h291616 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; + x__h291617 = coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[2:0]; endcase end always@(f_csr_reqs$D_OUT or @@ -32699,46 +32699,46 @@ module mkCore(CLK, n__read__h611356 or n__read__h611547 or csrf_time_reg) begin case (f_csr_reqs$D_OUT[75:64]) - 12'd1: data_out__h737644 = fflags_csr__read__h609352; - 12'd2: data_out__h737644 = frm_csr__read__h609363; - 12'd3: data_out__h737644 = fcsr_csr__read__h609377; - 12'd256: data_out__h737644 = sstatus_csr__read__h609573; - 12'd260: data_out__h737644 = sie_csr__read__h609643; - 12'd261: data_out__h737644 = stvec_csr__read__h609686; - 12'd262: data_out__h737644 = scounteren_csr__read__h609739; - 12'd320: data_out__h737644 = csrf_sscratch_csr; - 12'd321: data_out__h737644 = csrf_sepc_csr; - 12'd322: data_out__h737644 = scause_csr__read__h609877; - 12'd323: data_out__h737644 = csrf_stval_csr; - 12'd324: data_out__h737644 = sip_csr__read__h610017; - 12'd384: data_out__h737644 = satp_csr__read__h610080; - 12'd768: data_out__h737644 = mstatus_csr__read__h610223; - 12'd769: data_out__h737644 = 64'h800000000014112D; - 12'd770: data_out__h737644 = medeleg_csr__read__h610371; - 12'd771: data_out__h737644 = mideleg_csr__read__h610466; - 12'd772: data_out__h737644 = mie_csr__read__h610590; - 12'd773: data_out__h737644 = mtvec_csr__read__h610672; - 12'd774: data_out__h737644 = mcounteren_csr__read__h610764; - 12'd832: data_out__h737644 = csrf_mscratch_csr; - 12'd833: data_out__h737644 = csrf_mepc_csr; - 12'd834: data_out__h737644 = mcause_csr__read__h611019; - 12'd835: data_out__h737644 = csrf_mtval_csr; - 12'd836: data_out__h737644 = mip_csr__read__h611252; - 12'd1952: data_out__h737644 = csrf_rg_tselect; - 12'd1953: data_out__h737644 = rg_tdata1__read__h612207; - 12'd1954: data_out__h737644 = csrf_rg_tdata2; - 12'd1955: data_out__h737644 = csrf_rg_tdata3; - 12'd1968: data_out__h737644 = csrf_rg_dcsr; - 12'd1969: data_out__h737644 = csrf_rg_dpc; - 12'd1970: data_out__h737644 = csrf_rg_dscratch0; - 12'd1971: data_out__h737644 = csrf_rg_dscratch1; + 12'd1: data_out__h737401 = fflags_csr__read__h609352; + 12'd2: data_out__h737401 = frm_csr__read__h609363; + 12'd3: data_out__h737401 = fcsr_csr__read__h609377; + 12'd256: data_out__h737401 = sstatus_csr__read__h609573; + 12'd260: data_out__h737401 = sie_csr__read__h609643; + 12'd261: data_out__h737401 = stvec_csr__read__h609686; + 12'd262: data_out__h737401 = scounteren_csr__read__h609739; + 12'd320: data_out__h737401 = csrf_sscratch_csr; + 12'd321: data_out__h737401 = csrf_sepc_csr; + 12'd322: data_out__h737401 = scause_csr__read__h609877; + 12'd323: data_out__h737401 = csrf_stval_csr; + 12'd324: data_out__h737401 = sip_csr__read__h610017; + 12'd384: data_out__h737401 = satp_csr__read__h610080; + 12'd768: data_out__h737401 = mstatus_csr__read__h610223; + 12'd769: data_out__h737401 = 64'h800000000014112D; + 12'd770: data_out__h737401 = medeleg_csr__read__h610371; + 12'd771: data_out__h737401 = mideleg_csr__read__h610466; + 12'd772: data_out__h737401 = mie_csr__read__h610590; + 12'd773: data_out__h737401 = mtvec_csr__read__h610672; + 12'd774: data_out__h737401 = mcounteren_csr__read__h610764; + 12'd832: data_out__h737401 = csrf_mscratch_csr; + 12'd833: data_out__h737401 = csrf_mepc_csr; + 12'd834: data_out__h737401 = mcause_csr__read__h611019; + 12'd835: data_out__h737401 = csrf_mtval_csr; + 12'd836: data_out__h737401 = mip_csr__read__h611252; + 12'd1952: data_out__h737401 = csrf_rg_tselect; + 12'd1953: data_out__h737401 = rg_tdata1__read__h612207; + 12'd1954: data_out__h737401 = csrf_rg_tdata2; + 12'd1955: data_out__h737401 = csrf_rg_tdata3; + 12'd1968: data_out__h737401 = csrf_rg_dcsr; + 12'd1969: data_out__h737401 = csrf_rg_dpc; + 12'd1970: data_out__h737401 = csrf_rg_dscratch0; + 12'd1971: data_out__h737401 = csrf_rg_dscratch1; 12'd2048, 12'd3857, 12'd3858, 12'd3859, 12'd3860: - data_out__h737644 = 64'd0; - 12'd2049: data_out__h737644 = x_reg_ifc__read__h609482; - 12'd2816, 12'd3072: data_out__h737644 = n__read__h611356; - 12'd2818, 12'd3074: data_out__h737644 = n__read__h611547; - 12'd3073: data_out__h737644 = csrf_time_reg; - default: data_out__h737644 = 64'b0; + data_out__h737401 = 64'd0; + 12'd2049: data_out__h737401 = x_reg_ifc__read__h609482; + 12'd2816, 12'd3072: data_out__h737401 = n__read__h611356; + 12'd2818, 12'd3074: data_out__h737401 = n__read__h611547; + 12'd3073: data_out__h737401 = csrf_time_reg; + default: data_out__h737401 = 64'b0; endcase end always@(coreFix_aluExe_1_dispToRegQ$first or @@ -32903,114 +32903,114 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h346067 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h346068 = 8'd255; 3'd2: - _theResult___fst_exp__h346067 = + _theResult___fst_exp__h346068 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h346067 = + _theResult___fst_exp__h346068 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h346067 = 8'd254; - default: _theResult___fst_exp__h346067 = 8'd0; + 3'd4: _theResult___fst_exp__h346068 = 8'd254; + default: _theResult___fst_exp__h346068 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h346068 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h346069 = 23'd0; 3'd2: - _theResult___fst_sfd__h346068 = + _theResult___fst_sfd__h346069 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h346068 = + _theResult___fst_sfd__h346069 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h346068 = 23'd8388607; - default: _theResult___fst_sfd__h346068 = 23'd0; + 3'd4: _theResult___fst_sfd__h346069 = 23'd8388607; + default: _theResult___fst_sfd__h346069 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h391766 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h391767 = 8'd255; 3'd2: - _theResult___fst_exp__h391766 = + _theResult___fst_exp__h391767 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h391766 = + _theResult___fst_exp__h391767 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h391766 = 8'd254; - default: _theResult___fst_exp__h391766 = 8'd0; + 3'd4: _theResult___fst_exp__h391767 = 8'd254; + default: _theResult___fst_exp__h391767 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h391767 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h391768 = 23'd0; 3'd2: - _theResult___fst_sfd__h391767 = + _theResult___fst_sfd__h391768 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h391767 = + _theResult___fst_sfd__h391768 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h391767 = 23'd8388607; - default: _theResult___fst_sfd__h391767 = 23'd0; + 3'd4: _theResult___fst_sfd__h391768 = 23'd8388607; + default: _theResult___fst_sfd__h391768 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_exp__h437461 = 8'd255; + 3'd0, 3'd1: _theResult___fst_exp__h437462 = 8'd255; 3'd2: - _theResult___fst_exp__h437461 = + _theResult___fst_exp__h437462 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd254 : 8'd255; 3'd3: - _theResult___fst_exp__h437461 = + _theResult___fst_exp__h437462 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 8'd255 : 8'd254; - 3'd4: _theResult___fst_exp__h437461 = 8'd254; - default: _theResult___fst_exp__h437461 = 8'd0; + 3'd4: _theResult___fst_exp__h437462 = 8'd254; + default: _theResult___fst_exp__h437462 = 8'd0; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) - 3'd0, 3'd1: _theResult___fst_sfd__h437462 = 23'd0; + 3'd0, 3'd1: _theResult___fst_sfd__h437463 = 23'd0; 3'd2: - _theResult___fst_sfd__h437462 = + _theResult___fst_sfd__h437463 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd8388607 : 23'd0; 3'd3: - _theResult___fst_sfd__h437462 = + _theResult___fst_sfd__h437463 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] ? 23'd0 : 23'd8388607; - 3'd4: _theResult___fst_sfd__h437462 = 23'd8388607; - default: _theResult___fst_sfd__h437462 = 23'd0; + 3'd4: _theResult___fst_sfd__h437463 = 23'd8388607; + default: _theResult___fst_sfd__h437463 = 23'd0; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first) @@ -33398,446 +33398,446 @@ module mkCore(CLK, coreFix_memExe_dMem_cache_m_banks_0_fromPQ_data_1[194:131]; endcase end - always@(guard__h354804 or - _theResult___fst_exp__h362852 or - out_exp__h363297 or _theResult___exp__h363294) + always@(guard__h354805 or + _theResult___fst_exp__h362853 or + out_exp__h363298 or _theResult___exp__h363295) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - _theResult___fst_exp__h362852; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + _theResult___fst_exp__h362853; 2'b10: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - out_exp__h363297; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + out_exp__h363298; 2'b11: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 = - _theResult___exp__h363294; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 = + _theResult___exp__h363295; endcase end - always@(guard__h354804 or - _theResult___fst_exp__h362852 or _theResult___exp__h363294) + always@(guard__h354805 or + _theResult___fst_exp__h362853 or _theResult___exp__h363295) begin - case (guard__h354804) + case (guard__h354805) 2'b0: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 = - _theResult___fst_exp__h362852; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 = + _theResult___fst_exp__h362853; 2'b01, 2'b10, 2'b11: - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 = - _theResult___exp__h363294; + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 = + _theResult___exp__h363295; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32 or - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33 or + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32 or + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534 or - _theResult___fst_exp__h362852) + _theResult___fst_exp__h362853) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h363372 = - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q32; + _theResult___fst_exp__h363373 = + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q32; 3'd1: - _theResult___fst_exp__h363372 = - CASE_guard54804_0b0_theResult___fst_exp62852_0_ETC__q33; + _theResult___fst_exp__h363373 = + CASE_guard54805_0b0_theResult___fst_exp62853_0_ETC__q33; 3'd2: - _theResult___fst_exp__h363372 = + _theResult___fst_exp__h363373 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4532; 3'd3: - _theResult___fst_exp__h363372 = + _theResult___fst_exp__h363373 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4534; - 3'd4: _theResult___fst_exp__h363372 = _theResult___fst_exp__h362852; - default: _theResult___fst_exp__h363372 = 8'd0; + 3'd4: _theResult___fst_exp__h363373 = _theResult___fst_exp__h362853; + default: _theResult___fst_exp__h363373 = 8'd0; endcase end - always@(guard__h346095 or - _theResult___fst_exp__h354196 or - out_exp__h354715 or _theResult___exp__h354712) + always@(guard__h346096 or + _theResult___fst_exp__h354197 or + out_exp__h354716 or _theResult___exp__h354713) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - _theResult___fst_exp__h354196; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + _theResult___fst_exp__h354197; 2'b10: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - out_exp__h354715; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + out_exp__h354716; 2'b11: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 = - _theResult___exp__h354712; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 = + _theResult___exp__h354713; endcase end - always@(guard__h346095 or - _theResult___fst_exp__h354196 or _theResult___exp__h354712) + always@(guard__h346096 or + _theResult___fst_exp__h354197 or _theResult___exp__h354713) begin - case (guard__h346095) + case (guard__h346096) 2'b0: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 = - _theResult___fst_exp__h354196; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 = + _theResult___fst_exp__h354197; 2'b01, 2'b10, 2'b11: - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 = - _theResult___exp__h354712; + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 = + _theResult___exp__h354713; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34 or - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35 or + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34 or + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313 or - _theResult___fst_exp__h354196) + _theResult___fst_exp__h354197) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h354790 = - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q34; + _theResult___fst_exp__h354791 = + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q34; 3'd1: - _theResult___fst_exp__h354790 = - CASE_guard46095_0b0_theResult___fst_exp54196_0_ETC__q35; + _theResult___fst_exp__h354791 = + CASE_guard46096_0b0_theResult___fst_exp54197_0_ETC__q35; 3'd2: - _theResult___fst_exp__h354790 = + _theResult___fst_exp__h354791 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4310; 3'd3: - _theResult___fst_exp__h354790 = + _theResult___fst_exp__h354791 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4313; - 3'd4: _theResult___fst_exp__h354790 = _theResult___fst_exp__h354196; - default: _theResult___fst_exp__h354790 = 8'd0; + 3'd4: _theResult___fst_exp__h354791 = _theResult___fst_exp__h354197; + default: _theResult___fst_exp__h354791 = 8'd0; endcase end - always@(guard__h363734 or - _theResult___fst_exp__h371962 or - out_exp__h372481 or _theResult___exp__h372478) + always@(guard__h363735 or + _theResult___fst_exp__h371963 or + out_exp__h372482 or _theResult___exp__h372479) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - _theResult___fst_exp__h371962; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + _theResult___fst_exp__h371963; 2'b10: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - out_exp__h372481; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + out_exp__h372482; 2'b11: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 = - _theResult___exp__h372478; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 = + _theResult___exp__h372479; endcase end - always@(guard__h363734 or - _theResult___fst_exp__h371962 or _theResult___exp__h372478) + always@(guard__h363735 or + _theResult___fst_exp__h371963 or _theResult___exp__h372479) begin - case (guard__h363734) + case (guard__h363735) 2'b0: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 = - _theResult___fst_exp__h371962; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 = + _theResult___fst_exp__h371963; 2'b01, 2'b10, 2'b11: - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 = - _theResult___exp__h372478; + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 = + _theResult___exp__h372479; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40 or - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41 or + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40 or + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859 or - _theResult___fst_exp__h371962) + _theResult___fst_exp__h371963) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h372556 = - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q40; + _theResult___fst_exp__h372557 = + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q40; 3'd1: - _theResult___fst_exp__h372556 = - CASE_guard63734_0b0_theResult___fst_exp71962_0_ETC__q41; + _theResult___fst_exp__h372557 = + CASE_guard63735_0b0_theResult___fst_exp71963_0_ETC__q41; 3'd2: - _theResult___fst_exp__h372556 = + _theResult___fst_exp__h372557 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4857; 3'd3: - _theResult___fst_exp__h372556 = + _theResult___fst_exp__h372557 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d4859; - 3'd4: _theResult___fst_exp__h372556 = _theResult___fst_exp__h371962; - default: _theResult___fst_exp__h372556 = 8'd0; + 3'd4: _theResult___fst_exp__h372557 = _theResult___fst_exp__h371963; + default: _theResult___fst_exp__h372557 = 8'd0; endcase end - always@(guard__h372570 or - _theResult___fst_exp__h380647 or - out_exp__h381117 or _theResult___exp__h381114) + always@(guard__h372571 or + _theResult___fst_exp__h380648 or + out_exp__h381118 or _theResult___exp__h381115) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - _theResult___fst_exp__h380647; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + _theResult___fst_exp__h380648; 2'b10: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - out_exp__h381117; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + out_exp__h381118; 2'b11: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 = - _theResult___exp__h381114; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 = + _theResult___exp__h381115; endcase end - always@(guard__h372570 or - _theResult___fst_exp__h380647 or _theResult___exp__h381114) + always@(guard__h372571 or + _theResult___fst_exp__h380648 or _theResult___exp__h381115) begin - case (guard__h372570) + case (guard__h372571) 2'b0: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 = - _theResult___fst_exp__h380647; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 = + _theResult___fst_exp__h380648; 2'b01, 2'b10, 2'b11: - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 = - _theResult___exp__h381114; + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 = + _theResult___exp__h381115; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45 or - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46 or + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45 or + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928 or - _theResult___fst_exp__h380647) + _theResult___fst_exp__h380648) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h381192 = - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q45; + _theResult___fst_exp__h381193 = + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q45; 3'd1: - _theResult___fst_exp__h381192 = - CASE_guard72570_0b0_theResult___fst_exp80647_0_ETC__q46; + _theResult___fst_exp__h381193 = + CASE_guard72571_0b0_theResult___fst_exp80648_0_ETC__q46; 3'd2: - _theResult___fst_exp__h381192 = + _theResult___fst_exp__h381193 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4926; 3'd3: - _theResult___fst_exp__h381192 = + _theResult___fst_exp__h381193 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4928; - 3'd4: _theResult___fst_exp__h381192 = _theResult___fst_exp__h380647; - default: _theResult___fst_exp__h381192 = 8'd0; + 3'd4: _theResult___fst_exp__h381193 = _theResult___fst_exp__h380648; + default: _theResult___fst_exp__h381193 = 8'd0; endcase end - always@(guard__h354804 or - _theResult___snd__h362803 or - out_sfd__h363298 or _theResult___sfd__h363295) + always@(guard__h354805 or + _theResult___snd__h362804 or + out_sfd__h363299 or _theResult___sfd__h363296) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - _theResult___snd__h362803[56:34]; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + _theResult___snd__h362804[56:34]; 2'b10: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - out_sfd__h363298; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + out_sfd__h363299; 2'b11: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 = - _theResult___sfd__h363295; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 = + _theResult___sfd__h363296; endcase end - always@(guard__h354804 or - _theResult___snd__h362803 or _theResult___sfd__h363295) + always@(guard__h354805 or + _theResult___snd__h362804 or _theResult___sfd__h363296) begin - case (guard__h354804) + case (guard__h354805) 2'b0: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 = - _theResult___snd__h362803[56:34]; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 = + _theResult___snd__h362804[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 = - _theResult___sfd__h363295; + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 = + _theResult___sfd__h363296; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47 or - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48 or + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47 or + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978 or - _theResult___snd__h362803) + _theResult___snd__h362804) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h363373 = - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q47; + _theResult___fst_sfd__h363374 = + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q47; 3'd1: - _theResult___fst_sfd__h363373 = - CASE_guard54804_0b0_theResult___snd62803_BITS__ETC__q48; + _theResult___fst_sfd__h363374 = + CASE_guard54805_0b0_theResult___snd62804_BITS__ETC__q48; 3'd2: - _theResult___fst_sfd__h363373 = + _theResult___fst_sfd__h363374 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4976; 3'd3: - _theResult___fst_sfd__h363373 = + _theResult___fst_sfd__h363374 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d4978; - 3'd4: _theResult___fst_sfd__h363373 = _theResult___snd__h362803[56:34]; - default: _theResult___fst_sfd__h363373 = 23'd0; + 3'd4: _theResult___fst_sfd__h363374 = _theResult___snd__h362804[56:34]; + default: _theResult___fst_sfd__h363374 = 23'd0; endcase end - always@(guard__h346095 or - sfdin__h354190 or out_sfd__h354716 or _theResult___sfd__h354713) + always@(guard__h346096 or + sfdin__h354191 or out_sfd__h354717 or _theResult___sfd__h354714) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - sfdin__h354190[56:34]; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + sfdin__h354191[56:34]; 2'b10: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - out_sfd__h354716; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + out_sfd__h354717; 2'b11: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 = - _theResult___sfd__h354713; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 = + _theResult___sfd__h354714; endcase end - always@(guard__h346095 or sfdin__h354190 or _theResult___sfd__h354713) + always@(guard__h346096 or sfdin__h354191 or _theResult___sfd__h354714) begin - case (guard__h346095) + case (guard__h346096) 2'b0: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 = - sfdin__h354190[56:34]; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 = + sfdin__h354191[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 = - _theResult___sfd__h354713; + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 = + _theResult___sfd__h354714; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49 or - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50 or + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49 or + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959 or - sfdin__h354190) + sfdin__h354191) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h354791 = - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q49; + _theResult___fst_sfd__h354792 = + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q49; 3'd1: - _theResult___fst_sfd__h354791 = - CASE_guard46095_0b0_sfdin54190_BITS_56_TO_34_0_ETC__q50; + _theResult___fst_sfd__h354792 = + CASE_guard46096_0b0_sfdin54191_BITS_56_TO_34_0_ETC__q50; 3'd2: - _theResult___fst_sfd__h354791 = + _theResult___fst_sfd__h354792 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4957; 3'd3: - _theResult___fst_sfd__h354791 = + _theResult___fst_sfd__h354792 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d4959; - 3'd4: _theResult___fst_sfd__h354791 = sfdin__h354190[56:34]; - default: _theResult___fst_sfd__h354791 = 23'd0; + 3'd4: _theResult___fst_sfd__h354792 = sfdin__h354191[56:34]; + default: _theResult___fst_sfd__h354792 = 23'd0; endcase end - always@(guard__h363734 or - sfdin__h371956 or out_sfd__h372482 or _theResult___sfd__h372479) + always@(guard__h363735 or + sfdin__h371957 or out_sfd__h372483 or _theResult___sfd__h372480) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - sfdin__h371956[56:34]; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + sfdin__h371957[56:34]; 2'b10: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - out_sfd__h372482; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + out_sfd__h372483; 2'b11: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 = - _theResult___sfd__h372479; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 = + _theResult___sfd__h372480; endcase end - always@(guard__h363734 or sfdin__h371956 or _theResult___sfd__h372479) + always@(guard__h363735 or sfdin__h371957 or _theResult___sfd__h372480) begin - case (guard__h363734) + case (guard__h363735) 2'b0: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 = - sfdin__h371956[56:34]; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 = + sfdin__h371957[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 = - _theResult___sfd__h372479; + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 = + _theResult___sfd__h372480; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51 or - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52 or + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51 or + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005 or - sfdin__h371956) + sfdin__h371957) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h372557 = - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q51; + _theResult___fst_sfd__h372558 = + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q51; 3'd1: - _theResult___fst_sfd__h372557 = - CASE_guard63734_0b0_sfdin71956_BITS_56_TO_34_0_ETC__q52; + _theResult___fst_sfd__h372558 = + CASE_guard63735_0b0_sfdin71957_BITS_56_TO_34_0_ETC__q52; 3'd2: - _theResult___fst_sfd__h372557 = + _theResult___fst_sfd__h372558 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5003; 3'd3: - _theResult___fst_sfd__h372557 = + _theResult___fst_sfd__h372558 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d5005; - 3'd4: _theResult___fst_sfd__h372557 = sfdin__h371956[56:34]; - default: _theResult___fst_sfd__h372557 = 23'd0; + 3'd4: _theResult___fst_sfd__h372558 = sfdin__h371957[56:34]; + default: _theResult___fst_sfd__h372558 = 23'd0; endcase end - always@(guard__h372570 or - _theResult___snd__h380593 or - out_sfd__h381118 or _theResult___sfd__h381115) + always@(guard__h372571 or + _theResult___snd__h380594 or + out_sfd__h381119 or _theResult___sfd__h381116) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - _theResult___snd__h380593[56:34]; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + _theResult___snd__h380594[56:34]; 2'b10: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - out_sfd__h381118; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + out_sfd__h381119; 2'b11: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 = - _theResult___sfd__h381115; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 = + _theResult___sfd__h381116; endcase end - always@(guard__h372570 or - _theResult___snd__h380593 or _theResult___sfd__h381115) + always@(guard__h372571 or + _theResult___snd__h380594 or _theResult___sfd__h381116) begin - case (guard__h372570) + case (guard__h372571) 2'b0: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 = - _theResult___snd__h380593[56:34]; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 = + _theResult___snd__h380594[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 = - _theResult___sfd__h381115; + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 = + _theResult___sfd__h381116; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53 or - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54 or + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53 or + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024 or - _theResult___snd__h380593) + _theResult___snd__h380594) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h381193 = - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q53; + _theResult___fst_sfd__h381194 = + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q53; 3'd1: - _theResult___fst_sfd__h381193 = - CASE_guard72570_0b0_theResult___snd80593_BITS__ETC__q54; + _theResult___fst_sfd__h381194 = + CASE_guard72571_0b0_theResult___snd80594_BITS__ETC__q54; 3'd2: - _theResult___fst_sfd__h381193 = + _theResult___fst_sfd__h381194 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5022; 3'd3: - _theResult___fst_sfd__h381193 = + _theResult___fst_sfd__h381194 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5024; - 3'd4: _theResult___fst_sfd__h381193 = _theResult___snd__h380593[56:34]; - default: _theResult___fst_sfd__h381193 = 23'd0; + 3'd4: _theResult___fst_sfd__h381194 = _theResult___snd__h380594[56:34]; + default: _theResult___fst_sfd__h381194 = 23'd0; endcase end - always@(guard__h346095 or + always@(guard__h346096 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01, 2'b10: - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = - guard__h346095 == 2'b11 && + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 = + guard__h346096 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 or - guard__h346095) + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55 or + guard__h346096) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = - CASE_guard46095_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55; + CASE_guard46096_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q55; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = - (guard__h346095 == 2'b0) ? + (guard__h346096 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h346095 == 2'b01 || guard__h346095 == 2'b10 || - guard__h346095 == 2'b11) && + (guard__h346096 == 2'b01 || guard__h346096 == 2'b10 || + guard__h346096 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5110 = @@ -33848,34 +33848,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h346095 or + always@(guard__h346096 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h346095) + case (guard__h346096) 2'b0, 2'b01, 2'b10: - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = - guard__h346095 != 2'b11 || + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 = + guard__h346096 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 or - guard__h346095) + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56 or + guard__h346096) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = - CASE_guard46095_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56; + CASE_guard46096_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q56; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = - (guard__h346095 == 2'b0) ? + (guard__h346096 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h346095 != 2'b01 && guard__h346095 != 2'b10 && - guard__h346095 != 2'b11 || + guard__h346096 != 2'b01 && guard__h346096 != 2'b10 && + guard__h346096 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5054 = @@ -33886,34 +33886,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h354804 or + always@(guard__h354805 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01, 2'b10: - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = - guard__h354804 == 2'b11 && + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 = + guard__h354805 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 or - guard__h354804) + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57 or + guard__h354805) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = - CASE_guard54804_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57; + CASE_guard54805_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q57; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = - (guard__h354804 == 2'b0) ? + (guard__h354805 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h354804 == 2'b01 || guard__h354804 == 2'b10 || - guard__h354804 == 2'b11) && + (guard__h354805 == 2'b01 || guard__h354805 == 2'b10 || + guard__h354805 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5117 = @@ -33924,34 +33924,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h354804 or + always@(guard__h354805 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h354804) + case (guard__h354805) 2'b0, 2'b01, 2'b10: - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = - guard__h354804 != 2'b11 || + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 = + guard__h354805 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 or - guard__h354804) + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58 or + guard__h354805) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = - CASE_guard54804_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58; + CASE_guard54805_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q58; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = - (guard__h354804 == 2'b0) ? + (guard__h354805 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h354804 != 2'b01 && guard__h354804 != 2'b10 && - guard__h354804 != 2'b11 || + guard__h354805 != 2'b01 && guard__h354805 != 2'b10 && + guard__h354805 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5067 = @@ -33962,34 +33962,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h363734 or + always@(guard__h363735 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01, 2'b10: - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = - guard__h363734 == 2'b11 && + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 = + guard__h363735 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 or - guard__h363734) + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59 or + guard__h363735) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = - CASE_guard63734_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59; + CASE_guard63735_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q59; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = - (guard__h363734 == 2'b0) ? + (guard__h363735 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h363734 == 2'b01 || guard__h363734 == 2'b10 || - guard__h363734 == 2'b11) && + (guard__h363735 == 2'b01 || guard__h363735 == 2'b10 || + guard__h363735 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5127 = @@ -34000,34 +34000,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h363734 or + always@(guard__h363735 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h363734) + case (guard__h363735) 2'b0, 2'b01, 2'b10: - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = - guard__h363734 != 2'b11 || + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 = + guard__h363735 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 or - guard__h363734) + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60 or + guard__h363735) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = - CASE_guard63734_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60; + CASE_guard63735_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q60; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = - (guard__h363734 == 2'b0) ? + (guard__h363735 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h363734 != 2'b01 && guard__h363734 != 2'b10 && - guard__h363734 != 2'b11 || + guard__h363735 != 2'b01 && guard__h363735 != 2'b10 && + guard__h363735 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5084 = @@ -34038,34 +34038,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h372570 or + always@(guard__h372571 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01, 2'b10: - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = - guard__h372570 == 2'b11 && + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 = + guard__h372571 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 or - guard__h372570) + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61 or + guard__h372571) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = - CASE_guard72570_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61; + CASE_guard72571_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q61; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = - (guard__h372570 == 2'b0) ? + (guard__h372571 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - (guard__h372570 == 2'b01 || guard__h372570 == 2'b10 || - guard__h372570 == 2'b11) && + (guard__h372571 == 2'b01 || guard__h372571 == 2'b10 || + guard__h372571 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5134 = @@ -34076,34 +34076,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h372570 or + always@(guard__h372571 or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get) begin - case (guard__h372570) + case (guard__h372571) 2'b0, 2'b01, 2'b10: - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 2'd3: - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = - guard__h372570 != 2'b11 || + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 = + guard__h372571 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get or - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 or - guard__h372570) + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62 or + guard__h372571) begin case (coreFix_fpuMulDivExe_0_fpuExec_fmaQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = - CASE_guard72570_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62; + CASE_guard72571_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q62; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = - (guard__h372570 == 2'b0) ? + (guard__h372571 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68] : - guard__h372570 != 2'b01 && guard__h372570 != 2'b10 && - guard__h372570 != 2'b11 || + guard__h372571 != 2'b01 && guard__h372571 != 2'b10 && + guard__h372571 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_fmaQ_first_d_ETC___d5097 = @@ -34140,446 +34140,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_fma$response_get[68]; endcase end - always@(guard__h400501 or - _theResult___fst_exp__h408549 or - out_exp__h408994 or _theResult___exp__h408991) + always@(guard__h400502 or + _theResult___fst_exp__h408550 or + out_exp__h408995 or _theResult___exp__h408992) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - _theResult___fst_exp__h408549; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + _theResult___fst_exp__h408550; 2'b10: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - out_exp__h408994; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + out_exp__h408995; 2'b11: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 = - _theResult___exp__h408991; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 = + _theResult___exp__h408992; endcase end - always@(guard__h400501 or - _theResult___fst_exp__h408549 or _theResult___exp__h408991) + always@(guard__h400502 or + _theResult___fst_exp__h408550 or _theResult___exp__h408992) begin - case (guard__h400501) + case (guard__h400502) 2'b0: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 = - _theResult___fst_exp__h408549; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 = + _theResult___fst_exp__h408550; 2'b01, 2'b10, 2'b11: - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 = - _theResult___exp__h408991; + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 = + _theResult___exp__h408992; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67 or - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68 or + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67 or + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926 or - _theResult___fst_exp__h408549) + _theResult___fst_exp__h408550) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h409069 = - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q67; + _theResult___fst_exp__h409070 = + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q67; 3'd1: - _theResult___fst_exp__h409069 = - CASE_guard00501_0b0_theResult___fst_exp08549_0_ETC__q68; + _theResult___fst_exp__h409070 = + CASE_guard00502_0b0_theResult___fst_exp08550_0_ETC__q68; 3'd2: - _theResult___fst_exp__h409069 = + _theResult___fst_exp__h409070 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5924; 3'd3: - _theResult___fst_exp__h409069 = + _theResult___fst_exp__h409070 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d5926; - 3'd4: _theResult___fst_exp__h409069 = _theResult___fst_exp__h408549; - default: _theResult___fst_exp__h409069 = 8'd0; + 3'd4: _theResult___fst_exp__h409070 = _theResult___fst_exp__h408550; + default: _theResult___fst_exp__h409070 = 8'd0; endcase end - always@(guard__h391794 or - _theResult___fst_exp__h399893 or - out_exp__h400412 or _theResult___exp__h400409) + always@(guard__h391795 or + _theResult___fst_exp__h399894 or + out_exp__h400413 or _theResult___exp__h400410) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - _theResult___fst_exp__h399893; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + _theResult___fst_exp__h399894; 2'b10: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - out_exp__h400412; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + out_exp__h400413; 2'b11: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 = - _theResult___exp__h400409; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 = + _theResult___exp__h400410; endcase end - always@(guard__h391794 or - _theResult___fst_exp__h399893 or _theResult___exp__h400409) + always@(guard__h391795 or + _theResult___fst_exp__h399894 or _theResult___exp__h400410) begin - case (guard__h391794) + case (guard__h391795) 2'b0: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 = - _theResult___fst_exp__h399893; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 = + _theResult___fst_exp__h399894; 2'b01, 2'b10, 2'b11: - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 = - _theResult___exp__h400409; + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 = + _theResult___exp__h400410; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69 or - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70 or + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69 or + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705 or - _theResult___fst_exp__h399893) + _theResult___fst_exp__h399894) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h400487 = - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q69; + _theResult___fst_exp__h400488 = + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q69; 3'd1: - _theResult___fst_exp__h400487 = - CASE_guard91794_0b0_theResult___fst_exp99893_0_ETC__q70; + _theResult___fst_exp__h400488 = + CASE_guard91795_0b0_theResult___fst_exp99894_0_ETC__q70; 3'd2: - _theResult___fst_exp__h400487 = + _theResult___fst_exp__h400488 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5702; 3'd3: - _theResult___fst_exp__h400487 = + _theResult___fst_exp__h400488 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d5705; - 3'd4: _theResult___fst_exp__h400487 = _theResult___fst_exp__h399893; - default: _theResult___fst_exp__h400487 = 8'd0; + 3'd4: _theResult___fst_exp__h400488 = _theResult___fst_exp__h399894; + default: _theResult___fst_exp__h400488 = 8'd0; endcase end - always@(guard__h409431 or - _theResult___fst_exp__h417659 or - out_exp__h418178 or _theResult___exp__h418175) + always@(guard__h409432 or + _theResult___fst_exp__h417660 or + out_exp__h418179 or _theResult___exp__h418176) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - _theResult___fst_exp__h417659; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + _theResult___fst_exp__h417660; 2'b10: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - out_exp__h418178; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + out_exp__h418179; 2'b11: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 = - _theResult___exp__h418175; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 = + _theResult___exp__h418176; endcase end - always@(guard__h409431 or - _theResult___fst_exp__h417659 or _theResult___exp__h418175) + always@(guard__h409432 or + _theResult___fst_exp__h417660 or _theResult___exp__h418176) begin - case (guard__h409431) + case (guard__h409432) 2'b0: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 = - _theResult___fst_exp__h417659; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 = + _theResult___fst_exp__h417660; 2'b01, 2'b10, 2'b11: - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 = - _theResult___exp__h418175; + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 = + _theResult___exp__h418176; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75 or - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76 or + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75 or + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251 or - _theResult___fst_exp__h417659) + _theResult___fst_exp__h417660) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h418253 = - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q75; + _theResult___fst_exp__h418254 = + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q75; 3'd1: - _theResult___fst_exp__h418253 = - CASE_guard09431_0b0_theResult___fst_exp17659_0_ETC__q76; + _theResult___fst_exp__h418254 = + CASE_guard09432_0b0_theResult___fst_exp17660_0_ETC__q76; 3'd2: - _theResult___fst_exp__h418253 = + _theResult___fst_exp__h418254 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6249; 3'd3: - _theResult___fst_exp__h418253 = + _theResult___fst_exp__h418254 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6251; - 3'd4: _theResult___fst_exp__h418253 = _theResult___fst_exp__h417659; - default: _theResult___fst_exp__h418253 = 8'd0; + 3'd4: _theResult___fst_exp__h418254 = _theResult___fst_exp__h417660; + default: _theResult___fst_exp__h418254 = 8'd0; endcase end - always@(guard__h418267 or - _theResult___fst_exp__h426344 or - out_exp__h426814 or _theResult___exp__h426811) + always@(guard__h418268 or + _theResult___fst_exp__h426345 or + out_exp__h426815 or _theResult___exp__h426812) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - _theResult___fst_exp__h426344; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + _theResult___fst_exp__h426345; 2'b10: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - out_exp__h426814; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + out_exp__h426815; 2'b11: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 = - _theResult___exp__h426811; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 = + _theResult___exp__h426812; endcase end - always@(guard__h418267 or - _theResult___fst_exp__h426344 or _theResult___exp__h426811) + always@(guard__h418268 or + _theResult___fst_exp__h426345 or _theResult___exp__h426812) begin - case (guard__h418267) + case (guard__h418268) 2'b0: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 = - _theResult___fst_exp__h426344; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 = + _theResult___fst_exp__h426345; 2'b01, 2'b10, 2'b11: - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 = - _theResult___exp__h426811; + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 = + _theResult___exp__h426812; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80 or - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81 or + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80 or + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320 or - _theResult___fst_exp__h426344) + _theResult___fst_exp__h426345) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h426889 = - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q80; + _theResult___fst_exp__h426890 = + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q80; 3'd1: - _theResult___fst_exp__h426889 = - CASE_guard18267_0b0_theResult___fst_exp26344_0_ETC__q81; + _theResult___fst_exp__h426890 = + CASE_guard18268_0b0_theResult___fst_exp26345_0_ETC__q81; 3'd2: - _theResult___fst_exp__h426889 = + _theResult___fst_exp__h426890 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6318; 3'd3: - _theResult___fst_exp__h426889 = + _theResult___fst_exp__h426890 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6320; - 3'd4: _theResult___fst_exp__h426889 = _theResult___fst_exp__h426344; - default: _theResult___fst_exp__h426889 = 8'd0; + 3'd4: _theResult___fst_exp__h426890 = _theResult___fst_exp__h426345; + default: _theResult___fst_exp__h426890 = 8'd0; endcase end - always@(guard__h400501 or - _theResult___snd__h408500 or - out_sfd__h408995 or _theResult___sfd__h408992) + always@(guard__h400502 or + _theResult___snd__h408501 or + out_sfd__h408996 or _theResult___sfd__h408993) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - _theResult___snd__h408500[56:34]; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + _theResult___snd__h408501[56:34]; 2'b10: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - out_sfd__h408995; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + out_sfd__h408996; 2'b11: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 = - _theResult___sfd__h408992; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 = + _theResult___sfd__h408993; endcase end - always@(guard__h400501 or - _theResult___snd__h408500 or _theResult___sfd__h408992) + always@(guard__h400502 or + _theResult___snd__h408501 or _theResult___sfd__h408993) begin - case (guard__h400501) + case (guard__h400502) 2'b0: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 = - _theResult___snd__h408500[56:34]; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 = + _theResult___snd__h408501[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 = - _theResult___sfd__h408992; + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 = + _theResult___sfd__h408993; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82 or - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83 or + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82 or + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370 or - _theResult___snd__h408500) + _theResult___snd__h408501) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h409070 = - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q82; + _theResult___fst_sfd__h409071 = + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q82; 3'd1: - _theResult___fst_sfd__h409070 = - CASE_guard00501_0b0_theResult___snd08500_BITS__ETC__q83; + _theResult___fst_sfd__h409071 = + CASE_guard00502_0b0_theResult___snd08501_BITS__ETC__q83; 3'd2: - _theResult___fst_sfd__h409070 = + _theResult___fst_sfd__h409071 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6368; 3'd3: - _theResult___fst_sfd__h409070 = + _theResult___fst_sfd__h409071 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6370; - 3'd4: _theResult___fst_sfd__h409070 = _theResult___snd__h408500[56:34]; - default: _theResult___fst_sfd__h409070 = 23'd0; + 3'd4: _theResult___fst_sfd__h409071 = _theResult___snd__h408501[56:34]; + default: _theResult___fst_sfd__h409071 = 23'd0; endcase end - always@(guard__h391794 or - sfdin__h399887 or out_sfd__h400413 or _theResult___sfd__h400410) + always@(guard__h391795 or + sfdin__h399888 or out_sfd__h400414 or _theResult___sfd__h400411) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - sfdin__h399887[56:34]; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + sfdin__h399888[56:34]; 2'b10: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - out_sfd__h400413; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + out_sfd__h400414; 2'b11: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 = - _theResult___sfd__h400410; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 = + _theResult___sfd__h400411; endcase end - always@(guard__h391794 or sfdin__h399887 or _theResult___sfd__h400410) + always@(guard__h391795 or sfdin__h399888 or _theResult___sfd__h400411) begin - case (guard__h391794) + case (guard__h391795) 2'b0: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 = - sfdin__h399887[56:34]; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 = + sfdin__h399888[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 = - _theResult___sfd__h400410; + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 = + _theResult___sfd__h400411; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84 or - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85 or + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84 or + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351 or - sfdin__h399887) + sfdin__h399888) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h400488 = - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q84; + _theResult___fst_sfd__h400489 = + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q84; 3'd1: - _theResult___fst_sfd__h400488 = - CASE_guard91794_0b0_sfdin99887_BITS_56_TO_34_0_ETC__q85; + _theResult___fst_sfd__h400489 = + CASE_guard91795_0b0_sfdin99888_BITS_56_TO_34_0_ETC__q85; 3'd2: - _theResult___fst_sfd__h400488 = + _theResult___fst_sfd__h400489 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6349; 3'd3: - _theResult___fst_sfd__h400488 = + _theResult___fst_sfd__h400489 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d6351; - 3'd4: _theResult___fst_sfd__h400488 = sfdin__h399887[56:34]; - default: _theResult___fst_sfd__h400488 = 23'd0; + 3'd4: _theResult___fst_sfd__h400489 = sfdin__h399888[56:34]; + default: _theResult___fst_sfd__h400489 = 23'd0; endcase end - always@(guard__h409431 or - sfdin__h417653 or out_sfd__h418179 or _theResult___sfd__h418176) + always@(guard__h409432 or + sfdin__h417654 or out_sfd__h418180 or _theResult___sfd__h418177) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - sfdin__h417653[56:34]; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + sfdin__h417654[56:34]; 2'b10: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - out_sfd__h418179; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + out_sfd__h418180; 2'b11: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 = - _theResult___sfd__h418176; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 = + _theResult___sfd__h418177; endcase end - always@(guard__h409431 or sfdin__h417653 or _theResult___sfd__h418176) + always@(guard__h409432 or sfdin__h417654 or _theResult___sfd__h418177) begin - case (guard__h409431) + case (guard__h409432) 2'b0: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 = - sfdin__h417653[56:34]; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 = + sfdin__h417654[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 = - _theResult___sfd__h418176; + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 = + _theResult___sfd__h418177; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86 or - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87 or + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86 or + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397 or - sfdin__h417653) + sfdin__h417654) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h418254 = - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q86; + _theResult___fst_sfd__h418255 = + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q86; 3'd1: - _theResult___fst_sfd__h418254 = - CASE_guard09431_0b0_sfdin17653_BITS_56_TO_34_0_ETC__q87; + _theResult___fst_sfd__h418255 = + CASE_guard09432_0b0_sfdin17654_BITS_56_TO_34_0_ETC__q87; 3'd2: - _theResult___fst_sfd__h418254 = + _theResult___fst_sfd__h418255 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6395; 3'd3: - _theResult___fst_sfd__h418254 = + _theResult___fst_sfd__h418255 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d6397; - 3'd4: _theResult___fst_sfd__h418254 = sfdin__h417653[56:34]; - default: _theResult___fst_sfd__h418254 = 23'd0; + 3'd4: _theResult___fst_sfd__h418255 = sfdin__h417654[56:34]; + default: _theResult___fst_sfd__h418255 = 23'd0; endcase end - always@(guard__h418267 or - _theResult___snd__h426290 or - out_sfd__h426815 or _theResult___sfd__h426812) + always@(guard__h418268 or + _theResult___snd__h426291 or + out_sfd__h426816 or _theResult___sfd__h426813) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - _theResult___snd__h426290[56:34]; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + _theResult___snd__h426291[56:34]; 2'b10: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - out_sfd__h426815; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + out_sfd__h426816; 2'b11: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 = - _theResult___sfd__h426812; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 = + _theResult___sfd__h426813; endcase end - always@(guard__h418267 or - _theResult___snd__h426290 or _theResult___sfd__h426812) + always@(guard__h418268 or + _theResult___snd__h426291 or _theResult___sfd__h426813) begin - case (guard__h418267) + case (guard__h418268) 2'b0: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 = - _theResult___snd__h426290[56:34]; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 = + _theResult___snd__h426291[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 = - _theResult___sfd__h426812; + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 = + _theResult___sfd__h426813; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88 or - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89 or + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88 or + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416 or - _theResult___snd__h426290) + _theResult___snd__h426291) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h426890 = - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q88; + _theResult___fst_sfd__h426891 = + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q88; 3'd1: - _theResult___fst_sfd__h426890 = - CASE_guard18267_0b0_theResult___snd26290_BITS__ETC__q89; + _theResult___fst_sfd__h426891 = + CASE_guard18268_0b0_theResult___snd26291_BITS__ETC__q89; 3'd2: - _theResult___fst_sfd__h426890 = + _theResult___fst_sfd__h426891 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6414; 3'd3: - _theResult___fst_sfd__h426890 = + _theResult___fst_sfd__h426891 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d6416; - 3'd4: _theResult___fst_sfd__h426890 = _theResult___snd__h426290[56:34]; - default: _theResult___fst_sfd__h426890 = 23'd0; + 3'd4: _theResult___fst_sfd__h426891 = _theResult___snd__h426291[56:34]; + default: _theResult___fst_sfd__h426891 = 23'd0; endcase end - always@(guard__h391794 or + always@(guard__h391795 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01, 2'b10: - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = - guard__h391794 == 2'b11 && + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 = + guard__h391795 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 or - guard__h391794) + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90 or + guard__h391795) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = - CASE_guard91794_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90; + CASE_guard91795_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q90; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = - (guard__h391794 == 2'b0) ? + (guard__h391795 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h391794 == 2'b01 || guard__h391794 == 2'b10 || - guard__h391794 == 2'b11) && + (guard__h391795 == 2'b01 || guard__h391795 == 2'b10 || + guard__h391795 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6502 = @@ -34590,34 +34590,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h391794 or + always@(guard__h391795 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h391794) + case (guard__h391795) 2'b0, 2'b01, 2'b10: - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = - guard__h391794 != 2'b11 || + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 = + guard__h391795 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 or - guard__h391794) + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91 or + guard__h391795) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = - CASE_guard91794_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91; + CASE_guard91795_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q91; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = - (guard__h391794 == 2'b0) ? + (guard__h391795 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h391794 != 2'b01 && guard__h391794 != 2'b10 && - guard__h391794 != 2'b11 || + guard__h391795 != 2'b01 && guard__h391795 != 2'b10 && + guard__h391795 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6446 = @@ -34628,34 +34628,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h400501 or + always@(guard__h400502 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01, 2'b10: - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = - guard__h400501 == 2'b11 && + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 = + guard__h400502 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 or - guard__h400501) + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92 or + guard__h400502) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = - CASE_guard00501_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92; + CASE_guard00502_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q92; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = - (guard__h400501 == 2'b0) ? + (guard__h400502 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h400501 == 2'b01 || guard__h400501 == 2'b10 || - guard__h400501 == 2'b11) && + (guard__h400502 == 2'b01 || guard__h400502 == 2'b10 || + guard__h400502 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6509 = @@ -34666,34 +34666,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h400501 or + always@(guard__h400502 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h400501) + case (guard__h400502) 2'b0, 2'b01, 2'b10: - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = - guard__h400501 != 2'b11 || + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 = + guard__h400502 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 or - guard__h400501) + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93 or + guard__h400502) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = - CASE_guard00501_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93; + CASE_guard00502_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q93; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = - (guard__h400501 == 2'b0) ? + (guard__h400502 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h400501 != 2'b01 && guard__h400501 != 2'b10 && - guard__h400501 != 2'b11 || + guard__h400502 != 2'b01 && guard__h400502 != 2'b10 && + guard__h400502 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6459 = @@ -34704,34 +34704,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h409431 or + always@(guard__h409432 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01, 2'b10: - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = - guard__h409431 == 2'b11 && + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 = + guard__h409432 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 or - guard__h409431) + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94 or + guard__h409432) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = - CASE_guard09431_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94; + CASE_guard09432_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q94; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = - (guard__h409431 == 2'b0) ? + (guard__h409432 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h409431 == 2'b01 || guard__h409431 == 2'b10 || - guard__h409431 == 2'b11) && + (guard__h409432 == 2'b01 || guard__h409432 == 2'b10 || + guard__h409432 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6519 = @@ -34742,34 +34742,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h409431 or + always@(guard__h409432 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h409431) + case (guard__h409432) 2'b0, 2'b01, 2'b10: - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = - guard__h409431 != 2'b11 || + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 = + guard__h409432 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 or - guard__h409431) + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95 or + guard__h409432) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = - CASE_guard09431_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95; + CASE_guard09432_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q95; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = - (guard__h409431 == 2'b0) ? + (guard__h409432 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h409431 != 2'b01 && guard__h409431 != 2'b10 && - guard__h409431 != 2'b11 || + guard__h409432 != 2'b01 && guard__h409432 != 2'b10 && + guard__h409432 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6476 = @@ -34780,34 +34780,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h418267 or + always@(guard__h418268 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01, 2'b10: - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = - guard__h418267 == 2'b11 && + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 = + guard__h418268 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 or - guard__h418267) + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96 or + guard__h418268) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = - CASE_guard18267_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96; + CASE_guard18268_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q96; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = - (guard__h418267 == 2'b0) ? + (guard__h418268 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - (guard__h418267 == 2'b01 || guard__h418267 == 2'b10 || - guard__h418267 == 2'b11) && + (guard__h418268 == 2'b01 || guard__h418268 == 2'b10 || + guard__h418268 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6526 = @@ -34818,34 +34818,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h418267 or + always@(guard__h418268 or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get) begin - case (guard__h418267) + case (guard__h418268) 2'b0, 2'b01, 2'b10: - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 2'd3: - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = - guard__h418267 != 2'b11 || + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 = + guard__h418268 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get or - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 or - guard__h418267) + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97 or + guard__h418268) begin case (coreFix_fpuMulDivExe_0_fpuExec_divQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = - CASE_guard18267_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97; + CASE_guard18268_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q97; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = - (guard__h418267 == 2'b0) ? + (guard__h418268 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68] : - guard__h418267 != 2'b01 && guard__h418267 != 2'b10 && - guard__h418267 != 2'b11 || + guard__h418268 != 2'b01 && guard__h418268 != 2'b10 && + guard__h418268 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_divQ_first_d_ETC___d6489 = @@ -34882,446 +34882,446 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_div$response_get[68]; endcase end - always@(guard__h446196 or - _theResult___fst_exp__h454244 or - out_exp__h454689 or _theResult___exp__h454686) + always@(guard__h446197 or + _theResult___fst_exp__h454245 or + out_exp__h454690 or _theResult___exp__h454687) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - _theResult___fst_exp__h454244; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + _theResult___fst_exp__h454245; 2'b10: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - out_exp__h454689; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + out_exp__h454690; 2'b11: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 = - _theResult___exp__h454686; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 = + _theResult___exp__h454687; endcase end - always@(guard__h446196 or - _theResult___fst_exp__h454244 or _theResult___exp__h454686) + always@(guard__h446197 or + _theResult___fst_exp__h454245 or _theResult___exp__h454687) begin - case (guard__h446196) + case (guard__h446197) 2'b0: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 = - _theResult___fst_exp__h454244; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 = + _theResult___fst_exp__h454245; 2'b01, 2'b10, 2'b11: - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 = - _theResult___exp__h454686; + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 = + _theResult___exp__h454687; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102 or - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103 or + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102 or + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318 or - _theResult___fst_exp__h454244) + _theResult___fst_exp__h454245) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h454764 = - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q102; + _theResult___fst_exp__h454765 = + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q102; 3'd1: - _theResult___fst_exp__h454764 = - CASE_guard46196_0b0_theResult___fst_exp54244_0_ETC__q103; + _theResult___fst_exp__h454765 = + CASE_guard46197_0b0_theResult___fst_exp54245_0_ETC__q103; 3'd2: - _theResult___fst_exp__h454764 = + _theResult___fst_exp__h454765 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7316; 3'd3: - _theResult___fst_exp__h454764 = + _theResult___fst_exp__h454765 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7318; - 3'd4: _theResult___fst_exp__h454764 = _theResult___fst_exp__h454244; - default: _theResult___fst_exp__h454764 = 8'd0; + 3'd4: _theResult___fst_exp__h454765 = _theResult___fst_exp__h454245; + default: _theResult___fst_exp__h454765 = 8'd0; endcase end - always@(guard__h437489 or - _theResult___fst_exp__h445588 or - out_exp__h446107 or _theResult___exp__h446104) + always@(guard__h437490 or + _theResult___fst_exp__h445589 or + out_exp__h446108 or _theResult___exp__h446105) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - _theResult___fst_exp__h445588; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + _theResult___fst_exp__h445589; 2'b10: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - out_exp__h446107; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + out_exp__h446108; 2'b11: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 = - _theResult___exp__h446104; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 = + _theResult___exp__h446105; endcase end - always@(guard__h437489 or - _theResult___fst_exp__h445588 or _theResult___exp__h446104) + always@(guard__h437490 or + _theResult___fst_exp__h445589 or _theResult___exp__h446105) begin - case (guard__h437489) + case (guard__h437490) 2'b0: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 = - _theResult___fst_exp__h445588; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 = + _theResult___fst_exp__h445589; 2'b01, 2'b10, 2'b11: - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 = - _theResult___exp__h446104; + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 = + _theResult___exp__h446105; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104 or - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105 or + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104 or + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097 or - _theResult___fst_exp__h445588) + _theResult___fst_exp__h445589) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h446182 = - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q104; + _theResult___fst_exp__h446183 = + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q104; 3'd1: - _theResult___fst_exp__h446182 = - CASE_guard37489_0b0_theResult___fst_exp45588_0_ETC__q105; + _theResult___fst_exp__h446183 = + CASE_guard37490_0b0_theResult___fst_exp45589_0_ETC__q105; 3'd2: - _theResult___fst_exp__h446182 = + _theResult___fst_exp__h446183 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7094; 3'd3: - _theResult___fst_exp__h446182 = + _theResult___fst_exp__h446183 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7097; - 3'd4: _theResult___fst_exp__h446182 = _theResult___fst_exp__h445588; - default: _theResult___fst_exp__h446182 = 8'd0; + 3'd4: _theResult___fst_exp__h446183 = _theResult___fst_exp__h445589; + default: _theResult___fst_exp__h446183 = 8'd0; endcase end - always@(guard__h455126 or - _theResult___fst_exp__h463354 or - out_exp__h463873 or _theResult___exp__h463870) + always@(guard__h455127 or + _theResult___fst_exp__h463355 or + out_exp__h463874 or _theResult___exp__h463871) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - _theResult___fst_exp__h463354; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + _theResult___fst_exp__h463355; 2'b10: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - out_exp__h463873; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + out_exp__h463874; 2'b11: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 = - _theResult___exp__h463870; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 = + _theResult___exp__h463871; endcase end - always@(guard__h455126 or - _theResult___fst_exp__h463354 or _theResult___exp__h463870) + always@(guard__h455127 or + _theResult___fst_exp__h463355 or _theResult___exp__h463871) begin - case (guard__h455126) + case (guard__h455127) 2'b0: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 = - _theResult___fst_exp__h463354; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 = + _theResult___fst_exp__h463355; 2'b01, 2'b10, 2'b11: - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 = - _theResult___exp__h463870; + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 = + _theResult___exp__h463871; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110 or - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111 or + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110 or + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643 or - _theResult___fst_exp__h463354) + _theResult___fst_exp__h463355) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h463948 = - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q110; + _theResult___fst_exp__h463949 = + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q110; 3'd1: - _theResult___fst_exp__h463948 = - CASE_guard55126_0b0_theResult___fst_exp63354_0_ETC__q111; + _theResult___fst_exp__h463949 = + CASE_guard55127_0b0_theResult___fst_exp63355_0_ETC__q111; 3'd2: - _theResult___fst_exp__h463948 = + _theResult___fst_exp__h463949 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7641; 3'd3: - _theResult___fst_exp__h463948 = + _theResult___fst_exp__h463949 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7643; - 3'd4: _theResult___fst_exp__h463948 = _theResult___fst_exp__h463354; - default: _theResult___fst_exp__h463948 = 8'd0; + 3'd4: _theResult___fst_exp__h463949 = _theResult___fst_exp__h463355; + default: _theResult___fst_exp__h463949 = 8'd0; endcase end - always@(guard__h463962 or - _theResult___fst_exp__h472039 or - out_exp__h472509 or _theResult___exp__h472506) + always@(guard__h463963 or + _theResult___fst_exp__h472040 or + out_exp__h472510 or _theResult___exp__h472507) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - _theResult___fst_exp__h472039; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + _theResult___fst_exp__h472040; 2'b10: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - out_exp__h472509; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + out_exp__h472510; 2'b11: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 = - _theResult___exp__h472506; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 = + _theResult___exp__h472507; endcase end - always@(guard__h463962 or - _theResult___fst_exp__h472039 or _theResult___exp__h472506) + always@(guard__h463963 or + _theResult___fst_exp__h472040 or _theResult___exp__h472507) begin - case (guard__h463962) + case (guard__h463963) 2'b0: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 = - _theResult___fst_exp__h472039; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 = + _theResult___fst_exp__h472040; 2'b01, 2'b10, 2'b11: - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 = - _theResult___exp__h472506; + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 = + _theResult___exp__h472507; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115 or - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116 or + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115 or + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712 or - _theResult___fst_exp__h472039) + _theResult___fst_exp__h472040) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_exp__h472584 = - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q115; + _theResult___fst_exp__h472585 = + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q115; 3'd1: - _theResult___fst_exp__h472584 = - CASE_guard63962_0b0_theResult___fst_exp72039_0_ETC__q116; + _theResult___fst_exp__h472585 = + CASE_guard63963_0b0_theResult___fst_exp72040_0_ETC__q116; 3'd2: - _theResult___fst_exp__h472584 = + _theResult___fst_exp__h472585 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7710; 3'd3: - _theResult___fst_exp__h472584 = + _theResult___fst_exp__h472585 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7712; - 3'd4: _theResult___fst_exp__h472584 = _theResult___fst_exp__h472039; - default: _theResult___fst_exp__h472584 = 8'd0; + 3'd4: _theResult___fst_exp__h472585 = _theResult___fst_exp__h472040; + default: _theResult___fst_exp__h472585 = 8'd0; endcase end - always@(guard__h446196 or - _theResult___snd__h454195 or - out_sfd__h454690 or _theResult___sfd__h454687) + always@(guard__h446197 or + _theResult___snd__h454196 or + out_sfd__h454691 or _theResult___sfd__h454688) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - _theResult___snd__h454195[56:34]; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + _theResult___snd__h454196[56:34]; 2'b10: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - out_sfd__h454690; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + out_sfd__h454691; 2'b11: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 = - _theResult___sfd__h454687; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 = + _theResult___sfd__h454688; endcase end - always@(guard__h446196 or - _theResult___snd__h454195 or _theResult___sfd__h454687) + always@(guard__h446197 or + _theResult___snd__h454196 or _theResult___sfd__h454688) begin - case (guard__h446196) + case (guard__h446197) 2'b0: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 = - _theResult___snd__h454195[56:34]; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 = + _theResult___snd__h454196[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 = - _theResult___sfd__h454687; + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 = + _theResult___sfd__h454688; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117 or - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118 or + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117 or + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762 or - _theResult___snd__h454195) + _theResult___snd__h454196) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h454765 = - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q117; + _theResult___fst_sfd__h454766 = + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q117; 3'd1: - _theResult___fst_sfd__h454765 = - CASE_guard46196_0b0_theResult___snd54195_BITS__ETC__q118; + _theResult___fst_sfd__h454766 = + CASE_guard46197_0b0_theResult___snd54196_BITS__ETC__q118; 3'd2: - _theResult___fst_sfd__h454765 = + _theResult___fst_sfd__h454766 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7760; 3'd3: - _theResult___fst_sfd__h454765 = + _theResult___fst_sfd__h454766 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7762; - 3'd4: _theResult___fst_sfd__h454765 = _theResult___snd__h454195[56:34]; - default: _theResult___fst_sfd__h454765 = 23'd0; + 3'd4: _theResult___fst_sfd__h454766 = _theResult___snd__h454196[56:34]; + default: _theResult___fst_sfd__h454766 = 23'd0; endcase end - always@(guard__h437489 or - sfdin__h445582 or out_sfd__h446108 or _theResult___sfd__h446105) + always@(guard__h437490 or + sfdin__h445583 or out_sfd__h446109 or _theResult___sfd__h446106) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - sfdin__h445582[56:34]; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + sfdin__h445583[56:34]; 2'b10: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - out_sfd__h446108; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + out_sfd__h446109; 2'b11: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 = - _theResult___sfd__h446105; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 = + _theResult___sfd__h446106; endcase end - always@(guard__h437489 or sfdin__h445582 or _theResult___sfd__h446105) + always@(guard__h437490 or sfdin__h445583 or _theResult___sfd__h446106) begin - case (guard__h437489) + case (guard__h437490) 2'b0: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 = - sfdin__h445582[56:34]; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 = + sfdin__h445583[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 = - _theResult___sfd__h446105; + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 = + _theResult___sfd__h446106; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119 or - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120 or + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119 or + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741 or IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743 or - sfdin__h445582) + sfdin__h445583) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h446183 = - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q119; + _theResult___fst_sfd__h446184 = + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q119; 3'd1: - _theResult___fst_sfd__h446183 = - CASE_guard37489_0b0_sfdin45582_BITS_56_TO_34_0_ETC__q120; + _theResult___fst_sfd__h446184 = + CASE_guard37490_0b0_sfdin45583_BITS_56_TO_34_0_ETC__q120; 3'd2: - _theResult___fst_sfd__h446183 = + _theResult___fst_sfd__h446184 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7741; 3'd3: - _theResult___fst_sfd__h446183 = + _theResult___fst_sfd__h446184 = IF_IF_IF_IF_0b0_CONCAT_NOT_coreFix_fpuMulDivEx_ETC___d7743; - 3'd4: _theResult___fst_sfd__h446183 = sfdin__h445582[56:34]; - default: _theResult___fst_sfd__h446183 = 23'd0; + 3'd4: _theResult___fst_sfd__h446184 = sfdin__h445583[56:34]; + default: _theResult___fst_sfd__h446184 = 23'd0; endcase end - always@(guard__h455126 or - sfdin__h463348 or out_sfd__h463874 or _theResult___sfd__h463871) + always@(guard__h455127 or + sfdin__h463349 or out_sfd__h463875 or _theResult___sfd__h463872) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - sfdin__h463348[56:34]; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + sfdin__h463349[56:34]; 2'b10: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - out_sfd__h463874; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + out_sfd__h463875; 2'b11: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 = - _theResult___sfd__h463871; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 = + _theResult___sfd__h463872; endcase end - always@(guard__h455126 or sfdin__h463348 or _theResult___sfd__h463871) + always@(guard__h455127 or sfdin__h463349 or _theResult___sfd__h463872) begin - case (guard__h455126) + case (guard__h455127) 2'b0: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 = - sfdin__h463348[56:34]; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 = + sfdin__h463349[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 = - _theResult___sfd__h463871; + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 = + _theResult___sfd__h463872; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121 or - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122 or + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121 or + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787 or IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789 or - sfdin__h463348) + sfdin__h463349) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h463949 = - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q121; + _theResult___fst_sfd__h463950 = + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q121; 3'd1: - _theResult___fst_sfd__h463949 = - CASE_guard55126_0b0_sfdin63348_BITS_56_TO_34_0_ETC__q122; + _theResult___fst_sfd__h463950 = + CASE_guard55127_0b0_sfdin63349_BITS_56_TO_34_0_ETC__q122; 3'd2: - _theResult___fst_sfd__h463949 = + _theResult___fst_sfd__h463950 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7787; 3'd3: - _theResult___fst_sfd__h463949 = + _theResult___fst_sfd__h463950 = IF_IF_IF_IF_3970_MINUS_SEXT_coreFix_fpuMulDivE_ETC___d7789; - 3'd4: _theResult___fst_sfd__h463949 = sfdin__h463348[56:34]; - default: _theResult___fst_sfd__h463949 = 23'd0; + 3'd4: _theResult___fst_sfd__h463950 = sfdin__h463349[56:34]; + default: _theResult___fst_sfd__h463950 = 23'd0; endcase end - always@(guard__h463962 or - _theResult___snd__h471985 or - out_sfd__h472510 or _theResult___sfd__h472507) + always@(guard__h463963 or + _theResult___snd__h471986 or + out_sfd__h472511 or _theResult___sfd__h472508) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - _theResult___snd__h471985[56:34]; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + _theResult___snd__h471986[56:34]; 2'b10: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - out_sfd__h472510; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + out_sfd__h472511; 2'b11: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 = - _theResult___sfd__h472507; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 = + _theResult___sfd__h472508; endcase end - always@(guard__h463962 or - _theResult___snd__h471985 or _theResult___sfd__h472507) + always@(guard__h463963 or + _theResult___snd__h471986 or _theResult___sfd__h472508) begin - case (guard__h463962) + case (guard__h463963) 2'b0: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 = - _theResult___snd__h471985[56:34]; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 = + _theResult___snd__h471986[56:34]; 2'b01, 2'b10, 2'b11: - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 = - _theResult___sfd__h472507; + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 = + _theResult___sfd__h472508; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123 or - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124 or + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123 or + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806 or IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808 or - _theResult___snd__h471985) + _theResult___snd__h471986) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: - _theResult___fst_sfd__h472585 = - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q123; + _theResult___fst_sfd__h472586 = + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q123; 3'd1: - _theResult___fst_sfd__h472585 = - CASE_guard63962_0b0_theResult___snd71985_BITS__ETC__q124; + _theResult___fst_sfd__h472586 = + CASE_guard63963_0b0_theResult___snd71986_BITS__ETC__q124; 3'd2: - _theResult___fst_sfd__h472585 = + _theResult___fst_sfd__h472586 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7806; 3'd3: - _theResult___fst_sfd__h472585 = + _theResult___fst_sfd__h472586 = IF_IF_IF_coreFix_fpuMulDivExe_0_fpuExec_double_ETC___d7808; - 3'd4: _theResult___fst_sfd__h472585 = _theResult___snd__h471985[56:34]; - default: _theResult___fst_sfd__h472585 = 23'd0; + 3'd4: _theResult___fst_sfd__h472586 = _theResult___snd__h471986[56:34]; + default: _theResult___fst_sfd__h472586 = 23'd0; endcase end - always@(guard__h437489 or + always@(guard__h437490 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01, 2'b10: - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = - guard__h437489 == 2'b11 && + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 = + guard__h437490 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 or - guard__h437489) + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125 or + guard__h437490) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = - CASE_guard37489_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125; + CASE_guard37490_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q125; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = - (guard__h437489 == 2'b0) ? + (guard__h437490 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h437489 == 2'b01 || guard__h437489 == 2'b10 || - guard__h437489 == 2'b11) && + (guard__h437490 == 2'b01 || guard__h437490 == 2'b10 || + guard__h437490 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7894 = @@ -35332,34 +35332,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h446196 or + always@(guard__h446197 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01, 2'b10: - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = - guard__h446196 == 2'b11 && + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 = + guard__h446197 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or - guard__h446196) + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126 or + guard__h446197) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = - CASE_guard46196_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; + CASE_guard46197_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q126; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = - (guard__h446196 == 2'b0) ? + (guard__h446197 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h446196 == 2'b01 || guard__h446196 == 2'b10 || - guard__h446196 == 2'b11) && + (guard__h446197 == 2'b01 || guard__h446197 == 2'b10 || + guard__h446197 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7901 = @@ -35370,34 +35370,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h437489 or + always@(guard__h437490 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h437489) + case (guard__h437490) 2'b0, 2'b01, 2'b10: - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = - guard__h437489 != 2'b11 || + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 = + guard__h437490 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or - guard__h437489) + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127 or + guard__h437490) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = - CASE_guard37489_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; + CASE_guard37490_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q127; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = - (guard__h437489 == 2'b0) ? + (guard__h437490 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h437489 != 2'b01 && guard__h437489 != 2'b10 && - guard__h437489 != 2'b11 || + guard__h437490 != 2'b01 && guard__h437490 != 2'b10 && + guard__h437490 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7838 = @@ -35408,34 +35408,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h446196 or + always@(guard__h446197 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h446196) + case (guard__h446197) 2'b0, 2'b01, 2'b10: - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = - guard__h446196 != 2'b11 || + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 = + guard__h446197 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 or - guard__h446196) + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128 or + guard__h446197) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = - CASE_guard46196_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128; + CASE_guard46197_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q128; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = - (guard__h446196 == 2'b0) ? + (guard__h446197 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h446196 != 2'b01 && guard__h446196 != 2'b10 && - guard__h446196 != 2'b11 || + guard__h446197 != 2'b01 && guard__h446197 != 2'b10 && + guard__h446197 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7851 = @@ -35446,34 +35446,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h455126 or + always@(guard__h455127 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01, 2'b10: - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = - guard__h455126 == 2'b11 && + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 = + guard__h455127 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 or - guard__h455126) + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129 or + guard__h455127) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = - CASE_guard55126_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129; + CASE_guard55127_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q129; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = - (guard__h455126 == 2'b0) ? + (guard__h455127 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h455126 == 2'b01 || guard__h455126 == 2'b10 || - guard__h455126 == 2'b11) && + (guard__h455127 == 2'b01 || guard__h455127 == 2'b10 || + guard__h455127 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7911 = @@ -35484,34 +35484,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h455126 or + always@(guard__h455127 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h455126) + case (guard__h455127) 2'b0, 2'b01, 2'b10: - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = - guard__h455126 != 2'b11 || + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 = + guard__h455127 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 or - guard__h455126) + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130 or + guard__h455127) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = - CASE_guard55126_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130; + CASE_guard55127_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q130; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = - (guard__h455126 == 2'b0) ? + (guard__h455127 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h455126 != 2'b01 && guard__h455126 != 2'b10 && - guard__h455126 != 2'b11 || + guard__h455127 != 2'b01 && guard__h455127 != 2'b10 && + guard__h455127 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7868 = @@ -35522,34 +35522,34 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h463962 or + always@(guard__h463963 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01, 2'b10: - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = - guard__h463962 == 2'b11 && + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 = + guard__h463963 == 2'b11 && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 or - guard__h463962) + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131 or + guard__h463963) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = - CASE_guard63962_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131; + CASE_guard63963_0b0_coreFix_fpuMulDivExe_0_fpu_ETC__q131; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = - (guard__h463962 == 2'b0) ? + (guard__h463963 == 2'b0) ? coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - (guard__h463962 == 2'b01 || guard__h463962 == 2'b10 || - guard__h463962 == 2'b11) && + (guard__h463963 == 2'b01 || guard__h463963 == 2'b10 || + guard__h463963 == 2'b11) && coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7918 = @@ -35560,34 +35560,34 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end - always@(guard__h463962 or + always@(guard__h463963 or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get) begin - case (guard__h463962) + case (guard__h463963) 2'b0, 2'b01, 2'b10: - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 2'd3: - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = - guard__h463962 != 2'b11 || + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 = + guard__h463963 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; endcase end always@(coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data or coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get or - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 or - guard__h463962) + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132 or + guard__h463963) begin case (coreFix_fpuMulDivExe_0_fpuExec_sqrtQ$first_data[42:40]) 3'd0: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = - CASE_guard63962_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132; + CASE_guard63963_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q132; 3'd1: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = - (guard__h463962 == 2'b0) ? + (guard__h463963 == 2'b0) ? !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68] : - guard__h463962 != 2'b01 && guard__h463962 != 2'b10 && - guard__h463962 != 2'b11 || + guard__h463963 != 2'b01 && guard__h463963 != 2'b10 && + guard__h463963 != 2'b11 || !coreFix_fpuMulDivExe_0_fpuExec_double_sqrt$response_get[68]; 3'd2, 3'd3: IF_coreFix_fpuMulDivExe_0_fpuExec_sqrtQ_first__ETC___d7881 = @@ -35644,28 +35644,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_fpuExec_double_fma$RDY_request_put; endcase end - always@(guard__h493567 or - _theResult___fst_exp__h501528 or _theResult___exp__h502183) + always@(guard__h493568 or + _theResult___fst_exp__h501529 or _theResult___exp__h502184) begin - case (guard__h493567) + case (guard__h493568) 2'b0: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143 = - _theResult___fst_exp__h501528; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143 = + _theResult___fst_exp__h501529; 2'b01, 2'b10, 2'b11: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143 = - _theResult___exp__h502183; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143 = + _theResult___exp__h502184; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h501528 or + _theResult___fst_exp__h501529 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013 or - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143) + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = - _theResult___fst_exp__h501528; + _theResult___fst_exp__h501529; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9015; @@ -35674,44 +35674,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9013; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q143; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q143; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9019 = 11'd0; endcase end - always@(guard__h493567 or - _theResult___fst_exp__h501528 or - out_exp__h502186 or _theResult___exp__h502183) + always@(guard__h493568 or + _theResult___fst_exp__h501529 or + out_exp__h502187 or _theResult___exp__h502184) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - _theResult___fst_exp__h501528; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + _theResult___fst_exp__h501529; 2'b10: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - out_exp__h502186; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + out_exp__h502187; 2'b11: - CASE_guard93567_0b0_theResult___fst_exp01528_0_ETC__q144 = - _theResult___exp__h502183; + CASE_guard93568_0b0_theResult___fst_exp01529_0_ETC__q144 = + _theResult___exp__h502184; endcase end - always@(guard__h493567 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h493568 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01, 2'b10: - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard93567_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = - guard__h493567 == 2'b11 && + CASE_guard93568_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q145 = + guard__h493568 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h493567) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h493568) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35721,12 +35721,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q146 = - (guard__h493567 == 2'b0) ? + (guard__h493568 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h493567 == 2'b01 || guard__h493567 == 2'b10 || - guard__h493567 == 2'b11) && + (guard__h493568 == 2'b01 || guard__h493568 == 2'b10 || + guard__h493568 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35737,23 +35737,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h511948 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h511949 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01, 2'b10: - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard11948_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = - guard__h511948 == 2'b11 && + CASE_guard11949_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q147 = + guard__h511949 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h511948) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h511949) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35763,12 +35763,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q148 = - (guard__h511948 == 2'b0) ? + (guard__h511949 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h511948 == 2'b01 || guard__h511948 == 2'b10 || - guard__h511948 == 2'b11) && + (guard__h511949 == 2'b01 || guard__h511949 == 2'b10 || + guard__h511949 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35779,23 +35779,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h502879 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h502880 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01, 2'b10: - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 2'd3: - CASE_guard02879_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = - guard__h502879 == 2'b11 && + CASE_guard02880_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q149 = + guard__h502880 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h502879) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h502880) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35805,12 +35805,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q150 = - (guard__h502879 == 2'b0) ? + (guard__h502880 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171] : - (guard__h502879 == 2'b01 || guard__h502879 == 2'b10 || - guard__h502879 == 2'b11) && + (guard__h502880 == 2'b01 || guard__h502880 == 2'b10 || + guard__h502880 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[203:172] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[171]; @@ -35821,28 +35821,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[171]; endcase end - always@(guard__h571724 or - _theResult___fst_exp__h579685 or _theResult___exp__h580340) + always@(guard__h571725 or + _theResult___fst_exp__h579686 or _theResult___exp__h580341) begin - case (guard__h571724) + case (guard__h571725) 2'b0: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160 = - _theResult___fst_exp__h579685; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160 = + _theResult___fst_exp__h579686; 2'b01, 2'b10, 2'b11: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160 = - _theResult___exp__h580340; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160 = + _theResult___exp__h580341; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h579685 or + _theResult___fst_exp__h579686 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728 or - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160) + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = - _theResult___fst_exp__h579685; + _theResult___fst_exp__h579686; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9730; @@ -35851,42 +35851,42 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9728; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q160; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q160; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9734 = 11'd0; endcase end - always@(guard__h571724 or - _theResult___fst_exp__h579685 or - out_exp__h580343 or _theResult___exp__h580340) + always@(guard__h571725 or + _theResult___fst_exp__h579686 or + out_exp__h580344 or _theResult___exp__h580341) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - _theResult___fst_exp__h579685; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + _theResult___fst_exp__h579686; 2'b10: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - out_exp__h580343; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + out_exp__h580344; 2'b11: - CASE_guard71724_0b0_theResult___fst_exp79685_0_ETC__q161 = - _theResult___exp__h580340; + CASE_guard71725_0b0_theResult___fst_exp79686_0_ETC__q161 = + _theResult___exp__h580341; endcase end - always@(guard__h571724 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h571725 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01, 2'b10: - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard71724_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = - guard__h571724 == 2'b11 && + CASE_guard71725_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q162 = + guard__h571725 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571724) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571725) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35895,12 +35895,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q163 = - (guard__h571724 == 2'b0) ? + (guard__h571725 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h571724 == 2'b01 || guard__h571724 == 2'b10 || - guard__h571724 == 2'b11) && + (guard__h571725 == 2'b01 || guard__h571725 == 2'b10 || + guard__h571725 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35911,21 +35911,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h581036 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h581037 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01, 2'b10: - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard81036_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = - guard__h581036 == 2'b11 && + CASE_guard81037_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q164 = + guard__h581037 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581036) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581037) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35934,12 +35934,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q165 = - (guard__h581036 == 2'b0) ? + (guard__h581037 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h581036 == 2'b01 || guard__h581036 == 2'b10 || - guard__h581036 == 2'b11) && + (guard__h581037 == 2'b01 || guard__h581037 == 2'b10 || + guard__h581037 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35950,21 +35950,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h590105 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h590106 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01, 2'b10: - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard90105_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = - guard__h590105 == 2'b11 && + CASE_guard90106_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q166 = + guard__h590106 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590105) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590106) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -35973,12 +35973,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q167 = - (guard__h590105 == 2'b0) ? + (guard__h590106 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - (guard__h590105 == 2'b01 || guard__h590105 == 2'b10 || - guard__h590105 == 2'b11) && + (guard__h590106 == 2'b01 || guard__h590106 == 2'b10 || + guard__h590106 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -35989,21 +35989,21 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h581036 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h581037 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01, 2'b10: - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard81036_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = - guard__h581036 != 2'b11 || + CASE_guard81037_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q168 = + guard__h581037 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581036) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h581037) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36012,12 +36012,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q169 = - (guard__h581036 == 2'b0) ? + (guard__h581037 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h581036 != 2'b01 && guard__h581036 != 2'b10 && - guard__h581036 != 2'b11 || + guard__h581037 != 2'b01 && guard__h581037 != 2'b10 && + guard__h581037 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36028,21 +36028,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h590105 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h590106 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01, 2'b10: - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard90105_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = - guard__h590105 != 2'b11 || + CASE_guard90106_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q170 = + guard__h590106 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590105) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h590106) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36051,12 +36051,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q171 = - (guard__h590105 == 2'b0) ? + (guard__h590106 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h590105 != 2'b01 && guard__h590105 != 2'b10 && - guard__h590105 != 2'b11 || + guard__h590106 != 2'b01 && guard__h590106 != 2'b10 && + guard__h590106 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36067,21 +36067,21 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h571724 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h571725 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01, 2'b10: - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 2'd3: - CASE_guard71724_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = - guard__h571724 != 2'b11 || + CASE_guard71725_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q172 = + guard__h571725 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571724) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h571725) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36090,12 +36090,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q173 = - (guard__h571724 == 2'b0) ? + (guard__h571725 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43] : - guard__h571724 != 2'b01 && guard__h571724 != 2'b10 && - guard__h571724 != 2'b11 || + guard__h571725 != 2'b01 && guard__h571725 != 2'b10 && + guard__h571725 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[75:44] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; @@ -36106,28 +36106,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[43]; endcase end - always@(guard__h532420 or - _theResult___fst_exp__h540381 or _theResult___exp__h541036) + always@(guard__h532421 or + _theResult___fst_exp__h540382 or _theResult___exp__h541037) begin - case (guard__h532420) + case (guard__h532421) 2'b0: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183 = - _theResult___fst_exp__h540381; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183 = + _theResult___fst_exp__h540382; 2'b01, 2'b10, 2'b11: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183 = - _theResult___exp__h541036; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183 = + _theResult___exp__h541037; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h540381 or + _theResult___fst_exp__h540382 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498 or - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183) + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = - _theResult___fst_exp__h540381; + _theResult___fst_exp__h540382; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10500; @@ -36136,49 +36136,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10498; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q183; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q183; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10504 = 11'd0; endcase end - always@(guard__h532420 or - _theResult___fst_exp__h540381 or - out_exp__h541039 or _theResult___exp__h541036) + always@(guard__h532421 or + _theResult___fst_exp__h540382 or + out_exp__h541040 or _theResult___exp__h541037) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - _theResult___fst_exp__h540381; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + _theResult___fst_exp__h540382; 2'b10: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - out_exp__h541039; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + out_exp__h541040; 2'b11: - CASE_guard32420_0b0_theResult___fst_exp40381_0_ETC__q184 = - _theResult___exp__h541036; + CASE_guard32421_0b0_theResult___fst_exp40382_0_ETC__q184 = + _theResult___exp__h541037; endcase end - always@(guard__h541732 or - _theResult___fst_exp__h549958 or _theResult___exp__h550687) + always@(guard__h541733 or + _theResult___fst_exp__h549959 or _theResult___exp__h550688) begin - case (guard__h541732) + case (guard__h541733) 2'b0: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185 = - _theResult___fst_exp__h549958; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185 = + _theResult___fst_exp__h549959; 2'b01, 2'b10, 2'b11: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185 = - _theResult___exp__h550687; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185 = + _theResult___exp__h550688; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h549958 or + _theResult___fst_exp__h549959 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536 or - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185) + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = - _theResult___fst_exp__h549958; + _theResult___fst_exp__h549959; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10538; @@ -36187,49 +36187,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10536; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q185; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q185; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10542 = 11'd0; endcase end - always@(guard__h541732 or - _theResult___fst_exp__h549958 or - out_exp__h550690 or _theResult___exp__h550687) + always@(guard__h541733 or + _theResult___fst_exp__h549959 or + out_exp__h550691 or _theResult___exp__h550688) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - _theResult___fst_exp__h549958; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + _theResult___fst_exp__h549959; 2'b10: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - out_exp__h550690; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + out_exp__h550691; 2'b11: - CASE_guard41732_0b0_theResult___fst_exp49958_0_ETC__q186 = - _theResult___exp__h550687; + CASE_guard41733_0b0_theResult___fst_exp49959_0_ETC__q186 = + _theResult___exp__h550688; endcase end - always@(guard__h550801 or - _theResult___fst_exp__h558791 or _theResult___exp__h559471) + always@(guard__h550802 or + _theResult___fst_exp__h558792 or _theResult___exp__h559472) begin - case (guard__h550801) + case (guard__h550802) 2'b0: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187 = - _theResult___fst_exp__h558791; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187 = + _theResult___fst_exp__h558792; 2'b01, 2'b10, 2'b11: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187 = - _theResult___exp__h559471; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187 = + _theResult___exp__h559472; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h558791 or + _theResult___fst_exp__h558792 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567 or - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187) + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = - _theResult___fst_exp__h558791; + _theResult___fst_exp__h558792; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10569; @@ -36238,49 +36238,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10567; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q187; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q187; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10573 = 11'd0; endcase end - always@(guard__h550801 or - _theResult___fst_exp__h558791 or - out_exp__h559474 or _theResult___exp__h559471) + always@(guard__h550802 or + _theResult___fst_exp__h558792 or + out_exp__h559475 or _theResult___exp__h559472) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - _theResult___fst_exp__h558791; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + _theResult___fst_exp__h558792; 2'b10: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - out_exp__h559474; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + out_exp__h559475; 2'b11: - CASE_guard50801_0b0_theResult___fst_exp58791_0_ETC__q188 = - _theResult___exp__h559471; + CASE_guard50802_0b0_theResult___fst_exp58792_0_ETC__q188 = + _theResult___exp__h559472; endcase end - always@(guard__h581036 or - _theResult___fst_exp__h589262 or _theResult___exp__h589991) + always@(guard__h581037 or + _theResult___fst_exp__h589263 or _theResult___exp__h589992) begin - case (guard__h581036) + case (guard__h581037) 2'b0: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189 = - _theResult___fst_exp__h589262; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189 = + _theResult___fst_exp__h589263; 2'b01, 2'b10, 2'b11: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189 = - _theResult___exp__h589991; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189 = + _theResult___exp__h589992; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h589262 or + _theResult___fst_exp__h589263 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766 or - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189) + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = - _theResult___fst_exp__h589262; + _theResult___fst_exp__h589263; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9768; @@ -36289,49 +36289,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9766; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q189; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q189; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9772 = 11'd0; endcase end - always@(guard__h581036 or - _theResult___fst_exp__h589262 or - out_exp__h589994 or _theResult___exp__h589991) + always@(guard__h581037 or + _theResult___fst_exp__h589263 or + out_exp__h589995 or _theResult___exp__h589992) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - _theResult___fst_exp__h589262; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + _theResult___fst_exp__h589263; 2'b10: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - out_exp__h589994; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + out_exp__h589995; 2'b11: - CASE_guard81036_0b0_theResult___fst_exp89262_0_ETC__q190 = - _theResult___exp__h589991; + CASE_guard81037_0b0_theResult___fst_exp89263_0_ETC__q190 = + _theResult___exp__h589992; endcase end - always@(guard__h590105 or - _theResult___fst_exp__h598095 or _theResult___exp__h598775) + always@(guard__h590106 or + _theResult___fst_exp__h598096 or _theResult___exp__h598776) begin - case (guard__h590105) + case (guard__h590106) 2'b0: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191 = - _theResult___fst_exp__h598095; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191 = + _theResult___fst_exp__h598096; 2'b01, 2'b10, 2'b11: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191 = - _theResult___exp__h598775; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191 = + _theResult___exp__h598776; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h598095 or + _theResult___fst_exp__h598096 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797 or - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191) + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = - _theResult___fst_exp__h598095; + _theResult___fst_exp__h598096; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9799; @@ -36340,44 +36340,44 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9797; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q191; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q191; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9803 = 11'd0; endcase end - always@(guard__h590105 or - _theResult___fst_exp__h598095 or - out_exp__h598778 or _theResult___exp__h598775) + always@(guard__h590106 or + _theResult___fst_exp__h598096 or + out_exp__h598779 or _theResult___exp__h598776) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - _theResult___fst_exp__h598095; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + _theResult___fst_exp__h598096; 2'b10: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - out_exp__h598778; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + out_exp__h598779; 2'b11: - CASE_guard90105_0b0_theResult___fst_exp98095_0_ETC__q192 = - _theResult___exp__h598775; + CASE_guard90106_0b0_theResult___fst_exp98096_0_ETC__q192 = + _theResult___exp__h598776; endcase end - always@(guard__h532420 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h532421 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01, 2'b10: - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard32420_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = - guard__h532420 == 2'b11 && + CASE_guard32421_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q193 = + guard__h532421 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532420) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532421) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36387,12 +36387,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q194 = - (guard__h532420 == 2'b0) ? + (guard__h532421 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h532420 == 2'b01 || guard__h532420 == 2'b10 || - guard__h532420 == 2'b11) && + (guard__h532421 == 2'b01 || guard__h532421 == 2'b10 || + guard__h532421 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36403,23 +36403,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h541732 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h541733 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01, 2'b10: - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard41732_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = - guard__h541732 == 2'b11 && + CASE_guard41733_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q195 = + guard__h541733 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541732) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541733) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36429,12 +36429,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q196 = - (guard__h541732 == 2'b0) ? + (guard__h541733 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h541732 == 2'b01 || guard__h541732 == 2'b10 || - guard__h541732 == 2'b11) && + (guard__h541733 == 2'b01 || guard__h541733 == 2'b10 || + guard__h541733 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36445,23 +36445,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h550801 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h550802 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01, 2'b10: - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard50801_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = - guard__h550801 == 2'b11 && + CASE_guard50802_0b0_coreFix_fpuMulDivExe_0_reg_ETC__q197 = + guard__h550802 == 2'b11 && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550801) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550802) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36471,12 +36471,12 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q198 = - (guard__h550801 == 2'b0) ? + (guard__h550802 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - (guard__h550801 == 2'b01 || guard__h550801 == 2'b10 || - guard__h550801 == 2'b11) && + (guard__h550802 == 2'b01 || guard__h550802 == 2'b10 || + guard__h550802 == 2'b11) && coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] == 32'hFFFFFFFF && coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36487,23 +36487,23 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h541732 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h541733 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01, 2'b10: - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard41732_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = - guard__h541732 != 2'b11 || + CASE_guard41733_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q199 = + guard__h541733 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541732) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h541733) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36513,12 +36513,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q200 = - (guard__h541732 == 2'b0) ? + (guard__h541733 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h541732 != 2'b01 && guard__h541732 != 2'b10 && - guard__h541732 != 2'b11 || + guard__h541733 != 2'b01 && guard__h541733 != 2'b10 && + guard__h541733 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36529,23 +36529,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h550801 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h550802 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01, 2'b10: - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard50801_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = - guard__h550801 != 2'b11 || + CASE_guard50802_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q201 = + guard__h550802 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550801) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h550802) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36555,12 +36555,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q202 = - (guard__h550801 == 2'b0) ? + (guard__h550802 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h550801 != 2'b01 && guard__h550801 != 2'b10 && - guard__h550801 != 2'b11 || + guard__h550802 != 2'b01 && guard__h550802 != 2'b10 && + guard__h550802 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36571,23 +36571,23 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h532420 or coreFix_fpuMulDivExe_0_regToExeQ$first) + always@(guard__h532421 or coreFix_fpuMulDivExe_0_regToExeQ$first) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01, 2'b10: - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 2'd3: - CASE_guard32420_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = - guard__h532420 != 2'b11 || + CASE_guard32421_0b0_NOT_coreFix_fpuMulDivExe_0_ETC__q203 = + guard__h532421 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532420) + always@(coreFix_fpuMulDivExe_0_regToExeQ$first or guard__h532421) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd2, 3'd3: @@ -36597,12 +36597,12 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; 3'd4: CASE_coreFix_fpuMulDivExe_0_regToExeQfirst_BI_ETC__q204 = - (guard__h532420 == 2'b0) ? + (guard__h532421 == 2'b0) ? coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107] : - guard__h532420 != 2'b01 && guard__h532420 != 2'b10 && - guard__h532420 != 2'b11 || + guard__h532421 != 2'b01 && guard__h532421 != 2'b10 && + guard__h532421 != 2'b11 || coreFix_fpuMulDivExe_0_regToExeQ$first[139:108] != 32'hFFFFFFFF || !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; @@ -36613,28 +36613,28 @@ module mkCore(CLK, !coreFix_fpuMulDivExe_0_regToExeQ$first[107]; endcase end - always@(guard__h532420 or - _theResult___snd__h540332 or _theResult___sfd__h541037) + always@(guard__h532421 or + _theResult___snd__h540333 or _theResult___sfd__h541038) begin - case (guard__h532420) + case (guard__h532421) 2'b0: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205 = - _theResult___snd__h540332[56:5]; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205 = + _theResult___snd__h540333[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205 = - _theResult___sfd__h541037; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205 = + _theResult___sfd__h541038; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h540332 or + _theResult___snd__h540333 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593 or - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205) + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = - _theResult___snd__h540332[56:5]; + _theResult___snd__h540333[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10595; @@ -36643,48 +36643,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10593; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q205; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q205; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10599 = 52'd0; endcase end - always@(guard__h532420 or - _theResult___snd__h540332 or - out_sfd__h541040 or _theResult___sfd__h541037) + always@(guard__h532421 or + _theResult___snd__h540333 or + out_sfd__h541041 or _theResult___sfd__h541038) begin - case (guard__h532420) + case (guard__h532421) 2'b0, 2'b01: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - _theResult___snd__h540332[56:5]; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + _theResult___snd__h540333[56:5]; 2'b10: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - out_sfd__h541040; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + out_sfd__h541041; 2'b11: - CASE_guard32420_0b0_theResult___snd40332_BITS__ETC__q206 = - _theResult___sfd__h541037; + CASE_guard32421_0b0_theResult___snd40333_BITS__ETC__q206 = + _theResult___sfd__h541038; endcase end - always@(guard__h541732 or sfdin__h549952 or _theResult___sfd__h550688) + always@(guard__h541733 or sfdin__h549953 or _theResult___sfd__h550689) begin - case (guard__h541732) + case (guard__h541733) 2'b0: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207 = - sfdin__h549952[56:5]; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207 = + sfdin__h549953[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207 = - _theResult___sfd__h550688; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207 = + _theResult___sfd__h550689; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h549952 or + sfdin__h549953 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619 or - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207) + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = - sfdin__h549952[56:5]; + sfdin__h549953[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10621; @@ -36693,48 +36693,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d10619; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q207; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q207; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10625 = 52'd0; endcase end - always@(guard__h541732 or - sfdin__h549952 or out_sfd__h550691 or _theResult___sfd__h550688) + always@(guard__h541733 or + sfdin__h549953 or out_sfd__h550692 or _theResult___sfd__h550689) begin - case (guard__h541732) + case (guard__h541733) 2'b0, 2'b01: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - sfdin__h549952[56:5]; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + sfdin__h549953[56:5]; 2'b10: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - out_sfd__h550691; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + out_sfd__h550692; 2'b11: - CASE_guard41732_0b0_sfdin49952_BITS_56_TO_5_0b_ETC__q208 = - _theResult___sfd__h550688; + CASE_guard41733_0b0_sfdin49953_BITS_56_TO_5_0b_ETC__q208 = + _theResult___sfd__h550689; endcase end - always@(guard__h550801 or - _theResult___snd__h558737 or _theResult___sfd__h559472) + always@(guard__h550802 or + _theResult___snd__h558738 or _theResult___sfd__h559473) begin - case (guard__h550801) + case (guard__h550802) 2'b0: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209 = - _theResult___snd__h558737[56:5]; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209 = + _theResult___snd__h558738[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209 = - _theResult___sfd__h559472; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209 = + _theResult___sfd__h559473; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h558737 or + _theResult___snd__h558738 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638 or - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209) + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = - _theResult___snd__h558737[56:5]; + _theResult___snd__h558738[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10640; @@ -36743,49 +36743,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d10638; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q209; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q209; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d10644 = 52'd0; endcase end - always@(guard__h550801 or - _theResult___snd__h558737 or - out_sfd__h559475 or _theResult___sfd__h559472) + always@(guard__h550802 or + _theResult___snd__h558738 or + out_sfd__h559476 or _theResult___sfd__h559473) begin - case (guard__h550801) + case (guard__h550802) 2'b0, 2'b01: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - _theResult___snd__h558737[56:5]; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + _theResult___snd__h558738[56:5]; 2'b10: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - out_sfd__h559475; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + out_sfd__h559476; 2'b11: - CASE_guard50801_0b0_theResult___snd58737_BITS__ETC__q210 = - _theResult___sfd__h559472; + CASE_guard50802_0b0_theResult___snd58738_BITS__ETC__q210 = + _theResult___sfd__h559473; endcase end - always@(guard__h502879 or - _theResult___fst_exp__h511105 or _theResult___exp__h511834) + always@(guard__h502880 or + _theResult___fst_exp__h511106 or _theResult___exp__h511835) begin - case (guard__h502879) + case (guard__h502880) 2'b0: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211 = - _theResult___fst_exp__h511105; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211 = + _theResult___fst_exp__h511106; 2'b01, 2'b10, 2'b11: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211 = - _theResult___exp__h511834; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211 = + _theResult___exp__h511835; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h511105 or + _theResult___fst_exp__h511106 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056 or - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211) + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = - _theResult___fst_exp__h511105; + _theResult___fst_exp__h511106; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9058; @@ -36794,49 +36794,49 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9056; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q211; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q211; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9062 = 11'd0; endcase end - always@(guard__h502879 or - _theResult___fst_exp__h511105 or - out_exp__h511837 or _theResult___exp__h511834) + always@(guard__h502880 or + _theResult___fst_exp__h511106 or + out_exp__h511838 or _theResult___exp__h511835) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - _theResult___fst_exp__h511105; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + _theResult___fst_exp__h511106; 2'b10: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - out_exp__h511837; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + out_exp__h511838; 2'b11: - CASE_guard02879_0b0_theResult___fst_exp11105_0_ETC__q212 = - _theResult___exp__h511834; + CASE_guard02880_0b0_theResult___fst_exp11106_0_ETC__q212 = + _theResult___exp__h511835; endcase end - always@(guard__h511948 or - _theResult___fst_exp__h519938 or _theResult___exp__h520618) + always@(guard__h511949 or + _theResult___fst_exp__h519939 or _theResult___exp__h520619) begin - case (guard__h511948) + case (guard__h511949) 2'b0: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213 = - _theResult___fst_exp__h519938; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213 = + _theResult___fst_exp__h519939; 2'b01, 2'b10, 2'b11: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213 = - _theResult___exp__h520618; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213 = + _theResult___exp__h520619; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___fst_exp__h519938 or + _theResult___fst_exp__h519939 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087 or - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213) + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = - _theResult___fst_exp__h519938; + _theResult___fst_exp__h519939; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9089; @@ -36845,49 +36845,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9087; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q213; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q213; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9093 = 11'd0; endcase end - always@(guard__h511948 or - _theResult___fst_exp__h519938 or - out_exp__h520621 or _theResult___exp__h520618) + always@(guard__h511949 or + _theResult___fst_exp__h519939 or + out_exp__h520622 or _theResult___exp__h520619) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - _theResult___fst_exp__h519938; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + _theResult___fst_exp__h519939; 2'b10: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - out_exp__h520621; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + out_exp__h520622; 2'b11: - CASE_guard11948_0b0_theResult___fst_exp19938_0_ETC__q214 = - _theResult___exp__h520618; + CASE_guard11949_0b0_theResult___fst_exp19939_0_ETC__q214 = + _theResult___exp__h520619; endcase end - always@(guard__h493567 or - _theResult___snd__h501479 or _theResult___sfd__h502184) + always@(guard__h493568 or + _theResult___snd__h501480 or _theResult___sfd__h502185) begin - case (guard__h493567) + case (guard__h493568) 2'b0: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215 = - _theResult___snd__h501479[56:5]; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215 = + _theResult___snd__h501480[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215 = - _theResult___sfd__h502184; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215 = + _theResult___sfd__h502185; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h501479 or + _theResult___snd__h501480 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113 or - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215) + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = - _theResult___snd__h501479[56:5]; + _theResult___snd__h501480[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9115; @@ -36896,48 +36896,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9113; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q215; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q215; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9119 = 52'd0; endcase end - always@(guard__h493567 or - _theResult___snd__h501479 or - out_sfd__h502187 or _theResult___sfd__h502184) + always@(guard__h493568 or + _theResult___snd__h501480 or + out_sfd__h502188 or _theResult___sfd__h502185) begin - case (guard__h493567) + case (guard__h493568) 2'b0, 2'b01: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - _theResult___snd__h501479[56:5]; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + _theResult___snd__h501480[56:5]; 2'b10: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - out_sfd__h502187; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + out_sfd__h502188; 2'b11: - CASE_guard93567_0b0_theResult___snd01479_BITS__ETC__q216 = - _theResult___sfd__h502184; + CASE_guard93568_0b0_theResult___snd01480_BITS__ETC__q216 = + _theResult___sfd__h502185; endcase end - always@(guard__h502879 or sfdin__h511099 or _theResult___sfd__h511835) + always@(guard__h502880 or sfdin__h511100 or _theResult___sfd__h511836) begin - case (guard__h502879) + case (guard__h502880) 2'b0: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217 = - sfdin__h511099[56:5]; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217 = + sfdin__h511100[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217 = - _theResult___sfd__h511835; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217 = + _theResult___sfd__h511836; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h511099 or + sfdin__h511100 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140 or - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217) + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = - sfdin__h511099[56:5]; + sfdin__h511100[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9142; @@ -36946,48 +36946,48 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9140; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q217; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q217; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9146 = 52'd0; endcase end - always@(guard__h502879 or - sfdin__h511099 or out_sfd__h511838 or _theResult___sfd__h511835) + always@(guard__h502880 or + sfdin__h511100 or out_sfd__h511839 or _theResult___sfd__h511836) begin - case (guard__h502879) + case (guard__h502880) 2'b0, 2'b01: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - sfdin__h511099[56:5]; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + sfdin__h511100[56:5]; 2'b10: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - out_sfd__h511838; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + out_sfd__h511839; 2'b11: - CASE_guard02879_0b0_sfdin11099_BITS_56_TO_5_0b_ETC__q218 = - _theResult___sfd__h511835; + CASE_guard02880_0b0_sfdin11100_BITS_56_TO_5_0b_ETC__q218 = + _theResult___sfd__h511836; endcase end - always@(guard__h511948 or - _theResult___snd__h519884 or _theResult___sfd__h520619) + always@(guard__h511949 or + _theResult___snd__h519885 or _theResult___sfd__h520620) begin - case (guard__h511948) + case (guard__h511949) 2'b0: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219 = - _theResult___snd__h519884[56:5]; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219 = + _theResult___snd__h519885[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219 = - _theResult___sfd__h520619; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219 = + _theResult___sfd__h520620; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h519884 or + _theResult___snd__h519885 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159 or - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219) + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = - _theResult___snd__h519884[56:5]; + _theResult___snd__h519885[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9161; @@ -36996,49 +36996,49 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9159; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q219; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q219; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9165 = 52'd0; endcase end - always@(guard__h511948 or - _theResult___snd__h519884 or - out_sfd__h520622 or _theResult___sfd__h520619) + always@(guard__h511949 or + _theResult___snd__h519885 or + out_sfd__h520623 or _theResult___sfd__h520620) begin - case (guard__h511948) + case (guard__h511949) 2'b0, 2'b01: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - _theResult___snd__h519884[56:5]; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + _theResult___snd__h519885[56:5]; 2'b10: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - out_sfd__h520622; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + out_sfd__h520623; 2'b11: - CASE_guard11948_0b0_theResult___snd19884_BITS__ETC__q220 = - _theResult___sfd__h520619; + CASE_guard11949_0b0_theResult___snd19885_BITS__ETC__q220 = + _theResult___sfd__h520620; endcase end - always@(guard__h571724 or - _theResult___snd__h579636 or _theResult___sfd__h580341) + always@(guard__h571725 or + _theResult___snd__h579637 or _theResult___sfd__h580342) begin - case (guard__h571724) + case (guard__h571725) 2'b0: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221 = - _theResult___snd__h579636[56:5]; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221 = + _theResult___snd__h579637[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221 = - _theResult___sfd__h580341; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221 = + _theResult___sfd__h580342; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h579636 or + _theResult___snd__h579637 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823 or - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221) + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = - _theResult___snd__h579636[56:5]; + _theResult___snd__h579637[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9825; @@ -37047,48 +37047,48 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9823; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q221; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q221; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9829 = 52'd0; endcase end - always@(guard__h571724 or - _theResult___snd__h579636 or - out_sfd__h580344 or _theResult___sfd__h580341) + always@(guard__h571725 or + _theResult___snd__h579637 or + out_sfd__h580345 or _theResult___sfd__h580342) begin - case (guard__h571724) + case (guard__h571725) 2'b0, 2'b01: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - _theResult___snd__h579636[56:5]; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + _theResult___snd__h579637[56:5]; 2'b10: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - out_sfd__h580344; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + out_sfd__h580345; 2'b11: - CASE_guard71724_0b0_theResult___snd79636_BITS__ETC__q222 = - _theResult___sfd__h580341; + CASE_guard71725_0b0_theResult___snd79637_BITS__ETC__q222 = + _theResult___sfd__h580342; endcase end - always@(guard__h581036 or sfdin__h589256 or _theResult___sfd__h589992) + always@(guard__h581037 or sfdin__h589257 or _theResult___sfd__h589993) begin - case (guard__h581036) + case (guard__h581037) 2'b0: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223 = - sfdin__h589256[56:5]; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223 = + sfdin__h589257[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223 = - _theResult___sfd__h589992; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223 = + _theResult___sfd__h589993; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - sfdin__h589256 or + sfdin__h589257 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851 or IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849 or - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223) + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = - sfdin__h589256[56:5]; + sfdin__h589257[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9851; @@ -37097,24 +37097,24 @@ module mkCore(CLK, IF_IF_IF_IF_3074_MINUS_SEXT_IF_coreFix_fpuMulD_ETC___d9849; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q223; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q223; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9855 = 52'd0; endcase end - always@(guard__h581036 or - sfdin__h589256 or out_sfd__h589995 or _theResult___sfd__h589992) + always@(guard__h581037 or + sfdin__h589257 or out_sfd__h589996 or _theResult___sfd__h589993) begin - case (guard__h581036) + case (guard__h581037) 2'b0, 2'b01: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - sfdin__h589256[56:5]; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + sfdin__h589257[56:5]; 2'b10: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - out_sfd__h589995; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + out_sfd__h589996; 2'b11: - CASE_guard81036_0b0_sfdin89256_BITS_56_TO_5_0b_ETC__q224 = - _theResult___sfd__h589992; + CASE_guard81037_0b0_sfdin89257_BITS_56_TO_5_0b_ETC__q224 = + _theResult___sfd__h589993; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -37149,28 +37149,28 @@ module mkCore(CLK, coreFix_fpuMulDivExe_0_regToExeQ_first__371_BI_ETC___d10852; endcase end - always@(guard__h590105 or - _theResult___snd__h598041 or _theResult___sfd__h598776) + always@(guard__h590106 or + _theResult___snd__h598042 or _theResult___sfd__h598777) begin - case (guard__h590105) + case (guard__h590106) 2'b0: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225 = - _theResult___snd__h598041[56:5]; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225 = + _theResult___snd__h598042[56:5]; 2'b01, 2'b10, 2'b11: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225 = - _theResult___sfd__h598776; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225 = + _theResult___sfd__h598777; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or - _theResult___snd__h598041 or + _theResult___snd__h598042 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870 or IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868 or - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225) + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225) begin case (coreFix_fpuMulDivExe_0_regToExeQ$first[228:226]) 3'd1: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = - _theResult___snd__h598041[56:5]; + _theResult___snd__h598042[56:5]; 3'd2: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9870; @@ -37179,25 +37179,25 @@ module mkCore(CLK, IF_IF_IF_IF_coreFix_fpuMulDivExe_0_regToExeQ_f_ETC___d9868; 3'd4: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q225; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q225; default: IF_coreFix_fpuMulDivExe_0_regToExeQ_first__371_ETC___d9874 = 52'd0; endcase end - always@(guard__h590105 or - _theResult___snd__h598041 or - out_sfd__h598779 or _theResult___sfd__h598776) + always@(guard__h590106 or + _theResult___snd__h598042 or + out_sfd__h598780 or _theResult___sfd__h598777) begin - case (guard__h590105) + case (guard__h590106) 2'b0, 2'b01: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - _theResult___snd__h598041[56:5]; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + _theResult___snd__h598042[56:5]; 2'b10: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - out_sfd__h598779; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + out_sfd__h598780; 2'b11: - CASE_guard90105_0b0_theResult___snd98041_BITS__ETC__q226 = - _theResult___sfd__h598776; + CASE_guard90106_0b0_theResult___snd98042_BITS__ETC__q226 = + _theResult___sfd__h598777; endcase end always@(coreFix_fpuMulDivExe_0_regToExeQ$first or @@ -38346,7 +38346,7 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[13:11], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[9:0] }; - 6'd21, 6'd22, 6'd29: + 6'd21: data_warl_xformed__h722429 = { 52'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], @@ -38356,6 +38356,21 @@ module mkCore(CLK, robdeqPort_0_deq_data_BITS_95_TO_32__q245[5:3], 1'b0, robdeqPort_0_deq_data_BITS_95_TO_32__q245[1:0] }; + 6'd22, 6'd29: + data_warl_xformed__h722429 = + { 52'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[11], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[9], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[7], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[5], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[3], + 1'd0, + robdeqPort_0_deq_data_BITS_95_TO_32__q245[1], + 1'd0 }; 6'd32, 6'd33, 6'd34, 6'd35: data_warl_xformed__h722429 = 64'd0; 6'd37: data_warl_xformed__h722429 = @@ -41253,7 +41268,7 @@ module mkCore(CLK, rob$deqPort_1_deq_data[329:325] != 5'd19 && rob$deqPort_1_deq_data[329:325] != 5'd20) $write("instret:%0d PC:0x%0h instr:0x%08h", - commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15450, + commitStage_rg_serial_num_4328_PLUS_IF_rob_deq_ETC___d15456, rob$deqPort_1_deq_data[425:362], rob$deqPort_1_deq_data[361:330], " iType:"); @@ -41412,7 +41427,7 @@ module mkCore(CLK, $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); if (RST_N != `BSV_RESET_VALUE) if (coreFix_fpuMulDivExe_0_mulDivExec_mulUnit_newReq$whas && - v__h603883 == 2'd0) + v__h603884 == 2'd0) $fdisplay(32'h80000002, "\n%m: ASSERT FAIL!!"); end // synopsys translate_on diff --git a/src_SSITH_P3/xilinx_ip/hdl/mkCoreW.v b/src_SSITH_P3/xilinx_ip/hdl/mkCoreW.v index ea0a6ee..bb0d3be 100644 --- a/src_SSITH_P3/xilinx_ip/hdl/mkCoreW.v +++ b/src_SSITH_P3/xilinx_ip/hdl/mkCoreW.v @@ -2716,22 +2716,22 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_rl_dm_hart0_reset_wait assign CAN_FIRE_RL_rl_dm_hart0_reset_wait = (rg_hart0_reset_delay != 8'd1 || - debug_module$RDY_hart0_reset_client_response_put && - proc$RDY_start) && + proc$RDY_start && + debug_module$RDY_hart0_reset_client_response_put) && rg_hart0_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_dm_hart0_reset_wait = CAN_FIRE_RL_rl_dm_hart0_reset_wait && !EN_start ; // rule RL_ClientServerRequest assign CAN_FIRE_RL_ClientServerRequest = - debug_module$RDY_hart0_client_run_halt_request_get && - proc$RDY_hart0_run_halt_server_request_put ; + proc$RDY_hart0_run_halt_server_request_put && + debug_module$RDY_hart0_client_run_halt_request_get ; assign WILL_FIRE_RL_ClientServerRequest = CAN_FIRE_RL_ClientServerRequest ; // rule RL_ClientServerResponse assign CAN_FIRE_RL_ClientServerResponse = - debug_module$RDY_hart0_client_run_halt_response_put && - proc$RDY_hart0_run_halt_server_response_get ; + proc$RDY_hart0_run_halt_server_response_get && + debug_module$RDY_hart0_client_run_halt_response_put ; assign WILL_FIRE_RL_ClientServerResponse = CAN_FIRE_RL_ClientServerResponse ; @@ -2743,25 +2743,25 @@ module mkCoreW(RST_N_dm_power_on_reset, // rule RL_mkConnectionGetPut_1 assign CAN_FIRE_RL_mkConnectionGetPut_1 = - v_td2_to_td_0$RDY_in_put && proc$RDY_v_to_TV_0_get ; + proc$RDY_v_to_TV_0_get && v_td2_to_td_0$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_1 = CAN_FIRE_RL_mkConnectionGetPut_1 ; // rule RL_mkConnectionGetPut_2 assign CAN_FIRE_RL_mkConnectionGetPut_2 = - v_td2_to_td_0$RDY_out_get && tv_encode$RDY_v_cpu_in_0_put ; + tv_encode$RDY_v_cpu_in_0_put && v_td2_to_td_0$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_2 = CAN_FIRE_RL_mkConnectionGetPut_2 ; // rule RL_mkConnectionGetPut_3 assign CAN_FIRE_RL_mkConnectionGetPut_3 = - v_td2_to_td_1$RDY_in_put && proc$RDY_v_to_TV_1_get ; + proc$RDY_v_to_TV_1_get && v_td2_to_td_1$RDY_in_put ; assign WILL_FIRE_RL_mkConnectionGetPut_3 = CAN_FIRE_RL_mkConnectionGetPut_3 ; // rule RL_mkConnectionGetPut_4 assign CAN_FIRE_RL_mkConnectionGetPut_4 = - v_td2_to_td_1$RDY_out_get && tv_encode$RDY_v_cpu_in_1_put ; + tv_encode$RDY_v_cpu_in_1_put && v_td2_to_td_1$RDY_out_get ; assign WILL_FIRE_RL_mkConnectionGetPut_4 = CAN_FIRE_RL_mkConnectionGetPut_4 ; diff --git a/src_SSITH_P3/xilinx_ip/hdl/mkP3_Core.v b/src_SSITH_P3/xilinx_ip/hdl/mkP3_Core.v index 1b6b7c2..b1f7022 100644 --- a/src_SSITH_P3/xilinx_ip/hdl/mkP3_Core.v +++ b/src_SSITH_P3/xilinx_ip/hdl/mkP3_Core.v @@ -1434,7 +1434,7 @@ module mkP3_Core(CLK, // rule RL_rl_ndm_reset_wait assign CAN_FIRE_RL_rl_ndm_reset_wait = (rg_ndm_reset_delay != 8'd1 || - corew$RDY_ndm_reset_client_response_put && corew$RDY_start) && + corew$RDY_start && corew$RDY_ndm_reset_client_response_put) && rg_ndm_reset_delay != 8'd0 ; assign WILL_FIRE_RL_rl_ndm_reset_wait = CAN_FIRE_RL_rl_ndm_reset_wait ;