From 773d5c110762877c3630e1198daddc13d81828ec Mon Sep 17 00:00:00 2001
From: Peter Rugg <pdr32@cam.ac.uk>
Date: Wed, 22 Jan 2025 16:07:06 +0000
Subject: [PATCH] Implement CSetHigh

---
 src_Core/ISA/ISA_Decls_CHERI.bsv           | 4 +++-
 src_Core/RISCY_OOO/procs/lib/Decode.bsv    | 8 ++++++++
 src_Core/RISCY_OOO/procs/lib/Exec.bsv      | 2 ++
 src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv | 1 +
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src_Core/ISA/ISA_Decls_CHERI.bsv b/src_Core/ISA/ISA_Decls_CHERI.bsv
index 4e02d05..2f62243 100755
--- a/src_Core/ISA/ISA_Decls_CHERI.bsv
+++ b/src_Core/ISA/ISA_Decls_CHERI.bsv
@@ -138,7 +138,9 @@ Bit #(7) f7_cap_CIncOffset      = 7'h11;
 Bit #(7) f7_cap_CToPtr          = 7'h12;
 Bit #(7) f7_cap_CFromPtr        = 7'h13;
 Bit #(7) f7_cap_CSub            = 7'h14;
-// 7'h15-7'h1c unused
+// 7'h15 unused
+Bit #(7) f7_cap_CSetHigh        = 7'h16;
+// 7'h17-7'h1c unused
 Bit #(7) f7_cap_CBuildCap       = 7'h1d;
 Bit #(7) f7_cap_CCopyType       = 7'h1e;
 Bit #(7) f7_cap_CCSeal          = 7'h1f;
diff --git a/src_Core/RISCY_OOO/procs/lib/Decode.bsv b/src_Core/RISCY_OOO/procs/lib/Decode.bsv
index a0cd47e..2e5d67b 100644
--- a/src_Core/RISCY_OOO/procs/lib/Decode.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/Decode.bsv
@@ -1156,6 +1156,14 @@ function DecodeResult decode(Instruction inst, Bool cap_mode);
                             regs.src2 = Valid(tagged Gpr rs2);
                             dInst.execFunc = Alu (Sub);
                         end
+                        f7_cap_CSetHigh: begin
+                            legalInst = True;
+                            dInst.iType = Cap;
+                            regs.dst = Valid(tagged Gpr rd);
+                            regs.src1 = Valid(tagged Gpr rs1);
+                            regs.src2 = Valid(tagged Gpr rs2);
+                            dInst.capFunc = CapModify (SetHigh);
+                        end
                         f7_cap_CBuildCap: begin
                             legalInst = True;
                             // Swap arguments so SCR possibly goes in RS2
diff --git a/src_Core/RISCY_OOO/procs/lib/Exec.bsv b/src_Core/RISCY_OOO/procs/lib/Exec.bsv
index a322162..4b358b4 100644
--- a/src_Core/RISCY_OOO/procs/lib/Exec.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/Exec.bsv
@@ -270,6 +270,8 @@ function CapPipe capModify(CapPipe a, CapPipe b, CapModifyFunc func);
                 setFlags(a_mut, truncate(getAddr(b)));
             tagged FromPtr                :
                 (getAddr(a) == 0 ? nullCap : setOffset(b_mut, getAddr(a)).value);
+            tagged SetHigh:
+                fromMem(tuple2(False, {getAddr(b), getAddr(a)}));
             tagged BuildCap               :
                 setKind(setValidCap(a_mut, !buildCapIllegal), getKind(a)==SENTRY ? SENTRY : UNSEALED);
             tagged Move                   :
diff --git a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
index fdb4da5..6174479 100644
--- a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
@@ -344,6 +344,7 @@ typedef union tagged {
     SrcSelector Unseal;
     void AndPerm;
     void SetFlags;
+    void SetHigh;
     void BuildCap;
     void Move;
     void ClearTag;