From 7b1b564d62ece5db33929deacde6135d99a28b9c Mon Sep 17 00:00:00 2001
From: Franz Fuchs <franz.fuchs@cl.cam.ac.uk>
Date: Mon, 12 Jul 2021 13:30:53 +0100
Subject: [PATCH] Added missing ifdef

---
 src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
index c9587af..50df284 100644
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv
@@ -1326,10 +1326,11 @@ module mkCommitStage#(CommitInput inIfc)(CommitStage);
         events.evt_FP = fpuCnt;
         events.evt_FENCE = fenceCnt;
         events_reg <= events;
-
+`ifdef CONTRACTS_VERIFY
         inIfc.updateTargets(targets);
         inIfc.updateReturnTargets(returnTargets);
 `endif
+`endif
 
 `ifdef RVFI
         rvfiQ.enq(rvfis);