diff --git a/src_SSITH_P3/Makefile b/src_SSITH_P3/Makefile index 4f92eb1..006b4fa 100644 --- a/src_SSITH_P3/Makefile +++ b/src_SSITH_P3/Makefile @@ -70,15 +70,14 @@ ALL_RISCY_DIRS = $(RISCY_DIRS):$(CONNECTAL_DIRS):$(CHERI_DIRS) # ================================================================ # Search path for bsc for .bsv files +CONTRIB_DIRS = %/Libraries/Bus CORE_DIRS = $(REPO)/src_Core/CPU:$(REPO)/src_Core/ISA:$(REPO)/src_Core/Core:$(REPO)/src_Core/PLIC:$(REPO)/src_Core/Debug_Module:$(REPO)/src_Core/BSV_Additional_Libs BLUESTUFF_DIRS = $(REPO)/libs/BlueStuff:$(REPO)/libs/BlueStuff/AXI:$(REPO)/libs/BlueStuff/BlueUtils:$(REPO)/libs/BlueStuff/BlueBasics TAGCONTROLLER_DIRS = $(REPO)/libs/TagController/TagController:$(REPO)/libs/TagController/TagController/CacheCore -TLM_DIRS = %/Libraries/AMBA_TLM3/TLM3:%/Libraries/AMBA_TLM3/Axi:%/Libraries/AMBA_TLM3/Axi4:%/Libraries/Bus - -BSC_PATH = -p $(ALL_RISCY_DIRS):$(CORE_DIRS):src_BSV:$(BLUESTUFF_DIRS):$(TAGCONTROLLER_DIRS):+:$(TLM_DIRS) +BSC_PATH = -p $(CONTRIB_DIRS):$(ALL_RISCY_DIRS):$(CORE_DIRS):src_BSV:$(BLUESTUFF_DIRS):$(TAGCONTROLLER_DIRS):+ # ---------------- # Top-level file and module diff --git a/src_SSITH_P3/src_BSV/Giraffe.defines b/src_SSITH_P3/src_BSV/Giraffe.defines index cf37050..12d533b 100644 --- a/src_SSITH_P3/src_BSV/Giraffe.defines +++ b/src_SSITH_P3/src_BSV/Giraffe.defines @@ -1,2 +1,2 @@ - `define TLM_PRM_Giraffe 4, 64, 64, 8, 0 +`define AXI4_PARAMS_Giraffe 4, 64, 64, 0, 0, 0, 0, 0 diff --git a/src_SSITH_P3/src_BSV/Giraffe_IFC.bsv b/src_SSITH_P3/src_BSV/Giraffe_IFC.bsv index 34d2503..d3bf344 100644 --- a/src_SSITH_P3/src_BSV/Giraffe_IFC.bsv +++ b/src_SSITH_P3/src_BSV/Giraffe_IFC.bsv @@ -1,12 +1,23 @@ +//- +// AXI (user fields) modifications: +// Copyright (c) 2019 Alexandre Joannou +// Copyright (c) 2019 Peter Rugg +// Copyright (c) 2019 Jonathan Woodruff +// All rights reserved. +// +// This software was developed by SRI International and the University of +// Cambridge Computer Laboratory (Department of Computer Science and +// Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the +// DARPA SSITH research programme. +//- + package Giraffe_IFC; -import Axi ::*; -import Axi4 ::*; +import AXI4 ::*; import Bus ::*; import Connectable ::*; -`include "TLM.defines" `include "Giraffe.defines" (* always_ready, always_enabled *) @@ -107,10 +118,10 @@ instance Connectable#(DMI_IFC, DMI_Master_IFC); endinstance interface Core_IFC; - interface Axi4LRdWrMaster#(`TLM_PRM_Giraffe) master0; - interface Axi4LRdWrMaster#(`TLM_PRM_Giraffe) master1; - interface Axi4LRdWrMaster#(`TLM_PRM_Giraffe) master2; - interface Axi4LRdWrMaster#(`TLM_PRM_Giraffe) master3; + interface AXI4_Master_Synth#(`AXI4_PARAMS_Giraffe) master0; + interface AXI4_Master_Synth#(`AXI4_PARAMS_Giraffe) master1; + interface AXI4_Master_Synth#(`AXI4_PARAMS_Giraffe) master2; + interface AXI4_Master_Synth#(`AXI4_PARAMS_Giraffe) master3; (* always_ready, always_enabled *) (* prefix = "", result = "unused0" *) @@ -134,10 +145,10 @@ interface Core_IFC; endinterface interface Platform_IFC; - interface Axi4LRdWrSlave#(`TLM_PRM_Giraffe) slave0; - interface Axi4LRdWrSlave#(`TLM_PRM_Giraffe) slave1; - interface Axi4LRdWrSlave#(`TLM_PRM_Giraffe) slave2; - interface Axi4LRdWrSlave#(`TLM_PRM_Giraffe) slave3; + interface AXI4_Slave_Synth#(`AXI4_PARAMS_Giraffe) slave0; + interface AXI4_Slave_Synth#(`AXI4_PARAMS_Giraffe) slave1; + interface AXI4_Slave_Synth#(`AXI4_PARAMS_Giraffe) slave2; + interface AXI4_Slave_Synth#(`AXI4_PARAMS_Giraffe) slave3; (* always_ready, always_enabled *) method Bit#(1) interrupt0;