Incorporated patches/additions from Joe Stoy after GFE debugging (w. amendment ...)

Amendment: RegUNInit.v updated, removing an extraneous RST line.
This commit is contained in:
rsnikhil
2020-03-13 15:07:38 -04:00
parent c278e4fe68
commit a6a227ed66
45 changed files with 7309 additions and 6079 deletions

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@@ -108,6 +108,7 @@ import Trace_Data2 :: *;
interface CoreReq;
method Action start(
Bool running,
Addr startpc,
Addr toHostAddr, Addr fromHostAddr
);
@@ -1206,7 +1207,9 @@ module mkCore#(CoreId coreId)(Core);
// Debugger 'halt' request (e.g., GDB '^C' command)
// This is initiated just like an interrupt.
`ifdef INCLUDE_GDB_CONTROL
renameStage.debug_halt_req;
`endif
if (show_DM_interactions)
$display ("%0d: %m.rl_debug_halt_req", cur_cycle);
@@ -1296,10 +1299,14 @@ module mkCore#(CoreId coreId)(Core);
interface CoreReq coreReq;
method Action start(
Bool running,
Bit#(64) startpc,
Addr toHostAddr, Addr fromHostAddr
);
fetchStage.start(startpc);
`ifdef INCLUDE_GDB_CONTROL
if (!running) renameStage.debug_halt_req;
`endif
fetchStage.start(startpc);
started <= True;
`ifdef INCLUDE_GDB_CONTROL
rg_core_run_state <= CORE_RUNNING;

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@@ -233,10 +233,10 @@ module mkProc (Proc_IFC);
// ----------------
// Start the cores running
// Use toHostAddr = 0 if not monitoring tohost
method Action start (Addr startpc, Addr tohostAddr, Addr fromhostAddr);
method Action start (Bool running, Addr startpc, Addr tohostAddr, Addr fromhostAddr);
action
for(Integer i = 0; i < valueof(CoreNum); i = i+1)
core[i].coreReq.start (startpc, tohostAddr, fromhostAddr);
core[i].coreReq.start (running, startpc, tohostAddr, fromhostAddr);
endaction
mmioPlatform.start (tohostAddr, fromhostAddr);

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@@ -38,7 +38,7 @@ interface Proc_IFC;
// ----------------
// Start the cores running
// Use toHostAddr = 0 if not monitoring tohost
method Action start (Addr startpc, Addr tohostAddr, Addr fromhostAddr);
method Action start (Bool running, Addr startpc, Addr tohostAddr, Addr fromhostAddr);
// ----------------
// SoC fabric connections

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@@ -189,10 +189,9 @@ module mkCoreW #(Reset dm_power_on_reset)
rule rl_dm_hart0_reset_wait (rg_hart0_reset_delay != 0);
if (rg_hart0_reset_delay == 1) begin
let pc = soc_map_struct.pc_reset_value;
proc.start (pc, rg_tohost_addr, rg_fromhost_addr);
let pc = soc_map_struct.pc_reset_value;
Bool is_running = True;
proc.start (is_running, pc, rg_tohost_addr, rg_fromhost_addr);
debug_module.hart0_reset_client.response.put (is_running);
$display ("%0d: %m.rl_dm_hart0_reset_wait: proc.start (pc %0h, tohostAddr %0h, fromhostAddr %0h",
cur_cycle, pc, rg_tohost_addr, rg_fromhost_addr);
@@ -362,12 +361,12 @@ module mkCoreW #(Reset dm_power_on_reset)
// ----------------------------------------------------------------
// Start
method Action start (Bit #(64) tohost_addr, Bit #(64) fromhost_addr);
method Action start (Bool is_running, Bit #(64) tohost_addr, Bit #(64) fromhost_addr);
plic.set_addr_map (zeroExtend (soc_map.m_plic_addr_base),
zeroExtend (soc_map.m_plic_addr_lim));
let pc = soc_map_struct.pc_reset_value;
proc.start (pc, tohost_addr, fromhost_addr);
proc.start (is_running, pc, tohost_addr, fromhost_addr);
`ifdef INCLUDE_GDB_CONTROL
// Save for potential future use by rl_dm_hart0_reset

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@@ -54,7 +54,7 @@ interface CoreW_IFC #(numeric type t_n_interrupt_sources);
// ----------------------------------------------------------------
// Start
method Action start (Bit #(64) tohost_addr, Bit #(64) fromhost_addr);
method Action start (Bool is_running, Bit #(64) tohost_addr, Bit #(64) fromhost_addr);
// ----------------------------------------------------------------
// AXI4 Fabric interfaces