From a77ecc59afa34ae451692c70ba345f7897688455 Mon Sep 17 00:00:00 2001
From: jon <jonwoodruff@gmail.com>
Date: Thu, 16 Apr 2020 17:28:28 +0100
Subject: [PATCH] Checkpoint work to propagate register numbers into the
 exception code. There's another half of this left to do to propagate all the
 way into the CSR file.

---
 src_Core/RISCY_OOO/procs/lib/Decode.bsv    |  2 ++
 src_Core/RISCY_OOO/procs/lib/Exec.bsv      | 38 +++++++++++-----------
 src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv |  2 ++
 3 files changed, 23 insertions(+), 19 deletions(-)

diff --git a/src_Core/RISCY_OOO/procs/lib/Decode.bsv b/src_Core/RISCY_OOO/procs/lib/Decode.bsv
index 9c9f006..2ddce34 100755
--- a/src_Core/RISCY_OOO/procs/lib/Decode.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/Decode.bsv
@@ -1082,6 +1082,8 @@ function DecodeResult decode(Instruction inst);
                     illegalInst = True;
                 end
             endcase
+            dInst.capChecks.rn1 = {1'b0, regs.src1.Valid.Gpr};
+            dInst.capChecks.rn2 = {1'b0, regs.src2.Valid.Gpr};
         end
         default: begin
             illegalInst = True;
diff --git a/src_Core/RISCY_OOO/procs/lib/Exec.bsv b/src_Core/RISCY_OOO/procs/lib/Exec.bsv
index 30a80bd..8e0ffbf 100755
--- a/src_Core/RISCY_OOO/procs/lib/Exec.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/Exec.bsv
@@ -1,4 +1,3 @@
-
 // Copyright (c) 2017 Massachusetts Institute of Technology
 //
 // Permission is hereby granted, free of charge, to any person
@@ -32,42 +31,43 @@ import ISA_Decls_CHERI::*;
 
 (* noinline *)
 function Maybe#(CapException) capChecks(CapPipe a, CapPipe b, CapChecks toCheck);
-    // TODO plumb register indices here
+    function Maybe#(CapException) e1(CHERIException e) = Valid(CapException{cheri_exc_reg: toCheck.rn1, cheri_exc_code: e});
+    function Maybe#(CapException) e2(CHERIException e) = Valid(CapException{cheri_exc_reg: toCheck.rn2, cheri_exc_code: e});
     Maybe#(CapException) result = Invalid;
     if      (toCheck.src1_tag                 && !isValidCap(a))
-        result =  Valid (CapException {cheri_exc_code: TagViolation});
+        result = e1(TagViolation);
     else if (toCheck.src2_tag                 && !isValidCap(b))
-        result =  Valid (CapException {cheri_exc_code: TagViolation});
+        result = e2(TagViolation);
     else if (toCheck.src1_sealed_with_type    && getKind(a) != SEALED_WITH_TYPE)
-        result =  Valid (CapException {cheri_exc_code: SealViolation});
+        result = e1(SealViolation);
     else if (toCheck.src1_unsealed            && isValidCap(a) && isSealed(a))
-        result =  Valid (CapException {cheri_exc_code: SealViolation});
+        result = e1(SealViolation);
     else if (toCheck.src2_unsealed            && isValidCap(b) && isSealed(b))
-        result =  Valid (CapException {cheri_exc_code: SealViolation});
+        result = e2(SealViolation);
     else if (toCheck.src1_sealed              && isValidCap(a) && !isSealed(a))
-        result =  Valid (CapException {cheri_exc_code: SealViolation});
+        result = e1(SealViolation);
     else if (toCheck.src2_sealed              && isValidCap(b) && !isSealed(b))
-        result =  Valid (CapException {cheri_exc_code: SealViolation});
+        result = e2(SealViolation);
     else if (toCheck.src1_src2_types_match    && getType(a) != getType(b))
-        result =  Valid (CapException {cheri_exc_code: TypeViolation});
+        result = e1(TypeViolation);
     else if (toCheck.src1_permit_ccall        && !getHardPerms(a).permitCCall)
-        result =  Valid (CapException {cheri_exc_code: PermitCCallViolation});
+        result = e1(PermitCCallViolation);
     else if (toCheck.src2_permit_ccall        && !getHardPerms(b).permitCCall)
-        result =  Valid (CapException {cheri_exc_code: PermitCCallViolation});
+        result = e2(PermitCCallViolation);
     else if (toCheck.src1_permit_x            && !getHardPerms(a).permitExecute)
-        result =  Valid (CapException {cheri_exc_code: PermitXViolation});
+        result = e1(PermitXViolation);
     else if (toCheck.src2_no_permit_x         && getHardPerms(b).permitExecute)
-        result =  Valid (CapException {cheri_exc_code: PermitXViolation});
+        result = e2(PermitXViolation);
     else if (toCheck.src2_permit_unseal       && !getHardPerms(b).permitUnseal)
-        result =  Valid (CapException {cheri_exc_code: PermitUnsealViolation});
+        result = e2(PermitUnsealViolation);
     else if (toCheck.src2_permit_seal         && !getHardPerms(b).permitSeal)
-        result =  Valid (CapException {cheri_exc_code: PermitSealViolation});
+        result = e2(PermitSealViolation);
     else if (toCheck.src2_points_to_src1_type && getAddr(b) != zeroExtend(getType(a)))
-        result =  Valid (CapException {cheri_exc_code: TypeViolation});
+        result = e2(TypeViolation);
     else if (toCheck.src2_addr_valid_type     && !validAsType(b, truncate(getAddr(b))))
-        result =  Valid (CapException {cheri_exc_code: LengthViolation});
+        result = e2(LengthViolation);
     else if (toCheck.src2_perm_subset_src1    && (getPerms(a) & getPerms(b)) != getPerms(b))
-        result =  Valid (CapException {cheri_exc_code: SoftwarePermViolation});
+        result = e2(SoftwarePermViolation);
     return result;
 endfunction
 
diff --git a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
index 3287fa0..677fb16 100755
--- a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
@@ -693,6 +693,8 @@ typedef struct {
     Bool src2_addr_valid_type;
     Bool src2_perm_subset_src1;
     Bool src2_derivable;
+    Bit#(6) rn1;
+    Bit#(6) rn2;
 } CapChecks deriving(Bits, Eq, FShow);
 
 typedef CSR_XCapCause CapException;