From a7d4d8e4a4b000f8388281e2fbccea1a9ac0f213 Mon Sep 17 00:00:00 2001 From: Peter Rugg Date: Fri, 29 May 2020 16:43:20 +0100 Subject: [PATCH] Fix bug where explicit cap-rel mem accesses would always trap as untagged --- src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv index e60d8aa..1535a39 100644 --- a/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv +++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/RenameStage.bsv @@ -677,7 +677,7 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage); imm: validValue(dInst.imm), ldstq_tag: lsqTag, cap_checks: dInst.capChecks, - cap_mode: getFlags(pc)==1 + cap_mode: dInst.execFunc.Mem.reg_bounds }, regs: phy_regs, tag: inst_tag, @@ -1017,7 +1017,7 @@ module mkRenameStage#(RenameInput inIfc)(RenameStage); imm: validValue(dInst.imm), ldstq_tag: lsqTag, cap_checks: dInst.capChecks, - cap_mode: getFlags(pc)==1 + cap_mode: dInst.execFunc.Mem.reg_bounds }, regs: phy_regs, tag: inst_tag,