removed debug prints

src_Core/CPU/Core.bsv

@@ -366,6 +366,11 @@ module mkCore#(CoreId coreId)(Core);
         // whether perf data is collected
         Reg#(Bool) doStatsReg <- mkConfigReg(True);
 
+        // Hack to get set stat reg to true
+        // rule forceSetStatRegToTrue;
+        //     doStatsReg <= True;
+        // endrule
+
         // write aggressive elements + wakupe reservation stations
         function Action writeAggr(Integer wrAggrPort, PhyRIndx dst);
         action

src_Core/CPU/CsrFile.bsv

@@ -330,7 +330,8 @@ interface StatsCsr;
 endinterface
 
 module mkStatsCsr(StatsCsr);
-    Reg#(Bool) doStats <- mkConfigReg(False);
+    // Seeting CSR stat to true
+    Reg#(Bool) doStats <- mkConfigReg(True);
 
     FIFO#(Bool) writeQ <- mkFIFO1;
 

src_Core/RISCY_OOO/procs/RV64G_OOO/MemExePipeline.bsv

@@ -376,13 +376,11 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
             // perf: load mem latency
             let lat <- ldMemLatTimer.done(tag);
 `ifdef PERF_COUNT
-            $display("Performance count hit");
             if(inIfc.doStats) begin
                 exeLdMemLat.incr(zeroExtend(lat));
             end
 `endif
 `ifdef PERFORMANCE_MONITORING
-            $display("Performance monitoring hit");
             EventsCore events = unpack(0);
             events.evt_LOAD_WAIT = saturating_truncate(lat);
             events.evt_MEM_CAP_LOAD_TAG_SET = (d.tag) ? 1 : 0;
@@ -782,9 +780,7 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
         end
 
 `ifdef PERF_COUNT
-        $display("outside TLB");
         if(isValid(cause) && inIfc.doStats) begin
-            $display("Counting TLB");
             exeTlbExcepCnt.incr(1);
         end
 `endif
@@ -1471,6 +1467,7 @@ module mkMemExePipeline#(MemExeInput inIfc)(MemExePipeline);
         // MMIO may cause exception, must have spec tag, and only can be St/Amo
         doAssert(lsqDeqSt.memFunc == St || lsqDeqSt.memFunc == Amo, "must be St/Amo");
 `ifdef PERF_COUNT
+        $display(inIfc.doStats);
         if(inIfc.doStats) begin
             if(lsqDeqSt.acq) begin
                 exeLrScAmoAcqCnt.incr(1);