From c056d40a3aa3c6c887347f7e9ff84af68265682d Mon Sep 17 00:00:00 2001 From: jon Date: Wed, 15 Apr 2020 14:08:36 +0100 Subject: [PATCH] Trace the register that has been decoded rather than picking out the bits from the instruction. Duh. --- src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv index 610db3e..38fa5fc 100644 --- a/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv +++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/CommitStage.bsv @@ -184,7 +184,7 @@ function Maybe#(RVFI_DII_Execution#(DataSz,DataSz)) genRVFI(ToReorderBuffer rot, if (rot.dst matches tagged Valid .regWrite) begin if (regWrite matches tagged Gpr .regNum) begin data = rot.traceBundle.regWriteData; - rd = rot.orig_inst[11:7]; + rd = regNum; end end case (rot.ppc_vaddr_csrData) matches