From db08e96596268ad0a7176c40cfaca9a7a42d5c25 Mon Sep 17 00:00:00 2001
From: Jonathan Woodruff <jdw57@cam.ac.uk>
Date: Wed, 3 Mar 2021 20:27:31 +0000
Subject: [PATCH] Add Btb to the component.xml.

---
 src_SSITH_P3/xilinx_ip/component.xml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src_SSITH_P3/xilinx_ip/component.xml b/src_SSITH_P3/xilinx_ip/component.xml
index 268b721..51cfd6a 100644
--- a/src_SSITH_P3/xilinx_ip/component.xml
+++ b/src_SSITH_P3/xilinx_ip/component.xml
@@ -2316,6 +2316,11 @@
         <spirit:fileType>verilogSource</spirit:fileType>
         <spirit:userFileType>IMPORTED_FILE</spirit:userFileType>
       </spirit:file>
+      <spirit:file>
+        <spirit:name>../Verilog_RTL/mkBtb.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+        <spirit:userFileType>IMPORTED_FILE</spirit:userFileType>
+      </spirit:file>
       <spirit:file>
         <spirit:name>../Verilog_RTL/mkFmaExecQ.v</spirit:name>
         <spirit:fileType>verilogSource</spirit:fileType>