From db41e2b9ed249b2e309ff2a338d69b8501c39741 Mon Sep 17 00:00:00 2001
From: Jonathan Woodruff <jonwoodruff@gmail.com>
Date: Fri, 27 Mar 2020 17:47:02 +0000
Subject: [PATCH] An initial implementation of mccsr.

---
 src_Core/CPU/CsrFile.bsv                   |  5 ++++-
 src_Core/ISA/ISA_Decls_CHERI.bsv           | 17 +++++++++++++++++
 src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv |  3 +++
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/src_Core/CPU/CsrFile.bsv b/src_Core/CPU/CsrFile.bsv
index 61c5d03..256c085 100644
--- a/src_Core/CPU/CsrFile.bsv
+++ b/src_Core/CPU/CsrFile.bsv
@@ -34,7 +34,7 @@ import Vector::*;
 import FIFO::*;
 import GetPut::*;
 import BuildVector::*;
-//import TRNG::*;
+import ISA_Decls_CHERI::*;
 
 // ================================================================
 // BSV additional libs
@@ -642,6 +642,8 @@ module mkCsrFile #(Data hartid)(CsrFile);
    Reg #(Data) rg_tdata1  = concatReg3 (rg_tdata1_type, rg_tdata1_dmode, rg_tdata1_data);
    Reg #(Data) rg_tdata2  <- mkConfigRegU;
    Reg #(Data) rg_tdata3  <- mkConfigRegU;
+   // Capability cause register
+   Reg #(CSR_XCapCause) mccsr_reg <- mkCsrReg(unpack(0));
 
 `ifdef INCLUDE_GDB_CONTROL
    // DCSR is 32b even in RV64
@@ -761,6 +763,7 @@ module mkCsrFile #(Data hartid)(CsrFile);
             CSRmarchid:    marchid_csr;
             CSRmimpid:     mimpid_csr;
             CSRmhartid:    mhartid_csr;
+            CSRmccsr:      csr_capcause(mccsr_reg);
 `ifdef SECURITY
             CSRmevbase:    mevbase_csr;
             CSRmevmask:    mevmask_csr;
diff --git a/src_Core/ISA/ISA_Decls_CHERI.bsv b/src_Core/ISA/ISA_Decls_CHERI.bsv
index 5918fd5..14851c4 100644
--- a/src_Core/ISA/ISA_Decls_CHERI.bsv
+++ b/src_Core/ISA/ISA_Decls_CHERI.bsv
@@ -61,6 +61,23 @@ typedef enum {
     // 5'd28 - 5'd31 reserved
 } CHERIException  deriving(Bits, Eq, FShow);
 
+typedef struct {
+    Bit #(6) cheri_exc_reg;
+    CHERIException cheri_exc_code;
+} CSR_XCapCause deriving(Bits);
+
+function Bit#(64) xccsr_to_word(CSR_XCapCause xccsr);
+    return zeroExtend({xccsr.cheri_exc_reg, pack(xccsr.cheri_exc_code), 3'b0, 1'b1, 1'b1});
+endfunction
+
+function Reg#(Bit#(64)) csr_capcause(Reg#(CSR_XCapCause) r);
+    return (interface Reg;
+        method Bit#(64) _read = xccsr_to_word(r._read);
+        method Action _write(Bit#(64) x) =
+            r._write(CSR_XCapCause{cheri_exc_reg: x[15:10], cheri_exc_code: unpack(x[9:5]) });
+    endinterface);
+endfunction
+
 // SCR map
 
 typedef enum {
diff --git a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
index d648bfc..4c1088c 100644
--- a/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/ProcTypes.bsv
@@ -230,6 +230,7 @@ typedef enum {
     // user non-standard CSRs (TODO)
     CSRterminate  = 12'h800, // terminate (used to exit Linux)
     CSRstats      = 12'h801, // turn on/off perf counters
+    CSRuccsr      = 12'h8c0,
     // supervisor standard CSRs
     CSRsstatus    = 12'h100,
     // no user trap handler, so no se/ideleg
@@ -242,6 +243,7 @@ typedef enum {
     CSRstval      = 12'h143, // it's still called sbadaddr in spike
     CSRsip        = 12'h144,
     CSRsatp       = 12'h180, // it's still called sptbr in spike
+    CSRsccsr      = 12'h9c0,
     // machine standard CSRs
     CSRmstatus    = 12'h300,
     CSRmisa       = 12'h301,
@@ -261,6 +263,7 @@ typedef enum {
     CSRmarchid    = 12'hf12,
     CSRmimpid     = 12'hf13,
     CSRmhartid    = 12'hf14,
+    CSRmccsr      = 12'hbc0,
 `ifdef SECURITY
     // sanctum machine CSR
     CSRmevbase    = 12'h7c0,