diff --git a/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv b/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
index 62df04b..0257561 100644
--- a/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
+++ b/src_Core/RISCY_OOO/coherence/src/Prefetcher.bsv
@@ -54,7 +54,7 @@ endmodule
 
 module mkNextLineOnMissPrefetcher(Prefetcher)
     provisos (
-        NumAlias#(nextLinesOnMiss, 2),
+        NumAlias#(nextLinesOnMiss, 1),
         Alias#(rqCntT, Bit#(TLog#(TAdd#(nextLinesOnMiss, 1))))
     );
     Reg#(Addr) lastMissAddr <- mkReg(0);