diff --git a/src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv b/src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
index a99974a..ed811f1 100644
--- a/src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
+++ b/src_Core/RISCY_OOO/procs/RV64G_OOO/FetchStage.bsv
@@ -414,7 +414,7 @@ module mkFetchStage(FetchStage);
     endaction);
 
     // Pipeline Stage FIFOs
-    Fifo#(2, Fetch1ToFetch2) f12f2 <- mkCFFifo;
+    Fifo#(2, Fetch1ToFetch2) f12f2 <- mkBypassFifo;
     Fifo#(4, Fetch2ToFetch3) f22f3 <- mkCFFifo; // FIFO should match I$ latency
     // These two fifos needs a capacity of 3 for full throughput if we fire only when we can enq on on channels.
     SupFifo#(SupSizeX2, 3, Fetch3ToDecode) f32d <- mkUGSupFifo; // Unguarded to prevent the static analyser from exploding.
diff --git a/src_Core/RISCY_OOO/procs/lib/ITlb.bsv b/src_Core/RISCY_OOO/procs/lib/ITlb.bsv
index 3761abc..2f36dad 100644
--- a/src_Core/RISCY_OOO/procs/lib/ITlb.bsv
+++ b/src_Core/RISCY_OOO/procs/lib/ITlb.bsv
@@ -115,7 +115,7 @@ module mkITlb(ITlb::ITlb);
     Reg#(Bool) waitFlushP <- mkReg(False);
 
     // resp FIFO to proc
-    Fifo#(2, TlbResp) hitQ <- mkCFFifo;
+    Fifo#(2, TlbResp) hitQ <- mkBypassFifo;
 
     // current processor VM information
     Reg#(VMInfo) vm_info <- mkReg(defaultValue);
@@ -294,14 +294,9 @@ module mkITlb(ITlb::ITlb);
                 eparvm_info.sanctum_evmask = 0;
                 if ((vm_info.prv == prvM ? (outOfProtectionDomain(parvm_info,vaddr) && outOfProtectionDomain(eparvm_info,vaddr)) : outOfProtectionDomain(vm_info, vaddr))) begin
                     hitQ.enq(tuple2(?, Valid (excInstAccessFault)));
-                end
-`else
-                // No security check
-                if (False) begin
-                    noAction;
-                end
+                end else
 `endif
-                else if (vm_info.sv39) begin
+                if (vm_info.sv39) begin
                     let vpn = getVpn(vaddr);
                     let trans_result = tlb.translate(vpn, vm_info.asid);
                     if (!validVirtualAddress(vaddr)) hitQ.enq(tuple3(?, Valid (excInstPageFault), False));