Now able to run multiple ISA tests in a single simulation run
connected to remote debugger DSharp, using either hart_reset or
ndm_reset between tests to bring the system back into reset state.
All Debug Module commands working:
- dm_reset, hart_reset, ndm_reset
- break (set breakpoint)
- step
- continue (until breakpoint of 'halt' command)
- halt
- read/write GPR, FPR, CSR, memory
- elf_load
Modified
src_Core/CPU/MMIO_AXI4_Adapter.bsv
Instead of aborting on axi4 mem read error, pass the error on to the core
src_Core/RISCY_OOO/procs/lib/MMIOAddrs.bsv
Added mainMemBoundAddr
src_Core/RISCY_OOO/procs/lib/MMIOCore.bsv
Update isMMIOAddr check to also check mainMemBoundAddr
src_Core/RISCY_OOO/procs/lib/MMIOInst.bsv
Update getFetchTarget to also check mainMemBoundAddr
(still TODO: allow other IO addrs other than bootRom)
