155 lines
4.3 KiB
Plaintext
155 lines
4.3 KiB
Plaintext
// Copyright (c) 2013-2019 Bluespec, Inc. All Rights Reserved
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package SoC_Fabric;
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// ================================================================
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// Defines a SoC Fabric that is a specialization of AXI4_Lite_Fabric
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// for this particular SoC.
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// ================================================================
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// Project imports
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import AXI4_Types :: *;
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import AXI4_Fabric :: *;
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import Fabric_Defs :: *; // for Wd_Addr, Wd_Data, Wd_User
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import SoC_Map :: *; // for Num_Masters, Num_Slaves
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// ================================================================
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// Slave address decoder
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// Identifies whether a given addr is legal and, if so, which slave services it.
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typedef Bit #(TLog #(Num_Slaves)) Slave_Num;
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// ================================================================
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// Specialization of parameterized AXI4 fabric for this SoC.
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typedef AXI4_Fabric_IFC #(Num_Masters,
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Num_Slaves,
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Wd_Id,
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Wd_Addr,
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Wd_Data,
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Wd_User) Fabric_IFC;
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// ----------------
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(* synthesize *)
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module mkFabric (Fabric_IFC);
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SoC_Map_IFC soc_map <- mkSoC_Map;
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function Tuple2 #(Bool, Slave_Num) fn_addr_to_slave_num (Fabric_Addr addr);
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// Main Mem
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if ( (soc_map.m_mem0_controller_addr_base <= addr)
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&& (addr < soc_map.m_mem0_controller_addr_lim))
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return tuple2 (True, fromInteger (mem0_controller_slave_num));
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// Boot ROM
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else if ( (soc_map.m_boot_rom_addr_base <= addr)
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&& (addr < soc_map.m_boot_rom_addr_lim))
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return tuple2 (True, fromInteger (boot_rom_slave_num));
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`ifdef Near_Mem_TCM
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// TCM
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else if ( (soc_map.m_tcm_addr_base <= addr)
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&& (addr < soc_map.m_tcm_addr_lim))
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return tuple2 (True, fromInteger (tcm_back_door_slave_num));
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`endif
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// UART
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else if ( (soc_map.m_uart0_addr_base <= addr)
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&& (addr < soc_map.m_uart0_addr_lim))
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return tuple2 (True, fromInteger (uart0_slave_num));
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`ifdef HTIF_MEMORY
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else if ( (soc_map.m_htif_addr_base <= addr)
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&& (addr < soc_map.m_htif_addr_lim))
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return tuple2 (True, fromInteger (htif_slave_num));
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`endif
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`ifdef INCLUDE_ACCEL0
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// Accelerator 0
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else if ( (soc_map.m_accel0_addr_base <= addr)
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&& (addr < soc_map.m_accel0_addr_lim))
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return tuple2 (True, fromInteger (accel0_slave_num));
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`endif
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else
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return tuple2 (False, ?);
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endfunction
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AXI4_Fabric_IFC #(Num_Masters, Num_Slaves, Wd_Id, Wd_Addr, Wd_Data, Wd_User)
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fabric <- mkAXI4_Fabric (fn_addr_to_slave_num);
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return fabric;
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endmodule
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// ================================================================
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// Specialization of parameterized AXI4 fabric for this SoC.
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typedef AXI4_Fabric_IFC #(Num_Masters,
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Num_Slaves,
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Wd_Id,
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Wd_Addr,
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Wd_Data,
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Wd_User) Fabric_AXI4_IFC;
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// ----------------
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(* synthesize *)
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module mkFabric_AXI4 (Fabric_AXI4_IFC);
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SoC_Map_IFC soc_map <- mkSoC_Map;
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function Tuple2 #(Bool, Slave_Num) fn_addr_to_slave_num (Fabric_Addr addr);
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// Main Mem
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if ( (soc_map.m_mem0_controller_addr_base <= addr)
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&& (addr < soc_map.m_mem0_controller_addr_lim))
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return tuple2 (True, fromInteger (mem0_controller_slave_num));
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// Boot ROM
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else if ( (soc_map.m_boot_rom_addr_base <= addr)
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&& (addr < soc_map.m_boot_rom_addr_lim))
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return tuple2 (True, fromInteger (boot_rom_slave_num));
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`ifdef Near_Mem_TCM
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// TCM
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else if ( (soc_map.m_tcm_addr_base <= addr)
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&& (addr < soc_map.m_tcm_addr_lim))
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return tuple2 (True, fromInteger (tcm_back_door_slave_num));
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`endif
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// UART
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else if ( (soc_map.m_uart0_addr_base <= addr)
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&& (addr < soc_map.m_uart0_addr_lim))
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return tuple2 (True, fromInteger (uart0_slave_num));
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`ifdef HTIF_MEMORY
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else if ( (soc_map.m_htif_addr_base <= addr)
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&& (addr < soc_map.m_htif_addr_lim))
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return tuple2 (True, fromInteger (htif_slave_num));
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`endif
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`ifdef INCLUDE_ACCEL0
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// Accelerator 0
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else if ( (soc_map.m_accel0_addr_base <= addr)
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&& (addr < soc_map.m_accel0_addr_lim))
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return tuple2 (True, fromInteger (accel0_slave_num));
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`endif
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else
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return tuple2 (False, ?);
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endfunction
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AXI4_Fabric_IFC #(Num_Masters, Num_Slaves, Wd_Id, Wd_Addr, Wd_Data, Wd_User)
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fabric <- mkAXI4_Fabric (fn_addr_to_slave_num);
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return fabric;
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endmodule
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// ================================================================
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endpackage
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