rsnikhil 0264984136 Numerous fixes, so now generating correct Tandem-Verification traces for all 229 ISA tests.

2020-02-14 15:37:20 -05:00

..

Core.bsv

Fixed Tandem Verif trace gen for CSRRx on WARL regs: report post-WARL-xformed write-data

2020-02-11 15:46:24 -05:00

CPU_Decode_C.bsv

Changes to support 'C' extension (compressed instructions). Details follow.

2019-04-09 13:50:16 -04:00

CsrFile.bsv

Numerous fixes, so now generating correct Tandem-Verification traces for all 229 ISA tests.

2020-02-14 15:37:20 -05:00

LLC_AXI4_Adapter.bsv

Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module

2020-02-04 16:02:53 -05:00

MMIO_AXI4_Adapter.bsv

Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module

2020-02-04 16:02:53 -05:00

MMIOPlatform.bsv

Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module

2020-02-04 16:02:53 -05:00

Proc_IFC.bsv

Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module

2020-02-04 16:02:53 -05:00

Proc.bsv

Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module

2020-02-04 16:02:53 -05:00