0516db5e8d
This means FetchStage should now behave in the same way with RVFI-DII as with an I-Cache. A Dii_Parcel_Id is fed alongside PC everywhere relevant and follows very similar logic, but, importantly it's just extra state on the side, it doesn't affect what we do with the branch predictor and parcel combining/instruction decoding logic.
122 lines
4.2 KiB
Plaintext
122 lines
4.2 KiB
Plaintext
/*-
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* Copyright (c) 2018-2019 Peter Rugg
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* Copyright (c) 2020 Jonathan Woodruff
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory (Department of Computer Science and
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* Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
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* DARPA SSITH research programme.
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*
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* @BERI_LICENSE_HEADER_START@
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*
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* Licensed to BERI Open Systems C.I.C. (BERI) under one or more contributor
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* license agreements. See the NOTICE file distributed with this work for
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* additional information regarding copyright ownership. BERI licenses this
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* file to you under the BERI Hardware-Software License, Version 1.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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*
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* http://www.beri-open-systems.org/legal/license-1-0.txt
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*
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* Unless required by applicable law or agreed to in writing, Work distributed
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* under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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* CONDITIONS OF ANY KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations under the License.
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*
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* @BERI_LICENSE_HEADER_END@
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*/
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package Toooba_RVFI_DII_Bridge;
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// ================================================================
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// BSV library imports
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import Vector :: *;
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import FIFO :: *;
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import FIFOF :: *;
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import SpecialFIFOs :: *;
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import GetPut :: *;
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import ClientServer :: *;
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import ConfigReg :: *;
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// ================================================================
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// Project imports
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`include "ProcConfig.bsv"
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import Types::*;
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import ProcTypes::*;
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//import Verifier :: *;
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import RVFI_DII :: *;
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// ================================================================
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interface Toooba_RVFI_DII_Bridge_IFC;
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interface Toooba_RVFI_DII_Server rvfi_dii_server;
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interface Server#(Dii_Parcel_Id, Dii_Parcels) dii;
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interface Put#(Rvfi_Traces) rvfi;
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endinterface
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module mkTooobaRVFIDIIBridge(Toooba_RVFI_DII_Bridge_IFC);
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// DII state
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FIFOF#(Dii_Parcel_Resps) parcel_resps <- mkSizedFIFOF(2048);
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// RVFI state
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FIFO#(Rvfi_Traces) report_vectors <- mkSizedFIFO(2048);
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// Request ID
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FIFO#(Dii_Parcel_Id) seq_req_first <- mkFIFO;
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Bool verbose = False;
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function Bool validReport(RVFI_DII_Execution#(DataSz,DataSz) trace);
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return (trace.rvfi_insn != dii_nop);
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endfunction
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// These two functions convert beteween "Invalid" instructions and "nops".
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// This is because the pipeline currently isn't able to handle Invalid injections,
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// so we replace them with special nops in the bridge that we can filter out in the rvfi trace stream.
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function Bit#(16) noParcelToNop(RVFI_DII_Parcel_Resp in);
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case (in) matches
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tagged DIIParcel .parcel: return parcel;
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tagged DIINoParcel .is_second: return is_second ? dii_nop[31:16] : dii_nop[15:0];
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endcase
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endfunction
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function Maybe#(RVFI_DII_Execution #(DataSz,DataSz)) nopToMaybe(Maybe#(RVFI_DII_Execution #(DataSz,DataSz)) in);
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Maybe#(RVFI_DII_Execution #(DataSz,DataSz)) ret = in;
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if (ret matches tagged Valid .val &&& !validReport(val)) ret = tagged Invalid;
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return (ret);
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endfunction
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interface Toooba_RVFI_DII_Server rvfi_dii_server;
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interface Get seqReqFirst = toGet(seq_req_first);
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interface Put parcelResps = toPut(parcel_resps);
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interface Get trace_report = toGet(report_vectors);
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endinterface
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interface Server dii;
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interface Put request = toPut(seq_req_first);
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interface Get response;
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method ActionValue#(Dii_Parcels) get;
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let resps = parcel_resps.first;
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parcel_resps.deq;
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let parcels = map(noParcelToNop, resps);
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if (verbose)
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$display("%t DII injection: ", $time,
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fshow(parcels)
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);
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return parcels;
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endmethod
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endinterface
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endinterface
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interface Put rvfi;
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method Action put(Rvfi_Traces in);
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report_vectors.enq(map(nopToMaybe,in));
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endmethod
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endinterface
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endmodule
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endpackage
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