308 lines
9.2 KiB
Verilog
308 lines
9.2 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
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//
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// On Thu Jul 16 18:28:39 BST 2020
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//
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//
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// Ports:
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// Name I/O size props
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// checkEpoch_0_check O 1
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// RDY_checkEpoch_0_check O 1 const
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// checkEpoch_1_check O 1
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// RDY_checkEpoch_1_check O 1 const
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// RDY_updatePrevEpoch_0_update O 1 const
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// RDY_updatePrevEpoch_1_update O 1 const
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// getEpoch O 4 reg
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// RDY_getEpoch O 1 const
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// RDY_incrementEpoch O 1
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// getEpochState O 8 reg
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// RDY_getEpochState O 1 const
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// isFull_ehrPort0 O 1
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// RDY_isFull_ehrPort0 O 1 const
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// CLK I 1 clock
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// RST_N I 1 reset
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// checkEpoch_0_check_e I 4
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// checkEpoch_1_check_e I 4
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// updatePrevEpoch_0_update_e I 4
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// updatePrevEpoch_1_update_e I 4
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// EN_updatePrevEpoch_0_update I 1
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// EN_updatePrevEpoch_1_update I 1
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// EN_incrementEpoch I 1
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//
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// Combinational paths from inputs to outputs:
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// checkEpoch_0_check_e -> checkEpoch_0_check
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// checkEpoch_1_check_e -> checkEpoch_1_check
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module mkEpochManager(CLK,
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RST_N,
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checkEpoch_0_check_e,
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checkEpoch_0_check,
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RDY_checkEpoch_0_check,
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checkEpoch_1_check_e,
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checkEpoch_1_check,
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RDY_checkEpoch_1_check,
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updatePrevEpoch_0_update_e,
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EN_updatePrevEpoch_0_update,
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RDY_updatePrevEpoch_0_update,
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updatePrevEpoch_1_update_e,
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EN_updatePrevEpoch_1_update,
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RDY_updatePrevEpoch_1_update,
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getEpoch,
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RDY_getEpoch,
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EN_incrementEpoch,
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RDY_incrementEpoch,
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getEpochState,
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RDY_getEpochState,
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isFull_ehrPort0,
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RDY_isFull_ehrPort0);
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input CLK;
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input RST_N;
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// value method checkEpoch_0_check
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input [3 : 0] checkEpoch_0_check_e;
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output checkEpoch_0_check;
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output RDY_checkEpoch_0_check;
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// value method checkEpoch_1_check
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input [3 : 0] checkEpoch_1_check_e;
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output checkEpoch_1_check;
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output RDY_checkEpoch_1_check;
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// action method updatePrevEpoch_0_update
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input [3 : 0] updatePrevEpoch_0_update_e;
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input EN_updatePrevEpoch_0_update;
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output RDY_updatePrevEpoch_0_update;
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// action method updatePrevEpoch_1_update
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input [3 : 0] updatePrevEpoch_1_update_e;
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input EN_updatePrevEpoch_1_update;
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output RDY_updatePrevEpoch_1_update;
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// value method getEpoch
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output [3 : 0] getEpoch;
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output RDY_getEpoch;
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// action method incrementEpoch
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input EN_incrementEpoch;
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output RDY_incrementEpoch;
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// value method getEpochState
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output [7 : 0] getEpochState;
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output RDY_getEpochState;
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// value method isFull_ehrPort0
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output isFull_ehrPort0;
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output RDY_isFull_ehrPort0;
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// signals for module outputs
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wire [7 : 0] getEpochState;
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wire [3 : 0] getEpoch;
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wire RDY_checkEpoch_0_check,
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RDY_checkEpoch_1_check,
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RDY_getEpoch,
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RDY_getEpochState,
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RDY_incrementEpoch,
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RDY_isFull_ehrPort0,
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RDY_updatePrevEpoch_0_update,
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RDY_updatePrevEpoch_1_update,
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checkEpoch_0_check,
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checkEpoch_1_check,
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isFull_ehrPort0;
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// inlined wires
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wire [4 : 0] updatePrevEn_0_lat_0$wget,
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updatePrevEn_0_lat_1$wget,
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updatePrevEn_1_lat_0$wget;
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// register curr_epoch
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reg [3 : 0] curr_epoch;
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wire [3 : 0] curr_epoch$D_IN;
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wire curr_epoch$EN;
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// register prev_checked_epoch
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reg [3 : 0] prev_checked_epoch;
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wire [3 : 0] prev_checked_epoch$D_IN;
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wire prev_checked_epoch$EN;
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// register updatePrevEn_0_rl
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reg [4 : 0] updatePrevEn_0_rl;
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wire [4 : 0] updatePrevEn_0_rl$D_IN;
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wire updatePrevEn_0_rl$EN;
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// register updatePrevEn_1_rl
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reg [4 : 0] updatePrevEn_1_rl;
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wire [4 : 0] updatePrevEn_1_rl$D_IN;
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wire updatePrevEn_1_rl$EN;
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// rule scheduling signals
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wire CAN_FIRE_RL_canon_prev_checked_epoch,
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CAN_FIRE_RL_updatePrevEn_0_canon,
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CAN_FIRE_RL_updatePrevEn_1_canon,
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CAN_FIRE_incrementEpoch,
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CAN_FIRE_updatePrevEpoch_0_update,
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CAN_FIRE_updatePrevEpoch_1_update,
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WILL_FIRE_RL_canon_prev_checked_epoch,
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WILL_FIRE_RL_updatePrevEn_0_canon,
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WILL_FIRE_RL_updatePrevEn_1_canon,
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WILL_FIRE_incrementEpoch,
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WILL_FIRE_updatePrevEpoch_0_update,
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WILL_FIRE_updatePrevEpoch_1_update;
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// remaining internal signals
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wire [3 : 0] next_epoch__h81;
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wire IF_updatePrevEn_1_lat_0_whas__6_THEN_NOT_updat_ETC___d36;
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// value method checkEpoch_0_check
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assign checkEpoch_0_check = checkEpoch_0_check_e == curr_epoch ;
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assign RDY_checkEpoch_0_check = 1'd1 ;
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// value method checkEpoch_1_check
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assign checkEpoch_1_check = checkEpoch_1_check_e == curr_epoch ;
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assign RDY_checkEpoch_1_check = 1'd1 ;
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// action method updatePrevEpoch_0_update
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assign RDY_updatePrevEpoch_0_update = 1'd1 ;
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assign CAN_FIRE_updatePrevEpoch_0_update = 1'd1 ;
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assign WILL_FIRE_updatePrevEpoch_0_update = EN_updatePrevEpoch_0_update ;
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// action method updatePrevEpoch_1_update
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assign RDY_updatePrevEpoch_1_update = 1'd1 ;
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assign CAN_FIRE_updatePrevEpoch_1_update = 1'd1 ;
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assign WILL_FIRE_updatePrevEpoch_1_update = EN_updatePrevEpoch_1_update ;
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// value method getEpoch
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assign getEpoch = curr_epoch ;
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assign RDY_getEpoch = 1'd1 ;
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// action method incrementEpoch
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assign RDY_incrementEpoch = prev_checked_epoch != next_epoch__h81 ;
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assign CAN_FIRE_incrementEpoch = prev_checked_epoch != next_epoch__h81 ;
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assign WILL_FIRE_incrementEpoch = EN_incrementEpoch ;
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// value method getEpochState
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assign getEpochState = { curr_epoch, prev_checked_epoch } ;
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assign RDY_getEpochState = 1'd1 ;
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// value method isFull_ehrPort0
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assign isFull_ehrPort0 = next_epoch__h81 == prev_checked_epoch ;
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assign RDY_isFull_ehrPort0 = 1'd1 ;
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// rule RL_canon_prev_checked_epoch
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assign CAN_FIRE_RL_canon_prev_checked_epoch = 1'd1 ;
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assign WILL_FIRE_RL_canon_prev_checked_epoch = 1'd1 ;
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// rule RL_updatePrevEn_0_canon
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assign CAN_FIRE_RL_updatePrevEn_0_canon = 1'd1 ;
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assign WILL_FIRE_RL_updatePrevEn_0_canon = 1'd1 ;
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// rule RL_updatePrevEn_1_canon
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assign CAN_FIRE_RL_updatePrevEn_1_canon = 1'd1 ;
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assign WILL_FIRE_RL_updatePrevEn_1_canon = 1'd1 ;
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// inlined wires
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assign updatePrevEn_0_lat_0$wget = { 1'd1, updatePrevEpoch_0_update_e } ;
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assign updatePrevEn_0_lat_1$wget =
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{ 1'd0, 4'bxxxx /* unspecified value */ } ;
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assign updatePrevEn_1_lat_0$wget = { 1'd1, updatePrevEpoch_1_update_e } ;
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// register curr_epoch
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assign curr_epoch$D_IN = next_epoch__h81 ;
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assign curr_epoch$EN = EN_incrementEpoch ;
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// register prev_checked_epoch
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assign prev_checked_epoch$D_IN =
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IF_updatePrevEn_1_lat_0_whas__6_THEN_NOT_updat_ETC___d36 ?
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(EN_updatePrevEpoch_0_update ?
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updatePrevEn_0_lat_0$wget[3:0] :
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updatePrevEn_0_rl[3:0]) :
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(EN_updatePrevEpoch_1_update ?
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updatePrevEn_1_lat_0$wget[3:0] :
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updatePrevEn_1_rl[3:0]) ;
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assign prev_checked_epoch$EN =
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IF_updatePrevEn_1_lat_0_whas__6_THEN_NOT_updat_ETC___d36 ?
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(EN_updatePrevEpoch_0_update ?
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updatePrevEn_0_lat_0$wget[4] :
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updatePrevEn_0_rl[4]) :
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(EN_updatePrevEpoch_1_update ?
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updatePrevEn_1_lat_0$wget[4] :
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updatePrevEn_1_rl[4]) ;
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// register updatePrevEn_0_rl
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assign updatePrevEn_0_rl$D_IN = updatePrevEn_0_lat_1$wget ;
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assign updatePrevEn_0_rl$EN = 1'd1 ;
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// register updatePrevEn_1_rl
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assign updatePrevEn_1_rl$D_IN = updatePrevEn_0_lat_1$wget ;
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assign updatePrevEn_1_rl$EN = 1'd1 ;
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// remaining internal signals
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assign IF_updatePrevEn_1_lat_0_whas__6_THEN_NOT_updat_ETC___d36 =
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EN_updatePrevEpoch_1_update ?
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!updatePrevEn_1_lat_0$wget[4] :
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!updatePrevEn_1_rl[4] ;
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assign next_epoch__h81 = (curr_epoch == 4'd11) ? 4'd0 : curr_epoch + 4'd1 ;
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// handling of inlined registers
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always@(posedge CLK)
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begin
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if (RST_N == `BSV_RESET_VALUE)
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begin
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curr_epoch <= `BSV_ASSIGNMENT_DELAY 4'd0;
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prev_checked_epoch <= `BSV_ASSIGNMENT_DELAY 4'd0;
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updatePrevEn_0_rl <= `BSV_ASSIGNMENT_DELAY
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{ 1'd0, 4'bxxxx /* unspecified value */ };
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updatePrevEn_1_rl <= `BSV_ASSIGNMENT_DELAY
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{ 1'd0, 4'bxxxx /* unspecified value */ };
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end
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else
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begin
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if (curr_epoch$EN)
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curr_epoch <= `BSV_ASSIGNMENT_DELAY curr_epoch$D_IN;
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if (prev_checked_epoch$EN)
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prev_checked_epoch <= `BSV_ASSIGNMENT_DELAY prev_checked_epoch$D_IN;
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if (updatePrevEn_0_rl$EN)
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updatePrevEn_0_rl <= `BSV_ASSIGNMENT_DELAY updatePrevEn_0_rl$D_IN;
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if (updatePrevEn_1_rl$EN)
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updatePrevEn_1_rl <= `BSV_ASSIGNMENT_DELAY updatePrevEn_1_rl$D_IN;
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end
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end
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// synopsys translate_off
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`ifdef BSV_NO_INITIAL_BLOCKS
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`else // not BSV_NO_INITIAL_BLOCKS
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initial
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begin
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curr_epoch = 4'hA;
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prev_checked_epoch = 4'hA;
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updatePrevEn_0_rl = 5'h0A;
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updatePrevEn_1_rl = 5'h0A;
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end
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`endif // BSV_NO_INITIAL_BLOCKS
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// synopsys translate_on
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endmodule // mkEpochManager
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