93 lines
2.3 KiB
Verilog
93 lines
2.3 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
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//
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// On Thu Jul 16 18:27:03 BST 2020
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//
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//
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// Ports:
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// Name I/O size props
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// RST_N_gen_rst O 1 reset
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// CLK I 1 clock
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// RST_N I 1 unused
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//
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// No combinational paths from inputs to outputs
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module mkPowerOnReset(CLK,
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RST_N,
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RST_N_gen_rst);
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input CLK;
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input RST_N;
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// output resets
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output RST_N_gen_rst;
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// signals for module outputs
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wire RST_N_gen_rst;
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// ports of submodule ctr
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wire [7 : 0] ctr$D_IN, ctr$Q_OUT;
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wire ctr$EN;
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// ports of submodule isInPowerOnReset
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wire isInPowerOnReset$D_IN, isInPowerOnReset$EN, isInPowerOnReset$Q_OUT;
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// ports of submodule rst_ifc
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wire rst_ifc$OUT;
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// rule scheduling signals
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wire CAN_FIRE_RL_countDown, WILL_FIRE_RL_countDown;
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// remaining internal signals
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wire NOT_isInPowerOnReset__read___d5;
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// output resets
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assign RST_N_gen_rst = rst_ifc$OUT ;
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// submodule ctr
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RegUNInit #(.width(32'd8), .init(8'd10)) ctr(.CLK(CLK),
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.D_IN(ctr$D_IN),
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.EN(ctr$EN),
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.Q_OUT(ctr$Q_OUT));
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// submodule isInPowerOnReset
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RegUNInit #(.width(32'd1), .init(1'd1)) isInPowerOnReset(.CLK(CLK),
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.D_IN(isInPowerOnReset$D_IN),
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.EN(isInPowerOnReset$EN),
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.Q_OUT(isInPowerOnReset$Q_OUT));
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// submodule rst_ifc
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ASSIGN1 rst_ifc(.IN(NOT_isInPowerOnReset__read___d5), .OUT(rst_ifc$OUT));
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// rule RL_countDown
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assign CAN_FIRE_RL_countDown = isInPowerOnReset$Q_OUT ;
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assign WILL_FIRE_RL_countDown = isInPowerOnReset$Q_OUT ;
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// submodule ctr
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assign ctr$D_IN = ctr$Q_OUT - 8'd1 ;
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assign ctr$EN = isInPowerOnReset$Q_OUT ;
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// submodule isInPowerOnReset
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assign isInPowerOnReset$D_IN = 1'd0 ;
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assign isInPowerOnReset$EN = isInPowerOnReset$Q_OUT && ctr$Q_OUT == 8'd1 ;
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// remaining internal signals
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assign NOT_isInPowerOnReset__read___d5 = !isInPowerOnReset$Q_OUT ;
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endmodule // mkPowerOnReset
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