344 lines
12 KiB
Verilog
344 lines
12 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
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//
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// On Thu Jul 16 18:14:59 BST 2020
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//
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//
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// Ports:
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// Name I/O size props
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// prepareBoundsCheck O 266
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// prepareBoundsCheck_a I 163
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// prepareBoundsCheck_b I 163
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// prepareBoundsCheck_pcc I 163
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// prepareBoundsCheck_ddc I 163
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// prepareBoundsCheck_vaddr I 64
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// prepareBoundsCheck_size I 5
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// prepareBoundsCheck_toCheck I 47
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//
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// Combinational paths from inputs to outputs:
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// (prepareBoundsCheck_a,
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// prepareBoundsCheck_b,
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// prepareBoundsCheck_pcc,
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// prepareBoundsCheck_ddc,
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// prepareBoundsCheck_vaddr,
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// prepareBoundsCheck_size,
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// prepareBoundsCheck_toCheck) -> prepareBoundsCheck
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module module_prepareBoundsCheck(prepareBoundsCheck_a,
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prepareBoundsCheck_b,
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prepareBoundsCheck_pcc,
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prepareBoundsCheck_ddc,
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prepareBoundsCheck_vaddr,
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prepareBoundsCheck_size,
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prepareBoundsCheck_toCheck,
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prepareBoundsCheck);
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// value method prepareBoundsCheck
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input [162 : 0] prepareBoundsCheck_a;
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input [162 : 0] prepareBoundsCheck_b;
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input [162 : 0] prepareBoundsCheck_pcc;
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input [162 : 0] prepareBoundsCheck_ddc;
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input [63 : 0] prepareBoundsCheck_vaddr;
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input [4 : 0] prepareBoundsCheck_size;
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input [46 : 0] prepareBoundsCheck_toCheck;
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output [265 : 0] prepareBoundsCheck;
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// signals for module outputs
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wire [265 : 0] prepareBoundsCheck;
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// remaining internal signals
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reg [65 : 0] x__h930;
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reg [64 : 0] x__h1812;
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reg [63 : 0] x__h1621;
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reg [15 : 0] x__h697, x__h978;
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reg [13 : 0] IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75;
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reg [5 : 0] CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6,
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23;
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reg [1 : 0] x__h1461;
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wire [65 : 0] IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69,
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addTop__h1825,
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addTop__h872,
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prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139,
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result__h1502,
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result__h2421,
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ret__h1829,
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ret__h876,
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x__h1822,
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x__h869;
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wire [63 : 0] addBase__h1673, addBase__h350, bot__h1676, x__h180;
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wire [51 : 0] mask__h1826, mask__h873;
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wire [49 : 0] mask__h1674,
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mask__h351,
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prepareBoundsCheck_a_BITS_159_TO_110_PLUS_SEXT_ETC__q2,
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x30_BITS_63_TO_14_PLUS_SEXT_x461_SL_IF_prepare_ETC__q5;
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wire [15 : 0] prepareBoundsCheck_a_BITS_1_TO_0_CONCAT_prepar_ETC__q3,
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prepareBoundsCheck_a_BITS_3_TO_2_CONCAT_prepar_ETC__q4;
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wire [1 : 0] prepareBoundsCheck_a_BITS_1_TO_0__q1;
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wire IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d90,
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prepareBoundsCheck_a_BITS_43_TO_38_6_ULT_51_32_ETC___d152,
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x__h1053,
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x__h1973;
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// value method prepareBoundsCheck
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assign prepareBoundsCheck =
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{ prepareBoundsCheck_toCheck[21],
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x__h180,
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x__h869[64:0],
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CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6,
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x__h1621,
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x__h1812,
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prepareBoundsCheck_toCheck[12] } ;
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// remaining internal signals
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assign IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69 =
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{ x__h930[65:14] & mask__h873, 14'd0 } + addTop__h872 ;
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assign IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d90 =
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 <
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6'd51 &&
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69[64:63] -
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{ 1'd0, x__h1053 } >
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2'd1 ;
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assign addBase__h1673 =
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{ {48{prepareBoundsCheck_a_BITS_1_TO_0_CONCAT_prepar_ETC__q3[15]}},
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prepareBoundsCheck_a_BITS_1_TO_0_CONCAT_prepar_ETC__q3 } <<
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prepareBoundsCheck_a[43:38] ;
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assign addBase__h350 =
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{ {48{x__h697[15]}}, x__h697 } <<
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 ;
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assign addTop__h1825 =
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{ {50{prepareBoundsCheck_a_BITS_3_TO_2_CONCAT_prepar_ETC__q4[15]}},
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prepareBoundsCheck_a_BITS_3_TO_2_CONCAT_prepar_ETC__q4 } <<
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prepareBoundsCheck_a[43:38] ;
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assign addTop__h872 =
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{ {50{x__h978[15]}}, x__h978 } <<
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 ;
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assign bot__h1676 =
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{ prepareBoundsCheck_a[159:110] & mask__h1674, 14'd0 } +
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addBase__h1673 ;
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assign mask__h1674 = 50'h3FFFFFFFFFFFF << prepareBoundsCheck_a[43:38] ;
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assign mask__h1826 = 52'hFFFFFFFFFFFFF << prepareBoundsCheck_a[43:38] ;
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assign mask__h351 =
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50'h3FFFFFFFFFFFF <<
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 ;
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assign mask__h873 =
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52'hFFFFFFFFFFFFF <<
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 ;
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assign prepareBoundsCheck_a_BITS_159_TO_110_PLUS_SEXT_ETC__q2 =
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prepareBoundsCheck_a[159:110] +
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({ {48{prepareBoundsCheck_a_BITS_1_TO_0__q1[1]}},
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prepareBoundsCheck_a_BITS_1_TO_0__q1 } <<
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prepareBoundsCheck_a[43:38]) ;
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assign prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139 =
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{ prepareBoundsCheck_a[161:110] & mask__h1826, 14'd0 } +
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addTop__h1825 ;
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assign prepareBoundsCheck_a_BITS_1_TO_0_CONCAT_prepar_ETC__q3 =
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{ prepareBoundsCheck_a[1:0], prepareBoundsCheck_a[23:10] } ;
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assign prepareBoundsCheck_a_BITS_1_TO_0__q1 = prepareBoundsCheck_a[1:0] ;
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assign prepareBoundsCheck_a_BITS_3_TO_2_CONCAT_prepar_ETC__q4 =
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{ prepareBoundsCheck_a[3:2], prepareBoundsCheck_a[37:24] } ;
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assign prepareBoundsCheck_a_BITS_43_TO_38_6_ULT_51_32_ETC___d152 =
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prepareBoundsCheck_a[43:38] < 6'd51 &&
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prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139[64:63] -
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{ 1'd0, x__h1973 } >
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2'd1 ;
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assign result__h1502 =
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{ 1'd0,
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~IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69[64],
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69[63:0] } ;
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assign result__h2421 =
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{ 1'd0,
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~prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139[64],
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prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139[63:0] } ;
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assign ret__h1829 =
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{ 1'd0,
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prepareBoundsCheck_a_BITS_161_TO_110_33_AND_45_ETC___d139[64:0] } ;
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assign ret__h876 =
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{ 1'd0,
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d69[64:0] } ;
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assign x30_BITS_63_TO_14_PLUS_SEXT_x461_SL_IF_prepare_ETC__q5 =
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x__h930[63:14] +
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({ {48{x__h1461[1]}}, x__h1461 } <<
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23) ;
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assign x__h1053 =
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(IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 ==
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6'd50) ?
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75[13] :
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x30_BITS_63_TO_14_PLUS_SEXT_x461_SL_IF_prepare_ETC__q5[49] ;
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assign x__h180 = { x__h930[63:14] & mask__h351, 14'd0 } + addBase__h350 ;
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assign x__h1822 =
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prepareBoundsCheck_a_BITS_43_TO_38_6_ULT_51_32_ETC___d152 ?
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result__h2421 :
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ret__h1829 ;
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assign x__h1973 =
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(prepareBoundsCheck_a[43:38] == 6'd50) ?
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prepareBoundsCheck_a[23] :
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prepareBoundsCheck_a_BITS_159_TO_110_PLUS_SEXT_ETC__q2[49] ;
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assign x__h869 =
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d90 ?
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result__h1502 :
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ret__h876 ;
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0: x__h930 = prepareBoundsCheck_a[161:96];
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2'd1: x__h930 = prepareBoundsCheck_b[161:96];
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2'd2: x__h930 = prepareBoundsCheck_pcc[161:96];
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2'd3: x__h930 = prepareBoundsCheck_ddc[161:96];
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_vaddr or
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prepareBoundsCheck_a or bot__h1676 or prepareBoundsCheck_b)
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begin
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case (prepareBoundsCheck_toCheck[18:16])
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3'd0: x__h1621 = prepareBoundsCheck_a[159:96];
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3'd1: x__h1621 = bot__h1676;
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3'd2: x__h1621 = { 46'd0, prepareBoundsCheck_a[62:45] };
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3'd3: x__h1621 = prepareBoundsCheck_b[159:96];
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default: x__h1621 = prepareBoundsCheck_vaddr;
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0:
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x__h697 =
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{ prepareBoundsCheck_a[1:0], prepareBoundsCheck_a[23:10] };
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2'd1:
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x__h697 =
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{ prepareBoundsCheck_b[1:0], prepareBoundsCheck_b[23:10] };
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2'd2:
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x__h697 =
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{ prepareBoundsCheck_pcc[1:0], prepareBoundsCheck_pcc[23:10] };
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2'd3:
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x__h697 =
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{ prepareBoundsCheck_ddc[1:0], prepareBoundsCheck_ddc[23:10] };
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0:
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x__h978 =
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{ prepareBoundsCheck_a[3:2], prepareBoundsCheck_a[37:24] };
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2'd1:
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x__h978 =
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{ prepareBoundsCheck_b[3:2], prepareBoundsCheck_b[37:24] };
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2'd2:
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x__h978 =
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{ prepareBoundsCheck_pcc[3:2], prepareBoundsCheck_pcc[37:24] };
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2'd3:
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x__h978 =
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{ prepareBoundsCheck_ddc[3:2], prepareBoundsCheck_ddc[37:24] };
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0: x__h1461 = prepareBoundsCheck_a[1:0];
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2'd1: x__h1461 = prepareBoundsCheck_b[1:0];
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2'd2: x__h1461 = prepareBoundsCheck_pcc[1:0];
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2'd3: x__h1461 = prepareBoundsCheck_ddc[1:0];
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 =
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prepareBoundsCheck_a[43:38];
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2'd1:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 =
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prepareBoundsCheck_b[43:38];
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2'd2:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 =
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prepareBoundsCheck_pcc[43:38];
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2'd3:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d23 =
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prepareBoundsCheck_ddc[43:38];
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_ddc or
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prepareBoundsCheck_a or
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prepareBoundsCheck_b or prepareBoundsCheck_pcc)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75 =
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prepareBoundsCheck_a[23:10];
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2'd1:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75 =
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prepareBoundsCheck_b[23:10];
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2'd2:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75 =
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prepareBoundsCheck_pcc[23:10];
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2'd3:
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IF_prepareBoundsCheck_toCheck_BITS_20_TO_19_EQ_ETC___d75 =
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prepareBoundsCheck_ddc[23:10];
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endcase
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end
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always@(prepareBoundsCheck_toCheck or
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prepareBoundsCheck_vaddr or
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prepareBoundsCheck_size or
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prepareBoundsCheck_a or x__h1822 or prepareBoundsCheck_b)
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begin
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case (prepareBoundsCheck_toCheck[15:13])
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3'd0: x__h1812 = { 1'b0, prepareBoundsCheck_a[159:96] + 64'd2 };
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3'd1: x__h1812 = x__h1822[64:0];
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3'd2: x__h1812 = { 47'd0, prepareBoundsCheck_a[62:45] };
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3'd3: x__h1812 = { 1'b0, prepareBoundsCheck_b[159:96] };
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3'd4:
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x__h1812 =
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{ 1'b0, prepareBoundsCheck_a[159:96] } +
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{ 1'b0, prepareBoundsCheck_b[159:96] };
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default: x__h1812 =
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{ 1'b0, prepareBoundsCheck_vaddr } +
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{ 60'd0, prepareBoundsCheck_size };
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endcase
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end
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always@(prepareBoundsCheck_toCheck)
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begin
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case (prepareBoundsCheck_toCheck[20:19])
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2'd0:
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CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6 =
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prepareBoundsCheck_toCheck[11:6];
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2'd1:
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CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6 =
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prepareBoundsCheck_toCheck[5:0];
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2'd2: CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6 = 6'd32;
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2'd3: CASE_prepareBoundsCheck_toCheck_BITS_20_TO_19__ETC__q6 = 6'd33;
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endcase
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end
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endmodule // module_prepareBoundsCheck
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