Jonathan Woodruff 584f8334fa Pipe through memory results. This design passes 100 memory test sequences of TestRIG. Yay!

2019-12-13 10:53:02 +00:00

..

BSV_Additional_Libs

Added support for 'debug_external_interrupt_req'

2019-04-01 12:26:54 -04:00

Core

Changes that enable RVFI_DII to run.

2019-11-26 10:46:56 +00:00

CPU

Changes to support vectored RVFI_DII bridge directly, which enables us to successfully run memory tests with traps.

2019-12-09 16:34:27 +00:00

Debug_Module

Ensure that halt asserted after ndm reset is not ignored.

2019-04-09 14:08:36 -04:00

ISA

Initial load of files

2019-03-26 14:49:40 -04:00

PLIC

Initial load of files

2019-03-26 14:49:40 -04:00

RISCY_OOO

Pipe through memory results. This design passes 100 memory test sequences of TestRIG. Yay!

2019-12-13 10:53:02 +00:00