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796e3a645daf8fcfc243eca1bcbcdafdaa678b31
Toooba/src_Testbench/SoC
History
Jonathan Woodruff 3a79b022ea Merge branch 'master' into RVFI_DII, a complex merge for the fetch stage!
2020-03-18 11:35:59 +00:00
..
Boot_ROM_Generator
Initial load of files
2019-03-26 14:49:40 -04:00
Boot_ROM.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
External_Control.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
fn_read_ROM_RV32.bsvi
Initial load of files
2019-03-26 14:49:40 -04:00
fn_read_ROM_RV64.bsvi
Initial load of files
2019-03-26 14:49:40 -04:00
Mem_Controller.bsv
Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
2020-02-04 16:02:53 -05:00
SoC_Fabric.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
SoC_Map.bsv
Move to 8 MiB RVFI-DII memory.
2020-03-11 11:53:19 +00:00
SoC_Top.bsv
Merge branch 'master' into RVFI_DII, a complex merge for the fetch stage!
2020-03-18 11:35:59 +00:00
Timer.bsv
Initial load of files
2019-03-26 14:49:40 -04:00
UART_Model.bsv
UART_Model.bsv fixes for better support of 32b/64b fabrics and 4-byte/8-byte address strides
2020-03-05 09:33:58 -05:00
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