Peter Rugg a89a606a6d Factor out Opcodes and CSRs into separate files

2020-04-21 20:36:56 +01:00

..

BSV_Additional_Libs

Change tabs to 8 spaces, this time being careful to do this only in BSV files.

2020-03-23 14:44:39 +00:00

CHERI

Comment out user exception delegation SCRs since the corresponding CSRs are not yet supported

2020-04-16 20:43:44 +01:00

Core

Port AXI4 changes from Flute

2020-03-27 16:45:26 +00:00

CPU

Move the register file to CapReg format, and pipe CapPipe around the pipeline.

2020-03-31 15:44:23 +01:00

Debug_Module

Change tabs to 8 spaces, this time being careful to do this only in BSV files.

2020-03-23 14:44:39 +00:00

ISA

Add ALU bounds check

2020-04-20 11:21:51 +01:00

PLIC

Port AXI4 changes from Flute

2020-03-27 16:45:26 +00:00

RISCY_OOO

Factor out Opcodes and CSRs into separate files

2020-04-21 20:36:56 +01:00