Cheri-research/Toooba
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ac6043ce2d6e74feb3e76a5d7ac2b06365fd3fbd
Toooba/src_Core
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rsnikhil ac6043ce2d Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization 
(1) riscy-ooo was mapping all unimplemented CSRs to a benign, user-privilege read-write CSR
    Instead, we now catch this RenameStage and steer it to a trap.
(2) MSTATUS.FS was initialized to 2'b00 (absent/off); should be 2'b01 (present and initial)
2020-03-03 13:56:31 -05:00
..
BSV_Additional_Libs
Added support for 'debug_external_interrupt_req'
2019-04-01 12:26:54 -04:00
Core
Numerous fixes, so now generating correct Tandem-Verification traces for all 229 ISA tests.
2020-02-14 15:37:20 -05:00
CPU
Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization
2020-03-03 13:56:31 -05:00
Debug_Module
Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
2020-02-04 16:02:53 -05:00
ISA
Removed EXTERNAL_DEBUG_MODULE stuff from CoreW.bsv; added Tandem Verif control flow
2020-01-29 13:19:31 -05:00
PLIC
Initial load of files
2019-03-26 14:49:40 -04:00
RISCY_OOO
Fixed two bugs: (1) not trapping on unimplemented CSRs (2) MSTATUS.FS initialization
2020-03-03 13:56:31 -05:00