jon d351eeee11 Increase BTB to 1024 entries. ...

(On FPGA we can make this as large as we like, but returns diminish.
This one has a chance of being reasonable for ASIC I guess?)

2021-03-22 18:20:22 +00:00

..

coherence/src

Use an (unguarded) BRAM in the Btb.

2021-03-06 07:19:50 +00:00

connectal

Add CHERI+RVFI_DII grant codes and copyrights

2020-07-06 17:39:25 +01:00

fpgautils

Avoid divide-by-zero in simulation model

2020-01-04 22:44:59 +00:00

procs

Increase BTB to 1024 entries.

2021-03-22 18:20:22 +00:00

LICENSE_RISCY-OOO

Initial load of files

2019-03-26 14:49:40 -04:00

Makefile

Revert "Fix whitespace in src_Core directory."

2020-03-23 14:40:02 +00:00