Files
Toooba/builds/Resources/Include_bluesim.mk
rsnikhil 83829590dd Fixed up logic for "Non-Debug-Module reset" request/response from the Debug Module
Now able to run multiple ISA tests in a single simulation run
connected to remote debugger DSharp, using either hart_reset or
ndm_reset between tests to bring the system back into reset state.
All Debug Module commands working:
 - dm_reset, hart_reset, ndm_reset
 - break    (set breakpoint)
 - step
 - continue (until breakpoint of 'halt' command)
 - halt
 - read/write GPR, FPR, CSR, memory
 - elf_load
2020-02-04 16:02:53 -05:00

44 lines
1.3 KiB
Makefile

### -*-Makefile-*-
# Copyright (c) 2018-2019 Bluespec, Inc. All Rights Reserved
# This file is not a standalone Makefile, but 'include'd by other Makefiles
# ================================================================
# Compile Bluesim intermediate files from BSV sources (needs Bluespec 'bsc' compiler)
TMP_DIRS = -bdir build_dir -simdir build_dir -info-dir build_dir
build_dir:
mkdir -p $@
.PHONY: compile
compile: build_dir
@echo "INFO: Re-compiling Core (CPU, Caches)"
bsc -u -elab -sim $(TMP_DIRS) $(BSC_COMPILATION_FLAGS) -p $(BSC_PATH) $(TOPFILE)
@echo "INFO: Re-compiled Core (CPU, Caches)"
# ================================================================
# Compile and link Bluesim intermediate files into a Bluesim executable
SIM_EXE_FILE = exe_HW_sim
BSC_C_FLAGS += \
-Xl -v \
-Xc -O1 -Xc++ -O1 \
# Removed this for Bluespec_2019.05.beta2-debian9stretch-amd64
# -Xc++ -D_GLIBCXX_USE_CXX11_ABI=0 \
.PHONY: simulator
simulator:
@echo "INFO: linking bsc-compiled objects into Bluesim executable"
bsc -sim -parallel-sim-link 8 +RTS -K128M -RTS \
$(TMP_DIRS) \
-e $(TOPMODULE) -o ./$(SIM_EXE_FILE) \
$(BSC_C_FLAGS) \
$(REPO)/src_Testbench/Top/C_Imported_Functions.c
@echo "INFO: linked bsc-compiled objects into Bluesim executable"
# ================================================================