279 lines
12 KiB
Verilog
279 lines
12 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
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//
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//
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//
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//
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// Ports:
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// Name I/O size props
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// checkForException O 5
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// checkForException_dInst I 72
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// checkForException_regs I 27 unused
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// checkForException_csrState I 15
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//
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// Combinational paths from inputs to outputs:
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// (checkForException_dInst, checkForException_csrState) -> checkForException
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module module_checkForException(checkForException_dInst,
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checkForException_regs,
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checkForException_csrState,
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checkForException);
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// value method checkForException
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input [71 : 0] checkForException_dInst;
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input [26 : 0] checkForException_regs;
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input [14 : 0] checkForException_csrState;
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output [4 : 0] checkForException;
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// signals for module outputs
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wire [4 : 0] checkForException;
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// remaining internal signals
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reg [11 : 0] CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2;
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reg [5 : 0] IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100;
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reg [2 : 0] CASE_checkForException_csrState_BITS_14_TO_12__ETC__q1;
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reg IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235;
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wire [2 : 0] IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215;
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// value method checkForException
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assign checkForException =
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{ checkForException_dInst[71:67] == 5'd17 ||
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checkForException_dInst[71:67] == 5'd18 ||
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IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235,
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((checkForException_dInst[71:67] == 5'd17) ?
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checkForException_csrState[10:9] != 2'd0 &&
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checkForException_csrState[10:9] != 2'd1 &&
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checkForException_csrState[10:9] != 2'd3 :
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checkForException_dInst[71:67] != 5'd18) ?
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4'd2 :
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((checkForException_dInst[71:67] == 5'd18) ?
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4'd3 :
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((checkForException_dInst[71:67] == 5'd17 &&
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checkForException_csrState[10:9] == 2'd0) ?
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4'd8 :
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((checkForException_dInst[71:67] == 5'd17 &&
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checkForException_csrState[10:9] == 2'd1) ?
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4'd9 :
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((checkForException_dInst[71:67] == 5'd17 &&
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checkForException_csrState[10:9] == 2'd3) ?
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4'd11 :
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4'd15)))) } ;
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// remaining internal signals
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assign IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 =
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(checkForException_dInst[49:47] != 3'd0 &&
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checkForException_dInst[49:47] != 3'd1 &&
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checkForException_dInst[49:47] != 3'd2 &&
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checkForException_dInst[49:47] != 3'd3 &&
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checkForException_dInst[49:47] != 3'd4) ?
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CASE_checkForException_csrState_BITS_14_TO_12__ETC__q1 :
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checkForException_dInst[49:47] ;
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always@(checkForException_dInst)
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begin
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case (checkForException_dInst[44:33])
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12'd1: IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd0;
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12'd2: IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd1;
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12'd3: IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd2;
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12'd256:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd8;
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12'd260:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd9;
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12'd261:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd10;
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12'd262:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd11;
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12'd320:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd12;
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12'd321:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd13;
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12'd322:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd14;
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12'd323:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd15;
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12'd324:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd16;
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12'd384:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd17;
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12'd768:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd18;
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12'd769:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd19;
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12'd770:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd20;
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12'd771:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd21;
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12'd772:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd22;
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12'd773:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd23;
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12'd774:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd24;
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12'd832:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd25;
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12'd833:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd26;
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12'd834:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd27;
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12'd835:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd28;
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12'd836:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd29;
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12'd1968:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd36;
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12'd1969:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd37;
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12'd1970:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd38;
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12'd1971:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd39;
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12'd2048:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd6;
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12'd2049:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd7;
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12'd2816:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd30;
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12'd2818:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd31;
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12'd3072:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd3;
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12'd3073:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd4;
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12'd3074:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd5;
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12'd3857:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd32;
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12'd3858:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd33;
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12'd3859:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd34;
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12'd3860:
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 = 6'd35;
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default: IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 =
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6'd40;
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endcase
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end
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always@(checkForException_csrState)
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begin
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case (checkForException_csrState[14:12])
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3'd0, 3'd1, 3'd2, 3'd3, 3'd4:
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CASE_checkForException_csrState_BITS_14_TO_12__ETC__q1 =
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checkForException_csrState[14:12];
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default: CASE_checkForException_csrState_BITS_14_TO_12__ETC__q1 = 3'd5;
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endcase
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end
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always@(IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100)
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begin
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case (IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100)
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6'd0: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd1;
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6'd1: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd2;
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6'd2: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3;
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6'd3: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3072;
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6'd4: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3073;
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6'd5: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3074;
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6'd6: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd2048;
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6'd7: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd2049;
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6'd8: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd256;
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6'd9: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd260;
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6'd10: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd261;
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6'd11: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd262;
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6'd12: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd320;
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6'd13: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd321;
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6'd14: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd322;
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6'd15: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd323;
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6'd16: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd324;
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6'd17: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd384;
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6'd18: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd768;
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6'd19: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd769;
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6'd20: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd770;
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6'd21: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd771;
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6'd22: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd772;
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6'd23: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd773;
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6'd24: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd774;
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6'd25: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd832;
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6'd26: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd833;
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6'd27: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd834;
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6'd28: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd835;
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6'd29: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd836;
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6'd30:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd2816;
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6'd31:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd2818;
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6'd32:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3857;
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6'd33:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3858;
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6'd34:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3859;
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6'd35:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd3860;
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6'd36:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd1968;
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6'd37:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd1969;
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6'd38:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd1970;
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6'd39:
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 = 12'd1971;
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default: CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 =
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12'd2303;
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endcase
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end
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always@(checkForException_dInst or
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 or
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checkForException_csrState or
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2 or
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100)
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begin
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case (checkForException_dInst[71:67])
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5'd13:
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IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235 =
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checkForException_csrState[10:9] <
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CASE_IF_checkForException_dInst_BIT_45_8_THEN__ETC__q2[9:8] ||
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checkForException_csrState[10:9] == 2'd1 &&
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checkForException_csrState[8] &&
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IF_checkForException_dInst_BIT_45_8_THEN_IF_ch_ETC___d100 ==
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6'd17;
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5'd16:
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IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235 =
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checkForException_csrState[10:9] == 2'd1 &&
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checkForException_csrState[8];
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5'd19:
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IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235 =
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checkForException_csrState[10:9] == 2'd0 ||
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checkForException_csrState[10:9] == 2'd1 &&
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checkForException_csrState[6];
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5'd20:
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IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235 =
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checkForException_csrState[10:9] != 2'd3;
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default: IF_checkForException_dInst_BITS_71_TO_67_EQ_20_ETC___d235 =
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checkForException_dInst[71:67] == 5'd12 &&
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(checkForException_dInst[66:64] != 3'd4 ||
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 !=
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3'd0 &&
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 !=
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3'd1 &&
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 !=
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3'd2 &&
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 !=
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3'd3 &&
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IF_NOT_checkForException_dInst_BITS_49_TO_47_8_ETC___d215 !=
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3'd4);
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endcase
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end
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endmodule // module_checkForException
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