252 lines
7.9 KiB
Verilog
252 lines
7.9 KiB
Verilog
//
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// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
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//
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// On Mon Jul 13 18:24:29 BST 2020
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//
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//
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// Ports:
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// Name I/O size props
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// amoExec O 129
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// amoExec_amo_inst I 8
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// amoExec_wordIdx I 2
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// amoExec_current I 129
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// amoExec_inpt I 129
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//
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// Combinational paths from inputs to outputs:
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// (amoExec_amo_inst,
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// amoExec_wordIdx,
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// amoExec_current,
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// amoExec_inpt) -> amoExec
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//
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//
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`ifdef BSV_ASSIGNMENT_DELAY
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`else
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`define BSV_ASSIGNMENT_DELAY
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`endif
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`ifdef BSV_POSITIVE_RESET
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`define BSV_RESET_VALUE 1'b1
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`define BSV_RESET_EDGE posedge
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`else
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`define BSV_RESET_VALUE 1'b0
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`define BSV_RESET_EDGE negedge
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`endif
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module module_amoExec(amoExec_amo_inst,
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amoExec_wordIdx,
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amoExec_current,
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amoExec_inpt,
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amoExec);
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// value method amoExec
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input [7 : 0] amoExec_amo_inst;
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input [1 : 0] amoExec_wordIdx;
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input [128 : 0] amoExec_current;
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input [128 : 0] amoExec_inpt;
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output [128 : 0] amoExec;
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// signals for module outputs
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wire [128 : 0] amoExec;
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// remaining internal signals
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reg [127 : 0] tmpData__h32, x__h611, x__h700;
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reg [63 : 0] vOld__h709, x__h707;
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reg [31 : 0] vOld__h1136, x__h1134;
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reg [7 : 0] shftAmnt__h37;
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wire [127 : 0] tmpData__h632,
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tmpData__h638,
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x__h325,
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x__h610,
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y__h326,
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y__h328;
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wire [7 : 0] shftAmnt__h634, shftAmnt__h640;
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wire SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d63,
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d66,
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d35,
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d40,
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amoExec_current_BITS_127_TO_0_SLE_amoExec_inpt_ETC___d90,
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amoExec_current_BITS_127_TO_0_ULE_amoExec_inpt_ETC___d93;
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// value method amoExec
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assign amoExec =
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{ amoExec_amo_inst[7:4] == 4'd0 &&
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amoExec_amo_inst[3:2] == 2'd0 &&
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amoExec_inpt[128],
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x__h325 | y__h326 } ;
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// remaining internal signals
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assign SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d63 =
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(vOld__h1136 ^ 32'h80000000) <=
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(amoExec_inpt[31:0] ^ 32'h80000000) ;
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assign SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d66 =
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vOld__h1136 <= amoExec_inpt[31:0] ;
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assign SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d35 =
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(vOld__h709 ^ 64'h8000000000000000) <=
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(amoExec_inpt[63:0] ^ 64'h8000000000000000) ;
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assign SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d40 =
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vOld__h709 <= amoExec_inpt[63:0] ;
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assign amoExec_current_BITS_127_TO_0_SLE_amoExec_inpt_ETC___d90 =
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(amoExec_current[127:0] ^
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128'h80000000000000000000000000000000) <=
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(amoExec_inpt[127:0] ^ 128'h80000000000000000000000000000000) ;
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assign amoExec_current_BITS_127_TO_0_ULE_amoExec_inpt_ETC___d93 =
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amoExec_current[127:0] <= amoExec_inpt[127:0] ;
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assign shftAmnt__h634 = { 1'd0, amoExec_wordIdx[1], 6'd0 } ;
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assign shftAmnt__h640 = { 1'd0, amoExec_wordIdx, 5'd0 } ;
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assign tmpData__h632 = { 64'd0, x__h707 } ;
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assign tmpData__h638 = { 96'd0, x__h1134 } ;
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assign x__h325 = amoExec_current[127:0] & y__h328 ;
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assign x__h610 = x__h611 << shftAmnt__h37 ;
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assign y__h326 = x__h700 << shftAmnt__h37 ;
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assign y__h328 = ~x__h610 ;
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always@(amoExec_wordIdx or amoExec_current)
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begin
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case (amoExec_wordIdx[1])
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1'd0: vOld__h709 = amoExec_current[63:0];
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1'd1: vOld__h709 = amoExec_current[127:64];
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endcase
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end
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always@(amoExec_wordIdx or amoExec_current)
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begin
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case (amoExec_wordIdx)
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2'd0: vOld__h1136 = amoExec_current[31:0];
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2'd1: vOld__h1136 = amoExec_current[63:32];
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2'd2: vOld__h1136 = amoExec_current[95:64];
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2'd3: vOld__h1136 = amoExec_current[127:96];
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endcase
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end
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always@(amoExec_amo_inst)
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begin
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case (amoExec_amo_inst[3:2])
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2'd1: x__h611 = 128'h0000000000000000FFFFFFFFFFFFFFFF;
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2'd2: x__h611 = 128'h000000000000000000000000FFFFFFFF;
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default: x__h611 = 128'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
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endcase
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end
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always@(amoExec_amo_inst or shftAmnt__h634 or shftAmnt__h640)
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begin
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case (amoExec_amo_inst[3:2])
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2'd1: shftAmnt__h37 = shftAmnt__h634;
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2'd2: shftAmnt__h37 = shftAmnt__h640;
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default: shftAmnt__h37 = 8'd0;
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endcase
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end
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always@(amoExec_amo_inst or
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d40 or
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amoExec_inpt or
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vOld__h709 or
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d35)
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begin
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case (amoExec_amo_inst[7:4])
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4'd0: x__h707 = amoExec_inpt[63:0];
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4'd1: x__h707 = vOld__h709 + amoExec_inpt[63:0];
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4'd2: x__h707 = vOld__h709 ^ amoExec_inpt[63:0];
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4'd3: x__h707 = vOld__h709 & amoExec_inpt[63:0];
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4'd4: x__h707 = vOld__h709 | amoExec_inpt[63:0];
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4'd5:
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x__h707 =
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d35 ?
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vOld__h709 :
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amoExec_inpt[63:0];
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4'd6:
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x__h707 =
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d35 ?
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amoExec_inpt[63:0] :
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vOld__h709;
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4'd7:
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x__h707 =
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d40 ?
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vOld__h709 :
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amoExec_inpt[63:0];
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default: x__h707 =
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SEL_ARR_amoExec_current_BITS_63_TO_0_3_amoExec_ETC___d40 ?
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amoExec_inpt[63:0] :
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vOld__h709;
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endcase
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end
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always@(amoExec_amo_inst or
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d66 or
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amoExec_inpt or
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vOld__h1136 or
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d63)
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begin
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case (amoExec_amo_inst[7:4])
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4'd0: x__h1134 = amoExec_inpt[31:0];
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4'd1: x__h1134 = vOld__h1136 + amoExec_inpt[31:0];
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4'd2: x__h1134 = vOld__h1136 ^ amoExec_inpt[31:0];
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4'd3: x__h1134 = vOld__h1136 & amoExec_inpt[31:0];
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4'd4: x__h1134 = vOld__h1136 | amoExec_inpt[31:0];
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4'd5:
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x__h1134 =
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d63 ?
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vOld__h1136 :
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amoExec_inpt[31:0];
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4'd6:
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x__h1134 =
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d63 ?
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amoExec_inpt[31:0] :
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vOld__h1136;
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4'd7:
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x__h1134 =
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d66 ?
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vOld__h1136 :
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amoExec_inpt[31:0];
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default: x__h1134 =
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SEL_ARR_amoExec_current_BITS_31_TO_0_3_amoExec_ETC___d66 ?
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amoExec_inpt[31:0] :
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vOld__h1136;
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endcase
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end
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always@(amoExec_amo_inst or
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amoExec_current_BITS_127_TO_0_ULE_amoExec_inpt_ETC___d93 or
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amoExec_inpt or
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amoExec_current or
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amoExec_current_BITS_127_TO_0_SLE_amoExec_inpt_ETC___d90)
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begin
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case (amoExec_amo_inst[7:4])
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4'd0: tmpData__h32 = amoExec_inpt[127:0];
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4'd1: tmpData__h32 = amoExec_current[127:0] + amoExec_inpt[127:0];
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4'd2:
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tmpData__h32 =
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{ amoExec_current[127:64] ^ amoExec_inpt[127:64],
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amoExec_current[63:0] ^ amoExec_inpt[63:0] };
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4'd3:
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tmpData__h32 =
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{ amoExec_current[127:64] & amoExec_inpt[127:64],
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amoExec_current[63:0] & amoExec_inpt[63:0] };
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4'd4:
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tmpData__h32 =
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{ amoExec_current[127:64] | amoExec_inpt[127:64],
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amoExec_current[63:0] | amoExec_inpt[63:0] };
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4'd5:
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tmpData__h32 =
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amoExec_current_BITS_127_TO_0_SLE_amoExec_inpt_ETC___d90 ?
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amoExec_current[127:0] :
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amoExec_inpt[127:0];
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4'd6:
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tmpData__h32 =
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amoExec_current_BITS_127_TO_0_SLE_amoExec_inpt_ETC___d90 ?
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amoExec_inpt[127:0] :
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amoExec_current[127:0];
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4'd7:
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tmpData__h32 =
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amoExec_current_BITS_127_TO_0_ULE_amoExec_inpt_ETC___d93 ?
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amoExec_current[127:0] :
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amoExec_inpt[127:0];
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default: tmpData__h32 =
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amoExec_current_BITS_127_TO_0_ULE_amoExec_inpt_ETC___d93 ?
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amoExec_inpt[127:0] :
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amoExec_current[127:0];
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endcase
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end
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always@(amoExec_amo_inst or tmpData__h32 or tmpData__h632 or tmpData__h638)
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begin
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case (amoExec_amo_inst[3:2])
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2'd1: x__h700 = tmpData__h632;
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2'd2: x__h700 = tmpData__h638;
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default: x__h700 = tmpData__h32;
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endcase
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end
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endmodule // module_amoExec
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