From 6c71799edb2cac8ed0adc7877f00be23c2d453bf Mon Sep 17 00:00:00 2001 From: Alexandre Joannou Date: Fri, 30 Sep 2022 17:30:04 +0100 Subject: [PATCH] Added a toc to CHERI_CAP_API --- CHERI_CAP_API.adoc | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/CHERI_CAP_API.adoc b/CHERI_CAP_API.adoc index d8de766..3aef3b0 100644 --- a/CHERI_CAP_API.adoc +++ b/CHERI_CAP_API.adoc @@ -1,3 +1,9 @@ +:toc: macro +:toclevels: 4 +:toc-title: +:toc-placement!: +:source-highlighter: + Given that HDL languages are not all as expressive as each other when it comes to capturing an API, we express the CHERI CAP API in terms of pseudo-code, with constructs that can at least map to Verilog, as well as higher level HDLs @@ -21,6 +27,11 @@ A Verilog implementation can only capture this as a set of functions. We aim for the higher level HDLs wrappers to make use of more advanced language features where appropriate (structured types, typeclasses...). +[discrete] +== Contents + +toc::[] + === CHERI CAP API "types" ==== Software permission bits @@ -487,8 +498,6 @@ function Tuple2#(Bool, Bit#(mem_sz)) toMem (t cap); Note: Composing these two functions (in either order) is the identity. -=== Functions that can be cheap by relying on current capability representation - ==== maskAddr Mask the least significant bits of a CHERI capability address with a mask which