//
// Generated by Bluespec Compiler, version 2025.01.1 (build 65e3a87)
//
// On Tue Feb 17 13:11:39 GMT 2026
//
//
// Ports:
// Name                         I/O  size props
// wrap128_almightyCap            O   115 const
//
// No combinational paths from inputs to outputs
//
//

`ifdef BSV_ASSIGNMENT_DELAY
`else
  `define BSV_ASSIGNMENT_DELAY
`endif

`ifdef BSV_POSITIVE_RESET
  `define BSV_RESET_VALUE 1'b1
  `define BSV_RESET_EDGE posedge
`else
  `define BSV_RESET_VALUE 1'b0
  `define BSV_RESET_EDGE negedge
`endif

module module_wrap128_almightyCap(wrap128_almightyCap);
  // value method wrap128_almightyCap
  output [114 : 0] wrap128_almightyCap;

  // signals for module outputs
  wire [114 : 0] wrap128_almightyCap;

  // value method wrap128_almightyCap
  assign wrap128_almightyCap = 115'h40000000003FFDF555555690003F0 ;
endmodule  // module_wrap128_almightyCap