Add an Architecture Abstraction Layer.
Currently, we support one architecture, but this provides a layer for adding other architectures without adding more nested `#ifdef`s. Fixes #42
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86
src/aal/aal.h
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86
src/aal/aal.h
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#pragma once
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#include "ds/defines.h"
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#if defined(__i386__) || defined(_M_IX86) || defined(_X86_) || \
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defined(__amd64__) || defined(__x86_64__) || defined(_M_X64) || \
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defined(_M_AMD64)
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# define PLATFORM_IS_X86
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#endif
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namespace snmalloc
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{
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/**
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* Architecture Abstraction Layer. Includes default implementations of some
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* functions using compiler builtins. Falls back to the definitions in the
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* platform's AAL if the builtin does not exist.
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*/
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template<class Arch>
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struct AAL_Generic : Arch
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{
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/**
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* Prefetch a specific address.
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*
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* If the compiler provides a portable prefetch builtin, use it directly,
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* otherwise delegate to the architecture-specific layer. This allows new
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* architectures to avoid needing to implement a custom `prefetch` method
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* if they are used only with a compiler that provides the builtin.
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*/
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static inline void prefetch(void* ptr)
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{
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#if __has_builtin(__builtin_prefetch) && !defined(SNMALLOC_NO_AAL_BUILTINS)
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__builtin_prefetch(ptr);
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#else
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Arch::prefetch(ptr);
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#endif
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}
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/**
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* Return an architecture-specific cycle counter.
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*
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* If the compiler provides a portable prefetch builtin, use it directly,
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* otherwise delegate to the architecture-specific layer. This allows new
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* architectures to avoid needing to implement a custom `tick` method
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* if they are used only with a compiler that provides the builtin.
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*/
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static inline uint64_t tick()
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{
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#if __has_builtin(__builtin_readcyclecounter) && \
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!defined(SNMALLOC_NO_AAL_BUILTINS)
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return __builtin_readcyclecounter();
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#else
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return Arch::tick();
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#endif
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}
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};
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}
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#ifdef PLATFORM_IS_X86
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# include "aal_x86.h"
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#endif
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namespace snmalloc
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{
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using AAL = AAL_Generic<AAL_Arch>;
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}
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#if defined(_MSC_VER) && defined(SNMALLOC_VA_BITS_32)
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# include <intsafe.h>
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#endif
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#ifdef __POINTER_WIDTH__
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# if ((__POINTER_WIDTH__ == 64) && !defined(SNMALLOC_VA_BITS_64)) || \
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((__POINTER_WIDTH__ == 32) && !defined(SNMALLOC_VA_BITS_32))
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# error Compiler and PAL define inconsistent bit widths
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# endif
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#endif
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#if defined(SNMALLOC_VA_BITS_32) && defined(SNMALLOC_VA_BITS_64)
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# error Only one of SNMALLOC_VA_BITS_64 and SNMALLOC_VA_BITS_32 may be defined!
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#endif
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#ifdef SNMALLOC_VA_BITS_32
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static_assert(sizeof(size_t) == 4);
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#elif defined(SNMALLOC_VA_BITS_64)
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static_assert(sizeof(size_t) == 8);
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#endif
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112
src/aal/aal_x86.h
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112
src/aal/aal_x86.h
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#pragma once
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#ifdef _MSC_VER
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# include <immintrin.h>
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# include <intrin.h>
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#else
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# include <cpuid.h>
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# include <emmintrin.h>
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#endif
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#if defined(__linux__) && !defined(OPEN_ENCLAVE)
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# include <x86intrin.h>
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#endif
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#if defined(__amd64__) || defined(__x86_64__) || defined(_M_X64) || \
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defined(_M_AMD64)
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# define SNMALLOC_VA_BITS_64
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#else
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# define SNMALLOC_VA_BITS_32
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#endif
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namespace snmalloc
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{
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/**
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* x86-specific architecture abstraction layer.
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*/
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class AAL_x86
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{
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/**
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* Read the timestamp counter, guaranteeing that all previous instructions
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* have been retired.
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*/
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static inline uint64_t tickp()
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{
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unsigned int aux;
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#if defined(_MSC_VER)
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return __rdtscp(&aux);
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#else
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return __builtin_ia32_rdtscp(&aux);
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#endif
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}
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/**
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* Issue a fully serialising instruction.
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*/
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static inline void halt_out_of_order()
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{
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#if defined(_MSC_VER)
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int cpu_info[4];
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__cpuid(cpu_info, 0);
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#else
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unsigned int eax, ebx, ecx, edx;
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__get_cpuid(0, &eax, &ebx, &ecx, &edx);
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#endif
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}
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public:
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/**
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* On pipelined processors, notify the core that we are in a spin loop and
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* that speculative execution past this point may not be a performance gain.
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*/
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static inline void pause()
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{
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_mm_pause();
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}
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/**
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* Issue a prefetch hint at the specified address.
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*/
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static inline void prefetch(void* ptr)
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{
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_mm_prefetch(reinterpret_cast<const char*>(ptr), _MM_HINT_T0);
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}
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/**
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* Return a cycle counter value.
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*/
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static inline uint64_t tick()
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{
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#if defined(_MSC_VER)
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return __rdtsc();
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#else
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return __builtin_ia32_rdtsc();
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#endif
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}
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/**
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* Return the cycle counter value that can be used to indicate the start of
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* a benchmark run. This is responsible for ensuring any serialisation
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* that the pipeline may require.
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*/
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static inline uint64_t benchmark_time_start()
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{
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halt_out_of_order();
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return AAL_Generic<AAL_x86>::tick();
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}
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/**
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* Return the cycle counter value that can be used to indicate the end of a
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* benchmark run. This is responsible for ensuring any serialisation that
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* the pipeline may require.
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*/
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static inline uint64_t benchmark_time_end()
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{
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uint64_t t = tickp();
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halt_out_of_order();
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return t;
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}
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};
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using AAL_Arch = AAL_x86;
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}
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