2dd63606af
* Sparc support proposal. * Tweaks from feedback. Shift to integer/pointers cast like other archs. Assembly reworks. Note apparently reading the register once is sufficient to provoke a pause in the cpu adding a clobber tough.
63 lines
1.3 KiB
C++
63 lines
1.3 KiB
C++
#pragma once
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#if defined(__arch64__) // More reliable than __sparc64__
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# define SNMALLOC_VA_BITS_64
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#else
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# define SNMALLOC_VA_BITS_32
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#endif
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namespace snmalloc
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{
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/**
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* Sparc architecture abstraction layer.
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*/
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class AAL_Sparc
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{
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public:
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/**
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* Bitmap of AalFeature flags
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*/
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static constexpr uint64_t aal_features = IntegerPointers;
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static constexpr enum AalName aal_name = Sparc;
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#ifdef SNMALLOC_VA_BITS_64
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/**
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* Even Ultra-Sparc I supports 8192 and onwards
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*/
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static constexpr size_t smallest_page_size = 0x2000;
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#else
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static constexpr size_t smallest_page_size = 0x1000;
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#endif
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/**
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* On Sparc ideally pause instructions ought to be
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* optimised per Sparc processor but here a version
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* as least common denominator to avoid numerous ifdef,
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* reading Conditions Code Register here
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*/
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static inline void pause()
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{
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__asm__ volatile("rd %%ccr, %%g0" ::: "memory");
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}
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static inline void prefetch(void* ptr)
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{
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#ifdef SNMALLOC_VA_BITS_64
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__asm__ volatile("prefetch [%0], 0" ::"r"(ptr));
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#else
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UNUSED(ptr);
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#endif
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}
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static inline uint64_t tick()
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{
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uint64_t tick;
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__asm__ volatile("rd %%asr4, %0" : "=r"(tick));
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return tick;
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}
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};
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using AAL_Arch = AAL_Sparc;
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} // namespace snmalloc
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