The spelling of inline assembler constraints on Morello would be different, but Jessica Clarke points out that we should just be using the builtin when available, so do that instead. Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
63 lines
1.3 KiB
C++
63 lines
1.3 KiB
C++
#pragma once
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#if defined(__aarch64__)
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# define SNMALLOC_VA_BITS_64
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# ifdef _MSC_VER
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# include <arm64_neon.h>
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# endif
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#else
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# define SNMALLOC_VA_BITS_32
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# ifdef _MSC_VER
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# include <arm_neon.h>
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# endif
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#endif
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#include <cstddef>
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namespace snmalloc
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{
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/**
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* ARM-specific architecture abstraction layer.
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*/
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class AAL_arm
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{
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public:
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/**
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* Bitmap of AalFeature flags
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*/
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static constexpr uint64_t aal_features =
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IntegerPointers | NoCpuCycleCounters;
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static constexpr enum AalName aal_name = ARM;
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static constexpr size_t smallest_page_size = 0x1000;
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/**
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* On pipelined processors, notify the core that we are in a spin loop and
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* that speculative execution past this point may not be a performance gain.
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*/
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static inline void pause()
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{
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#ifdef _MSC_VER
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__yield();
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#else
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__asm__ volatile("yield");
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#endif
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}
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static inline void prefetch(void* ptr)
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{
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#ifdef _MSC_VER
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__prefetch(ptr);
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#elif __has_builtin(__builtin_prefetch) && !defined(SNMALLOC_NO_AAL_BUILTINS)
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__builtin_prefetch(ptr);
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#elif defined(SNMALLOC_VA_BITS_64)
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__asm__ volatile("prfm pldl1keep, [%0]" : "=r"(ptr));
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#else
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__asm__ volatile("pld\t[%0]" : "=r"(ptr));
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#endif
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}
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};
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using AAL_Arch = AAL_arm;
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} // namespace snmalloc
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