saving current changes

This commit is contained in:
2024-10-21 13:47:59 +01:00
parent df9392379c
commit 1dd09f4a0c
8 changed files with 15247 additions and 13 deletions

View File

@@ -37,7 +37,12 @@
"vmmeter.h": "c",
"malloc.h": "c",
"lock.h": "c",
"proc.h": "c"
"proc.h": "c",
"kernel.h": "c",
"sbuf.h": "c",
"opt_vm.h": "c",
"stack": "c",
"ios": "c"
},
"C_Cpp.errorSquiggles": "disabled"
}

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@@ -44,6 +44,10 @@
#include <sys/stat.h>
#include <fcntl.h>
// #include <sys/types.h>
#include <sys/mman.h>
// #include <fcntl.h>
//#define TIMING
@@ -142,12 +146,16 @@ INITAlloc(void) {
// Pre Allocate 600 MB
sz = 100000000;
int fd = open(FILENAME, O_RDWR, 0600);
// int fd = open(FILENAME, O_RDWR, 0600);
if (fd < 0) {
perror("open");
exit(EXIT_FAILURE);
}
int fd = memfd_create("kilgore",0x00000004);
if (fd == -1)
perror("memfd_create()");
// if (fd < 0) {
// perror("open");
// exit(EXIT_FAILURE);
// }
off_t offset = 0; // offset to seek to.

View File

@@ -37,7 +37,6 @@ __FBSDID("$FreeBSD$");
#include <sys/cdefs.h>
// #include "opt_ddb.h"
// #include "opt_vm.h"
#include <sys/asan.h>
#include <sys/kdb.h>
#include <sys/msan.h>
@@ -102,10 +101,31 @@ dtrace_malloc_probe_func_t __read_mostly dtrace_malloc_probe;
#include <cheri/cheric.h>
#include <vm/vm_object.h>
#include <vm/vm_radix.h>
// -------------------------------------
// ------------------------ Inside physical page map
#include <sys/bitstring.h>
#include <sys/ktr.h>
#include <sys/limits.h>
#include <sys/mman.h>
#include <sys/msgbuf.h>
#include <sys/physmem.h>
#include <sys/sx.h>
#include <sys/sched.h>
#include <sys/_unrhdr.h>
#include <vm/vm_extern.h>
#include <vm/vm_reserv.h>
#include <vm/vm_dumpset.h>
#include <vm/uma.h>
#include <machine/asan.h>
#include <machine/machdep.h>
#include <machine/md_var.h>
#include <machine/pcb.h>
// #include "pmap.c"
// #define RTE_CONTIGMEM_DEFAULT_BUF_SIZE 1073741824
@@ -196,6 +216,320 @@ static struct cdevsw contigmem_ops = {
.d_close = contigmem_close,
};
// int
// pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
// u_int flags, int8_t psind)
// {
// struct rwlock *lock;
// pd_entry_t *pde;
// pt_entry_t new_l3, orig_l3;
// pt_entry_t *l2, *l3;
// pv_entry_t pv;
// vm_paddr_t opa, pa;
// vm_page_t mpte, om;
// boolean_t nosleep;
// int lvl, rv;
// KASSERT(ADDR_IS_CANONICAL(va),
// ("%s: Address not in canonical form: %lx", __func__, va));
// va = trunc_page(va);
// if ((m->oflags & VPO_UNMANAGED) == 0)
// VM_PAGE_OBJECT_BUSY_ASSERT(m);
// pa = VM_PAGE_TO_PHYS(m);
// new_l3 = (pt_entry_t)(PHYS_TO_PTE(pa) | ATTR_DEFAULT | L3_PAGE);
// new_l3 |= pmap_pte_memattr(pmap, m->md.pv_memattr);
// new_l3 |= pmap_pte_prot(pmap, prot, flags, m, va);
// if ((flags & PMAP_ENTER_WIRED) != 0)
// new_l3 |= ATTR_SW_WIRED;
// if (pmap->pm_stage == PM_STAGE1) {
// if (!ADDR_IS_KERNEL(va))
// new_l3 |= ATTR_S1_AP(ATTR_S1_AP_USER) | ATTR_S1_PXN;
// else
// new_l3 |= ATTR_S1_UXN;
// if (pmap != kernel_pmap)
// new_l3 |= ATTR_S1_nG;
// } else {
// /*
// * Clear the access flag on executable mappings, this will be
// * set later when the page is accessed. The fault handler is
// * required to invalidate the I-cache.
// *
// * TODO: Switch to the valid flag to allow hardware management
// * of the access flag. Much of the pmap code assumes the
// * valid flag is set and fails to destroy the old page tables
// * correctly if it is clear.
// */
// if (prot & VM_PROT_EXECUTE)
// new_l3 &= ~ATTR_AF;
// }
// if ((m->oflags & VPO_UNMANAGED) == 0) {
// new_l3 |= ATTR_SW_MANAGED;
// if ((prot & VM_PROT_WRITE) != 0) {
// new_l3 |= ATTR_SW_DBM;
// if ((flags & VM_PROT_WRITE) == 0) {
// if (pmap->pm_stage == PM_STAGE1)
// new_l3 |= ATTR_S1_AP(ATTR_S1_AP_RO);
// else
// new_l3 &=
// ~ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE);
// }
// }
// }
// CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
// lock = NULL;
// PMAP_LOCK(pmap);
// /* Wait until we lock the pmap to protect the bti rangeset */
// new_l3 |= pmap_pte_bti(pmap, va);
// if ((flags & PMAP_ENTER_LARGEPAGE) != 0) {
// KASSERT((m->oflags & VPO_UNMANAGED) != 0,
// ("managed largepage va %#lx flags %#x", va, flags));
// new_l3 &= ~L3_PAGE;
// if (psind == 2) {
// PMAP_ASSERT_L1_BLOCKS_SUPPORTED;
// new_l3 |= L1_BLOCK;
// } else /* (psind == 1) */
// new_l3 |= L2_BLOCK;
// rv = pmap_enter_largepage(pmap, va, new_l3, flags, psind);
// goto out;
// }
// if (psind == 1) {
// /* Assert the required virtual and physical alignment. */
// KASSERT((va & L2_OFFSET) == 0, ("pmap_enter: va unaligned"));
// KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
// rv = pmap_enter_l2(pmap, va, (new_l3 & ~L3_PAGE) | L2_BLOCK,
// flags, m, &lock);
// goto out;
// }
// mpte = NULL;
// /*
// * In the case that a page table page is not
// * resident, we are creating it here.
// */
// retry:
// pde = pmap_pde(pmap, va, &lvl);
// if (pde != NULL && lvl == 2) {
// l3 = pmap_l2_to_l3(pde, va);
// if (!ADDR_IS_KERNEL(va) && mpte == NULL) {
// mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(pde)));
// mpte->ref_count++;
// }
// goto havel3;
// } else if (pde != NULL && lvl == 1) {
// l2 = pmap_l1_to_l2(pde, va);
// if ((pmap_load(l2) & ATTR_DESCR_MASK) == L2_BLOCK &&
// (l3 = pmap_demote_l2_locked(pmap, l2, va, &lock)) != NULL) {
// l3 = &l3[pmap_l3_index(va)];
// if (!ADDR_IS_KERNEL(va)) {
// mpte = PHYS_TO_VM_PAGE(
// PTE_TO_PHYS(pmap_load(l2)));
// mpte->ref_count++;
// }
// goto havel3;
// }
// /* We need to allocate an L3 table. */
// }
// if (!ADDR_IS_KERNEL(va)) {
// nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
// /*
// * We use _pmap_alloc_l3() instead of pmap_alloc_l3() in order
// * to handle the possibility that a superpage mapping for "va"
// * was created while we slept.
// */
// mpte = _pmap_alloc_l3(pmap, pmap_l2_pindex(va),
// nosleep ? NULL : &lock);
// if (mpte == NULL && nosleep) {
// CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
// rv = KERN_RESOURCE_SHORTAGE;
// goto out;
// }
// goto retry;
// } else
// panic("pmap_enter: missing L3 table for kernel va %#lx", va);
// havel3:
// orig_l3 = pmap_load(l3);
// opa = PTE_TO_PHYS(orig_l3);
// pv = NULL;
// /*
// * Is the specified virtual address already mapped?
// */
// if (pmap_l3_valid(orig_l3)) {
// /*
// * Wiring change, just update stats. We don't worry about
// * wiring PT pages as they remain resident as long as there
// * are valid mappings in them. Hence, if a user page is wired,
// * the PT page will be also.
// */
// if ((flags & PMAP_ENTER_WIRED) != 0 &&
// (orig_l3 & ATTR_SW_WIRED) == 0)
// pmap->pm_stats.wired_count++;
// else if ((flags & PMAP_ENTER_WIRED) == 0 &&
// (orig_l3 & ATTR_SW_WIRED) != 0)
// pmap->pm_stats.wired_count--;
// /*
// * Remove the extra PT page reference.
// */
// if (mpte != NULL) {
// mpte->ref_count--;
// KASSERT(mpte->ref_count > 0,
// ("pmap_enter: missing reference to page table page,"
// " va: 0x%lx", va));
// }
// /*
// * Has the physical page changed?
// */
// if (opa == pa) {
// /*
// * No, might be a protection or wiring change.
// */
// if ((orig_l3 & ATTR_SW_MANAGED) != 0 &&
// (new_l3 & ATTR_SW_DBM) != 0)
// vm_page_aflag_set(m, PGA_WRITEABLE);
// goto validate;
// }
// /*
// * The physical page has changed. Temporarily invalidate
// * the mapping.
// */
// orig_l3 = pmap_load_clear(l3);
// KASSERT(PTE_TO_PHYS(orig_l3) == opa,
// ("pmap_enter: unexpected pa update for %#lx", va));
// if ((orig_l3 & ATTR_SW_MANAGED) != 0) {
// om = PHYS_TO_VM_PAGE(opa);
// /*
// * The pmap lock is sufficient to synchronize with
// * concurrent calls to pmap_page_test_mappings() and
// * pmap_ts_referenced().
// */
// pmap_page_dirty(pmap, orig_l3, om);
// if ((orig_l3 & ATTR_AF) != 0) {
// pmap_invalidate_page(pmap, va, true);
// vm_page_aflag_set(om, PGA_REFERENCED);
// }
// CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, om);
// pv = pmap_pvh_remove(&om->md, pmap, va);
// if ((m->oflags & VPO_UNMANAGED) != 0)
// free_pv_entry(pmap, pv);
// if ((om->a.flags & PGA_WRITEABLE) != 0 &&
// TAILQ_EMPTY(&om->md.pv_list) &&
// ((om->flags & PG_FICTITIOUS) != 0 ||
// TAILQ_EMPTY(&page_to_pvh(om)->pv_list)))
// vm_page_aflag_clear(om, PGA_WRITEABLE);
// } else {
// KASSERT((orig_l3 & ATTR_AF) != 0,
// ("pmap_enter: unmanaged mapping lacks ATTR_AF"));
// pmap_invalidate_page(pmap, va, true);
// }
// orig_l3 = 0;
// } else {
// /*
// * Increment the counters.
// */
// if ((new_l3 & ATTR_SW_WIRED) != 0)
// pmap->pm_stats.wired_count++;
// pmap_resident_count_inc(pmap, 1);
// }
// /*
// * Enter on the PV list if part of our managed memory.
// */
// if ((m->oflags & VPO_UNMANAGED) == 0) {
// if (pv == NULL) {
// pv = get_pv_entry(pmap, &lock);
// pv->pv_va = va;
// }
// CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
// TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
// m->md.pv_gen++;
// if ((new_l3 & ATTR_SW_DBM) != 0)
// vm_page_aflag_set(m, PGA_WRITEABLE);
// }
// validate:
// if (pmap->pm_stage == PM_STAGE1) {
// /*
// * Sync icache if exec permission and attribute
// * VM_MEMATTR_WRITE_BACK is set. Do it now, before the mapping
// * is stored and made valid for hardware table walk. If done
// * later, then other can access this page before caches are
// * properly synced. Don't do it for kernel memory which is
// * mapped with exec permission even if the memory isn't going
// * to hold executable code. The only time when icache sync is
// * needed is after kernel module is loaded and the relocation
// * info is processed. And it's done in elf_cpu_load_file().
// */
// if ((prot & VM_PROT_EXECUTE) && pmap != kernel_pmap &&
// m->md.pv_memattr == VM_MEMATTR_WRITE_BACK &&
// (opa != pa || (orig_l3 & ATTR_S1_XN))) {
// PMAP_ASSERT_STAGE1(pmap);
// cpu_icache_sync_range(PHYS_TO_DMAP_PAGE(pa), PAGE_SIZE);
// }
// } else {
// cpu_dcache_wb_range(PHYS_TO_DMAP_PAGE(pa), PAGE_SIZE);
// }
// /*
// * Update the L3 entry
// */
// if (pmap_l3_valid(orig_l3)) {
// KASSERT(opa == pa, ("pmap_enter: invalid update"));
// if ((orig_l3 & ~ATTR_AF) != (new_l3 & ~ATTR_AF)) {
// /* same PA, different attributes */
// orig_l3 = pmap_load_store(l3, new_l3);
// pmap_invalidate_page(pmap, va, true);
// if ((orig_l3 & ATTR_SW_MANAGED) != 0)
// pmap_page_dirty(pmap, orig_l3, m);
// } else {
// /*
// * orig_l3 == new_l3
// * This can happens if multiple threads simultaneously
// * access not yet mapped page. This bad for performance
// * since this can cause full demotion-NOP-promotion
// * cycle.
// * Another possible reasons are:
// * - VM and pmap memory layout are diverged
// * - tlb flush is missing somewhere and CPU doesn't see
// * actual mapping.
// */
// CTR4(KTR_PMAP, "%s: already mapped page - "
// "pmap %p va 0x%#lx pte 0x%lx",
// __func__, pmap, va, new_l3);
// }
// } else {
// /* New mapping */
// pmap_store(l3, new_l3);
// dsb(ishst);
// }
// #if VM_NRESERVLEVEL > 0
// /*
// * If both the page table page and the reservation are fully
// * populated, then attempt promotion.
// */
// if ((mpte == NULL || mpte->ref_count == NL3PG) &&
// (m->flags & PG_FICTITIOUS) == 0 &&
// vm_reserv_level_iffullpop(m) == 0)
// (void)pmap_promote_l2(pmap, pde, va, mpte, &lock);
// #endif
// rv = KERN_SUCCESS;
// out:
// if (lock != NULL)
// rw_wunlock(lock);
// PMAP_UNLOCK(pmap);
// return (rv);
// }
static void
vm_domainset_iter_ignore(struct vm_domainset_iter *di, int domain)
{
@@ -263,10 +597,13 @@ kmem_alloc_contig_domain(int domain, vm_size_t size, int flags, vm_paddr_t low,
int pflags;
#ifdef __CHERI_PURE_CAPABILITY__
printf("using CHERI capability");
size = CHERI_REPRESENTABLE_LENGTH(size);
#endif
object = kernel_object;
printf("=== size[%lu] ==== ", size);
asize = round_page(size);
printf("=== asize[%lu] ==== ", asize);
vmem = vm_dom[domain].vmd_kernel_arena;
if (vmem_alloc(vmem, asize, flags | M_BESTFIT, &addr))
return (NULL);
@@ -274,8 +611,14 @@ kmem_alloc_contig_domain(int domain, vm_size_t size, int flags, vm_paddr_t low,
offset = addr - VM_MIN_KERNEL_ADDRESS;
pflags = malloc2vm_flags(flags) | VM_ALLOC_WIRED;
npages = atop(asize);
printf("=== [%lu] ==== ", npages);
VM_OBJECT_WLOCK(object);
printf("reaches to contig pages");
// to trace the issue regarding just using huge pages
// directly instead of using THP.
// - Calculate the how the number of pages is calculated.
// - Reason why 100000 pages is needed
m = kmem_alloc_contig_pages(object, atop(offset), domain,
pflags, npages, low, high, alignment, boundary, memattr);
if (m == NULL) {
@@ -288,6 +631,11 @@ kmem_alloc_contig_domain(int domain, vm_size_t size, int flags, vm_paddr_t low,
vm_page_domain(m), domain));
end_m = m + npages;
tmp = addr;
// Track number of Pmap entries
// - To see if the TLB layer reduces the clock cycles (This could in theory this would reduce the number of entries if
// the loop reduced)
for (; m < end_m; m++) {
if ((flags & M_ZERO) && (m->flags & PG_ZERO) == 0)
pmap_zero_page(m);
@@ -295,10 +643,14 @@ kmem_alloc_contig_domain(int domain, vm_size_t size, int flags, vm_paddr_t low,
VM_OBJECT_ASSERT_CAP(object, VM_PROT_RW_CAP);
vm_page_aflag_set(m, PGA_CAPSTORE | PGA_CAPDIRTY);
// To modify pmap_enter to use only huge pages
// To test if huge pages is used
// To port over pmap and to then do a test if there is
// a different run time for different pmap implementations
pmap_enter(kernel_pmap, tmp, m, VM_PROT_RW_CAP,
VM_PROT_RW_CAP | PMAP_ENTER_WIRED, 0);
tmp += PAGE_SIZE;
}
VM_OBJECT_WUNLOCK(object);
kmem_alloc_san(addr, size, asize, flags);
#ifdef __CHERI_PURE_CAPABILITY__
@@ -354,7 +706,6 @@ contigmalloc(unsigned long size, struct malloc_type *type, int flags,
vm_paddr_t low, vm_paddr_t high, unsigned long alignment,
vm_paddr_t boundary)
{
printf("contigmalloc called");
void *ret;
ret = (void *)kmem_alloc_contig(size, flags, low, high, alignment,
@@ -400,6 +751,7 @@ contigmem_load()
}
for (i = 0; i < contigmem_num_buffers; i++) {
// madvise(addr, contigmem_buffer_size,, 1)
addr = contigmalloc(contigmem_buffer_size, M_CONTIGMEM, M_NOWAIT,
0, BUS_SPACE_MAXADDR, contigmem_buffer_size, 0);
if (addr == NULL) {

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@@ -469,7 +469,7 @@ malloc_type_freed(struct malloc_type *mtp, void *addr, unsigned long size)
* the allocation fails.
*/
void *
contigmalloc(unsigned long size, struct malloc_type *type, int flags,
contigmallocTest(unsigned long size, struct malloc_type *type, int flags,
vm_paddr_t low, vm_paddr_t high, unsigned long alignment,
vm_paddr_t boundary)
{

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@@ -1,4 +1,4 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Intel Corporation
sources = files('contigmem.c','malloc.c')
sources = files('contigmem.c','malloc.c','pmap.c')

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@@ -0,0 +1,233 @@
/*-
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 1991, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* The Mach Operating System project at Carnegie-Mellon University.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*
* Copyright (c) 1987, 1990 Carnegie-Mellon University.
* All rights reserved.
*
* Author: Avadis Tevanian, Jr.
*
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
*
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
*
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
* School of Computer Science
* Carnegie Mellon University
* Pittsburgh PA 15213-3890
*
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*/
/*
* Machine address mapping definitions -- machine-independent
* section. [For machine-dependent section, see "machine/pmap.h".]
*/
#ifndef _PMAP_VM_
#define _PMAP_VM_
/*
* Each machine dependent implementation is expected to
* keep certain statistics. They may do this anyway they
* so choose, but are expected to return the statistics
* in the following structure.
*/
struct pmap_statistics {
long resident_count; /* # of pages mapped (total) */
long wired_count; /* # of pages wired */
};
typedef struct pmap_statistics *pmap_statistics_t;
/*
* Each machine-dependent implementation is required to provide:
*
* vm_memattr_t pmap_page_get_memattr(vm_page_t);
* boolean_t pmap_page_is_mapped(vm_page_t);
* boolean_t pmap_page_is_write_mapped(vm_page_t);
* void pmap_page_set_memattr(vm_page_t, vm_memattr_t);
*/
#include <machine/pmap.h>
#ifdef _KERNEL
#include <sys/_cpuset.h>
struct thread;
/*
* Updates to kernel_vm_end are synchronized by the kernel_map's system mutex.
*/
extern vm_offset_t kernel_vm_end;
/*
* Flags for pmap_enter(). The bits in the low-order byte are reserved
* for the protection code (vm_prot_t) that describes the fault type.
* Bits 24 through 31 are reserved for the pmap's internal use.
*/
#define PMAP_ENTER_NOSLEEP 0x00000100
#define PMAP_ENTER_WIRED 0x00000200
#define PMAP_ENTER_LARGEPAGE 0x00000400
#define PMAP_ENTER_RESERVED 0xFF000000
/*
* Define the maximum number of machine-dependent reference bits that are
* cleared by a call to pmap_ts_referenced(). This limit serves two purposes.
* First, it bounds the cost of reference bit maintenance on widely shared
* pages. Second, it prevents numeric overflow during maintenance of a
* widely shared page's "act_count" field. An overflow could result in the
* premature deactivation of the page.
*/
#define PMAP_TS_REFERENCED_MAX 5
void pmap_activate(struct thread *td);
void pmap_active_cpus(pmap_t pmap, cpuset_t *res);
void pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva,
int advice);
void pmap_align_superpage(vm_object_t, vm_ooffset_t, vm_offset_t *,
vm_size_t);
#ifdef CHERI_CAPREVOKE
static const int PMAP_CAPLOADGEN_HASCAPS = 0x1;
static const int PMAP_CAPLOADGEN_NONEWMAPS = 0x2; // no new mappings
static const int PMAP_CAPLOADGEN_UPDATETLB = 0x4;
static const int PMAP_CAPLOADGEN_XBUSIED = 0x8; // input page xbusied, !wired
enum pmap_caploadgen_res {
PMAP_CAPLOADGEN_OK = 0, /* Update done */
PMAP_CAPLOADGEN_ALREADY = 1, /* Update already applied */
PMAP_CAPLOADGEN_CLEAN = 2, /* Like _ALREADY, and !CAPSTORE */
PMAP_CAPLOADGEN_UNABLE = 3, /* No valid PTE at this address */
PMAP_CAPLOADGEN_TEARDOWN = 4, /* Mapping being torn down */
PMAP_CAPLOADGEN_SCAN_RO_WIRED = 5, /* mapped RO and wired */
PMAP_CAPLOADGEN_SCAN_RO_XBUSIED = 6, /* mapped RO and xbusy */
PMAP_CAPLOADGEN_SCAN_RW_XBUSIED = 7, /* mapped RW and xbusy */
};
enum pmap_caploadgen_res pmap_caploadgen_update(pmap_t, vm_offset_t,
vm_page_t *, int flags);
void pmap_caploadgen_next(pmap_t pmap);
void pmap_assert_consistent_clg(pmap_t, vm_offset_t);
#endif
void pmap_clear_modify(vm_page_t m);
void pmap_copy(pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t);
void pmap_copy_page(vm_page_t, vm_page_t);
#if __has_feature(capabilities)
void pmap_copy_page_tags(vm_page_t, vm_page_t);
#endif
void pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset,
vm_page_t mb[], vm_offset_t b_offset, int xfersize);
#if __has_feature(capabilities)
void pmap_copy_pages_tags(vm_page_t ma[], vm_offset_t a_offset,
vm_page_t mb[], vm_offset_t b_offset, int xfersize);
#endif
/*
* CHERI capability revocation imposes the following novel demand on pmap_enter
* and its friends: the page must be suitable for insertion at the current
* revocation epoch. In particular, if a load-side sweep is in progres, either
* the page must not be carrying capabilities, the new mapping must lack read
* permission, or all capabilities within the page must be checked for
* revocation. This responsibility falls to **the caller of pmap_enter**!
*/
int pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m,
vm_prot_t prot, u_int flags, int8_t psind);
void pmap_enter_object(pmap_t pmap, vm_offset_t start,
vm_offset_t end, vm_page_t m_start, vm_prot_t prot);
void pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m,
vm_prot_t prot);
vm_paddr_t pmap_extract(pmap_t pmap, vm_offset_t va);
vm_page_t pmap_extract_and_hold(pmap_t pmap, vm_offset_t va,
vm_prot_t prot);
void pmap_growkernel(vm_offset_t);
void pmap_init(void);
boolean_t pmap_is_modified(vm_page_t m);
boolean_t pmap_is_prefaultable(pmap_t pmap, vm_offset_t va);
boolean_t pmap_is_referenced(vm_page_t m);
boolean_t pmap_is_valid_memattr(pmap_t, vm_memattr_t);
vm_pointer_t pmap_map(vm_pointer_t *, vm_paddr_t, vm_paddr_t, int);
int pmap_mincore(pmap_t pmap, vm_offset_t addr,
vm_paddr_t *pap);
void pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
vm_object_t object, vm_pindex_t pindex, vm_size_t size);
boolean_t pmap_page_exists_quick(pmap_t pmap, vm_page_t m);
void pmap_page_init(vm_page_t m);
int pmap_page_wired_mappings(vm_page_t m);
int pmap_pinit(pmap_t);
void pmap_pinit0(pmap_t);
void pmap_protect(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t);
void pmap_qenter(vm_offset_t, vm_page_t *, int);
void pmap_qremove(vm_offset_t, int);
vm_pointer_t pmap_quick_enter_page(vm_page_t);
void pmap_quick_remove_page(vm_offset_t);
void pmap_release(pmap_t);
void pmap_remove(pmap_t, vm_offset_t, vm_offset_t);
void pmap_remove_all(vm_page_t m);
void pmap_remove_pages(pmap_t);
void pmap_remove_write(vm_page_t m);
void pmap_sync_icache(pmap_t, vm_offset_t, vm_size_t);
int pmap_ts_referenced(vm_page_t m);
void pmap_unwire(pmap_t pmap, vm_offset_t start, vm_offset_t end);
void pmap_zero_page(vm_page_t);
void pmap_zero_page_area(vm_page_t, int off, int size);
#define pmap_resident_count(pm) ((pm)->pm_stats.resident_count)
#define pmap_wired_count(pm) ((pm)->pm_stats.wired_count)
/*
* This isn't the ideal place to put these, but avoids having to do it for
* every architecture. If tags become more widely used, we might need to do
* so.
*/
#if !__has_feature(capabilities)
#define pmap_copy_page_tags(src, dst) pmap_copy_page((src), (dst))
#endif
#endif /* _KERNEL */
#endif /* _PMAP_VM_ */
// CHERI CHANGES START
// {
// "updated": 20230509,
// "target_type": "header",
// "changes": [
// "support"
// ],
// "changes_purecap": [
// "pointer_as_integer"
// ],
// "change_comment": ""
// }
// CHERI CHANGES END